[v1,46/57] xen/riscv: define an address of frame table

Message ID	8d3a615afbcff9681aa0ba8e2272d7e7e26251d1.1692181079.git.oleksii.kurochko@gmail.com (mailing list archive)
State	New, archived
Headers	show Return-Path: <xen-devel-bounces@lists.xenproject.org> Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" <xen-devel-bounces@lists.xenproject.org> From: Oleksii Kurochko <oleksii.kurochko@gmail.com> To: xen-devel@lists.xenproject.org Cc: Oleksii Kurochko <oleksii.kurochko@gmail.com>, Bob Eshleman <bobbyeshleman@gmail.com>, Alistair Francis <alistair.francis@wdc.com>, Connor Davis <connojdavis@gmail.com> Subject: [PATCH v1 46/57] xen/riscv: define an address of frame table Date: Wed, 16 Aug 2023 13:19:59 +0300 Message-ID: <8d3a615afbcff9681aa0ba8e2272d7e7e26251d1.1692181079.git.oleksii.kurochko@gmail.com> In-Reply-To: <cover.1692181079.git.oleksii.kurochko@gmail.com> References: <cover.1692181079.git.oleksii.kurochko@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit
Series	Enable build of full Xen for RISC-V \| expand [v1,00/57] Enable build of full Xen for RISC-V [v1,01/57] xen/riscv:introduce asm/byteorder.h [v1,02/57] xen/riscv: add public arch-riscv.h [v1,03/57] xen/riscv: introduce spinlock.h [v1,04/57] xen/riscv: introduce fence.h [v1,05/57] xen/riscv: introduce arch-riscv/hvm/save.h [v1,06/57] xen/riscv: introduce paging.h [v1,07/57] xen/riscv: introduce asm/cpufeature.h [v1,08/57] xen/riscv: introduce asm/device.h [v1,09/57] xen/riscv: introduce asm/event.h [v1,10/57] xen/riscv: introduce asm/grant_table.h [v1,11/57] xen/riscv: introduce asm/guest_atomics.h [v1,12/57] xen/riscv: introduce asm/hypercall.h [v1,13/57] xen/riscv: introduce asm/iocap.h [v1,14/57] xen/riscv: introduce asm/iommu.h [v1,15/57] xen/riscv: introduce asm/mem_access.h [v1,16/57] xen/riscv: introduce asm/nospec.h [v1,17/57] xen/riscv: introduce asm/pci.h [v1,18/57] xen/riscv: introduce asm/random.h [v1,19/57] xen/riscv: introduce asm/setup.h [v1,20/57] xen/riscv: introduce asm/system.h [v1,21/57] xen/riscv: introduce asm/xenoprof.h [v1,22/57] xen/riscv: introduce bitops.h [v1,23/57] xen/riscv: introduce flushtlb.h [v1,24/57] xen/riscv: introduce asm/percpu.h [v1,25/57] xen/riscv: introduce asm/smp.h [v1,26/57] xen/riscv: introduce asm/atomic.h [v1,27/57] xen/riscv: introduce cmpxchg.h [v1,28/57] xen/riscv: introduce asm/io.h [v1,29/57] xen/riscv: introduce asm/hardirq.h [v1,30/57] xen/riscv: introduce div64.h [v1,31/57] xen/riscv: define bug frame tables in xen.lds.S [v1,32/57] xen/riscv: introduce bit operations [v1,33/57] xen/riscv: introduce asm/altp2m.h [v1,34/57] xen/riscv: introduce asm/delay.h [v1,35/57] xen/riscv: introduce asm/domain.h [v1,36/57] xen/riscv: introduce asm/guest_access.h [v1,37/57] xen/riscv: introduce asm/irq.h [v1,38/57] xen/riscv: introduce asm/monitor.h [v1,39/57] xen/riscv: introduce asm/numa.h [v1,40/57] xen/riscv: introduce asm/p2m.h [v1,41/57] xen/riscv: introduce asm/regs.h [v1,42/57] xen/riscv: introduce asm/softirq.h [v1,43/57] xen/riscv: introduce asm/time.h [v1,44/57] xen/riscv: introduce asm/vm_event.h [v1,45/57] xen/riscv: add definition of __read_mostly [v1,46/57] xen/riscv: define an address of frame table [v1,47/57] xen/riscv: add required things to asm/current.h [v1,48/57] xen/riscv: add minimal stuff to asm/page.h to build full Xen [v1,49/57] xen/riscv: add minimal stuff to asm/processor.h to build full Xen [v1,50/57] xen/riscv: add minimal stuff to asm/smp.h to build full Xen [v1,51/57] xen: add RISCV support for pmu.h [v1,52/57] xen: add necessary headers to common to build full Xen for RISC-V [v1,53/57] xen/riscv: add minimal stuff to asm/mm.h to build full Xen [v1,54/57] xen/rirscv: add minimal amount of stubs to build full Xen [v1,55/57] xen/riscv: enable full Xen build [v1,56/57] test only riscv [v1,57/57] xxxen/riscv: WIP ( need advise )

Message ID

8d3a615afbcff9681aa0ba8e2272d7e7e26251d1.1692181079.git.oleksii.kurochko@gmail.com (mailing list archive)

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New, archived

Headers

Errors-To: xen-devel-bounces@lists.xenproject.org
Precedence: list
Sender: "Xen-devel" <xen-devel-bounces@lists.xenproject.org>
From: Oleksii Kurochko <oleksii.kurochko@gmail.com>
To: xen-devel@lists.xenproject.org
Cc: Oleksii Kurochko <oleksii.kurochko@gmail.com>,
	Bob Eshleman <bobbyeshleman@gmail.com>,
	Alistair Francis <alistair.francis@wdc.com>,
	Connor Davis <connojdavis@gmail.com>
Subject: [PATCH v1 46/57] xen/riscv: define an address of frame table
Date: Wed, 16 Aug 2023 13:19:59 +0300
Message-ID: 
 <8d3a615afbcff9681aa0ba8e2272d7e7e26251d1.1692181079.git.oleksii.kurochko@gmail.com>
In-Reply-To: <cover.1692181079.git.oleksii.kurochko@gmail.com>
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Series

Enable build of full Xen for RISC-V | expand

Commit Message

Oleksii Kurochko Aug. 16, 2023, 10:19 a.m. UTC

Also the patchs adds some helpful macros.

Signed-off-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/riscv/include/asm/config.h | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)

diff --git a/xen/arch/riscv/include/asm/config.h b/xen/arch/riscv/include/asm/config.h
index fa90ae0898..63ddcae1f9 100644
--- a/xen/arch/riscv/include/asm/config.h
+++ b/xen/arch/riscv/include/asm/config.h
@@ -77,12 +77,31 @@ 
   name:
 #endif
 
+#define VPN_BITS    (9)
+#define OFFSET_BITS (12)
+
 #ifdef CONFIG_RISCV_64
+
+#define SLOTN_ENTRY_BITS        (HYP_PT_ROOT_LEVEL * VPN_BITS + OFFSET_BITS)
+#define SLOTN(slot)             (_AT(vaddr_t,slot) << SLOTN_ENTRY_BITS)
+#define SLOTN_ENTRY_SIZE        SLOTN(1)
+
 #define XEN_VIRT_START 0xFFFFFFFFC0000000 /* (_AC(-1, UL) + 1 - GB(1)) */
+
+#define FRAMETABLE_VIRT_START   SLOTN(196)
+#define FRAMETABLE_SIZE         GB(3)
+#define FRAMETABLE_NR           (FRAMETABLE_SIZE / sizeof(*frame_table))
+#define FRAMETABLE_VIRT_END     (FRAMETABLE_VIRT_START + FRAMETABLE_SIZE - 1)
+
+#define VMAP_VIRT_START         SLOTN(194)
+#define VMAP_VIRT_SIZE          GB(1)
+
 #else
 #error "RV32 isn't supported"
 #endif
 
+#define HYPERVISOR_VIRT_START XEN_VIRT_START
+
 #define SMP_CACHE_BYTES (1 << 6)
 
 #define STACK_SIZE PAGE_SIZE
@@ -95,6 +114,8 @@ 
 #define RV_STAGE1_MODE SATP_MODE_SV32
 #endif
 
+#define HYP_PT_ROOT_LEVEL (CONFIG_PAGING_LEVELS - 1)
+
 #endif /* __RISCV_CONFIG_H__ */
 /*
  * Local variables:

[v1,46/57] xen/riscv: define an address of frame table

Commit Message

Patch