@@ -542,7 +542,8 @@ int __init dom0_setup_permissions(struct domain *d)
paddr_to_pfn(MSI_ADDR_BASE_LO +
MSI_ADDR_DEST_ID_MASK));
/* HyperTransport range. */
- if ( boot_cpu_data.x86_vendor == X86_VENDOR_AMD )
+ if ( boot_cpu_data.x86_vendor == X86_VENDOR_AMD ||
+ boot_cpu_data.x86_vendor == X86_VENDOR_HYGON )
rc |= iomem_deny_access(d, paddr_to_pfn(0xfdULL << 32),
paddr_to_pfn((1ULL << 40) - 1));
@@ -1253,13 +1253,14 @@ arch_do_vcpu_op(
}
/*
- * Loading a nul selector does not clear bases and limits on AMD CPUs. Be on
- * the safe side and re-initialize both to flat segment values before loading
- * a nul selector.
+ * Loading a nul selector does not clear bases and limits on AMD or Hygon
+ * CPUs. Be on the safe side and re-initialize both to flat segment values
+ * before loading a nul selector.
*/
#define preload_segment(seg, value) do { \
if ( !((value) & ~3) && \
- boot_cpu_data.x86_vendor == X86_VENDOR_AMD ) \
+ (boot_cpu_data.x86_vendor == X86_VENDOR_AMD || \
+ boot_cpu_data.x86_vendor == X86_VENDOR_HYGON) ) \
asm volatile ( "movl %k0, %%" #seg \
:: "r" (FLAT_USER_DS32) ); \
} while ( false )