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x-ms-exchange-messagesentrepresentingtype: 1 x-originating-ip: [87.234.252.170] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 554dc50a-e820-42bf-9d8f-08d6fe15b79d x-microsoft-antispam: BCL:0; PCL:0; RULEID:(2390118)(7020095)(4652040)(8989299)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(5600148)(711020)(4605104)(1401327)(2017052603328)(7193020); SRVR:BY5PR18MB3186; x-ms-traffictypediagnostic: BY5PR18MB3186: x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:9508; x-forefront-prvs: 00851CA28B x-forefront-antispam-report: SFV:NSPM; SFS:(10019020)(4636009)(346002)(366004)(39860400002)(376002)(396003)(136003)(189003)(199004)(2351001)(8676002)(186003)(102836004)(2906002)(54906003)(256004)(6512007)(14444005)(6916009)(71190400001)(2501003)(66946007)(6506007)(66476007)(66556008)(81156014)(3846002)(53936002)(52116002)(486006)(71200400001)(6116002)(80792005)(11346002)(305945005)(4326008)(81166006)(446003)(26005)(386003)(31696002)(73956011)(64756008)(66446008)(2616005)(36756003)(476003)(5640700003)(68736007)(5660300002)(6436002)(31686004)(86362001)(7736002)(66066001)(478600001)(72206003)(6486002)(99286004)(8936002)(14454004)(25786009)(316002)(76176011); DIR:OUT; SFP:1102; SCL:1; SRVR:BY5PR18MB3186; H:BY5PR18MB3394.namprd18.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; MX:1; A:1; received-spf: None (protection.outlook.com: suse.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: J/q+Eyxi9dUpmtqF67rjV7wpe3YMh5RHDOUNjepXX/PO+6TFCvlblTIsOr44tUVmSzCvgSfwBK5FuI5e30kHgnmlI/6LD1jLOJphbK0W10FVtREA8RSVBatPasLEADFa9DAgCC9WZ73eRjBe+ZU7YBfiKG9ueFzjx+Uq4+0etdWGWJVpB6b8t+Tr5MkxzE7p1sjNbkEfSJ6fEcQOC8AdW6OUwGKa84gjWcphXKLi9olfj/PCIufKEnGNWPO2khTZg8/yTAatX3w+0rVmUpOLXp74tKmAoIR3+kCBwLn0y2bMH6f/q/HyN/Sm41cxFzsWobAEXI3o2YO5JBDh1s2bZEtmvUPeb/6XOCVdMiUHd5vL4WcRWlSQHOgCpSsdGfl9Ac0LFKOIQNlr0Pw3fzRgB0+YDbKufmcE250v2pXBOXQ= Content-ID: <0319E2035CE74341A4F216FE5789657C@namprd18.prod.outlook.com> MIME-Version: 1.0 X-MS-Exchange-CrossTenant-Network-Message-Id: 554dc50a-e820-42bf-9d8f-08d6fe15b79d X-MS-Exchange-CrossTenant-originalarrivaltime: 01 Jul 2019 11:17:34.9980 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 856b813c-16e5-49a5-85ec-6f081e13b527 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: JBeulich@suse.com X-MS-Exchange-Transport-CrossTenantHeadersStamped: BY5PR18MB3186 X-OriginatorOrg: suse.com Subject: [Xen-devel] [PATCH v9 03/23] x86emul: prepare for AVX512F S/G insns X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Andrew Cooper , Wei Liu , RogerPau Monne Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP They require getting modrm_reg and sib_index set correctly in the EVEX case, to account for the high 16 [XYZ]MM registers when used as addressing index register. Extend the adjustments to modrm_rm as well, such that x86_insn_modrm() would correctly report register numbers (this was a latent issue only as we don't currently have callers of that function which would care about an EVEX case). The adjustment in turn requires dropping the assertion from decode_gpr() as well as re-introducing the explicit masking, as we now need to actively mask off the high bit when a GPR is meant. _decode_gpr() invocations also need slight adjustments, when invoked in generic code ahead of the main switch(). All other uses of modrm_reg and modrm_rm already get suitably masked where necessary. Signed-off-by: Jan Beulich --- v9: New, split from main gather patch. --- a/xen/arch/x86/x86_emulate/x86_emulate.c +++ b/xen/arch/x86/x86_emulate/x86_emulate.c @@ -3022,7 +3022,8 @@ x86_decode( d &= ~ModRM; #undef ModRM /* Only its aliases are valid to use from here on. */ - modrm_reg = ((rex_prefix & 4) << 1) | ((modrm & 0x38) >> 3); + modrm_reg = ((rex_prefix & 4) << 1) | ((modrm & 0x38) >> 3) | + ((evex_encoded() && !evex.R) << 4); modrm_rm = modrm & 0x07; /* @@ -3192,7 +3193,8 @@ x86_decode( if ( modrm_mod == 3 ) { generate_exception_if(d & vSIB, EXC_UD); - modrm_rm |= (rex_prefix & 1) << 3; + modrm_rm |= ((rex_prefix & 1) << 3) | + (evex_encoded() && !evex.x) << 4; ea.type = OP_REG; } else if ( ad_bytes == 2 ) @@ -3257,7 +3259,10 @@ x86_decode( state->sib_index = ((sib >> 3) & 7) | ((rex_prefix << 2) & 8); state->sib_scale = (sib >> 6) & 3; - if ( state->sib_index != 4 && !(d & vSIB) ) + if ( unlikely(d & vSIB) ) + state->sib_index |= (mode_64bit() && evex_encoded() && + !evex.RX) << 4; + else if ( state->sib_index != 4 ) { ea.mem.off = *decode_gpr(state->regs, state->sib_index); ea.mem.off <<= state->sib_scale; @@ -3560,7 +3565,7 @@ x86_emulate( generate_exception_if(state->not_64bit && mode_64bit(), EXC_UD); if ( ea.type == OP_REG ) - ea.reg = _decode_gpr(&_regs, modrm_rm, (d & ByteOp) && !rex_prefix); + ea.reg = _decode_gpr(&_regs, modrm_rm, (d & ByteOp) && !rex_prefix && !vex.opcx); memset(mmvalp, 0xaa /* arbitrary */, sizeof(*mmvalp)); @@ -3574,7 +3579,7 @@ x86_emulate( src.type = OP_REG; if ( d & ByteOp ) { - src.reg = _decode_gpr(&_regs, modrm_reg, !rex_prefix); + src.reg = _decode_gpr(&_regs, modrm_reg, !rex_prefix && !vex.opcx); src.val = *(uint8_t *)src.reg; src.bytes = 1; } @@ -3681,7 +3686,7 @@ x86_emulate( dst.type = OP_REG; if ( d & ByteOp ) { - dst.reg = _decode_gpr(&_regs, modrm_reg, !rex_prefix); + dst.reg = _decode_gpr(&_regs, modrm_reg, !rex_prefix && !vex.opcx); dst.val = *(uint8_t *)dst.reg; dst.bytes = 1; } --- a/xen/arch/x86/x86_emulate/x86_emulate.h +++ b/xen/arch/x86/x86_emulate/x86_emulate.h @@ -662,8 +662,6 @@ static inline unsigned long *decode_gpr( BUILD_BUG_ON(ARRAY_SIZE(cpu_user_regs_gpr_offsets) & (ARRAY_SIZE(cpu_user_regs_gpr_offsets) - 1)); - ASSERT(modrm < ARRAY_SIZE(cpu_user_regs_gpr_offsets)); - /* Note that this also acts as array_access_nospec() stand-in. */ modrm &= ARRAY_SIZE(cpu_user_regs_gpr_offsets) - 1;