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It works with Linux dom0, although requires an awful hack - re-enabling bus mastering behind dom0's backs. Linux driver does similar thing - see drivers/usb/early/xhci-dbc.c:xdbc_handle_events(). To avoid Linux messing with the DbC, mark this MMIO area as read-only. Signed-off-by: Marek Marczykowski-Górecki --- xen/drivers/char/xue.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/xen/drivers/char/xue.c b/xen/drivers/char/xue.c index a6c49bb43e97..3461e51e746a 100644 --- a/xen/drivers/char/xue.c +++ b/xen/drivers/char/xue.c @@ -27,6 +27,7 @@ #include #include #include +#include #include #include #include @@ -807,6 +808,7 @@ static void xue_flush(struct xue *xue, struct xue_trb_ring *trb, { struct xue_dbc_reg *reg = xue->dbc_reg; uint32_t db = (reg->db & 0xFFFF00FF) | (trb->db << 8); + uint32_t cmd; if ( xue->open && !(reg->ctrl & (1UL << XUE_CTRL_DCE)) ) { @@ -817,6 +819,16 @@ static void xue_flush(struct xue *xue, struct xue_trb_ring *trb, xue_enable_dbc(xue); } + /* Re-enable bus mastering, if dom0 (or other) disabled it in the meantime. */ + cmd = pci_conf_read16(xue->sbdf, PCI_COMMAND); +#define XUE_XHCI_CMD_REQUIRED (PCI_COMMAND_MEMORY|PCI_COMMAND_MASTER) + if ( (cmd & XUE_XHCI_CMD_REQUIRED) != XUE_XHCI_CMD_REQUIRED ) + { + cmd |= XUE_XHCI_CMD_REQUIRED; + pci_conf_write16(xue->sbdf, PCI_COMMAND, cmd); + } +#undef XUE_XHCI_CMD_REQUIRED + xue_pop_events(xue); if ( !(reg->ctrl & (1UL << XUE_CTRL_DCR)) ) @@ -916,6 +928,13 @@ static void __init cf_check xue_uart_init_postirq(struct serial_port *port) serial_async_transmit(port); init_timer(&uart->timer, xue_uart_poll, port, 0); set_timer(&uart->timer, NOW() + MILLISECS(1)); + +#ifdef CONFIG_X86 + if ( rangeset_add_range(mmio_ro_ranges, + PFN_DOWN(uart->xue.xhc_mmio_phys + uart->xue.xhc_dbc_offset), + PFN_UP(uart->xue.xhc_mmio_phys + uart->xue.xhc_dbc_offset + sizeof(*uart->xue.dbc_reg)) - 1) ) + printk(XENLOG_INFO "Error while adding MMIO range of device to mmio_ro_ranges\n"); +#endif } static int cf_check xue_uart_tx_ready(struct serial_port *port)