From patchwork Tue Dec 5 11:55:52 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Federico Serafini X-Patchwork-Id: 13480108 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A53BEC46CA3 for ; Tue, 5 Dec 2023 11:56:20 +0000 (UTC) Received: from list by lists.xenproject.org with outflank-mailman.647700.1011260 (Exim 4.92) (envelope-from ) id 1rAU24-0000dZ-Lo; Tue, 05 Dec 2023 11:56:08 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 647700.1011260; Tue, 05 Dec 2023 11:56:08 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1rAU24-0000dO-IH; Tue, 05 Dec 2023 11:56:08 +0000 Received: by outflank-mailman (input) for mailman id 647700; Tue, 05 Dec 2023 11:56:07 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1rAU23-0008Co-9N for xen-devel@lists.xenproject.org; Tue, 05 Dec 2023 11:56:07 +0000 Received: from support.bugseng.com (mail.bugseng.com [162.55.131.47]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 44380e29-9365-11ee-98e5-6d05b1d4d9a1; Tue, 05 Dec 2023 12:56:04 +0100 (CET) Received: from Dell.homenet.telecomitalia.it (host-79-46-48-173.retail.telecomitalia.it [79.46.48.173]) by support.bugseng.com (Postfix) with ESMTPSA id BEAEA4EE074D; Tue, 5 Dec 2023 12:56:03 +0100 (CET) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 44380e29-9365-11ee-98e5-6d05b1d4d9a1 From: Federico Serafini To: xen-devel@lists.xenproject.org Cc: consulting@bugseng.com, Federico Serafini , Jan Beulich , Andrew Cooper Subject: [XEN PATCH 3/6] AMD/IOMMU: address violations of MISRA C:2012 Rule 8.2 Date: Tue, 5 Dec 2023 12:55:52 +0100 Message-Id: X-Mailer: git-send-email 2.34.1 In-Reply-To: References: MIME-Version: 1.0 Add missing parameter names to address violations of MISRA C:2012 Rule 8.2. Furthermore, remove trailing spaces and use C standard types to comply with XEN coding style. No functional change. Signed-off-by: Federico Serafini --- xen/drivers/passthrough/amd/iommu.h | 17 ++++++++++------- xen/drivers/passthrough/amd/iommu_init.c | 24 ++++++++++++++---------- 2 files changed, 24 insertions(+), 17 deletions(-) diff --git a/xen/drivers/passthrough/amd/iommu.h b/xen/drivers/passthrough/amd/iommu.h index d4416ebc43..1b62c083ba 100644 --- a/xen/drivers/passthrough/amd/iommu.h +++ b/xen/drivers/passthrough/amd/iommu.h @@ -138,10 +138,12 @@ struct ivrs_mappings { extern unsigned int ivrs_bdf_entries; extern u8 ivhd_type; -struct ivrs_mappings *get_ivrs_mappings(u16 seg); -int iterate_ivrs_mappings(int (*)(u16 seg, struct ivrs_mappings *)); -int iterate_ivrs_entries(int (*)(const struct amd_iommu *, - struct ivrs_mappings *, uint16_t)); +struct ivrs_mappings *get_ivrs_mappings(uint16_t seg); +int iterate_ivrs_mappings(int (*handler)(uint16_t seg, + struct ivrs_mappings *map)); +int iterate_ivrs_entries(int (*handler)(const struct amd_iommu *iommu, + struct ivrs_mappings *map, + uint16_t bdf)); /* iommu tables in guest space */ struct mmio_reg { @@ -226,7 +228,7 @@ struct acpi_ivrs_hardware; /* amd-iommu-detect functions */ int amd_iommu_get_ivrs_dev_entries(void); int amd_iommu_get_supported_ivhd_type(void); -int amd_iommu_detect_one_acpi(const struct acpi_ivrs_hardware *); +int amd_iommu_detect_one_acpi(const struct acpi_ivrs_hardware *ivhd_block); int amd_iommu_detect_acpi(void); void get_iommu_features(struct amd_iommu *iommu); @@ -295,9 +297,10 @@ struct amd_iommu *find_iommu_for_device(int seg, int bdf); bool cf_check iov_supports_xt(void); int amd_iommu_setup_ioapic_remapping(void); void *amd_iommu_alloc_intremap_table( - const struct amd_iommu *, unsigned long **, unsigned int nr); + const struct amd_iommu *iommu, unsigned long **inuse_map, unsigned int nr); int cf_check amd_iommu_free_intremap_table( - const struct amd_iommu *, struct ivrs_mappings *, uint16_t); + const struct amd_iommu *iommu, struct ivrs_mappings *ivrs_mapping, + uint16_t bdf); unsigned int amd_iommu_intremap_table_order( const void *irt, const struct amd_iommu *iommu); void cf_check amd_iommu_ioapic_update_ire( diff --git a/xen/drivers/passthrough/amd/iommu_init.c b/xen/drivers/passthrough/amd/iommu_init.c index 5515cb70fd..62f9bfdfc8 100644 --- a/xen/drivers/passthrough/amd/iommu_init.c +++ b/xen/drivers/passthrough/amd/iommu_init.c @@ -300,12 +300,13 @@ static void cf_check set_iommu_ppr_log_control( static int iommu_read_log(struct amd_iommu *iommu, struct ring_buffer *log, unsigned int entry_size, - void (*parse_func)(struct amd_iommu *, u32 *)) + void (*parse_func)(struct amd_iommu *iommu, + uint32_t *entry)) { unsigned int tail, tail_offest, head_offset; BUG_ON(!iommu || ((log != &iommu->event_log) && (log != &iommu->ppr_log))); - + spin_lock(&log->lock); /* make sure there's an entry in the log */ @@ -361,14 +362,15 @@ static int iommu_read_log(struct amd_iommu *iommu, out: spin_unlock(&log->lock); - + return 0; } /* reset event log or ppr log when overflow */ static void iommu_reset_log(struct amd_iommu *iommu, struct ring_buffer *log, - void (*ctrl_func)(struct amd_iommu *iommu, bool)) + void (*ctrl_func)(struct amd_iommu *iommu, + bool iommu_control)) { unsigned int entry, run_bit, loop_count = 1000; bool log_run; @@ -1158,14 +1160,15 @@ static void __init amd_iommu_init_cleanup(void) iommuv2_enabled = 0; } -struct ivrs_mappings *get_ivrs_mappings(u16 seg) +struct ivrs_mappings *get_ivrs_mappings(uint16_t seg) { return radix_tree_lookup(&ivrs_maps, seg); } -int iterate_ivrs_mappings(int (*handler)(u16 seg, struct ivrs_mappings *)) +int iterate_ivrs_mappings(int (*handler)(uint16_t seg, + struct ivrs_mappings *map)) { - u16 seg = 0; + uint16_t seg = 0; int rc = 0; do { @@ -1180,10 +1183,11 @@ int iterate_ivrs_mappings(int (*handler)(u16 seg, struct ivrs_mappings *)) return rc; } -int iterate_ivrs_entries(int (*handler)(const struct amd_iommu *, - struct ivrs_mappings *, uint16_t bdf)) +int iterate_ivrs_entries(int (*handler)(const struct amd_iommu *iommu, + struct ivrs_mappings *map, + uint16_t bdf)) { - u16 seg = 0; + uint16_t seg = 0; int rc = 0; do {