From patchwork Wed Aug 2 00:11:03 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shawn Anastasio X-Patchwork-Id: 13337409 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 85FBFC41513 for ; Wed, 2 Aug 2023 00:11:51 +0000 (UTC) Received: from list by lists.xenproject.org with outflank-mailman.574611.900049 (Exim 4.92) (envelope-from ) id 1qQzSk-0003Us-5j; Wed, 02 Aug 2023 00:11:38 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 574611.900049; Wed, 02 Aug 2023 00:11:38 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qQzSk-0003Ul-2k; Wed, 02 Aug 2023 00:11:38 +0000 Received: by outflank-mailman (input) for mailman id 574611; Wed, 02 Aug 2023 00:11:36 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qQzSi-0003Fc-79 for xen-devel@lists.xenproject.org; Wed, 02 Aug 2023 00:11:36 +0000 Received: from raptorengineering.com (mail.raptorengineering.com [23.155.224.40]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 23034186-30c9-11ee-b25c-6b7b168915f2; Wed, 02 Aug 2023 02:11:33 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by mail.rptsys.com (Postfix) with ESMTP id A538B828574A; Tue, 1 Aug 2023 19:11:32 -0500 (CDT) Received: from mail.rptsys.com ([127.0.0.1]) by localhost (vali.starlink.edu [127.0.0.1]) (amavisd-new, port 10032) with ESMTP id DUQIxQ5pEZEn; Tue, 1 Aug 2023 19:11:31 -0500 (CDT) Received: from localhost (localhost [127.0.0.1]) by mail.rptsys.com (Postfix) with ESMTP id 6DE398284EB7; Tue, 1 Aug 2023 19:11:31 -0500 (CDT) Received: from mail.rptsys.com ([127.0.0.1]) by localhost (vali.starlink.edu [127.0.0.1]) (amavisd-new, port 10026) with ESMTP id sEqQJTs6SKw6; Tue, 1 Aug 2023 19:11:31 -0500 (CDT) Received: from raptor-ewks-026.lan (5.edge.rptsys.com [23.155.224.38]) by mail.rptsys.com (Postfix) with ESMTPSA id 171CE8285491; Tue, 1 Aug 2023 19:11:31 -0500 (CDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 23034186-30c9-11ee-b25c-6b7b168915f2 DKIM-Filter: OpenDKIM Filter v2.10.3 mail.rptsys.com 6DE398284EB7 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=raptorengineering.com; s=B8E824E6-0BE2-11E6-931D-288C65937AAD; t=1690935091; bh=evTmLh29uUc24NiflnIA1Cij5ypJhBmERpFc9O8S3xI=; h=From:To:Date:Message-Id:MIME-Version; b=caEcdTwlQbhKy8QLdyCBbZLRGtqRv7YaDeFXDJlJ/YnRhdU+LjpFDhvYX39D2fITo +/+2mJi8jWHC/e2o3lbo1oBy4Gvo/xgTPWZEXEMWRxGiyJu/Z+njG+jhxuzBzZ4kQD IqG8pvweAKvZ1FBcDIwqUScYaiZdHMPcaaYYiXiM= X-Virus-Scanned: amavisd-new at rptsys.com From: Shawn Anastasio To: xen-devel@lists.xenproject.org Cc: Timothy Pearson , Andrew Cooper , Jan Beulich , Shawn Anastasio Subject: [PATCH 1/4] xen/ppc: Switch to medium PIC code model Date: Tue, 1 Aug 2023 19:11:03 -0500 Message-Id: X-Mailer: git-send-email 2.30.2 In-Reply-To: References: MIME-Version: 1.0 Switch Xen to the medium PIC code model on Power. Among other things, this allows us to be load address agnostic and will open the door to booting on bare metal PowerNV systems that don't use OpenFirmware. Also update XEN_VIRT_START to 0xc000000000000000, which is equivalent to address 0x0 when the MMU is off. This prevents Open Firmware from loading Xen at an offset from its base load address, so the DECL_SECTION hack in xen.lds.S is no longer required. Signed-off-by: Shawn Anastasio Acked-by: Jan Beulich --- Changed in v2: - Remove stray newline - Use label instead of .+4 in TOC setup branch xen/arch/ppc/arch.mk | 2 +- xen/arch/ppc/include/asm/asm-defns.h | 7 +++++ xen/arch/ppc/include/asm/config.h | 2 +- xen/arch/ppc/ppc64/head.S | 12 +++++--- xen/arch/ppc/xen.lds.S | 44 ++++++++++------------------ 5 files changed, 33 insertions(+), 34 deletions(-) -- 2.30.2 diff --git a/xen/arch/ppc/arch.mk b/xen/arch/ppc/arch.mk index 7eec22c283..0183b9ac6a 100644 --- a/xen/arch/ppc/arch.mk +++ b/xen/arch/ppc/arch.mk @@ -5,7 +5,7 @@ ppc-march-$(CONFIG_POWER_ISA_2_07B) := power8 ppc-march-$(CONFIG_POWER_ISA_3_00) := power9 CFLAGS += -m64 -mlittle-endian -mcpu=$(ppc-march-y) -CFLAGS += -mstrict-align -mcmodel=large -mabi=elfv2 -mno-altivec -mno-vsx +CFLAGS += -mstrict-align -mcmodel=medium -mabi=elfv2 -fPIC -mno-altivec -mno-vsx -msoft-float LDFLAGS += -m elf64lppc diff --git a/xen/arch/ppc/include/asm/asm-defns.h b/xen/arch/ppc/include/asm/asm-defns.h index 35b1c89d4e..5821f9024d 100644 --- a/xen/arch/ppc/include/asm/asm-defns.h +++ b/xen/arch/ppc/include/asm/asm-defns.h @@ -16,6 +16,13 @@ lis reg, (val) @h; \ ori reg, reg, (val) @l; \ +/* + * Load the address of a symbol from the TOC into the specified GPR. + */ +#define LOAD_REG_ADDR(reg,name) \ + addis reg,%r2,name@toc@ha; \ + addi reg,reg,name@toc@l + /* * Depending on how we were booted, the CPU could be running in either * Little Endian or Big Endian mode. The following trampoline from Linux diff --git a/xen/arch/ppc/include/asm/config.h b/xen/arch/ppc/include/asm/config.h index cb27d2781e..d060f0dca7 100644 --- a/xen/arch/ppc/include/asm/config.h +++ b/xen/arch/ppc/include/asm/config.h @@ -39,7 +39,7 @@ name: #endif -#define XEN_VIRT_START _AT(UL, 0x400000) +#define XEN_VIRT_START _AT(UL, 0xc000000000000000) #define SMP_CACHE_BYTES (1 << 6) diff --git a/xen/arch/ppc/ppc64/head.S b/xen/arch/ppc/ppc64/head.S index 02ff520458..4172f1b8ec 100644 --- a/xen/arch/ppc/ppc64/head.S +++ b/xen/arch/ppc/ppc64/head.S @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ #include +#include .section .text.header, "ax", %progbits @@ -11,16 +12,19 @@ ENTRY(start) FIXUP_ENDIAN /* set up the TOC pointer */ - LOAD_IMM32(%r2, .TOC.) + bcl 20, 31, 1f +1: mflr %r12 + addis %r2, %r12, .TOC.-1b@ha + addi %r2, %r2, .TOC.-1b@l /* set up the initial stack */ - LOAD_IMM32(%r1, cpu0_boot_stack) + LOAD_REG_ADDR(%r1, cpu0_boot_stack) li %r11, 0 stdu %r11, -STACK_FRAME_OVERHEAD(%r1) /* clear .bss */ - LOAD_IMM32(%r14, __bss_start) - LOAD_IMM32(%r15, __bss_end) + LOAD_REG_ADDR(%r14, __bss_start) + LOAD_REG_ADDR(%r15, __bss_end) 1: std %r11, 0(%r14) addi %r14, %r14, 8 diff --git a/xen/arch/ppc/xen.lds.S b/xen/arch/ppc/xen.lds.S index c628cc0e5c..2fa81d5a83 100644 --- a/xen/arch/ppc/xen.lds.S +++ b/xen/arch/ppc/xen.lds.S @@ -15,25 +15,12 @@ PHDRS #endif } -/** - * OpenFirmware's base load address is 0x400000 (XEN_VIRT_START). - * By defining sections this way, we can keep our virtual address base at 0x400000 - * while keeping the physical base at 0x0. - * - * Otherwise, OpenFirmware incorrectly loads .text at 0x400000 + 0x400000 = 0x800000. - * Taken from x86/xen.lds.S - */ -#ifdef CONFIG_LD_IS_GNU -# define DECL_SECTION(x) x : AT(ADDR(#x) - XEN_VIRT_START) -#else -# define DECL_SECTION(x) x : AT(ADDR(x) - XEN_VIRT_START) -#endif - SECTIONS { . = XEN_VIRT_START; + _start = .; - DECL_SECTION(.text) { + .text : { _stext = .; /* Text section */ *(.text.header) @@ -52,7 +39,7 @@ SECTIONS } :text . = ALIGN(PAGE_SIZE); - DECL_SECTION(.rodata) { + .rodata : { _srodata = .; /* Read-only data */ *(.rodata) *(.rodata.*) @@ -67,7 +54,7 @@ SECTIONS #if defined(BUILD_ID) . = ALIGN(4); - DECL_SECTION(.note.gnu.build-id) { + .note.gnu.build-id : { __note_gnu_build_id_start = .; *(.note.gnu.build-id) __note_gnu_build_id_end = .; @@ -76,19 +63,19 @@ SECTIONS _erodata = .; /* End of read-only data */ . = ALIGN(PAGE_SIZE); - DECL_SECTION(.data.ro_after_init) { + .data.ro_after_init : { __ro_after_init_start = .; *(.data.ro_after_init) . = ALIGN(PAGE_SIZE); __ro_after_init_end = .; - } : text + } :text - DECL_SECTION(.data.read_mostly) { + .data.read_mostly : { *(.data.read_mostly) } :text . = ALIGN(PAGE_SIZE); - DECL_SECTION(.data) { /* Data */ + .data : { /* Data */ *(.data.page_aligned) . = ALIGN(8); __start_schedulers_array = .; @@ -103,7 +90,7 @@ SECTIONS . = ALIGN(PAGE_SIZE); /* Init code and data */ __init_begin = .; - DECL_SECTION(.init.text) { + .init.text : { _sinittext = .; *(.init.text) _einittext = .; @@ -111,7 +98,7 @@ SECTIONS } :text . = ALIGN(PAGE_SIZE); - DECL_SECTION(.init.data) { + .init.data : { *(.init.rodata) *(.init.rodata.*) @@ -140,18 +127,18 @@ SECTIONS __ctors_end = .; } :text - DECL_SECTION(.got) { - *(.got) + .got : { + *(.got .toc) } :text - DECL_SECTION(.got.plt) { + .got.plt : { *(.got.plt) } :text . = ALIGN(POINTER_ALIGN); __init_end = .; - DECL_SECTION(.bss) { /* BSS */ + .bss : { /* BSS */ __bss_start = .; *(.bss.stack_aligned) *(.bss.page_aligned) @@ -167,10 +154,11 @@ SECTIONS . = ALIGN(POINTER_ALIGN); __bss_end = .; } :text + _end = . ; /* Section for the device tree blob (if any). */ - DECL_SECTION(.dtb) { *(.dtb) } :text + .dtb : { *(.dtb) } :text DWARF2_DEBUG_SECTIONS