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*flush_flags |= IOMMU_FLUSHF_modified; + + perfc_incr(iommu_pt_shatters); } /* Install lower level page table for non-present entries */ @@ -472,6 +474,7 @@ int cf_check amd_iommu_map_page( flags & IOMMUF_readable, &contig); *flush_flags |= IOMMU_FLUSHF_modified | IOMMU_FLUSHF_all; iommu_queue_free_pgtable(hd, pg); + perfc_incr(iommu_pt_coalesces); } spin_unlock(&hd->arch.mapping_lock); @@ -532,6 +535,7 @@ int cf_check amd_iommu_unmap_page( clear_iommu_pte_present(pt_mfn, dfn_x(dfn), level, &free); *flush_flags |= IOMMU_FLUSHF_all; iommu_queue_free_pgtable(hd, pg); + perfc_incr(iommu_pt_coalesces); } } --- a/xen/drivers/passthrough/vtd/iommu.c +++ b/xen/drivers/passthrough/vtd/iommu.c @@ -404,6 +404,8 @@ static uint64_t addr_to_dma_page_maddr(s if ( flush_flags ) *flush_flags |= IOMMU_FLUSHF_modified; + + perfc_incr(iommu_pt_shatters); } write_atomic(&pte->val, new_pte.val); @@ -865,6 +867,7 @@ static int dma_pte_clear_one(struct doma *flush_flags |= IOMMU_FLUSHF_all; iommu_queue_free_pgtable(hd, pg); + perfc_incr(iommu_pt_coalesces); } spin_unlock(&hd->arch.mapping_lock); @@ -2244,6 +2247,7 @@ static int __must_check cf_check intel_i *flush_flags |= IOMMU_FLUSHF_modified | IOMMU_FLUSHF_all; iommu_queue_free_pgtable(hd, pg); + perfc_incr(iommu_pt_coalesces); } spin_unlock(&hd->arch.mapping_lock);