| Message ID | d5fa50b3056b96f3046be39ed682a8b347f1b425.1713860310.git.Sergiy_Kibrik@epam.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | x86: make Intel/AMD vPMU & MCE support configurable | expand |
On Tue, 23 Apr 2024, Sergiy Kibrik wrote: > Guard access to Intel-specific lmce_support & cmci_support variables in > common MCE/VMCE code. These are set in Intel-specific parts of mcheck code > and can potentially be skipped if building for non-intel platform by > disabling CONFIG_INTEL option. > > Signed-off-by: Sergiy Kibrik <Sergiy_Kibrik@epam.com> Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
On 23.04.2024 10:54, Sergiy Kibrik wrote: > Guard access to Intel-specific lmce_support & cmci_support variables in > common MCE/VMCE code. These are set in Intel-specific parts of mcheck code > and can potentially be skipped if building for non-intel platform by > disabling CONFIG_INTEL option. > > Signed-off-by: Sergiy Kibrik <Sergiy_Kibrik@epam.com> See comments given for patch 2. Jan
29.04.24 18:42, Jan Beulich: > On 23.04.2024 10:54, Sergiy Kibrik wrote: >> Guard access to Intel-specific lmce_support & cmci_support variables in >> common MCE/VMCE code. These are set in Intel-specific parts of mcheck code >> and can potentially be skipped if building for non-intel platform by >> disabling CONFIG_INTEL option. >> >> Signed-off-by: Sergiy Kibrik <Sergiy_Kibrik@epam.com> > > See comments given for patch 2. > I'll squash this patch into patch 7 then, as they depend on each other -Sergiy
diff --git a/xen/arch/x86/cpu/mcheck/mce.c b/xen/arch/x86/cpu/mcheck/mce.c index 2844685983..72dfaf28cb 100644 --- a/xen/arch/x86/cpu/mcheck/mce.c +++ b/xen/arch/x86/cpu/mcheck/mce.c @@ -611,7 +611,7 @@ static void set_poll_bankmask(struct cpuinfo_x86 *c) mb = per_cpu(poll_bankmask, cpu); BUG_ON(!mb); - if ( cmci_support && opt_mce ) + if ( IS_ENABLED(CONFIG_INTEL) && cmci_support && opt_mce ) { const struct mca_banks *cmci = per_cpu(no_cmci_banks, cpu); @@ -1607,7 +1607,7 @@ long do_mca(XEN_GUEST_HANDLE_PARAM(xen_mc_t) u_xen_mc) break; case XEN_MC_INJECT_TYPE_LMCE: - if ( !lmce_support ) + if ( IS_ENABLED(CONFIG_INTEL) && !lmce_support ) { ret = x86_mcerr("No LMCE support", -EINVAL); break; diff --git a/xen/arch/x86/cpu/mcheck/vmce.c b/xen/arch/x86/cpu/mcheck/vmce.c index be229684a4..6051ab2b2e 100644 --- a/xen/arch/x86/cpu/mcheck/vmce.c +++ b/xen/arch/x86/cpu/mcheck/vmce.c @@ -546,7 +546,7 @@ int vmce_enable_mca_cap(struct domain *d, uint64_t cap) if ( cap & XEN_HVM_MCA_CAP_LMCE ) { - if ( !lmce_support ) + if ( IS_ENABLED(CONFIG_INTEL) && !lmce_support ) return -EINVAL; for_each_vcpu(d, v) v->arch.vmce.mcg_cap |= MCG_LMCE_P;
Guard access to Intel-specific lmce_support & cmci_support variables in common MCE/VMCE code. These are set in Intel-specific parts of mcheck code and can potentially be skipped if building for non-intel platform by disabling CONFIG_INTEL option. Signed-off-by: Sergiy Kibrik <Sergiy_Kibrik@epam.com> --- xen/arch/x86/cpu/mcheck/mce.c | 4 ++-- xen/arch/x86/cpu/mcheck/vmce.c | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-)