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[2001:16b8:6686:9000:1e4b:d6ff:fef9:46e6]) by smtp.gmail.com with ESMTPSA id e19sm579203eja.91.2019.06.21.13.02.29 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Fri, 21 Jun 2019 13:02:29 -0700 (PDT) From: Denis Obrezkov To: xen-devel@lists.xenproject.org Date: Fri, 21 Jun 2019 22:02:19 +0200 Message-Id: X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 Subject: [Xen-devel] [PATCH] xen/arm: Switch OMAP5 secondary cores into hyp mode X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: julien.grall@arm.com, tim@xen.org, Denis Obrezkov Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP This function allows xen to bring secondary CPU cores into non-secure HYP mode. This is done by using a Secure Monitor call. Signed-off-by: Denis Obrezkov --- xen/arch/arm/arm32/head.S | 11 ++++++++++- xen/arch/arm/platforms/omap5.c | 5 +++-- xen/include/asm-arm/platforms/omap5.h | 3 +++ 3 files changed, 16 insertions(+), 3 deletions(-) diff --git a/xen/arch/arm/arm32/head.S b/xen/arch/arm/arm32/head.S index 5f817d473e..120e034934 100644 --- a/xen/arch/arm/arm32/head.S +++ b/xen/arch/arm/arm32/head.S @@ -36,6 +36,10 @@ #include EARLY_PRINTK_INC #endif + +#define API_HYP_ENTRY 0x102 +#define AUX_CORE_BOOT0_PA 0x48281800 + /* * Common register usage in this file: * r0 - @@ -113,6 +117,12 @@ past_zImage: b common_start +GLOBAL(omap5_init_secondary) + ldr r12, =API_HYP_ENTRY + adr r0, init_secondary + dsb + smc #0 + GLOBAL(init_secondary) cpsid aif /* Disable all interrupts */ @@ -159,7 +169,6 @@ common_start: PRINT("- CPU doesn't support the virtualization extensions -\r\n") b fail 1: - /* Check that we're already in Hyp mode */ mrs r0, cpsr and r0, r0, #0x1f /* Mode is in the low 5 bits of CPSR */ diff --git a/xen/arch/arm/platforms/omap5.c b/xen/arch/arm/platforms/omap5.c index aee24e4d28..6b5cc15af3 100644 --- a/xen/arch/arm/platforms/omap5.c +++ b/xen/arch/arm/platforms/omap5.c @@ -128,8 +128,9 @@ static int __init omap5_smp_init(void) } printk("Set AuxCoreBoot1 to %"PRIpaddr" (%p)\n", - __pa(init_secondary), init_secondary); - writel(__pa(init_secondary), wugen_base + OMAP_AUX_CORE_BOOT_1_OFFSET); + __pa(omap5_init_secondary), omap5_init_secondary); + writel(__pa(omap5_init_secondary), + wugen_base + OMAP_AUX_CORE_BOOT_1_OFFSET); printk("Set AuxCoreBoot0 to 0x20\n"); writel(0x20, wugen_base + OMAP_AUX_CORE_BOOT_0_OFFSET); diff --git a/xen/include/asm-arm/platforms/omap5.h b/xen/include/asm-arm/platforms/omap5.h index c559c84b61..732b27f403 100644 --- a/xen/include/asm-arm/platforms/omap5.h +++ b/xen/include/asm-arm/platforms/omap5.h @@ -22,6 +22,9 @@ #endif /* __ASM_ARM_PLATFORMS_OMAP5_H */ +/* Secondary cpu omap5 specific init routine */ +extern void omap5_init_secondary(void); + /* * Local variables: * mode: C