From patchwork Fri Apr 5 09:14:30 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicola Vetrini X-Patchwork-Id: 13618752 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 00F39CD129C for ; Fri, 5 Apr 2024 09:14:58 +0000 (UTC) Received: from list by lists.xenproject.org with outflank-mailman.701161.1095348 (Exim 4.92) (envelope-from ) id 1rsfeq-0007eO-03; Fri, 05 Apr 2024 09:14:48 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 701161.1095348; Fri, 05 Apr 2024 09:14:47 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1rsfep-0007cS-TN; Fri, 05 Apr 2024 09:14:47 +0000 Received: by outflank-mailman (input) for mailman id 701161; Fri, 05 Apr 2024 09:14:46 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1rsfeo-0007WZ-Ti for xen-devel@lists.xenproject.org; Fri, 05 Apr 2024 09:14:46 +0000 Received: from support.bugseng.com (mail.bugseng.com [162.55.131.47]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id f17dc861-f32c-11ee-a1ef-f123f15fe8a2; Fri, 05 Apr 2024 11:14:45 +0200 (CEST) Received: from nico.bugseng.com (unknown [46.228.253.194]) by support.bugseng.com (Postfix) with ESMTPSA id 331774EE0743; Fri, 5 Apr 2024 11:14:44 +0200 (CEST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: f17dc861-f32c-11ee-a1ef-f123f15fe8a2 From: Nicola Vetrini To: nicola.vetrini@bugseng.com, xen-devel@lists.xenproject.org Cc: sstabellini@kernel.org, michal.orzel@amd.com, xenia.ragiadakou@amd.com, ayan.kumar.halder@amd.com, consulting@bugseng.com, Jan Beulich , Andrew Cooper , =?utf-8?q?Roger_Pau_Monn=C3=A9?= Subject: [XEN PATCH v2 2/9] x86/cpuid: address violation of MISRA C Rule 16.2 Date: Fri, 5 Apr 2024 11:14:30 +0200 Message-Id: X-Mailer: git-send-email 2.34.1 In-Reply-To: References: MIME-Version: 1.0 Refactor the switch so that a violation of MISRA C Rule 16.2 is resolved (A switch label shall only be used when the most closely-enclosing compound statement is the body of a switch statement). Note that the switch clause ending with the pseudo keyword "fallthrough" is an allowed exception to Rule 16.3. No functional change. Signed-off-by: Nicola Vetrini Acked-by: Jan Beulich --- xen/arch/x86/cpuid.c | 31 +++++++++++++++---------------- 1 file changed, 15 insertions(+), 16 deletions(-) diff --git a/xen/arch/x86/cpuid.c b/xen/arch/x86/cpuid.c index 7290a979c667..0a7c55199f94 100644 --- a/xen/arch/x86/cpuid.c +++ b/xen/arch/x86/cpuid.c @@ -331,23 +331,22 @@ void guest_cpuid(const struct vcpu *v, uint32_t leaf, switch ( subleaf ) { case 1: - if ( p->xstate.xsavec || p->xstate.xsaves ) - { - /* - * TODO: Figure out what to do for XSS state. VT-x manages - * host vs guest MSR_XSS automatically, so as soon as we start - * supporting any XSS states, the wrong XSS will be in - * context. - */ - BUILD_BUG_ON(XSTATE_XSAVES_ONLY != 0); - - /* - * Read CPUID[0xD,0/1].EBX from hardware. They vary with - * enabled XSTATE, and appropraite XCR0|XSS are in context. - */ + if ( !(p->xstate.xsavec || p->xstate.xsaves) ) + break; + /* + * TODO: Figure out what to do for XSS state. VT-x manages + * host vs guest MSR_XSS automatically, so as soon as we start + * supporting any XSS states, the wrong XSS will be in + * context. + */ + BUILD_BUG_ON(XSTATE_XSAVES_ONLY != 0); + fallthrough; case 0: - res->b = cpuid_count_ebx(leaf, subleaf); - } + /* + * Read CPUID[0xD,0/1].EBX from hardware. They vary with + * enabled XSTATE, and appropriate XCR0|XSS are in context. + */ + res->b = cpuid_count_ebx(leaf, subleaf); break; } break;