From patchwork Thu Apr 4 16:21:09 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 10885903 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 815891575 for ; Thu, 4 Apr 2019 16:21:42 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 67FEB28AC0 for ; Thu, 4 Apr 2019 16:21:42 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 5C27A28AC3; Thu, 4 Apr 2019 16:21:42 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 070A428AC0 for ; Thu, 4 Apr 2019 16:21:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=wlpDWCvsbfNzyf/pUz7Ft7Dw63DLBqEMUIFic2Wvsgc=; b=bheJ20RsluY/CO Wo03NXccsjiwFBih13ljfyzaBgNagDflMP/P6wmJPEPz5UhNNAtrmIetsi5l8rPU6FbIpCd+wHipE twn3YT2vbKfNIbLyxSxpC3lcjLlkXZg0AhSBCXxW1JSKyTUUgLgz4XkqL4kCm71nTzwR3o3b2BGK+ aEq3LvzduzKOwfA+/c8m3Fnq9SNc620EOhMBImJ03PWNWMZTL6OYOrKY7v29TLCoBeTQOzFd2svOP Q7UsBqxLzgLlo2XtsQrpeGP0mPL8Clb74kCiCToyqwH3wSLGA/xB0xtpsdVZeLZdcbFO3SSAvnJOC cUB7FUYZxepiRJD8F/Vw==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1hC57T-0004HK-L8; Thu, 04 Apr 2019 16:21:39 +0000 Received: from relay5-d.mail.gandi.net ([217.70.183.197]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1hC57J-00047T-0o; Thu, 04 Apr 2019 16:21:30 +0000 X-Originating-IP: 90.88.30.125 Received: from localhost.localdomain (aaubervilliers-681-1-89-125.w90-88.abo.wanadoo.fr [90.88.30.125]) (Authenticated sender: miquel.raynal@bootlin.com) by relay5-d.mail.gandi.net (Postfix) with ESMTPSA id 60F331C0075; Thu, 4 Apr 2019 16:21:20 +0000 (UTC) From: Miquel Raynal To: Richard Weinberger , David Woodhouse , Brian Norris , Marek Vasut , Tudor Ambarus , Vignesh Raghavendra , Maxime Ripard , Chen-Yu Tsai Subject: [PATCH 1/3] dt-bindings: mtd: sunxi: Add new compatible Date: Thu, 4 Apr 2019 18:21:09 +0200 Message-Id: <20190404162111.22618-2-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20190404162111.22618-1-miquel.raynal@bootlin.com> References: <20190404162111.22618-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190404_092129_276952_12A0C6C0 X-CRM114-Status: GOOD ( 12.42 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Rob Herring , linux-mtd@lists.infradead.org, Miquel Raynal , linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The A33 NAND controller is slightly different than the A10+ ones, eg. DMA handling is a bit different and a few register offsets changed. Introduce a new compatible to represent this version of the IP. Also append '-controller' to the new compatible (which is required for new compatibles) as this is describing a NAND controller and not a NAND chip. Signed-off-by: Miquel Raynal --- Documentation/devicetree/bindings/mtd/sunxi-nand.txt | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/mtd/sunxi-nand.txt b/Documentation/devicetree/bindings/mtd/sunxi-nand.txt index dcd5a5d80dc0..6128d41d8c59 100644 --- a/Documentation/devicetree/bindings/mtd/sunxi-nand.txt +++ b/Documentation/devicetree/bindings/mtd/sunxi-nand.txt @@ -1,7 +1,12 @@ Allwinner NAND Flash Controller (NFC) Required properties: -- compatible : "allwinner,sun4i-a10-nand". +- compatible : Must be one of: + - "allwinner,sun4i-a10-nand" + - "allwinner,sun8i-a33-nand-controller" + The former may be used by all IPs, however sun8i family + will need the second one in order to make use of the + internal DMA capabilities. - reg : shall contain registers location and length for data and reg. - interrupts : shall define the nand controller interrupt. - #address-cells: shall be set to 1. Encode the nand CS. From patchwork Thu Apr 4 16:21:10 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 10885905 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 9D6451575 for ; Thu, 4 Apr 2019 16:22:14 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8065E28A97 for ; Thu, 4 Apr 2019 16:22:14 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 721FA28AC0; Thu, 4 Apr 2019 16:22:14 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id E9BD028A97 for ; Thu, 4 Apr 2019 16:22:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=K938vH3W1xT3BWsoFiq3VXB1Oaz5Dw4uiFKXK13eK3M=; b=SJBZe+LvHrip+q piGYS2i+ejTHMXwRYCaW33nuVS1SCZYnqaq60q6j63QS1QGNER6+XDCd8PNDXLKzYtUtBncM7U+Jl VsR/vGquOd5dpXRXBLUyz9dbTVZPT1FTNVSX6Nk3qO0jgcV9tsnz7V+VkQlc3RltQUGlkVzXhYTAq ITjPArzlZjEgBPgSyMLz1Jc8v3bMUKfk81Qr1bFTBnKrHeiBGt0NgNA9Q43frugs0NYtrJpnvaWcX vBd/NYlVgjIPVE2CpDzkyiH8nEUCcM9WX6oiQnEPRNizFKSwqYIadWOIkwcECsUzpK0dpNbQeeH9E AsCWpiPmeOAa2ddPOAJQ==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1hC57z-00051M-4F; Thu, 04 Apr 2019 16:22:11 +0000 Received: from relay5-d.mail.gandi.net ([217.70.183.197]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1hC57J-00047W-3G; Thu, 04 Apr 2019 16:21:32 +0000 X-Originating-IP: 90.88.30.125 Received: from localhost.localdomain (aaubervilliers-681-1-89-125.w90-88.abo.wanadoo.fr [90.88.30.125]) (Authenticated sender: miquel.raynal@bootlin.com) by relay5-d.mail.gandi.net (Postfix) with ESMTPSA id BE7841C0076; Thu, 4 Apr 2019 16:21:22 +0000 (UTC) From: Miquel Raynal To: Richard Weinberger , David Woodhouse , Brian Norris , Marek Vasut , Tudor Ambarus , Vignesh Raghavendra , Maxime Ripard , Chen-Yu Tsai Subject: [PATCH 2/3] mtd: rawnand: sunxi: Add DMA support for sun8i Date: Thu, 4 Apr 2019 18:21:10 +0200 Message-Id: <20190404162111.22618-3-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20190404162111.22618-1-miquel.raynal@bootlin.com> References: <20190404162111.22618-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190404_092129_604261_58D93EA9 X-CRM114-Status: GOOD ( 20.44 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Rob Herring , linux-mtd@lists.infradead.org, Miquel Raynal , linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Allwinner NAND controllers can make use of DMA to enhance the I/O throughput thanks to ECC pipelining. DMA handling with sun8i NAND IP is a bit different than with the older SoCs, hence the introduction of a new compatible to handle: * the differences between register offsets, * the burst length change from 4 to minimum 8, * drive SRAM accesses through the AHB bus instead of the MBUS. Signed-off-by: Miquel Raynal --- drivers/mtd/nand/raw/sunxi_nand.c | 75 ++++++++++++++++++++++++++++--- 1 file changed, 68 insertions(+), 7 deletions(-) diff --git a/drivers/mtd/nand/raw/sunxi_nand.c b/drivers/mtd/nand/raw/sunxi_nand.c index 4282bc477761..49cd5067adaa 100644 --- a/drivers/mtd/nand/raw/sunxi_nand.c +++ b/drivers/mtd/nand/raw/sunxi_nand.c @@ -42,7 +42,8 @@ #define NFC_REG_CMD 0x0024 #define NFC_REG_RCMD_SET 0x0028 #define NFC_REG_WCMD_SET 0x002C -#define NFC_REG_IO_DATA 0x0030 +#define NFC_REG_A10_IO_DATA 0x0030 +#define NFC_REG_A33_IO_DATA 0x0300 #define NFC_REG_ECC_CTL 0x0034 #define NFC_REG_ECC_ST 0x0038 #define NFC_REG_DEBUG 0x003C @@ -200,6 +201,22 @@ static inline struct sunxi_nand_chip *to_sunxi_nand(struct nand_chip *nand) return container_of(nand, struct sunxi_nand_chip, nand); } +/* + * NAND Controller capabilities structure: stores NAND controller capabilities + * for distinction between compatible strings. + * + * @sram_through_ahb: On A33, we choose to access the internal RAM through AHB + * instead of MBUS (less configuration). A10+ use the MBUS + * but no extra configuration is needed. + * @reg_io_data: I/O data register + * @dma_maxburst: DMA maxburst + */ +struct sunxi_nfc_caps { + bool sram_through_ahb; + unsigned int reg_io_data; + unsigned int dma_maxburst; +}; + /** * struct sunxi_nfc - stores sunxi NAND controller information * @@ -228,6 +245,7 @@ struct sunxi_nfc { struct list_head chips; struct completion complete; struct dma_chan *dmac; + const struct sunxi_nfc_caps *caps; }; static inline struct sunxi_nfc *to_sunxi_nfc(struct nand_controller *ctrl) @@ -350,10 +368,29 @@ static int sunxi_nfc_dma_op_prepare(struct sunxi_nfc *nfc, const void *buf, goto err_unmap_buf; } - writel(readl(nfc->regs + NFC_REG_CTL) | NFC_RAM_METHOD, - nfc->regs + NFC_REG_CTL); + /* + * On A33, we suppose the "internal RAM" (p.12 of the user manual) + * refers to the NAND controller's internal SRAM. This memory is mapped + * and so is accessible from the AHB. It seems that it can also be + * accessed by the MBUS. MBUS accesses are mandatory when using the + * internal DMA instead of the external DMA engine. + * + * During DMA I/O operation, either we access this memory from the AHB + * by clearing the NFC_RAM_METHOD bit, or we set the bit and use the + * MBUS. In this case, we should also configure the MBUS DMA length + * NFC_REG_MDMA_CNT(0xC4) to be chunksize * nchunks. NAND I/O over MBUS + * are also limited to 32kiB pages. + */ + if (nfc->caps->sram_through_ahb) + writel(readl(nfc->regs + NFC_REG_CTL) & ~NFC_RAM_METHOD, + nfc->regs + NFC_REG_CTL); + else + writel(readl(nfc->regs + NFC_REG_CTL) | NFC_RAM_METHOD, + nfc->regs + NFC_REG_CTL); + writel(nchunks, nfc->regs + NFC_REG_SECTOR_NUM); writel(chunksize, nfc->regs + NFC_REG_CNT); + dmat = dmaengine_submit(dmad); ret = dma_submit_error(dmat); @@ -2088,6 +2125,12 @@ static int sunxi_nfc_probe(struct platform_device *pdev) goto out_mod_clk_unprepare; } + nfc->caps = of_device_get_match_data(&pdev->dev); + if (!nfc->caps) { + ret = -EINVAL; + goto out_ahb_reset_reassert; + } + ret = sunxi_nfc_rst(nfc); if (ret) goto out_ahb_reset_reassert; @@ -2102,12 +2145,12 @@ static int sunxi_nfc_probe(struct platform_device *pdev) if (nfc->dmac) { struct dma_slave_config dmac_cfg = { }; - dmac_cfg.src_addr = r->start + NFC_REG_IO_DATA; + dmac_cfg.src_addr = r->start + nfc->caps->reg_io_data; dmac_cfg.dst_addr = dmac_cfg.src_addr; dmac_cfg.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; dmac_cfg.dst_addr_width = dmac_cfg.src_addr_width; - dmac_cfg.src_maxburst = 4; - dmac_cfg.dst_maxburst = 4; + dmac_cfg.src_maxburst = nfc->caps->dma_maxburst; + dmac_cfg.dst_maxburst = nfc->caps->dma_maxburst; dmaengine_slave_config(nfc->dmac, &dmac_cfg); } else { dev_warn(dev, "failed to request rxtx DMA channel\n"); @@ -2152,8 +2195,26 @@ static int sunxi_nfc_remove(struct platform_device *pdev) return 0; } +static const struct sunxi_nfc_caps sunxi_nfc_a10_caps = { + .reg_io_data = NFC_REG_A10_IO_DATA, + .dma_maxburst = 4, +}; + +static const struct sunxi_nfc_caps sunxi_nfc_a33_caps = { + .sram_through_ahb = true, + .reg_io_data = NFC_REG_A33_IO_DATA, + .dma_maxburst = 8, +}; + static const struct of_device_id sunxi_nfc_ids[] = { - { .compatible = "allwinner,sun4i-a10-nand" }, + { + .compatible = "allwinner,sun4i-a10-nand", + .data = &sunxi_nfc_a10_caps, + }, + { + .compatible = "allwinner,sun8i-a33-nand-controller", + .data = &sunxi_nfc_a33_caps, + }, { /* sentinel */ } }; MODULE_DEVICE_TABLE(of, sunxi_nfc_ids); From patchwork Thu Apr 4 16:21:11 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 10885941 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B95F717EE for ; Thu, 4 Apr 2019 16:37:43 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A02A42872A for ; Thu, 4 Apr 2019 16:37:43 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 9447428ABE; Thu, 4 Apr 2019 16:37:43 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 4986D2872A for ; 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Thu, 04 Apr 2019 16:37:42 +0000 Received: from relay5-d.mail.gandi.net ([217.70.183.197]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1hC57J-00047d-Rz; Thu, 04 Apr 2019 16:21:31 +0000 X-Originating-IP: 90.88.30.125 Received: from localhost.localdomain (aaubervilliers-681-1-89-125.w90-88.abo.wanadoo.fr [90.88.30.125]) (Authenticated sender: miquel.raynal@bootlin.com) by relay5-d.mail.gandi.net (Postfix) with ESMTPSA id 198D11C0074; Thu, 4 Apr 2019 16:21:25 +0000 (UTC) From: Miquel Raynal To: Richard Weinberger , David Woodhouse , Brian Norris , Marek Vasut , Tudor Ambarus , Vignesh Raghavendra , Maxime Ripard , Chen-Yu Tsai Subject: [PATCH 3/3] ARM: dts: sunxi: Improve sun8i NAND transfers by using DMA Date: Thu, 4 Apr 2019 18:21:11 +0200 Message-Id: <20190404162111.22618-4-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20190404162111.22618-1-miquel.raynal@bootlin.com> References: <20190404162111.22618-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190404_092130_049491_0F7C4882 X-CRM114-Status: GOOD ( 12.27 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Rob Herring , linux-mtd@lists.infradead.org, Miquel Raynal , linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP In the current state, sun8i NAND controllers use PIO during transfers. Throughput can be increased thanks to the use of DMA (mostly during reads, because of the ECC pipelining feature). Besides the usual addition of DMA DT properties, because the sun8i NAND DMA handling is different than for older SoCs, we must also update the compatible which has recently been introduced for this purpose. Signed-off-by: Miquel Raynal --- arch/arm/boot/dts/sun8i-a23-a33.dtsi | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/sun8i-a23-a33.dtsi b/arch/arm/boot/dts/sun8i-a23-a33.dtsi index 14a7d0288b45..f928b4bceb22 100644 --- a/arch/arm/boot/dts/sun8i-a23-a33.dtsi +++ b/arch/arm/boot/dts/sun8i-a23-a33.dtsi @@ -162,11 +162,13 @@ }; nfc: nand@1c03000 { - compatible = "allwinner,sun4i-a10-nand"; + compatible = "allwinner,sun8i-a33-nand-controller"; reg = <0x01c03000 0x1000>; interrupts = ; clocks = <&ccu CLK_BUS_NAND>, <&ccu CLK_NAND>; clock-names = "ahb", "mod"; + dmas = <&dma 5>; + dma-names = "rxtx"; resets = <&ccu RST_BUS_NAND>; reset-names = "ahb"; pinctrl-names = "default";