From patchwork Tue Apr 9 04:05:00 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhenyu Wang X-Patchwork-Id: 10890509 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 2C0141390 for ; Tue, 9 Apr 2019 04:16:23 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 112DE286FE for ; Tue, 9 Apr 2019 04:16:23 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 04B1F2870E; Tue, 9 Apr 2019 04:16:23 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 35832286FE for ; Tue, 9 Apr 2019 04:16:21 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 17E9689134; Tue, 9 Apr 2019 04:16:20 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id 0D97B8912F; Tue, 9 Apr 2019 04:16:18 +0000 (UTC) X-Amp-Result: UNSCANNABLE X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 08 Apr 2019 21:16:17 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.60,328,1549958400"; d="asc'?scan'208";a="314276577" Received: from zhen-hp.sh.intel.com (HELO zhen-hp) ([10.239.13.116]) by orsmga005.jf.intel.com with ESMTP; 08 Apr 2019 21:16:15 -0700 Date: Tue, 9 Apr 2019 12:05:00 +0800 From: Zhenyu Wang To: Joonas Lahtinen , "Vivi, Rodrigo" , Jani Nikula Message-ID: <20190409040500.GM17995@zhen-hp.sh.intel.com> MIME-Version: 1.0 User-Agent: Mutt/1.10.0 (2018-05-17) Subject: [Intel-gfx] [PULL] gvt-next X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: Zhenyu Wang Cc: intel-gfx , intel-gvt-dev , "Lv, Zhiyuan" , "Yuan, Hang" Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP Hi, This includes various code refinement and cleanups, with proper async/sync display flip handling, and also some changes required for recent drm-intel-next as guest kernel, details below. Thanks --- The following changes since commit a01b2c6f47d86c7d1a9fa822b3b91ec233b61784: drm/i915: Update DRIVER_DATE to 20190328 (2019-03-28 14:41:55 +0200) are available in the Git repository at: https://github.com/intel/gvt-linux.git tags/gvt-next-2019-04-09 for you to fetch changes up to 201e3e8580bb4924d0cc29fc3841ea5782401b46: drm/i915/gvt: Fix incorrect mask of mmio 0x22028 in gen8/9 mmio list (2019-04-03 16:37:20 +0800) ---------------------------------------------------------------- gvt-next-2019-04-09 - Refine range of MCHBAR snapshot (Yakui) - Refine out-of-sync page struct (Yakui) - Remove unused vGPU sreg (Yan) - Refind MMIO reg names (Xiaolin) - Proper handling of sync/async flip (Colin) - Proper handling of PIPE_CONTROL/MI_FLUSH_DW index mode (Xiaolin) - EXCC reg mask fix (Colin) ---------------------------------------------------------------- Colin Xu (5): drm/i915/gvt: Use consist max display pipe numbers as i915 definition drm/i915/gvt: Add macro define for mmio 0x50080 and gvt flip event drm/i915/gvt: Enable synchronous flip on handling MI_DISPLAY_FLIP drm/i915/gvt: Enable async flip on plane surface mmio writes drm/i915/gvt: Fix incorrect mask of mmio 0x22028 in gen8/9 mmio list Xiaolin Zhang (2): drm/i915/gvt: replaced register address with name drm/i915/gvt: addressed guest GPU hang with HWS index mode Yan Zhao (1): drm/i915/gvt: remove the unused sreg Zhao Yakui (2): drm/i915/gvt: Refine the snapshort range of I915 MCHBAR to optimize gvt-g boot time drm/i915/gvt: Refine the combined intel_vgpu_oos_page struct to save memory Zhenyu Wang (1): Merge tag 'drm-intel-next-2019-03-28' into gvt-next drivers/gpu/drm/i915/gvt/cmd_parser.c | 30 +++++- drivers/gpu/drm/i915/gvt/display.c | 1 - drivers/gpu/drm/i915/gvt/gtt.c | 7 ++ drivers/gpu/drm/i915/gvt/gtt.h | 2 +- drivers/gpu/drm/i915/gvt/gvt.h | 9 +- drivers/gpu/drm/i915/gvt/handlers.c | 159 +++++++++++++++++++------------- drivers/gpu/drm/i915/gvt/mmio.c | 8 +- drivers/gpu/drm/i915/gvt/mmio_context.c | 4 +- drivers/gpu/drm/i915/gvt/reg.h | 34 +++++++ 9 files changed, 172 insertions(+), 82 deletions(-)