From patchwork Wed Apr 10 12:34:50 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dennis Dalessandro X-Patchwork-Id: 10893799 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 820B21390 for ; Wed, 10 Apr 2019 12:34:56 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 70CDA26B39 for ; Wed, 10 Apr 2019 12:34:56 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 64769285E2; Wed, 10 Apr 2019 12:34:56 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 84F6728599 for ; Wed, 10 Apr 2019 12:34:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731823AbfDJMex (ORCPT ); Wed, 10 Apr 2019 08:34:53 -0400 Received: from mga18.intel.com ([134.134.136.126]:33260 "EHLO mga18.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730517AbfDJMev (ORCPT ); Wed, 10 Apr 2019 08:34:51 -0400 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by orsmga106.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 10 Apr 2019 05:34:50 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.60,332,1549958400"; d="scan'208";a="148055720" Received: from scymds02.sc.intel.com ([10.82.195.37]) by FMSMGA003.fm.intel.com with ESMTP; 10 Apr 2019 05:34:50 -0700 Received: from scvm10.sc.intel.com (scvm10.sc.intel.com [10.82.195.27]) by scymds02.sc.intel.com with ESMTP id x3ACYoNM016487; Wed, 10 Apr 2019 05:34:50 -0700 Received: from scvm10.sc.intel.com (localhost [127.0.0.1]) by scvm10.sc.intel.com with ESMTP id x3ACYoPV027309; Wed, 10 Apr 2019 05:34:50 -0700 Subject: [PATCH for-next 1/2] PCI/AER: Helper function for configuring AER registers From: Dennis Dalessandro To: bhelgaas@google.com Cc: Mike Marciniszyn , Andriy Shevchenko , jgg@ziepe.ca, linux-rdma@vger.kernel.org, linux-pci@vger.kernel.org, "Michael J. Ruhl" , dledford@redhat.com, Kamenee Arumugam Date: Wed, 10 Apr 2019 05:34:50 -0700 Message-ID: <20190410123440.26818.67664.stgit@scvm10.sc.intel.com> In-Reply-To: <20190410123253.26818.37261.stgit@scvm10.sc.intel.com> References: <20190410123253.26818.37261.stgit@scvm10.sc.intel.com> User-Agent: StGit/0.17.1-18-g2e886-dirty MIME-Version: 1.0 Sender: linux-rdma-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-rdma@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Kamenee Arumugam In some use cases, drivers may need to change the default AER settings. Introduce a helper function for setting and clearing the AER configuration registers. Access to the AER registers is not serialized. If multiple access is required, correct locking must be done. Reviewed-by: Mike Marciniszyn Reviewed-by: Michael J. Ruhl Cc: Andriy Shevchenko Signed-off-by: Kamenee Arumugam Signed-off-by: Dennis Dalessandro Reviewed-by: Andriy Shevchenko --- drivers/pci/pcie/aer.c | 33 +++++++++++++++++++++++++++++++++ include/linux/aer.h | 17 +++++++++++++++++ 2 files changed, 50 insertions(+), 0 deletions(-) diff --git a/drivers/pci/pcie/aer.c b/drivers/pci/pcie/aer.c index f8fc211..b0435f9 100644 --- a/drivers/pci/pcie/aer.c +++ b/drivers/pci/pcie/aer.c @@ -353,6 +353,39 @@ int pci_enable_pcie_error_reporting(struct pci_dev *dev) } EXPORT_SYMBOL_GPL(pci_enable_pcie_error_reporting); +/** + * pcie_aer_clear_and_set_dword - Set or clear AER registers + * @dev: pci dev data + * @pos: The offset of AER registers + * @clear: The bits to clear + * @set: The bits to set + * + * This function must only be used by the driver owning the device. + * Return: + * * 0 - on success + * * Negative error code - on generic failures + * * Positive error code - on PCI access errors + */ +int pcie_aer_clear_and_set_dword(struct pci_dev *dev, int pos, + u32 clear, u32 set) +{ + u32 data; + int ret; + + if (!dev->aer_cap) + return -EIO; + + ret = pci_read_config_dword(dev, dev->aer_cap + pos, &data); + if (!ret) { + data &= ~clear; + data |= set; + return pci_write_config_dword(dev, dev->aer_cap + pos, data); + } + + return ret; +} +EXPORT_SYMBOL_GPL(pcie_aer_clear_and_set_dword); + int pci_disable_pcie_error_reporting(struct pci_dev *dev) { if (pcie_aer_get_firmware_first(dev)) diff --git a/include/linux/aer.h b/include/linux/aer.h index 514bffa..e21d65c 100644 --- a/include/linux/aer.h +++ b/include/linux/aer.h @@ -46,6 +46,8 @@ struct aer_capability_regs { int pci_disable_pcie_error_reporting(struct pci_dev *dev); int pci_cleanup_aer_uncorrect_error_status(struct pci_dev *dev); int pci_cleanup_aer_error_status_regs(struct pci_dev *dev); +int pcie_aer_clear_and_set_dword(struct pci_dev *dev, int pos, + u32 clear, u32 set); #else static inline int pci_enable_pcie_error_reporting(struct pci_dev *dev) { @@ -63,6 +65,12 @@ static inline int pci_cleanup_aer_error_status_regs(struct pci_dev *dev) { return -EINVAL; } + +static inline int pcie_aer_clear_and_set_dword(struct pci_dev *dev, int pos, + u32 clear, u32 set) +{ + return -EINVAL; +} #endif void cper_print_aer(struct pci_dev *dev, int aer_severity, @@ -70,5 +78,14 @@ void cper_print_aer(struct pci_dev *dev, int aer_severity, int cper_severity_to_aer(int cper_severity); void aer_recover_queue(int domain, unsigned int bus, unsigned int devfn, int severity, struct aer_capability_regs *aer_regs); +static inline int pcie_aer_set_dword(struct pci_dev *dev, int pos, u32 set) +{ + return pcie_aer_clear_and_set_dword(dev, pos, 0, set); +} + +static inline int pcie_aer_clear_dword(struct pci_dev *dev, int pos, u32 clear) +{ + return pcie_aer_clear_and_set_dword(dev, pos, clear, 0); +} #endif //_AER_H_ From patchwork Wed Apr 10 12:35:01 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dennis Dalessandro X-Patchwork-Id: 10893803 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D96021390 for ; Wed, 10 Apr 2019 12:35:03 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id C9964285E2 for ; Wed, 10 Apr 2019 12:35:03 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id BDBB428821; Wed, 10 Apr 2019 12:35:03 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6AADE285E2 for ; Wed, 10 Apr 2019 12:35:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731949AbfDJMfC (ORCPT ); Wed, 10 Apr 2019 08:35:02 -0400 Received: from mga04.intel.com ([192.55.52.120]:53389 "EHLO mga04.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730517AbfDJMfC (ORCPT ); Wed, 10 Apr 2019 08:35:02 -0400 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 10 Apr 2019 05:35:01 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.60,332,1549958400"; d="scan'208";a="159914093" Received: from scymds02.sc.intel.com ([10.82.195.37]) by fmsmga002.fm.intel.com with ESMTP; 10 Apr 2019 05:35:01 -0700 Received: from scvm10.sc.intel.com (scvm10.sc.intel.com [10.82.195.27]) by scymds02.sc.intel.com with ESMTP id x3ACZ1em016541; Wed, 10 Apr 2019 05:35:01 -0700 Received: from scvm10.sc.intel.com (localhost [127.0.0.1]) by scvm10.sc.intel.com with ESMTP id x3ACZ1bE027447; Wed, 10 Apr 2019 05:35:01 -0700 Subject: [PATCH for-next 2/2] IB/hfi1: Make Unsupported Request error non-fatal From: Dennis Dalessandro To: bhelgaas@google.com Cc: jgg@ziepe.ca, linux-rdma@vger.kernel.org, linux-pci@vger.kernel.org, "Michael J. Ruhl" , dledford@redhat.com, Kamenee Arumugam Date: Wed, 10 Apr 2019 05:35:01 -0700 Message-ID: <20190410123455.26818.49424.stgit@scvm10.sc.intel.com> In-Reply-To: <20190410123253.26818.37261.stgit@scvm10.sc.intel.com> References: <20190410123253.26818.37261.stgit@scvm10.sc.intel.com> User-Agent: StGit/0.17.1-18-g2e886-dirty MIME-Version: 1.0 Sender: linux-rdma-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-rdma@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Kamenee Arumugam For hfi1, the unsupported request error is not considered a fatal error. When the PCIe advanced error reporting capability (AER) is configured to report unsupported requests as fatal, the system will hang on this error. Set Unsupported Request Error bit in Uncorrectable Error Mask register to disable error reporting to the PCIe root complex. Reviewed-by: Michael J. Ruhl Signed-off-by: Kamenee Arumugam Signed-off-by: Dennis Dalessandro --- drivers/infiniband/hw/hfi1/pcie.c | 1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/drivers/infiniband/hw/hfi1/pcie.c b/drivers/infiniband/hw/hfi1/pcie.c index c96d193..a033e28 100644 --- a/drivers/infiniband/hw/hfi1/pcie.c +++ b/drivers/infiniband/hw/hfi1/pcie.c @@ -114,6 +114,7 @@ int hfi1_pcie_init(struct hfi1_devdata *dd) } pci_set_master(pdev); + pcie_aer_set_dword(pdev, PCI_ERR_UNCOR_MASK, PCI_ERR_UNC_UNSUP); (void)pci_enable_pcie_error_reporting(pdev); return 0;