From patchwork Thu Apr 11 19:18:19 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sowjanya Komatineni X-Patchwork-Id: 10896733 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 6ADF31669 for ; Thu, 11 Apr 2019 19:18:31 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5259728D63 for ; Thu, 11 Apr 2019 19:18:31 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 41B4A28D71; Thu, 11 Apr 2019 19:18:31 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D48AE28D63 for ; Thu, 11 Apr 2019 19:18:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726784AbfDKTSY (ORCPT ); Thu, 11 Apr 2019 15:18:24 -0400 Received: from hqemgate14.nvidia.com ([216.228.121.143]:18688 "EHLO hqemgate14.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726789AbfDKTSX (ORCPT ); Thu, 11 Apr 2019 15:18:23 -0400 Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqemgate14.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Thu, 11 Apr 2019 12:18:27 -0700 Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Thu, 11 Apr 2019 12:18:22 -0700 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Thu, 11 Apr 2019 12:18:22 -0700 Received: from HQMAIL102.nvidia.com (172.18.146.10) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Thu, 11 Apr 2019 19:18:22 +0000 Received: from HQMAIL105.nvidia.com (172.20.187.12) by HQMAIL102.nvidia.com (172.18.146.10) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Thu, 11 Apr 2019 19:18:22 +0000 Received: from hqnvemgw01.nvidia.com (172.20.150.20) by HQMAIL105.nvidia.com (172.20.187.12) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via Frontend Transport; Thu, 11 Apr 2019 19:18:22 +0000 Received: from skomatineni-linux.nvidia.com (Not Verified[10.110.103.48]) by hqnvemgw01.nvidia.com with Trustwave SEG (v7,5,8,10121) id ; Thu, 11 Apr 2019 12:18:22 -0700 From: Sowjanya Komatineni To: , , , CC: , , , , , , Subject: [PATCH V4] mmc: tegra: add sdhci tegra suspend and resume Date: Thu, 11 Apr 2019 12:18:19 -0700 Message-ID: <1555010299-19141-1-git-send-email-skomatineni@nvidia.com> X-Mailer: git-send-email 2.7.4 X-NVConfidentiality: public MIME-Version: 1.0 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1555010307; bh=EzqXe8EIS6+c4hrJgaK3KbfTxED6BK/NCfoTo6wKTvk=; h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: X-NVConfidentiality:MIME-Version:Content-Type; b=ij4qDino/ShdScl/+BV4NYsWUDixFhJfs7nJWXDGEuR2EjRIODeo1FEOMwukP4Nw8 ei0ee0auglJLZj4lwFvtgUjQoSIO5bOWgz9LtBXR+s2F9TuBxXPtl4FuwQVUqEgB5/ qcZOqa1Qe15zF92MlgtSxx8E60WTp3sRpc/rUJhj2rCQ3Ho+kxuRMNx9aPgs3zf8/2 P+6qNPV5WPwDoBFj3u9r4RgRLN8P2FihjGlJT4N0rRIn/I660wR0zyUZR38YDC3ZgH apKDDwzVXKe7fhceH9dZwtxes7PglTh0Qn/ZXjZtrbiea3AqX7boZbkqoAxAJKnL+U NPQuu3qIO5eNA== Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds suspend and resume PM ops for tegra SDHCI. Acked-by: Thierry Reding Signed-off-by: Sowjanya Komatineni --- drivers/mmc/host/sdhci-tegra.c | 58 +++++++++++++++++++++++++++++++++++++++++- 1 file changed, 57 insertions(+), 1 deletion(-) diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c index eafaaefab4a6..f608417ae967 100644 --- a/drivers/mmc/host/sdhci-tegra.c +++ b/drivers/mmc/host/sdhci-tegra.c @@ -1611,11 +1611,67 @@ static int sdhci_tegra_remove(struct platform_device *pdev) return 0; } +#ifdef CONFIG_PM_SLEEP +static int __maybe_unused sdhci_tegra_suspend(struct device *dev) +{ + struct sdhci_host *host = dev_get_drvdata(dev); + struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); + int ret; + + if (host->mmc->caps2 & MMC_CAP2_CQE) { + ret = cqhci_suspend(host->mmc); + if (ret) + return ret; + } + + ret = sdhci_suspend_host(host); + if (ret) { + cqhci_resume(host->mmc); + return ret; + } + + clk_disable_unprepare(pltfm_host->clk); + return 0; +} + +static int __maybe_unused sdhci_tegra_resume(struct device *dev) +{ + struct sdhci_host *host = dev_get_drvdata(dev); + struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); + int ret; + + ret = clk_prepare_enable(pltfm_host->clk); + if (ret) + return ret; + + ret = sdhci_resume_host(host); + if (ret) + goto disable_clk; + + if (host->mmc->caps2 & MMC_CAP2_CQE) { + ret = cqhci_resume(host->mmc); + if (ret) + goto suspend_host; + } + + return 0; + +suspend_host: + sdhci_suspend_host(host); +disable_clk: + clk_disable_unprepare(pltfm_host->clk); + return ret; +} +#endif + +static SIMPLE_DEV_PM_OPS(sdhci_tegra_dev_pm_ops, sdhci_tegra_suspend, + sdhci_tegra_resume); + static struct platform_driver sdhci_tegra_driver = { .driver = { .name = "sdhci-tegra", .of_match_table = sdhci_tegra_dt_match, - .pm = &sdhci_pltfm_pmops, + .pm = &sdhci_tegra_dev_pm_ops, }, .probe = sdhci_tegra_probe, .remove = sdhci_tegra_remove,