From patchwork Tue Apr 16 14:28:44 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 10903225 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B49791515 for ; Tue, 16 Apr 2019 14:28:57 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9B882281E1 for ; Tue, 16 Apr 2019 14:28:57 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 8F616285D2; Tue, 16 Apr 2019 14:28:57 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 2298F2811A for ; Tue, 16 Apr 2019 14:28:57 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id CAE1789D5F; Tue, 16 Apr 2019 14:28:54 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-lj1-x243.google.com (mail-lj1-x243.google.com [IPv6:2a00:1450:4864:20::243]) by gabe.freedesktop.org (Postfix) with ESMTPS id ADA3189D5C for ; Tue, 16 Apr 2019 14:28:53 +0000 (UTC) Received: by mail-lj1-x243.google.com with SMTP id h16so19278120ljg.11 for ; Tue, 16 Apr 2019 07:28:53 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=v8PQx9vdgeVLhqbijrJGIIWCf9IZInAVRMTzTR4fvFg=; b=oMlWPD9zpvTKhmzkwAX98x90noh6ksFC+926YQPiFxWFypGNkEnXiFbXguWW6oL9mL vrsg1y3rDdQaNKiz5nB5friLHLmhwyoxRfFX8Ywuj08vrpb8OQm5+UCYIu7P577wmANl 4QCf0JEyvV+xfXIs5UXQJc5Bi2t0NwRm7BXQCN5u5EbJ42fQTnNgWRPYLRFXcA+Pnu5s rhyifLcb7zTz00vbcb/RT7pmWnci5BuBEIhHS4eFs9nJIUPgLMfmmf8C++9X56nR+WP4 QqVjlpAE0xEv9MrqyJQTSnQ1H/aRVEqE7e1B9uVZ+FLzkHd6KfU83T03o1C6NtEGcE+r gpog== X-Gm-Message-State: APjAAAUd+EhLJk3xPL3xklW/ZBETgBZbdMxI3m+9/qEXYigbu7XTVUtA InwQ9UlCzO9DZzhKKk+DwvxURdYMkws= X-Google-Smtp-Source: APXvYqxJRojEOn4F4IDOnSUagcwmzlwh4iU4edENGC58bmdI3lV3p2hVKXFRcskpWlIor5LSNWy6fA== X-Received: by 2002:a2e:9c0a:: with SMTP id s10mr24708080lji.162.1555424931870; Tue, 16 Apr 2019 07:28:51 -0700 (PDT) Received: from genomnajs.ideon.se ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id l5sm6687373lfh.70.2019.04.16.07.28.50 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 16 Apr 2019 07:28:50 -0700 (PDT) From: Linus Walleij To: dri-devel@lists.freedesktop.org, Maarten Lankhorst , Maxime Ripard , Sean Paul , Rob Herring Subject: [PATCH 2/4 v2] drm/mcde: Add device tree bindings Date: Tue, 16 Apr 2019 16:28:44 +0200 Message-Id: <20190416142844.12038-1-linus.walleij@linaro.org> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 X-Mailman-Original-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=v8PQx9vdgeVLhqbijrJGIIWCf9IZInAVRMTzTR4fvFg=; b=TOzKoZbBk7lThaXbAANV6Tmx1dRn5KQtVXDawqiAFNPG30+eyAISVtHPs9Vn5FovUB /jKuTWkWURySl+YOzMjvLe65ieLp5Wvs9GmvVwYXL6S5svv+7LJ5Cdxtic00QulL7kDl y7R3f5lOXwMgvw/6bwZWt80WqTni+VayyYIJVhnmaXYNJvhy/tTqvLx9HXifeZO7nL+0 3BTzeIo5CuetCmziWZ/OBHdACYO+L1rpdCHniEzAJ0ys5xjq0qZFhDZKGbhS5RAUHgEN vAchR/VCE/Wl9VXo4JM/ilZYlYdaP9WH/nj4FcJpMSTnXDyQkWiHez7xPpOiPjNCjFhY cENg== X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP This adds the device tree bindings for the ST-Ericsson Multi Channel Display Engine MCDE as found in the U8500 SoCs. Cc: devicetree@vger.kernel.org Signed-off-by: Linus Walleij Reviewed-by: Rob Herring --- ChangeLog v1->v2: - Drop the graph representation of a port from DSI host to panel child. Just have panels or bridges be children of the DSI host. - Just name the panel node "panel". - Move the HS and LP/ES clocks to be properties on their respective DSI host device nodes. - Clarify that the third DSI block (DSI2) does not have any high speed clock. --- .../devicetree/bindings/display/ste,mcde.txt | 104 ++++++++++++++++++ 1 file changed, 104 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/ste,mcde.txt diff --git a/Documentation/devicetree/bindings/display/ste,mcde.txt b/Documentation/devicetree/bindings/display/ste,mcde.txt new file mode 100644 index 000000000000..4c33c692bd5f --- /dev/null +++ b/Documentation/devicetree/bindings/display/ste,mcde.txt @@ -0,0 +1,104 @@ +ST-Ericsson Multi Channel Display Engine MCDE + +The ST-Ericsson MCDE is a display controller with support for compositing +and displaying several channels memory resident graphics data on DSI or +LCD displays or bridges. It is used in the ST-Ericsson U8500 platform. + +Required properties: + +- compatible: must be: + "ste,mcde" +- reg: register base for the main MCDE control registers, should be + 0x1000 in size +- interrupts: the interrupt line for the MCDE +- epod-supply: a phandle to the EPOD regulator +- vana-supply: a phandle to the analog voltage regulator +- clocks: an array of the MCDE clocks in this strict order: + MCDECLK (main MCDE clock), LCDCLK (LCD clock), PLLDSI + (HDMI clock), DSI0ESCLK (DSI0 energy save clock), + DSI1ESCLK (DSI1 energy save clock), DSI2ESCLK (DSI2 energy + save clock) +- clock-names: must be the following array: + "mcde", "lcd", "hdmi" + to match the required clock inputs above. +- #address-cells: should be <1> (for the DSI hosts that will be children) +- #size-cells: should be <1> (for the DSI hosts that will be children) +- ranges: this should always be stated + +Required subnodes: + +The devicetree must specify subnodes for the DSI host adapters. +These must have the following characteristics: + +- compatible: must be: + "ste,mcde-dsi" +- reg: must specify the register range for the DSI host +- vana-supply: phandle to the VANA voltage regulator +- clocks: phandles to the high speed and low power (energy save) clocks + the high speed clock is not present on the third (dsi2) block, so it + should only have the "lp" clock +- clock-names: "hs" for the high speed clock and "lp" for the low power + (energy save) clock +- #address-cells: should be <1> +- #size-cells: should be <0> + +Display panels and bridges will appear as children on the DSI hosts, and +the displays are connected to the DSI hosts using the common binding +for video transmitter interfaces; see +Documentation/devicetree/bindings/media/video-interfaces.txt + +If a DSI host is unused (not connected) it will have no children defined. + +Example: + +mcde@a0350000 { + compatible = "ste,mcde"; + reg = <0xa0350000 0x1000>; + interrupts = ; + epod-supply = <&db8500_b2r2_mcde_reg>; + vana-supply = <&ab8500_ldo_ana_reg>; + clocks = <&prcmu_clk PRCMU_MCDECLK>, /* Main MCDE clock */ + <&prcmu_clk PRCMU_LCDCLK>, /* LCD clock */ + <&prcmu_clk PRCMU_PLLDSI>; /* HDMI clock */ + clock-names = "mcde", "lcd", "hdmi"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + dsi0: dsi@a0351000 { + compatible = "ste,mcde-dsi"; + reg = <0xa0351000 0x1000>; + vana-supply = <&ab8500_ldo_ana_reg>; + clocks = <&prcmu_clk PRCMU_DSI0CLK>, <&prcmu_clk PRCMU_DSI0ESCCLK>; + clock-names = "hs", "lp"; + #address-cells = <1>; + #size-cells = <0>; + + panel { + compatible = "samsung,s6d16d0"; + reg = <0>; + vdd1-supply = <&ab8500_ldo_aux1_reg>; + reset-gpios = <&gpio2 1 GPIO_ACTIVE_LOW>; + }; + + }; + dsi1: dsi@a0352000 { + compatible = "ste,mcde-dsi"; + reg = <0xa0352000 0x1000>; + vana-supply = <&ab8500_ldo_ana_reg>; + clocks = <&prcmu_clk PRCMU_DSI1CLK>, <&prcmu_clk PRCMU_DSI1ESCCLK>; + clock-names = "hs", "lp"; + #address-cells = <1>; + #size-cells = <0>; + }; + dsi2: dsi@a0353000 { + compatible = "ste,mcde-dsi"; + reg = <0xa0353000 0x1000>; + vana-supply = <&ab8500_ldo_ana_reg>; + /* This DSI port only has the Low Power / Energy Save clock */ + clocks = <&prcmu_clk PRCMU_DSI2ESCCLK>; + clock-names = "lp"; + #address-cells = <1>; + #size-cells = <0>; + }; +}; From patchwork Tue Apr 16 14:31:02 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 10903233 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 93067161F for ; Tue, 16 Apr 2019 14:31:14 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7BEA0288B9 for ; Tue, 16 Apr 2019 14:31:14 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 7038328925; Tue, 16 Apr 2019 14:31:14 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 065EB2892A for ; Tue, 16 Apr 2019 14:31:13 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 0198789453; Tue, 16 Apr 2019 14:31:12 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-lj1-x243.google.com (mail-lj1-x243.google.com [IPv6:2a00:1450:4864:20::243]) by gabe.freedesktop.org (Postfix) with ESMTPS id 8489789453 for ; Tue, 16 Apr 2019 14:31:09 +0000 (UTC) Received: by mail-lj1-x243.google.com with SMTP id f18so19305264lja.10 for ; Tue, 16 Apr 2019 07:31:09 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=Yt5V88l+DfqZ0DDFkRkxp4IHLiftWlPOuQ0M61KhFe0=; b=uFeGTt+8G8ogZSUNw1bdDTi02JOGjEdBJm+4Zwqz4Mxh2FlLvlNDluH0NOnayc/Wjr RPU09X15E9R0jOdeAhcY90d7ad4kKb14oa3LO1gch1j04C8AJ+uTeu4js/pceCSxwP4y 3X42MbefJ2xvOWeuykEkfl/m5v7MVrNLgp5at7QQ2Ao9phX7cvx99hmzSSFU72N8YXhd CzYYaWVcteDfBNf7+85qmYv72fX0iFs/+2dfunJ4rvxnF/BD8A84MR6wj/uK+o+byBDa jqZi/Moa0K6I1JOOy/ivW/xnwSThQZCcLHGnRIP9crOFrVpkr12DA0qeBypk/caw0k0p UL+Q== X-Gm-Message-State: APjAAAVd/KbHw1Hd2OeVLRqz2a6752nXyDE6hSaBwpbLlEC3J5T0KC8z lcM6pEjM9C7lYpwpmpBOZ8clIx3DLJk= X-Google-Smtp-Source: APXvYqzMBe8xDIdTh94738zimdXQ8ZlXpG1iJVbrjtaAvSsTMUVYMLyPI4BljkgHHaqs+kyvrwZcnA== X-Received: by 2002:a2e:390c:: with SMTP id g12mr43552519lja.174.1555425067422; Tue, 16 Apr 2019 07:31:07 -0700 (PDT) Received: from genomnajs.ideon.se ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id m19sm6677693lfl.43.2019.04.16.07.31.05 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 16 Apr 2019 07:31:06 -0700 (PDT) From: Linus Walleij To: dri-devel@lists.freedesktop.org, Maarten Lankhorst , Maxime Ripard , Sean Paul Subject: [PATCH 4/4 v2] ARM: dts: Ux500: Add MCDE and Samsung display Date: Tue, 16 Apr 2019 16:31:02 +0200 Message-Id: <20190416143102.12462-1-linus.walleij@linaro.org> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 X-Mailman-Original-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=Yt5V88l+DfqZ0DDFkRkxp4IHLiftWlPOuQ0M61KhFe0=; b=g4wrDfZ3XMcZvyKpL08QOUUPNVmp4wzPLJhZRc8f9LsGi01745Z966TF5aYuRArrBH oBhkBOSMqpRjdjdueXLf5gXTypIGfKMkbgJ1l5l98P9/SnILR00mmyScVhaMLxvTQaDG qQgI6HnalAyiejEcNUAwTryzZ5d0pubfgfJoVLyWz6SYhYBPN5pVuwSC9uSSheYPB/cR b0+F4nvk7Si72arKLf6bYdCQItvXbOIkqTNPx7QC1LvQbEB+lLIh46aby6aJnhYFqv2n UPulZSCE4Ds1pRQVg0PKiuo22YPNSesZ2Sz1XvjooFAaHeISdP9Gi+Nsjn2jk/kH8HAD hUMg== X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-arm-kernel@lists.infradead.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP This adds and updates the device tree nodes for the MCDE display controller and connects the Samsung display to the TVK1281618 user interface board (UIB) so we get nicely working graphics on this reference design. Signed-off-by: Linus Walleij --- ChangeLog v1->v2: - Drop the port graph links between DSI host and children and just let the panel be the child of its DSI port. - Move the DSI HS and LP/ES clocks to be properties on the DSI host nodes. --- arch/arm/boot/dts/ste-dbx5x0.dtsi | 50 +++++++++++++++++----- arch/arm/boot/dts/ste-href-stuib.dtsi | 13 ++++++ arch/arm/boot/dts/ste-href-tvk1281618.dtsi | 13 ++++++ 3 files changed, 65 insertions(+), 11 deletions(-) diff --git a/arch/arm/boot/dts/ste-dbx5x0.dtsi b/arch/arm/boot/dts/ste-dbx5x0.dtsi index 43d11346308e..81fabf031eff 100644 --- a/arch/arm/boot/dts/ste-dbx5x0.dtsi +++ b/arch/arm/boot/dts/ste-dbx5x0.dtsi @@ -1221,20 +1221,48 @@ }; mcde@a0350000 { - compatible = "stericsson,mcde"; - reg = <0xa0350000 0x1000>, /* MCDE */ - <0xa0351000 0x1000>, /* DSI link 1 */ - <0xa0352000 0x1000>, /* DSI link 2 */ - <0xa0353000 0x1000>; /* DSI link 3 */ + compatible = "ste,mcde"; + reg = <0xa0350000 0x1000>; interrupts = ; + epod-supply = <&db8500_b2r2_mcde_reg>; + vana-supply = <&ab8500_ldo_ana_reg>; clocks = <&prcmu_clk PRCMU_MCDECLK>, /* Main MCDE clock */ <&prcmu_clk PRCMU_LCDCLK>, /* LCD clock */ - <&prcmu_clk PRCMU_PLLDSI>, /* HDMI clock */ - <&prcmu_clk PRCMU_DSI0CLK>, /* DSI 0 */ - <&prcmu_clk PRCMU_DSI1CLK>, /* DSI 1 */ - <&prcmu_clk PRCMU_DSI0ESCCLK>, /* TVout clock 0 */ - <&prcmu_clk PRCMU_DSI1ESCCLK>, /* TVout clock 1 */ - <&prcmu_clk PRCMU_DSI2ESCCLK>; /* TVout clock 2 */ + <&prcmu_clk PRCMU_PLLDSI>; /* HDMI clock */ + clock-names = "mcde", "lcd", "hdmi"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + status = "disabled"; + + dsi0: dsi@a0351000 { + compatible = "ste,mcde-dsi"; + reg = <0xa0351000 0x1000>; + vana-supply = <&ab8500_ldo_ana_reg>; + clocks = <&prcmu_clk PRCMU_DSI0CLK>, <&prcmu_clk PRCMU_DSI0ESCCLK>; + clock-names = "hs", "lp"; + #address-cells = <1>; + #size-cells = <0>; + }; + dsi1: dsi@a0352000 { + compatible = "ste,mcde-dsi"; + reg = <0xa0352000 0x1000>; + vana-supply = <&ab8500_ldo_ana_reg>; + clocks = <&prcmu_clk PRCMU_DSI1CLK>, <&prcmu_clk PRCMU_DSI1ESCCLK>; + clock-names = "hs", "lp"; + #address-cells = <1>; + #size-cells = <0>; + }; + dsi2: dsi@a0353000 { + compatible = "ste,mcde-dsi"; + reg = <0xa0353000 0x1000>; + vana-supply = <&ab8500_ldo_ana_reg>; + /* This DSI port only has the Low Power / Energy Save clock */ + clocks = <&prcmu_clk PRCMU_DSI2ESCCLK>; + clock-names = "lp"; + #address-cells = <1>; + #size-cells = <0>; + }; }; cryp@a03cb000 { diff --git a/arch/arm/boot/dts/ste-href-stuib.dtsi b/arch/arm/boot/dts/ste-href-stuib.dtsi index 35e944d8b5c4..eeaea21f5eca 100644 --- a/arch/arm/boot/dts/ste-href-stuib.dtsi +++ b/arch/arm/boot/dts/ste-href-stuib.dtsi @@ -190,5 +190,18 @@ }; }; }; + + mcde@a0350000 { + status = "okay"; + + dsi@a0351000 { + panel { + compatible = "samsung,s6d16d0"; + reg = <0>; + vdd1-supply = <&ab8500_ldo_aux1_reg>; + reset-gpios = <&gpio2 1 GPIO_ACTIVE_LOW>; + }; + }; + }; }; }; diff --git a/arch/arm/boot/dts/ste-href-tvk1281618.dtsi b/arch/arm/boot/dts/ste-href-tvk1281618.dtsi index 0e7d77d719d7..76868444caa4 100644 --- a/arch/arm/boot/dts/ste-href-tvk1281618.dtsi +++ b/arch/arm/boot/dts/ste-href-tvk1281618.dtsi @@ -274,5 +274,18 @@ }; }; }; + + mcde@a0350000 { + status = "okay"; + + dsi@a0351000 { + panel { + compatible = "samsung,s6d16d0"; + reg = <0>; + vdd1-supply = <&ab8500_ldo_aux1_reg>; + reset-gpios = <&gpio2 1 GPIO_ACTIVE_LOW>; + }; + }; + }; }; };