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Fri, 19 Apr 2019 20:20:41 +0000 From: Daniel Baluta To: "shawnguo@kernel.org" Subject: [PATCH 1/2] arm64: dts: imx8mm: Add SAI nodes Thread-Topic: [PATCH 1/2] arm64: dts: imx8mm: Add SAI nodes Thread-Index: AQHU9u1b91prc4MsrUqY1UzjoRVnxg== Date: Fri, 19 Apr 2019 20:20:39 +0000 Message-ID: <20190419202024.27314-2-daniel.baluta@nxp.com> References: <20190419202024.27314-1-daniel.baluta@nxp.com> In-Reply-To: <20190419202024.27314-1-daniel.baluta@nxp.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: VI1PR09CA0076.eurprd09.prod.outlook.com (2603:10a6:802:29::20) To VI1PR0402MB3357.eurprd04.prod.outlook.com (2603:10a6:803:2::18) authentication-results: spf=none (sender IP is ) smtp.mailfrom=daniel.baluta@nxp.com; x-ms-exchange-messagesentrepresentingtype: 1 x-mailer: git-send-email 2.17.1 x-originating-ip: [212.146.100.6] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 4bac339b-6fcc-4afe-7b78-08d6c5047d55 x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0; 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Wang" , "linux-arm-kernel@lists.infradead.org" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP i.MX8MM has 5 SAI instances with the following base addresses according to RM. SAI1 base address: 3001_0000h SAI2 base address: 3002_0000h SAI3 base address: 3003_0000h SAI5 base address: 3005_0000h SAI6 base address: 3006_0000h Signed-off-by: Bai Ping Signed-off-by: Daniel Baluta --- arch/arm64/boot/dts/freescale/imx8mm.dtsi | 68 +++++++++++++++++++++++ 1 file changed, 68 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi index de3498c2dd44..e9a0b2b6063a 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi @@ -171,6 +171,74 @@ #size-cells = <1>; ranges; + sai1: sai@30010000 { + compatible = "fsl,imx8mq-sai", + "fsl,imx6sx-sai"; + reg = <0x30010000 0x10000>; + interrupts = ; + clocks = <&clk IMX8MM_CLK_SAI1_IPG>, + <&clk IMX8MM_CLK_SAI1_ROOT>, + <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>; + clock-names = "bus", "mclk1", "mclk2", "mclk3"; + dmas = <&sdma2 0 2 0>, <&sdma2 1 2 0>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + + sai2: sai@30020000 { + compatible = "fsl,imx8mq-sai", + "fsl,imx6sx-sai"; + reg = <0x30020000 0x10000>; + interrupts = ; + clocks = <&clk IMX8MM_CLK_SAI2_IPG>, + <&clk IMX8MM_CLK_SAI2_ROOT>, + <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>; + clock-names = "bus", "mclk1", "mclk2", "mclk3"; + dmas = <&sdma2 2 2 0>, <&sdma2 3 2 0>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + + sai3: sai@30030000 { + #sound-dai-cells = <0>; + compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai", "fsl,imx6sx-sai"; + reg = <0x30030000 0x10000>; + interrupts = ; + clocks = <&clk IMX8MM_CLK_SAI3_IPG>, + <&clk IMX8MM_CLK_SAI3_ROOT>, + <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>; + clock-names = "bus", "mclk1", "mclk2", "mclk3"; + dmas = <&sdma2 4 2 0>, <&sdma2 5 2 0>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + + sai5: sai@30050000 { + compatible = "fsl,imx8mq-sai", "fsl,imx6sx-sai"; + reg = <0x30050000 0x10000>; + interrupts = ; + clocks = <&clk IMX8MM_CLK_SAI5_IPG>, + <&clk IMX8MM_CLK_SAI5_ROOT>, + <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>; + clock-names = "bus", "mclk1", "mclk2", "mclk3"; + dmas = <&sdma2 8 2 0>, <&sdma2 9 2 0>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + + sai6: sai@30060000 { + compatible = "fsl,imx8mq-sai", "fsl,imx6sx-sai"; + reg = <0x30060000 0x10000>; + interrupts = ; + clocks = <&clk IMX8MM_CLK_SAI6_IPG>, + <&clk IMX8MM_CLK_SAI6_ROOT>, + <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>; + clock-names = "bus", "mclk1", "mclk2", "mclk3"; + dmas = <&sdma2 10 2 0>, <&sdma2 11 2 0>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + gpio1: gpio@30200000 { compatible = "fsl,imx8mm-gpio", "fsl,imx35-gpio"; reg = <0x30200000 0x10000>; From patchwork Fri Apr 19 20:20:40 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Baluta X-Patchwork-Id: 10909777 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 97D34922 for ; Fri, 19 Apr 2019 20:21:11 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8A0F7288DD for ; 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bh=K8t4Z2B0HxQ84uDbmdFEnLjkX7+aloEp8achwIls+xw=; b=hPPQTx5wahogBI2aUcdOND4+GuHONqiI2Sf7r9Y0ClIUqWlntljBuDd1mDddNH1lwm80iVOX5nb/nj95dglujlKmdbshcHzjgHKU2SN+5UPyHymFw+S4CnhWLiSVNfTdnPtUsBs7esO9bNvJQax844yhaWA1I5NsyL7uFFJSG3M= Received: from VI1PR0402MB3357.eurprd04.prod.outlook.com (52.134.1.18) by VI1PR0402MB3392.eurprd04.prod.outlook.com (52.134.1.153) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1813.14; Fri, 19 Apr 2019 20:20:42 +0000 Received: from VI1PR0402MB3357.eurprd04.prod.outlook.com ([fe80::c16b:662d:9299:6be6]) by VI1PR0402MB3357.eurprd04.prod.outlook.com ([fe80::c16b:662d:9299:6be6%6]) with mapi id 15.20.1813.013; Fri, 19 Apr 2019 20:20:42 +0000 From: Daniel Baluta To: "shawnguo@kernel.org" Subject: [PATCH 2/2] arm64: dts: imx8mm-evk: Enable audio codec wm8524 Thread-Topic: [PATCH 2/2] arm64: dts: imx8mm-evk: Enable audio codec wm8524 Thread-Index: AQHU9u1belSuPjg9j0eSzCLrjjl2TQ== Date: Fri, 19 Apr 2019 20:20:40 +0000 Message-ID: <20190419202024.27314-3-daniel.baluta@nxp.com> References: <20190419202024.27314-1-daniel.baluta@nxp.com> In-Reply-To: <20190419202024.27314-1-daniel.baluta@nxp.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: VI1PR09CA0076.eurprd09.prod.outlook.com (2603:10a6:802:29::20) To VI1PR0402MB3357.eurprd04.prod.outlook.com (2603:10a6:803:2::18) authentication-results: spf=none (sender IP is ) smtp.mailfrom=daniel.baluta@nxp.com; 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Wang" , "linux-arm-kernel@lists.infradead.org" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP i.MX8MM EVK has one wm8524 audio codec connected with SAI3 digital audio interface. This patch uses simple-card machine driver in order to enable wm8524 codec. We need to set: * SAI3 pinctrl configuration * clock hierarchy * codec node * simple-card configuration Signed-off-by: Daniel Baluta --- arch/arm64/boot/dts/freescale/imx8mm-evk.dts | 48 ++++++++++++++++++++ 1 file changed, 48 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mm-evk.dts b/arch/arm64/boot/dts/freescale/imx8mm-evk.dts index 2d5d89475b76..207b13266a96 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-evk.dts +++ b/arch/arm64/boot/dts/freescale/imx8mm-evk.dts @@ -37,6 +37,35 @@ gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>; enable-active-high; }; + + wm8524: audio-codec { + #sound-dai-cells = <0>; + compatible = "wlf,wm8524"; + wlf,mute-gpios = <&gpio5 21 GPIO_ACTIVE_LOW>; + }; + + sound-wm8524 { + compatible = "simple-audio-card"; + simple-audio-card,name = "wm8524-audio"; + simple-audio-card,format = "i2s"; + simple-audio-card,frame-master = <&cpudai>; + simple-audio-card,bitclock-master = <&cpudai>; + simple-audio-card,widgets = + "Line", "Left Line Out Jack", + "Line", "Right Line Out Jack"; + simple-audio-card,routing = + "Left Line Out Jack", "LINEVOUTL", + "Right Line Out Jack", "LINEVOUTR"; + + cpudai: simple-audio-card,cpu { + sound-dai = <&sai3>; + }; + + link_codec: simple-audio-card,codec { + sound-dai = <&wm8524>; + clocks = <&clk IMX8MM_CLK_SAI3_ROOT>; + }; + }; }; &fec1 { @@ -61,6 +90,15 @@ }; }; +&sai3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sai3>; + assigned-clocks = <&clk IMX8MM_CLK_SAI3>; + assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>; + assigned-clock-rates = <24576000>; + status = "okay"; +}; + &uart2 { /* console */ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart2>; @@ -130,6 +168,16 @@ >; }; + pinctrl_sai3: sai3grp { + fsl,pins = < + MX8MM_IOMUXC_SAI3_TXFS_SAI3_TX_SYNC 0xd6 + MX8MM_IOMUXC_SAI3_TXC_SAI3_TX_BCLK 0xd6 + MX8MM_IOMUXC_SAI3_MCLK_SAI3_MCLK 0xd6 + MX8MM_IOMUXC_SAI3_TXD_SAI3_TX_DATA0 0xd6 + MX8MM_IOMUXC_I2C4_SDA_GPIO5_IO21 0xd6 + >; + }; + pinctrl_uart2: uart2grp { fsl,pins = < MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140