From patchwork Wed Apr 24 01:11:11 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "zhiyong.tao" X-Patchwork-Id: 10913931 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 63D4D14DB for ; Wed, 24 Apr 2019 01:11:25 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5122D28A22 for ; Wed, 24 Apr 2019 01:11:25 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 43E7D28A25; Wed, 24 Apr 2019 01:11:25 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B451228A22 for ; Wed, 24 Apr 2019 01:11:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728536AbfDXBLX (ORCPT ); Tue, 23 Apr 2019 21:11:23 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:50125 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1726840AbfDXBLW (ORCPT ); Tue, 23 Apr 2019 21:11:22 -0400 X-UUID: 222f0c07db1444ad9b77637cef47a9cb-20190424 X-UUID: 222f0c07db1444ad9b77637cef47a9cb-20190424 Received: from mtkmrs01.mediatek.inc [(172.21.131.159)] by mailgw02.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 1747827543; Wed, 24 Apr 2019 09:11:17 +0800 Received: from mtkcas09.mediatek.inc (172.21.101.178) by mtkmbs02n1.mediatek.inc (172.21.101.77) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Wed, 24 Apr 2019 09:11:16 +0800 Received: from localhost.localdomain (10.17.3.153) by mtkcas09.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Wed, 24 Apr 2019 09:11:15 +0800 From: Zhiyong Tao To: , , , , CC: , , , , , , , , , , , , , Zhiyong Tao Subject: [PATCH v2 1/2] dt-bindings: adc: mt8183: add binding document Date: Wed, 24 Apr 2019 09:11:11 +0800 Message-ID: <20190424011112.14283-2-zhiyong.tao@mediatek.com> X-Mailer: git-send-email 2.12.5 In-Reply-To: <20190424011112.14283-1-zhiyong.tao@mediatek.com> References: <20190424011112.14283-1-zhiyong.tao@mediatek.com> MIME-Version: 1.0 X-MTK: N Sender: linux-iio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The commit adds mt8183 compatible node in binding document. Signed-off-by: Zhiyong Tao Reviewed-by: Rob Herring --- Documentation/devicetree/bindings/iio/adc/mt6577_auxadc.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/iio/adc/mt6577_auxadc.txt b/Documentation/devicetree/bindings/iio/adc/mt6577_auxadc.txt index 0df9befdaecc..936a0b4666da 100644 --- a/Documentation/devicetree/bindings/iio/adc/mt6577_auxadc.txt +++ b/Documentation/devicetree/bindings/iio/adc/mt6577_auxadc.txt @@ -15,6 +15,7 @@ Required properties: - "mediatek,mt2712-auxadc": For MT2712 family of SoCs - "mediatek,mt7622-auxadc": For MT7622 family of SoCs - "mediatek,mt8173-auxadc": For MT8173 family of SoCs + - "mediatek,mt8183-auxadc", "mediatek,mt8173-auxadc": For MT8183 family of SoCs - reg: Address range of the AUXADC unit. - clocks: Should contain a clock specifier for each entry in clock-names - clock-names: Should contain "main". From patchwork Wed Apr 24 01:11:12 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "zhiyong.tao" X-Patchwork-Id: 10913943 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 07E561390 for ; Wed, 24 Apr 2019 01:11:52 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id EB26E28A22 for ; Wed, 24 Apr 2019 01:11:51 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id DF2C028A25; Wed, 24 Apr 2019 01:11:51 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9148628A22 for ; Wed, 24 Apr 2019 01:11:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728729AbfDXBLv (ORCPT ); Tue, 23 Apr 2019 21:11:51 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:16651 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1726840AbfDXBLu (ORCPT ); Tue, 23 Apr 2019 21:11:50 -0400 X-UUID: 35b5174685464996b71ee893d43300d6-20190424 X-UUID: 35b5174685464996b71ee893d43300d6-20190424 Received: from mtkexhb02.mediatek.inc [(172.21.101.103)] by mailgw02.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 1716989058; Wed, 24 Apr 2019 09:11:23 +0800 Received: from mtkcas09.mediatek.inc (172.21.101.178) by mtkmbs01n1.mediatek.inc (172.21.101.68) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Wed, 24 Apr 2019 09:11:22 +0800 Received: from localhost.localdomain (10.17.3.153) by mtkcas09.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Wed, 24 Apr 2019 09:11:16 +0800 From: Zhiyong Tao To: , , , , CC: , , , , , , , , , , , , , Zhiyong Tao Subject: [PATCH v2 2/2] arm64: dts: mt8183: Add auxadc device node Date: Wed, 24 Apr 2019 09:11:12 +0800 Message-ID: <20190424011112.14283-3-zhiyong.tao@mediatek.com> X-Mailer: git-send-email 2.12.5 In-Reply-To: <20190424011112.14283-1-zhiyong.tao@mediatek.com> References: <20190424011112.14283-1-zhiyong.tao@mediatek.com> MIME-Version: 1.0 X-MTK: N Sender: linux-iio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add auxadc device node for MT8183 Signed-off-by: Zhiyong Tao --- arch/arm64/boot/dts/mediatek/mt8183-evb.dts | 4 ++++ arch/arm64/boot/dts/mediatek/mt8183.dtsi | 10 ++++++++++ 2 files changed, 14 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts index 9b525597e5ec..49909acc6efa 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts +++ b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts @@ -26,6 +26,10 @@ }; }; +&auxadc { + status = "okay"; +}; + &uart0 { status = "okay"; }; diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi index 75c4881bbe5e..57580d973316 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi @@ -269,6 +269,16 @@ clock-names = "spi", "wrap"; }; + auxadc: auxadc@11001000 { + compatible = "mediatek,mt8183-auxadc", + "mediatek,mt8173-auxadc"; + reg = <0 0x11001000 0 0x1000>; + clocks = <&infracfg CLK_INFRA_AUXADC>; + clock-names = "main"; + #io-channel-cells = <1>; + status = "disabled"; + }; + uart0: serial@11002000 { compatible = "mediatek,mt8183-uart", "mediatek,mt6577-uart";