From patchwork Sat Apr 27 12:09:13 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 10920195 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A0B841395 for ; Sat, 27 Apr 2019 12:09:39 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 89BB528D8A for ; Sat, 27 Apr 2019 12:09:39 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 79ACE28DC2; Sat, 27 Apr 2019 12:09:39 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id C54A228D8A for ; Sat, 27 Apr 2019 12:09:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-Id:Date:Subject:To :From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=ZgE6xbWhcPgU6ql0e0VOQnHtPIbOlBMS3/JF/RHmb6Y=; b=jLyH68aG+MFyIM 5wug4WeqtODpvvSR0KAB6hsCaxbu8uxT7srTQEUQ4MxDqz+Bzw6i6mRZ7Uk15NPNhLWi1nA5Nr0wl olZFHv+nEU//7YnoUpLVV7jJNEF9AVgecV2c94CppIFwbvNRAF39fpG5zL45pVk0d2z9gliTEsIq+ Q370Tq3vAwbrL23s01h+9MrIa7/+0dxOoToVbVVuN/UjR7NOfN4qMAj5A6Is1uqJNDe4ZaYlJ3Cbo fCnF8E5hQ2HoAeknKw7AfW2ugRHJpuVDclebNq70Bme7r5x+p0QnhJHYpbUgSrU8c3cxLgnnBVYa4 6jlhGV4wWjffDRJbQlAA==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1hKM99-0000eG-S0; Sat, 27 Apr 2019 12:09:35 +0000 Received: from mail-pf1-x443.google.com ([2607:f8b0:4864:20::443]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1hKM96-0000dj-TQ for linux-rockchip@lists.infradead.org; Sat, 27 Apr 2019 12:09:35 +0000 Received: by mail-pf1-x443.google.com with SMTP id e67so2999572pfe.10 for ; Sat, 27 Apr 2019 05:09:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=C5HEva8diuj276XKEvIX5UABlaOPEwKA0TPntC6MVG0=; b=PTZ7s0qjuGSB2s3d8serTZxN9YJasXCL93pFma67ci6DFCtGOo62fR1f90KEocA1Gx OcRXosbWZ7+xJsysC7XwFsXazuH3XeER0aUdp/2GrFUEhkdoHsA07qNOcweHGrmU37Y/ R0oup0Z80CVd4UfeFalE+NIwt+cs6V5IAnGM8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=C5HEva8diuj276XKEvIX5UABlaOPEwKA0TPntC6MVG0=; b=nQslFSK2muKf29XPyzOPdjcqFCkf6m8IMWa2PAidFHM3bQ8OYGZCH4UMtVlYGXGItN hBMx5+bUTo1tgyOuRT4GvE/0kpgqlReLJyBUbcz22uEngG65g4UJWGREwT2jNLz8V+0z ITXKVJNpMQbn48jnJ0YJ6NDC4b0hVHG2hj/2MQgjaml3J6zJsP++F8LfLxljslUCtUjP BBJxAMcMZ/wU/l116pZ2T59Oj71ZbhCrw3kXEDfmO19acY96c8tmhlx0X1m9qPUWbdbe piZtOp9RmbaLuAL4m0lvvAeYqu9StEEXBIDS0tbiV8erCEyfkpEc1PKwt9g3V9RaeXKO 31rw== X-Gm-Message-State: APjAAAUj1CcWAoFziUOcEXqGVYOwn6pXiJBhrnvjymF7bBt4F7aep84f 4eLDYVLJw4iWUzHqFPwb7ezw6Q== X-Google-Smtp-Source: APXvYqx0SL4uBWMBqXYFCVF+I8RyHEjEb4YJaCmzbL8N436mlu7FnouugJAE5LuI8NyRjNpKhaX6Cw== X-Received: by 2002:a65:5089:: with SMTP id r9mr48651830pgp.14.1556366972003; Sat, 27 Apr 2019 05:09:32 -0700 (PDT) Received: from localhost.localdomain ([115.97.185.144]) by smtp.gmail.com with ESMTPSA id f14sm1386872pgj.24.2019.04.27.05.09.27 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 27 Apr 2019 05:09:31 -0700 (PDT) From: Jagan Teki To: Simon Glass , Philipp Tomsich , Kever Yang , Akash Gajjar , Tom Rini , Manivannan Sadhasivam Subject: [PATCH v6 10/13] rockchip: rk3399: Add Nanopi NEO4 board support Date: Sat, 27 Apr 2019 17:39:13 +0530 Message-Id: <20190427120916.9033-1-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190427_050933_535409_CABD03B8 X-CRM114-Status: GOOD ( 11.87 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paul Kocialkowski , linux-rockchip@lists.infradead.org, linux-amarula@amarulasolutions.com, Jagan Teki , u-boot@lists.denx.de Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+patchwork-linux-rockchip=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Add initial support for Nanopi NEO4 board. Specification - Rockchip RK3399 - 1GB DDR3-1866 - SD card slot - eMMC Socket - RTL8211E 1Gbps - AP6212 WiFI/BT - HDMI In/Out, DP, MIPI CSI - USB 3.0, 2.0 - USB Type C power and data - GPIO expansion ports - DC 5V/3A Commit details of rk3399-nanopi-neo4.dts sync from Linux: "arm64: dts: rockchip: Add Nanopi NEO4 initial support" (sha1: 092470b537f19788d957aed12d835a179b606014) Signed-off-by: Jagan Teki --- arch/arm/dts/Makefile | 1 + arch/arm/dts/rk3399-nanopi-neo4-u-boot.dtsi | 6 +++ arch/arm/dts/rk3399-nanopi-neo4.dts | 50 ++++++++++++++++++ board/rockchip/evb_rk3399/MAINTAINERS | 6 +++ configs/nanopi-neo4-rk3399_defconfig | 58 +++++++++++++++++++++ 5 files changed, 121 insertions(+) create mode 100644 arch/arm/dts/rk3399-nanopi-neo4-u-boot.dtsi create mode 100644 arch/arm/dts/rk3399-nanopi-neo4.dts create mode 100644 configs/nanopi-neo4-rk3399_defconfig diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index e048565bb6..ede7da23fb 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -89,6 +89,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \ rk3399-gru-bob.dtb \ rk3399-nanopc-t4.dtb \ rk3399-nanopi-m4.dtb \ + rk3399-nanopi-neo4.dtb \ rk3399-orangepi.dtb \ rk3399-puma-ddr1333.dtb \ rk3399-puma-ddr1600.dtb \ diff --git a/arch/arm/dts/rk3399-nanopi-neo4-u-boot.dtsi b/arch/arm/dts/rk3399-nanopi-neo4-u-boot.dtsi new file mode 100644 index 0000000000..7d22528f49 --- /dev/null +++ b/arch/arm/dts/rk3399-nanopi-neo4-u-boot.dtsi @@ -0,0 +1,6 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2019 Jagan Teki + */ + +#include "rk3399-nanopi4-u-boot.dtsi" diff --git a/arch/arm/dts/rk3399-nanopi-neo4.dts b/arch/arm/dts/rk3399-nanopi-neo4.dts new file mode 100644 index 0000000000..195410b089 --- /dev/null +++ b/arch/arm/dts/rk3399-nanopi-neo4.dts @@ -0,0 +1,50 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (C) 2019 Amarula Solutions B.V. + * Author: Jagan Teki + */ + +/dts-v1/; + +#include "rk3399-nanopi4.dtsi" + +/ { + model = "FriendlyARM NanoPi NEO4"; + compatible = "friendlyarm,nanopi-neo4", "rockchip,rk3399"; + + vdd_5v: vdd-5v { + compatible = "regulator-fixed"; + regulator-name = "vdd_5v"; + regulator-always-on; + regulator-boot-on; + }; + + vcc5v0_core: vcc5v0-core { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_core"; + regulator-always-on; + regulator-boot-on; + vin-supply = <&vdd_5v>; + }; + + vcc5v0_usb1: vcc5v0-usb1 { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_usb1"; + regulator-always-on; + regulator-boot-on; + vin-supply = <&vcc5v0_sys>; + }; +}; + +&vcc3v3_sys { + vin-supply = <&vcc5v0_core>; +}; + +&u2phy0_host { + phy-supply = <&vcc5v0_usb1>; +}; + +&vbus_typec { + regulator-always-on; + vin-supply = <&vdd_5v>; +}; diff --git a/board/rockchip/evb_rk3399/MAINTAINERS b/board/rockchip/evb_rk3399/MAINTAINERS index 5917abb9c1..ed58861820 100644 --- a/board/rockchip/evb_rk3399/MAINTAINERS +++ b/board/rockchip/evb_rk3399/MAINTAINERS @@ -18,6 +18,12 @@ S: Maintained F: configs/nanopi-m4-rk3399_defconfig F: arch/arm/dts/rk3399-nanopi-m4-u-boot.dtsi +NANOPI-NEO4 +M: Jagan Teki +S: Maintained +F: configs/nanopi-neo4-rk3399_defconfig +F: arch/arm/dts/rk3399-nanopi-neo4-u-boot.dtsi + ORANGEPI-RK3399 M: Jagan Teki S: Maintained diff --git a/configs/nanopi-neo4-rk3399_defconfig b/configs/nanopi-neo4-rk3399_defconfig new file mode 100644 index 0000000000..eb9d81ae87 --- /dev/null +++ b/configs/nanopi-neo4-rk3399_defconfig @@ -0,0 +1,58 @@ +CONFIG_ARM=y +CONFIG_ARCH_ROCKCHIP=y +CONFIG_SYS_TEXT_BASE=0x00200000 +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_SYS_MALLOC_F_LEN=0x4000 +CONFIG_ROCKCHIP_RK3399=y +CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000 +CONFIG_DEBUG_UART_BASE=0xFF1A0000 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_SPL_STACK_R_ADDR=0x80000 +CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=1 +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopi-neo4.dtb" +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_STACK_R=y +CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000 +CONFIG_CMD_BOOTZ=y +CONFIG_CMD_GPT=y +CONFIG_CMD_MMC=y +CONFIG_CMD_SF=y +CONFIG_CMD_USB=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_TIME=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="rk3399-nanopi-neo4" +CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_ENV_IS_IN_MMC=y +CONFIG_ROCKCHIP_GPIO=y +CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_MMC_DW=y +CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_ROCKCHIP=y +CONFIG_DM_ETH=y +CONFIG_ETH_DESIGNWARE=y +CONFIG_GMAC_ROCKCHIP=y +CONFIG_PMIC_RK8XX=y +CONFIG_REGULATOR_PWM=y +CONFIG_REGULATOR_RK8XX=y +CONFIG_PWM_ROCKCHIP=y +CONFIG_BAUDRATE=1500000 +CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_SYSRESET=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_GENERIC=y +CONFIG_USB_HOST_ETHER=y +CONFIG_USB_ETHER_ASIX=y +CONFIG_USB_ETHER_ASIX88179=y +CONFIG_USB_ETHER_MCS7830=y +CONFIG_USB_ETHER_RTL8152=y +CONFIG_USB_ETHER_SMSC95XX=y +CONFIG_USE_TINY_PRINTF=y +CONFIG_ERRNO_STR=y From patchwork Sat Apr 27 12:09:14 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 10920197 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 5874615AB for ; Sat, 27 Apr 2019 12:09:45 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 45DFE28D8A for ; Sat, 27 Apr 2019 12:09:45 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 39D9C28DC2; Sat, 27 Apr 2019 12:09:45 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 0C8F728D8A for ; Sat, 27 Apr 2019 12:09:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=oTROPE9vQx+p06oCze513PcbTD5AmRWVznJP700MtVk=; b=bjgC8yn6K+juSO Brl7Er3f1XulyoCXWpNXtiFWrJ6VATPjYWrhLBRA24n50U27C+x+5u2rIfVmJ4kh6ZESh1142RBj7 YfDlogedcTT3/3qCH1JFgCG1IyVsKdUJN8C64t3h9lwXMFhrjgCKbr0NvrmKOq8LCoopdlZZ4ka6s MqyZTrc+/vjeCDJXRXCw9QbVDJx/riyVieHkQrCwOGstXdQIrFoU1vp0DKFLxTHoI613xviUe+9BH f4UtgTHvrM11pE9ko140LaUr6xvHCelTlQdy0cAq7ieenpS3KiWglVuvQI53XPXuZOxNTiOhG1xY3 //j73rYjT5t4f++akcnQ==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1hKM9F-0000gh-Aj; Sat, 27 Apr 2019 12:09:41 +0000 Received: from mail-pl1-x644.google.com ([2607:f8b0:4864:20::644]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1hKM9B-0000f9-9z for linux-rockchip@lists.infradead.org; Sat, 27 Apr 2019 12:09:39 +0000 Received: by mail-pl1-x644.google.com with SMTP id y3so1987258plp.0 for ; Sat, 27 Apr 2019 05:09:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Y+odxb7e2SyviCfoXMG3aZDT9QlLLlBgwlsyzM31e/4=; b=PFem2gnf4HybeTi7ZxkJyrQ3rh61tKwYvPei7JxMfA28ttoq2glSBwBpsRucfyYPQ+ m6nNlA8O5uZaEz9juat/RsX7imnePf9w8sARMCYdfG4DUYLmZ8+WjDWK6ZKY9XW7Rwzw iFjfdrXPt3DzWUqO6ZGzgzDZE2eDrjNo4Vn/A= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Y+odxb7e2SyviCfoXMG3aZDT9QlLLlBgwlsyzM31e/4=; b=F9Kvy1/KOxxZ0Swo6BK3LymYw6BbwGMgm3H8Ke3CRZ0jp3IvaVfSvAR6aVTd29OxhB LFUkAvbKzMU7NH2H9UhaXKJaMO0ytTte2frZJcBuD31Q7yuzFpFpsfixjW1vOhzn9mHT CgyWbbg4hE2FTL/+EUdX4WbRcDZ0aMae9AyZmsL4HK+at7Oa9HNWhiLFFax1NqwC2dEq AAp/WjjSmsnczXRrhECELwD2QusAMD6VVNhj7vPbNead47O/LHF0GSgnpPJHehie+L9D XDZ12VXnaue4GvdU9ck77kcflM+YRorHxs18FFfl2f9HvW4qG6suUl+A0lEmmjDql6oG 8HiA== X-Gm-Message-State: APjAAAVH0py+23QIPkFzrvb7t3fR3DbkZfbPBf2mFLLWNVuyj9h1SALh Z7XfsAVpRGseFDb4rwVEAdAcHA== X-Google-Smtp-Source: APXvYqw7PdAH+zlQEolWsQa1Y5gfJD1d/Cipz+fiY9ZqAEsROXCL8VxNU+bUhzFFO36JNKtRaKSq7g== X-Received: by 2002:a17:902:61:: with SMTP id 88mr50874407pla.166.1556366976433; Sat, 27 Apr 2019 05:09:36 -0700 (PDT) Received: from localhost.localdomain ([115.97.185.144]) by smtp.gmail.com with ESMTPSA id f14sm1386872pgj.24.2019.04.27.05.09.32 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 27 Apr 2019 05:09:35 -0700 (PDT) From: Jagan Teki To: Simon Glass , Philipp Tomsich , Kever Yang , Akash Gajjar , Tom Rini , Manivannan Sadhasivam Subject: [PATCH v6 11/13] rockchip: rk3399: Add Rockpro64 board support Date: Sat, 27 Apr 2019 17:39:14 +0530 Message-Id: <20190427120916.9033-2-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20190427120916.9033-1-jagan@amarulasolutions.com> References: <20190427120916.9033-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190427_050937_348861_2886F102 X-CRM114-Status: GOOD ( 14.52 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paul Kocialkowski , linux-rockchip@lists.infradead.org, linux-amarula@amarulasolutions.com, Jagan Teki , u-boot@lists.denx.de Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+patchwork-linux-rockchip=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Add initial support for Rockpro64 board. Specification - Rockchip RK3399 - 2/4GB Dual-Channel LPDDR3 - SD card slot - eMMC socket - 128Mb SPI Flash - Gigabit ethernet - PCIe 4X slot - WiFI/BT module socket - HDMI In/Out, DP, MIPI DSI/CSI, eDP - USB 3.0, 2.0 - USB Type C power and data - GPIO expansion ports - DC 12V/2A Commit details of rk3399-rockpro64.dts sync from Linux 5.1-rc2: "arm64: dts: rockchip: rockpro64 dts add usb regulator" (sha1: 6db644c79c8d45d73b56bc389aebd85fc3679beb) 'Akash' has sent an initial patch before, so I keep him as board maintainer and I'm co-maintainer based on our conversation. Signed-off-by: Akash Gajjar Signed-off-by: Jagan Teki --- arch/arm/dts/Makefile | 1 + arch/arm/dts/rk3399-rockpro64-u-boot.dtsi | 6 + arch/arm/dts/rk3399-rockpro64.dts | 712 ++++++++++++++++++++++ board/rockchip/evb_rk3399/MAINTAINERS | 7 + configs/rockpro64-rk3399_defconfig | 58 ++ 5 files changed, 784 insertions(+) create mode 100644 arch/arm/dts/rk3399-rockpro64-u-boot.dtsi create mode 100644 arch/arm/dts/rk3399-rockpro64.dts create mode 100644 configs/rockpro64-rk3399_defconfig diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index ede7da23fb..23a9807444 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -95,6 +95,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \ rk3399-puma-ddr1600.dtb \ rk3399-puma-ddr1866.dtb \ rk3399-rock960.dtb \ + rk3399-rockpro64.dtb \ rv1108-elgin-r1.dtb \ rv1108-evb.dtb dtb-$(CONFIG_ARCH_MESON) += \ diff --git a/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi b/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi new file mode 100644 index 0000000000..7bddc3acdb --- /dev/null +++ b/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi @@ -0,0 +1,6 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2019 Jagan Teki + */ + +#include "rk3399-u-boot.dtsi" diff --git a/arch/arm/dts/rk3399-rockpro64.dts b/arch/arm/dts/rk3399-rockpro64.dts new file mode 100644 index 0000000000..1f2394e058 --- /dev/null +++ b/arch/arm/dts/rk3399-rockpro64.dts @@ -0,0 +1,712 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd. + * Copyright (c) 2018 Akash Gajjar + */ + +/dts-v1/; +#include +#include +#include "rk3399.dtsi" +#include "rk3399-opp.dtsi" + +/ { + model = "Pine64 RockPro64"; + compatible = "pine64,rockpro64", "rockchip,rk3399"; + + chosen { + stdout-path = "serial2:1500000n8"; + }; + + clkin_gmac: external-gmac-clock { + compatible = "fixed-clock"; + clock-frequency = <125000000>; + clock-output-names = "clkin_gmac"; + #clock-cells = <0>; + }; + + gpio-keys { + compatible = "gpio-keys"; + autorepeat; + pinctrl-names = "default"; + pinctrl-0 = <&pwrbtn>; + + power { + debounce-interval = <100>; + gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>; + label = "GPIO Key Power"; + linux,code = ; + wakeup-source; + }; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&work_led_gpio>, <&diy_led_gpio>; + + work-led { + label = "work"; + default-state = "on"; + gpios = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>; + }; + + diy-led { + label = "diy"; + default-state = "off"; + gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>; + }; + }; + + sdio_pwrseq: sdio-pwrseq { + compatible = "mmc-pwrseq-simple"; + clocks = <&rk808 1>; + clock-names = "ext_clock"; + pinctrl-names = "default"; + pinctrl-0 = <&wifi_enable_h>; + + /* + * On the module itself this is one of these (depending + * on the actual card populated): + * - SDIO_RESET_L_WL_REG_ON + * - PDN (power down when low) + */ + reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>; + }; + + vcc12v_dcin: vcc12v-dcin { + compatible = "regulator-fixed"; + regulator-name = "vcc12v_dcin"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + }; + + /* switched by pmic_sleep */ + vcc1v8_s3: vcca1v8_s3: vcc1v8-s3 { + compatible = "regulator-fixed"; + regulator-name = "vcc1v8_s3"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <&vcc_1v8>; + }; + + vcc3v3_pcie: vcc3v3-pcie-regulator { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&pcie_pwr_en>; + regulator-name = "vcc3v3_pcie"; + regulator-always-on; + regulator-boot-on; + vin-supply = <&vcc12v_dcin>; + }; + + vcc3v3_sys: vcc3v3-sys { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vcc5v0_sys>; + }; + + /* Actually 3 regulators (host0, 1, 2) controlled by the same gpio */ + vcc5v0_host: vcc5v0-host-regulator { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&vcc5v0_host_en>; + regulator-name = "vcc5v0_host"; + regulator-always-on; + vin-supply = <&vcc5v0_usb>; + }; + + vcc5v0_typec: vcc5v0-typec-regulator { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&vcc5v0_typec_en>; + regulator-name = "vcc5v0_typec"; + regulator-always-on; + vin-supply = <&vcc5v0_usb>; + }; + + vcc5v0_sys: vcc5v0-sys { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&vcc12v_dcin>; + }; + + vcc5v0_usb: vcc5v0-usb { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_usb"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&vcc12v_dcin>; + }; + + vdd_log: vdd-log { + compatible = "pwm-regulator"; + pwms = <&pwm2 0 25000 1>; + regulator-name = "vdd_log"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1400000>; + vin-supply = <&vcc5v0_sys>; + }; +}; + +&cpu_l0 { + cpu-supply = <&vdd_cpu_l>; +}; + +&cpu_l1 { + cpu-supply = <&vdd_cpu_l>; +}; + +&cpu_l2 { + cpu-supply = <&vdd_cpu_l>; +}; + +&cpu_l3 { + cpu-supply = <&vdd_cpu_l>; +}; + +&cpu_b0 { + cpu-supply = <&vdd_cpu_b>; +}; + +&cpu_b1 { + cpu-supply = <&vdd_cpu_b>; +}; + +&emmc_phy { + status = "okay"; +}; + +&gmac { + assigned-clocks = <&cru SCLK_RMII_SRC>; + assigned-clock-parents = <&clkin_gmac>; + clock_in_out = "input"; + phy-supply = <&vcc_lan>; + phy-mode = "rgmii"; + pinctrl-names = "default"; + pinctrl-0 = <&rgmii_pins>; + snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; + snps,reset-active-low; + snps,reset-delays-us = <0 10000 50000>; + tx_delay = <0x28>; + rx_delay = <0x11>; + status = "okay"; +}; + +&hdmi { + ddc-i2c-bus = <&i2c3>; + pinctrl-names = "default"; + pinctrl-0 = <&hdmi_cec>; + status = "okay"; +}; + +&gpu { + mali-supply = <&vdd_gpu>; + status = "okay"; +}; + +&i2c0 { + clock-frequency = <400000>; + i2c-scl-rising-time-ns = <168>; + i2c-scl-falling-time-ns = <4>; + status = "okay"; + + rk808: pmic@1b { + compatible = "rockchip,rk808"; + reg = <0x1b>; + interrupt-parent = <&gpio1>; + interrupts = <21 IRQ_TYPE_LEVEL_LOW>; + #clock-cells = <1>; + clock-output-names = "xin32k", "rk808-clkout2"; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_int_l>; + rockchip,system-power-controller; + wakeup-source; + + vcc1-supply = <&vcc5v0_sys>; + vcc2-supply = <&vcc5v0_sys>; + vcc3-supply = <&vcc5v0_sys>; + vcc4-supply = <&vcc5v0_sys>; + vcc6-supply = <&vcc5v0_sys>; + vcc7-supply = <&vcc5v0_sys>; + vcc8-supply = <&vcc3v3_sys>; + vcc9-supply = <&vcc5v0_sys>; + vcc10-supply = <&vcc5v0_sys>; + vcc11-supply = <&vcc5v0_sys>; + vcc12-supply = <&vcc3v3_sys>; + vddio-supply = <&vcca_1v8>; + + regulators { + vdd_center: DCDC_REG1 { + regulator-name = "vdd_center"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_cpu_l: DCDC_REG2 { + regulator-name = "vdd_cpu_l"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_ddr: DCDC_REG3 { + regulator-name = "vcc_ddr"; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc_1v8: DCDC_REG4 { + regulator-name = "vcc_1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vcc1v8_dvp: LDO_REG1 { + regulator-name = "vcc1v8_dvp"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc3v0_touch: LDO_REG2 { + regulator-name = "vcc3v0_touch"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcca_1v8: LDO_REG3 { + regulator-name = "vcca_1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vcc_sdio: LDO_REG4 { + regulator-name = "vcc_sdio"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3000000>; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3000000>; + }; + }; + + vcca3v0_codec: LDO_REG5 { + regulator-name = "vcca3v0_codec"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_1v5: LDO_REG6 { + regulator-name = "vcc_1v5"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1500000>; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1500000>; + }; + }; + + vcca1v8_codec: LDO_REG7 { + regulator-name = "vcca1v8_codec"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_3v0: LDO_REG8 { + regulator-name = "vcc_3v0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3000000>; + }; + }; + + vcc3v3_s3: vcc_lan: SWITCH_REG1 { + regulator-name = "vcc3v3_s3"; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc3v3_s0: SWITCH_REG2 { + regulator-name = "vcc3v3_s0"; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; + }; + + vdd_cpu_b: regulator@40 { + compatible = "silergy,syr827"; + reg = <0x40>; + fcs,suspend-voltage-selector = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&vsel1_gpio>; + regulator-name = "vdd_cpu_b"; + regulator-min-microvolt = <712500>; + regulator-max-microvolt = <1500000>; + regulator-ramp-delay = <1000>; + regulator-always-on; + regulator-boot-on; + vin-supply = <&vcc5v0_sys>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_gpu: regulator@41 { + compatible = "silergy,syr828"; + reg = <0x41>; + fcs,suspend-voltage-selector = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&vsel2_gpio>; + regulator-name = "vdd_gpu"; + regulator-min-microvolt = <712500>; + regulator-max-microvolt = <1500000>; + regulator-ramp-delay = <1000>; + regulator-always-on; + regulator-boot-on; + vin-supply = <&vcc5v0_sys>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; +}; + +&i2c1 { + i2c-scl-rising-time-ns = <300>; + i2c-scl-falling-time-ns = <15>; + status = "okay"; +}; + +&i2c3 { + i2c-scl-rising-time-ns = <450>; + i2c-scl-falling-time-ns = <15>; + status = "okay"; +}; + +&i2c4 { + i2c-scl-rising-time-ns = <600>; + i2c-scl-falling-time-ns = <20>; + status = "okay"; + + fusb0: typec-portc@22 { + compatible = "fcs,fusb302"; + reg = <0x22>; + interrupt-parent = <&gpio1>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&fusb0_int>; + vbus-supply = <&vcc5v0_typec>; + status = "okay"; + }; +}; + +&i2s0 { + rockchip,playback-channels = <8>; + rockchip,capture-channels = <8>; + status = "okay"; +}; + +&i2s1 { + rockchip,playback-channels = <2>; + rockchip,capture-channels = <2>; + status = "okay"; +}; + +&i2s2 { + status = "okay"; +}; + +&io_domains { + status = "okay"; + + bt656-supply = <&vcc1v8_dvp>; + audio-supply = <&vcca1v8_codec>; + sdmmc-supply = <&vcc_sdio>; + gpio1830-supply = <&vcc_3v0>; +}; + +&pmu_io_domains { + pmu1830-supply = <&vcc_3v0>; + status = "okay"; +}; + +&pinctrl { + buttons { + pwrbtn: pwrbtn { + rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + fusb302x { + fusb0_int: fusb0-int { + rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + leds { + work_led_gpio: work_led-gpio { + rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + diy_led_gpio: diy_led-gpio { + rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + pcie { + pcie_pwr_en: pcie-pwr-en { + rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + pmic { + pmic_int_l: pmic-int-l { + rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + vsel1_gpio: vsel1-gpio { + rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>; + }; + + vsel2_gpio: vsel2-gpio { + rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; + }; + }; + + sdio-pwrseq { + wifi_enable_h: wifi-enable-h { + rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + usb-typec { + vcc5v0_typec_en: vcc5v0_typec_en { + rockchip,pins = <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + usb2 { + vcc5v0_host_en: vcc5v0-host-en { + rockchip,pins = <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&pwm0 { + status = "okay"; +}; + +&pwm2 { + status = "okay"; +}; + +&saradc { + vref-supply = <&vcca1v8_s3>; + status = "okay"; +}; + +&sdmmc { + bus-width = <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + cd-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>; + disable-wp; + max-frequency = <150000000>; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>; + status = "okay"; +}; + +&sdhci { + bus-width = <8>; + mmc-hs400-1_8v; + mmc-hs400-enhanced-strobe; + non-removable; + status = "okay"; +}; + +&tcphy0 { + status = "okay"; +}; + +&tcphy1 { + status = "okay"; +}; + +&tsadc { + /* tshut mode 0:CRU 1:GPIO */ + rockchip,hw-tshut-mode = <1>; + /* tshut polarity 0:LOW 1:HIGH */ + rockchip,hw-tshut-polarity = <1>; + status = "okay"; +}; + +&u2phy0 { + status = "okay"; + + u2phy0_otg: otg-port { + status = "okay"; + }; + + u2phy0_host: host-port { + phy-supply = <&vcc5v0_host>; + status = "okay"; + }; +}; + +&u2phy1 { + status = "okay"; + + u2phy1_otg: otg-port { + status = "okay"; + }; + + u2phy1_host: host-port { + phy-supply = <&vcc5v0_host>; + status = "okay"; + }; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_xfer &uart0_cts>; + status = "okay"; +}; + +&uart2 { + status = "okay"; +}; + +&usb_host0_ehci { + status = "okay"; +}; + +&usb_host0_ohci { + status = "okay"; +}; + +&usb_host1_ehci { + status = "okay"; +}; + +&usb_host1_ohci { + status = "okay"; +}; + +&usbdrd3_0 { + status = "okay"; +}; + +&usbdrd_dwc3_0 { + status = "okay"; + dr_mode = "otg"; +}; + +&usbdrd3_1 { + status = "okay"; +}; + +&usbdrd_dwc3_1 { + status = "okay"; + dr_mode = "host"; +}; + +&vopb { + status = "okay"; +}; + +&vopb_mmu { + status = "okay"; +}; + +&vopl { + status = "okay"; +}; + +&vopl_mmu { + status = "okay"; +}; diff --git a/board/rockchip/evb_rk3399/MAINTAINERS b/board/rockchip/evb_rk3399/MAINTAINERS index ed58861820..c724162ef3 100644 --- a/board/rockchip/evb_rk3399/MAINTAINERS +++ b/board/rockchip/evb_rk3399/MAINTAINERS @@ -30,3 +30,10 @@ S: Maintained F: configs/orangepi-rk3399_defconfig F: arch/arm/dts/rk3399-u-boot.dtsi F: arch/arm/dts/rk3399-orangepi-u-boot.dtsi + +ROCKPRO64 +M: Akash Gajjar +M: Jagan Teki +S: Maintained +F: configs/rockpro64-rk3399_defconfig +F: arch/arm/dts/rk3399-rockpro64-u-boot.dtsi diff --git a/configs/rockpro64-rk3399_defconfig b/configs/rockpro64-rk3399_defconfig new file mode 100644 index 0000000000..3d0c7d0c6d --- /dev/null +++ b/configs/rockpro64-rk3399_defconfig @@ -0,0 +1,58 @@ +CONFIG_ARM=y +CONFIG_ARCH_ROCKCHIP=y +CONFIG_SYS_TEXT_BASE=0x00200000 +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_SYS_MALLOC_F_LEN=0x4000 +CONFIG_ROCKCHIP_RK3399=y +CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000 +CONFIG_DEBUG_UART_BASE=0xFF1A0000 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_SPL_STACK_R_ADDR=0x80000 +CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=1 +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rockpro64.dtb" +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_STACK_R=y +CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000 +CONFIG_CMD_BOOTZ=y +CONFIG_CMD_GPT=y +CONFIG_CMD_MMC=y +CONFIG_CMD_SF=y +CONFIG_CMD_USB=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_TIME=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="rk3399-rockpro64" +CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_ENV_IS_IN_MMC=y +CONFIG_ROCKCHIP_GPIO=y +CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_MMC_DW=y +CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_ROCKCHIP=y +CONFIG_DM_ETH=y +CONFIG_ETH_DESIGNWARE=y +CONFIG_GMAC_ROCKCHIP=y +CONFIG_PMIC_RK8XX=y +CONFIG_REGULATOR_PWM=y +CONFIG_REGULATOR_RK8XX=y +CONFIG_PWM_ROCKCHIP=y +CONFIG_BAUDRATE=1500000 +CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_SYSRESET=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_GENERIC=y +CONFIG_USB_HOST_ETHER=y +CONFIG_USB_ETHER_ASIX=y +CONFIG_USB_ETHER_ASIX88179=y +CONFIG_USB_ETHER_MCS7830=y +CONFIG_USB_ETHER_RTL8152=y +CONFIG_USB_ETHER_SMSC95XX=y +CONFIG_USE_TINY_PRINTF=y +CONFIG_ERRNO_STR=y From patchwork Sat Apr 27 12:09:15 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 10920199 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A316C1515 for ; Sat, 27 Apr 2019 12:09:49 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9185228D8A for ; Sat, 27 Apr 2019 12:09:49 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 859B828DC2; Sat, 27 Apr 2019 12:09:49 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 7A39A28D8A for ; Sat, 27 Apr 2019 12:09:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=Bi75Ybhutba84CObJR07DLR8BFi2ncn03fqH4vkaPCo=; b=haW5dghsOkmuE/ 5L6j73fKuhxE4lf8fvk531czwJqD2rjSnY2sQUA/IacZRMVwLBFsIDAXsO9n484WoU9lxi+NzEaCT +dJHzfjrvPTmetlaqHNvGQp5GTgxAAzkUoFdeSQCTnNA8iFxj9UEVFA7PQZUwGuQbEJc1pFzIol9d yIdgoTDZIX3Ls1eekxkT7EQSrzLORKU5pNBSF8I7mOFwWGfMCGbcLwKwWxVJkqzZWBTe4OeOFPn+P pZn6zQQ5mTKgyc5TEUGNDxvscsOskidVdKkLhSh5EEA5nK26bPO9g2ooTL+A3vfpaMfhDvnv65mZg Wj8JhSrf0uWdMkUBCUUg==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1hKM9K-0000kE-4q; Sat, 27 Apr 2019 12:09:46 +0000 Received: from mail-pf1-x442.google.com ([2607:f8b0:4864:20::442]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1hKM9G-0000hE-6d for linux-rockchip@lists.infradead.org; Sat, 27 Apr 2019 12:09:44 +0000 Received: by mail-pf1-x442.google.com with SMTP id s4so3006917pfh.7 for ; Sat, 27 Apr 2019 05:09:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=wgid28GwLW06ZDyqOEy6uGBCil4hovFDVOiLqMv18n8=; b=L8fCmnCCX7QxJF8F2fqcoUrztbaiDeFO/xzqOGv/Mtzh9/oykJJVBCpnUs/PBE+hds +TIYrjjBspWR0AVKocJ0uxU7EBrl0oRNdTm6Kxc9GkuCEtflmvK/eLR83P69cfDNjoh/ q2WQufdQ5GoqrKnsJXk40y8dXEB+5lYKpN1IY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=wgid28GwLW06ZDyqOEy6uGBCil4hovFDVOiLqMv18n8=; b=mAGv86ufqqgxm0Q31YQLjTiTKskTY25EntYxQln1ngtJjXOgIGf4CQ27sacocS6AD3 gJxVfUUO1Q7TFqSgdCfrivE4TFGOZIwO7zmprfWBI2xgya9Dy8UYBcYzESyVlAgAkoeU 65+3cPRXzMFQLA9Ald/nm2f9FgDJoCZGR8XhvbbRSX1ipV0riDZVyKlG6oYUU1EPrMka Na9LGAjhTFEw8KqqV9oo1v8qLyGRLtHNUpEv7iApcPG3MzNUhb4NbG/9ufWV/UbGEnr5 3V4SmB7seHX2i7RyQ9NhvYM9iuN9MbYqLGVhRKbow5nNPGY1lU1BAT3mGoRahZKpVkG3 DWTQ== X-Gm-Message-State: APjAAAV0QiZf9a04ho1nVuHgAPELEbkYizmWtjFx6hl5rbRaxd8TPyJJ uV2m9skEdlhu0bpxmptnH6pOGw== X-Google-Smtp-Source: APXvYqxJZ/N93nQVdXCc9ANJkVuf5ACCuLO8DF8YF/QIJo7tvA3h+38NXiAak8XKzRehVQMs6613vw== X-Received: by 2002:a65:48ca:: with SMTP id o10mr5656542pgs.136.1556366981189; Sat, 27 Apr 2019 05:09:41 -0700 (PDT) Received: from localhost.localdomain ([115.97.185.144]) by smtp.gmail.com with ESMTPSA id f14sm1386872pgj.24.2019.04.27.05.09.36 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 27 Apr 2019 05:09:40 -0700 (PDT) From: Jagan Teki To: Simon Glass , Philipp Tomsich , Kever Yang , Akash Gajjar , Tom Rini , Manivannan Sadhasivam Subject: [PATCH v6 12/13] rockchip: rk3399: Add Rock PI 4 support Date: Sat, 27 Apr 2019 17:39:15 +0530 Message-Id: <20190427120916.9033-3-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20190427120916.9033-1-jagan@amarulasolutions.com> References: <20190427120916.9033-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190427_050942_251533_86ACDE31 X-CRM114-Status: GOOD ( 13.45 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paul Kocialkowski , linux-rockchip@lists.infradead.org, linux-amarula@amarulasolutions.com, Jagan Teki , u-boot@lists.denx.de Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+patchwork-linux-rockchip=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Add initial support for Rock PI 4 board. Specification - Rockchip RK3399 - LPDDR4 - eMMC - SD card slot - RTL8211E 1Gbps - HDMI In/Out, DP, MIPI DSI/CSI - PCIe M.2 - USB 2.0, USB-3.0 - USB C Type Commit details of rk3399-rock-pi-4.dts sync from Linux 5.1-rc2: "arm64: dts: rockchip: add ROCK Pi 4 DTS support" (sha1: 1b5715c602fda7b812af0e190eddcce2812e5417) Signed-off-by: Akash Gajjar Signed-off-by: Jagan Teki --- arch/arm/dts/Makefile | 1 + arch/arm/dts/rk3399-rock-pi-4-u-boot.dtsi | 6 + arch/arm/dts/rk3399-rock-pi-4.dts | 606 ++++++++++++++++++++++ board/rockchip/evb_rk3399/MAINTAINERS | 7 + configs/rock-pi-4-rk3399_defconfig | 58 +++ 5 files changed, 678 insertions(+) create mode 100644 arch/arm/dts/rk3399-rock-pi-4-u-boot.dtsi create mode 100644 arch/arm/dts/rk3399-rock-pi-4.dts create mode 100644 configs/rock-pi-4-rk3399_defconfig diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 23a9807444..a2911fa2fd 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -94,6 +94,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \ rk3399-puma-ddr1333.dtb \ rk3399-puma-ddr1600.dtb \ rk3399-puma-ddr1866.dtb \ + rk3399-rock-pi-4.dtb \ rk3399-rock960.dtb \ rk3399-rockpro64.dtb \ rv1108-elgin-r1.dtb \ diff --git a/arch/arm/dts/rk3399-rock-pi-4-u-boot.dtsi b/arch/arm/dts/rk3399-rock-pi-4-u-boot.dtsi new file mode 100644 index 0000000000..7bddc3acdb --- /dev/null +++ b/arch/arm/dts/rk3399-rock-pi-4-u-boot.dtsi @@ -0,0 +1,6 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2019 Jagan Teki + */ + +#include "rk3399-u-boot.dtsi" diff --git a/arch/arm/dts/rk3399-rock-pi-4.dts b/arch/arm/dts/rk3399-rock-pi-4.dts new file mode 100644 index 0000000000..4a543f2117 --- /dev/null +++ b/arch/arm/dts/rk3399-rock-pi-4.dts @@ -0,0 +1,606 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2019 Akash Gajjar + * Copyright (c) 2019 Pragnesh Patel + */ + +/dts-v1/; +#include +#include +#include "rk3399.dtsi" +#include "rk3399-opp.dtsi" + +/ { + model = "Radxa ROCK Pi 4"; + compatible = "radxa,rockpi4", "rockchip,rk3399"; + + chosen { + stdout-path = "serial2:1500000n8"; + }; + + clkin_gmac: external-gmac-clock { + compatible = "fixed-clock"; + clock-frequency = <125000000>; + clock-output-names = "clkin_gmac"; + #clock-cells = <0>; + }; + + vcc12v_dcin: dc-12v { + compatible = "regulator-fixed"; + regulator-name = "vcc12v_dcin"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + }; + + vcc5v0_sys: vcc-sys { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&vcc12v_dcin>; + }; + + vcc3v3_pcie: vcc3v3-pcie-regulator { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&pcie_pwr_en>; + regulator-name = "vcc3v3_pcie"; + regulator-always-on; + regulator-boot-on; + vin-supply = <&vcc5v0_sys>; + }; + + vcc3v3_sys: vcc3v3-sys { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vcc5v0_sys>; + }; + + vcc5v0_host: vcc5v0-host-regulator { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&vcc5v0_host_en>; + regulator-name = "vcc5v0_host"; + regulator-always-on; + vin-supply = <&vcc5v0_sys>; + }; + + vcc5v0_typec: vcc5v0-typec-regulator { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&vcc5v0_typec_en>; + regulator-name = "vcc5v0_typec"; + regulator-always-on; + vin-supply = <&vcc5v0_sys>; + }; + + vcc_lan: vcc3v3-phy-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc_lan"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_log: vdd-log { + compatible = "pwm-regulator"; + pwms = <&pwm2 0 25000 1>; + regulator-name = "vdd_log"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1400000>; + vin-supply = <&vcc5v0_sys>; + }; +}; + +&cpu_l0 { + cpu-supply = <&vdd_cpu_l>; +}; + +&cpu_l1 { + cpu-supply = <&vdd_cpu_l>; +}; + +&cpu_l2 { + cpu-supply = <&vdd_cpu_l>; +}; + +&cpu_l3 { + cpu-supply = <&vdd_cpu_l>; +}; + +&cpu_b0 { + cpu-supply = <&vdd_cpu_b>; +}; + +&cpu_b1 { + cpu-supply = <&vdd_cpu_b>; +}; + +&emmc_phy { + status = "okay"; +}; + +&gmac { + assigned-clocks = <&cru SCLK_RMII_SRC>; + assigned-clock-parents = <&clkin_gmac>; + clock_in_out = "input"; + phy-supply = <&vcc_lan>; + phy-mode = "rgmii"; + pinctrl-names = "default"; + pinctrl-0 = <&rgmii_pins>; + snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; + snps,reset-active-low; + snps,reset-delays-us = <0 10000 50000>; + tx_delay = <0x28>; + rx_delay = <0x11>; + status = "okay"; +}; + +&hdmi { + pinctrl-names = "default"; + pinctrl-0 = <&hdmi_cec>; + status = "okay"; +}; + +&i2c0 { + clock-frequency = <400000>; + i2c-scl-rising-time-ns = <168>; + i2c-scl-falling-time-ns = <4>; + status = "okay"; + + rk808: pmic@1b { + compatible = "rockchip,rk808"; + reg = <0x1b>; + interrupt-parent = <&gpio1>; + interrupts = <21 IRQ_TYPE_LEVEL_LOW>; + #clock-cells = <1>; + clock-output-names = "xin32k", "rk808-clkout2"; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_int_l>; + rockchip,system-power-controller; + wakeup-source; + + vcc1-supply = <&vcc5v0_sys>; + vcc2-supply = <&vcc5v0_sys>; + vcc3-supply = <&vcc5v0_sys>; + vcc4-supply = <&vcc5v0_sys>; + vcc6-supply = <&vcc5v0_sys>; + vcc7-supply = <&vcc5v0_sys>; + vcc8-supply = <&vcc3v3_sys>; + vcc9-supply = <&vcc5v0_sys>; + vcc10-supply = <&vcc5v0_sys>; + vcc11-supply = <&vcc5v0_sys>; + vcc12-supply = <&vcc3v3_sys>; + vddio-supply = <&vcc_1v8>; + + regulators { + vdd_center: DCDC_REG1 { + regulator-name = "vdd_center"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_cpu_l: DCDC_REG2 { + regulator-name = "vdd_cpu_l"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_ddr: DCDC_REG3 { + regulator-name = "vcc_ddr"; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc_1v8: DCDC_REG4 { + regulator-name = "vcc_1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vcc1v8_codec: LDO_REG1 { + regulator-name = "vcc1v8_codec"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc1v8_hdmi: LDO_REG2 { + regulator-name = "vcc1v8_hdmi"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcca_1v8: LDO_REG3 { + regulator-name = "vcca_1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vcc_sdio: LDO_REG4 { + regulator-name = "vcc_sdio"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3000000>; + }; + }; + + vcca3v0_codec: LDO_REG5 { + regulator-name = "vcca3v0_codec"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_1v5: LDO_REG6 { + regulator-name = "vcc_1v5"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1500000>; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1500000>; + }; + }; + + vcc0v9_hdmi: LDO_REG7 { + regulator-name = "vcc0v9_hdmi"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_3v0: LDO_REG8 { + regulator-name = "vcc_3v0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3000000>; + }; + }; + + vcc_cam: SWITCH_REG1 { + regulator-name = "vcc_cam"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_mipi: SWITCH_REG2 { + regulator-name = "vcc_mipi"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; + }; + + vdd_cpu_b: regulator@40 { + compatible = "silergy,syr827"; + reg = <0x40>; + fcs,suspend-voltage-selector = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&vsel1_gpio>; + regulator-name = "vdd_cpu_b"; + regulator-min-microvolt = <712500>; + regulator-max-microvolt = <1500000>; + regulator-ramp-delay = <1000>; + regulator-always-on; + regulator-boot-on; + vin-supply = <&vcc5v0_sys>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_gpu: regulator@41 { + compatible = "silergy,syr828"; + reg = <0x41>; + fcs,suspend-voltage-selector = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&vsel2_gpio>; + regulator-name = "vdd_gpu"; + regulator-min-microvolt = <712500>; + regulator-max-microvolt = <1500000>; + regulator-ramp-delay = <1000>; + regulator-always-on; + regulator-boot-on; + vin-supply = <&vcc5v0_sys>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; +}; + +&i2c1 { + i2c-scl-rising-time-ns = <300>; + i2c-scl-falling-time-ns = <15>; + status = "okay"; +}; + +&i2c3 { + i2c-scl-rising-time-ns = <450>; + i2c-scl-falling-time-ns = <15>; + status = "okay"; +}; + +&i2c4 { + i2c-scl-rising-time-ns = <600>; + i2c-scl-falling-time-ns = <20>; + status = "okay"; +}; + +&i2s0 { + rockchip,playback-channels = <8>; + rockchip,capture-channels = <8>; + status = "okay"; +}; + +&i2s1 { + rockchip,playback-channels = <2>; + rockchip,capture-channels = <2>; + status = "okay"; +}; + +&i2s2 { + status = "okay"; +}; + +&io_domains { + status = "okay"; + + bt656-supply = <&vcc_3v0>; + audio-supply = <&vcc_3v0>; + sdmmc-supply = <&vcc_sdio>; + gpio1830-supply = <&vcc_3v0>; +}; + +&pmu_io_domains { + status = "okay"; + + pmu1830-supply = <&vcc_3v0>; +}; + +&pinctrl { + pcie { + pcie_pwr_en: pcie-pwr-en { + rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + pmic { + pmic_int_l: pmic-int-l { + rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + vsel1_gpio: vsel1-gpio { + rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>; + }; + + vsel2_gpio: vsel2-gpio { + rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; + }; + }; + + usb-typec { + vcc5v0_typec_en: vcc5v0-typec-en { + rockchip,pins = <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + usb2 { + vcc5v0_host_en: vcc5v0-host-en { + rockchip,pins = <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&pwm2 { + status = "okay"; +}; + +&saradc { + status = "okay"; + + vref-supply = <&vcc_1v8>; +}; + +&sdmmc { + bus-width = <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>; + disable-wp; + max-frequency = <150000000>; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc_clk &sdmmc_cd &sdmmc_cmd &sdmmc_bus4>; + status = "okay"; +}; + +&sdhci { + bus-width = <8>; + mmc-hs400-1_8v; + mmc-hs400-enhanced-strobe; + non-removable; + status = "okay"; +}; + +&tcphy0 { + status = "okay"; +}; + +&tcphy1 { + status = "okay"; +}; + +&tsadc { + status = "okay"; + + /* tshut mode 0:CRU 1:GPIO */ + rockchip,hw-tshut-mode = <1>; + /* tshut polarity 0:LOW 1:HIGH */ + rockchip,hw-tshut-polarity = <1>; +}; + +&u2phy0 { + status = "okay"; + + u2phy0_otg: otg-port { + status = "okay"; + }; + + u2phy0_host: host-port { + phy-supply = <&vcc5v0_host>; + status = "okay"; + }; +}; + +&u2phy1 { + status = "okay"; + + u2phy1_otg: otg-port { + status = "okay"; + }; + + u2phy1_host: host-port { + phy-supply = <&vcc5v0_host>; + status = "okay"; + }; +}; + +&uart2 { + status = "okay"; +}; + +&usb_host0_ehci { + status = "okay"; +}; + +&usb_host0_ohci { + status = "okay"; +}; + +&usb_host1_ehci { + status = "okay"; +}; + +&usb_host1_ohci { + status = "okay"; +}; + +&usbdrd3_0 { + status = "okay"; +}; + +&usbdrd_dwc3_0 { + status = "okay"; + dr_mode = "otg"; +}; + +&usbdrd3_1 { + status = "okay"; +}; + +&usbdrd_dwc3_1 { + status = "okay"; + dr_mode = "host"; +}; + +&vopb { + status = "okay"; +}; + +&vopb_mmu { + status = "okay"; +}; + +&vopl { + status = "okay"; +}; + +&vopl_mmu { + status = "okay"; +}; diff --git a/board/rockchip/evb_rk3399/MAINTAINERS b/board/rockchip/evb_rk3399/MAINTAINERS index c724162ef3..6da4381df6 100644 --- a/board/rockchip/evb_rk3399/MAINTAINERS +++ b/board/rockchip/evb_rk3399/MAINTAINERS @@ -31,6 +31,13 @@ F: configs/orangepi-rk3399_defconfig F: arch/arm/dts/rk3399-u-boot.dtsi F: arch/arm/dts/rk3399-orangepi-u-boot.dtsi +ROCK-PI-4 +M: Akash Gajjar +M: Jagan Teki +S: Maintained +F: configs/rock-pi-4-rk3399_defconfig +F: arch/arm/dts/rk3399-rock-pi-4-u-boot.dtsi + ROCKPRO64 M: Akash Gajjar M: Jagan Teki diff --git a/configs/rock-pi-4-rk3399_defconfig b/configs/rock-pi-4-rk3399_defconfig new file mode 100644 index 0000000000..626cb7faea --- /dev/null +++ b/configs/rock-pi-4-rk3399_defconfig @@ -0,0 +1,58 @@ +CONFIG_ARM=y +CONFIG_ARCH_ROCKCHIP=y +CONFIG_SYS_TEXT_BASE=0x00200000 +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_SYS_MALLOC_F_LEN=0x4000 +CONFIG_ROCKCHIP_RK3399=y +CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000 +CONFIG_DEBUG_UART_BASE=0xFF1A0000 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_SPL_STACK_R_ADDR=0x80000 +CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=1 +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock-pi-4.dtb" +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_STACK_R=y +CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000 +CONFIG_CMD_BOOTZ=y +CONFIG_CMD_GPT=y +CONFIG_CMD_MMC=y +CONFIG_CMD_SF=y +CONFIG_CMD_USB=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_TIME=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="rk3399-rock-pi-4" +CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_ENV_IS_IN_MMC=y +CONFIG_ROCKCHIP_GPIO=y +CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_MMC_DW=y +CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_ROCKCHIP=y +CONFIG_DM_ETH=y +CONFIG_ETH_DESIGNWARE=y +CONFIG_GMAC_ROCKCHIP=y +CONFIG_PMIC_RK8XX=y +CONFIG_REGULATOR_PWM=y +CONFIG_REGULATOR_RK8XX=y +CONFIG_PWM_ROCKCHIP=y +CONFIG_BAUDRATE=1500000 +CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_SYSRESET=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_GENERIC=y +CONFIG_USB_HOST_ETHER=y +CONFIG_USB_ETHER_ASIX=y +CONFIG_USB_ETHER_ASIX88179=y +CONFIG_USB_ETHER_MCS7830=y +CONFIG_USB_ETHER_RTL8152=y +CONFIG_USB_ETHER_SMSC95XX=y +CONFIG_USE_TINY_PRINTF=y +CONFIG_ERRNO_STR=y From patchwork Sat Apr 27 12:09:16 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 10920201 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3542A1395 for ; Sat, 27 Apr 2019 12:09:54 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 225F9288E5 for ; Sat, 27 Apr 2019 12:09:54 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 1372A2890F; Sat, 27 Apr 2019 12:09:54 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 4CC6F288E5 for ; Sat, 27 Apr 2019 12:09:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=HEATuIArOIe/csIV9hnKG/84zIM8atMxG+sui+r2R1Q=; b=hXe4FfIbWQK+7i txmpX2RzqXKtib8gLZrRbccrXBZLT/LBr92sbrvwl2qPBc3QFMAzeaZdlfGRUlNBKYkjRCpw6HIhl lqc/FM0GV+I4N7kZOCeYVdE6CJGE/zZAwjb6XYP6J7pG4K8/KWx0bXigxng38TH7e/6aeiiecJYjG p2yEI2BM3a9bJYxnX3bYUo5+YQhLJxPAvjCvCWGB24HUVLbkqYw4qbjswsNNkdjzkhu0ZGXxc0sX0 MaYWlfXSmB8mykg4gwrTbBgsKzfLwEwFVgqZSk5TJdYWaqT910rwTLH7C1stVQoOl+zTEguxVIap5 Li0QM4z+VvqdRLZ3j7Fw==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1hKM9O-0000my-O0; Sat, 27 Apr 2019 12:09:50 +0000 Received: from mail-pf1-x42e.google.com ([2607:f8b0:4864:20::42e]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1hKM9L-0000kj-1t for linux-rockchip@lists.infradead.org; Sat, 27 Apr 2019 12:09:48 +0000 Received: by mail-pf1-x42e.google.com with SMTP id w25so3001091pfi.9 for ; Sat, 27 Apr 2019 05:09:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=j27ROTMPlvJQFdkm16NvRhONhh+bMCHFPK83ST3x/OU=; b=N3KcFRQVeKyUftKoKCeTp5PU6SKJE0Zj675nCkJYbEP0RbsWtEw19Eo46J7XdWUM5o iz7l6G4KhJkiWhcktQ/abyCmLQ9Z0U6Nf2T6tfoVOl/z/HvEG8A3kIJJKVMhhfAB8y0W 1CSP6vokbjcxxuI8sKVR4jFXq75cIXbX/WZTY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=j27ROTMPlvJQFdkm16NvRhONhh+bMCHFPK83ST3x/OU=; b=dYKatJDJWUma333xY7nZbCBgCo4+kk9wDeQTIRYdpTwLqhZ4yrXVkitJFptBWDgvAc c2ffQ7p73bPZNPcw2MqpdbIxKhqlTQA61Ja8XOnD0HgVCYKmKS2Z6Dt9tzJRo+3Jx8nA 7TOKQ8BzO42sZDjDmKbjb0DKNEkjm0qyJyGLpumaRKRdas4ImBsqbhxq3R4xXYr05vX1 k5Nld6MU3Pjat2nPrchuwu1XTpcNDMdSpEs00MhJIRox31XeYspSWFqsSHEDGBNDsedb 3G1rqVr/hgkrQbA+3OgQdWUZ+UYhlW8oPsBmpzUsy33msv4H5VrcV0nP7LOqh1HBigEe jE4g== X-Gm-Message-State: APjAAAU+l2b9p5rD2TMVTo+58xlfLX/O7MaWaMtPT1tr7uXJYsSxC8rX nJKRKFCcJ+tsktkaeMsWitMD4A== X-Google-Smtp-Source: APXvYqx6Ke0lhfVX82PY9Jk6v9pUxDpZIlqGm8yINSmYHgouCuSc+4Ck13GzP8ynvueZStDdGkbULg== X-Received: by 2002:a63:2bc8:: with SMTP id r191mr13282693pgr.72.1556366986142; Sat, 27 Apr 2019 05:09:46 -0700 (PDT) Received: from localhost.localdomain ([115.97.185.144]) by smtp.gmail.com with ESMTPSA id f14sm1386872pgj.24.2019.04.27.05.09.41 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 27 Apr 2019 05:09:45 -0700 (PDT) From: Jagan Teki To: Simon Glass , Philipp Tomsich , Kever Yang , Akash Gajjar , Tom Rini , Manivannan Sadhasivam Subject: [PATCH v6 13/13] doc: rockchip: Add global doc for rk3399 build/flash Date: Sat, 27 Apr 2019 17:39:16 +0530 Message-Id: <20190427120916.9033-4-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20190427120916.9033-1-jagan@amarulasolutions.com> References: <20190427120916.9033-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190427_050947_142477_F898FA7B X-CRM114-Status: GOOD ( 12.59 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paul Kocialkowski , linux-rockchip@lists.infradead.org, linux-amarula@amarulasolutions.com, Jagan Teki , u-boot@lists.denx.de Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+patchwork-linux-rockchip=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Since rockchip have an individual doc/README.rockchip, it would be better to update the same instead of maintaining it separately in board files. So, add the documentation for rk3399 - procedure to build for Rockchip miniloader and U-Boot SPL options - procedure to boot from SD for Rockchip miniloader and U-Boot SPL options - procedure to build ATF, PMU M0 firmware for puma boards - add boot logs of each option, so-that it would help for future boards porting Signed-off-by: Jagan Teki Reviewed-by: Philipp Tomsich --- doc/README.rockchip | 233 +++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 232 insertions(+), 1 deletion(-) diff --git a/doc/README.rockchip b/doc/README.rockchip index ec10ebbc26..ca4d6473b0 100644 --- a/doc/README.rockchip +++ b/doc/README.rockchip @@ -88,10 +88,92 @@ One RV3188 baord is supported: For example: +1. To build RK3288 board: + CROSS_COMPILE=arm-linux-gnueabi- make O=firefly firefly-rk3288_defconfig all -(or you can use another cross compiler if you prefer) + (or you can use another cross compiler if you prefer) + +2. To build RK3399 board: + + Option 1: Package the image with Rockchip miniloader: + + - Compile U-Boot + + => cd /path/to/u-boot + => make nanopi-neo4-rk3399_defconfig + => make + => make u-boot.itb + + - Get the rkbin + + => git clone https://github.com/rockchip-linux/rkbin.git + + - Create trust.img + + => cd /path/to/rkbin + => ./tools/trust_merger RKTRUST/RK3399TRUST.ini + + - Create uboot.img + + => cd /path/to/rkbin + => ./tools/loaderimage --pack --uboot /path/to/u-boot/u-boot-dtb.bin uboot.img + + (Get trust.img and uboot.img) + + Option 2: Package the image with SPL: + + - We need the Python elftools.elf.elffile library for make_fit_atf.py to work + + => sudo apt-get install python-pyelftools + + - Export cross compiler path for aarch64 + + - Compile ATF + + For Puma board. + + => git clone git://git.theobroma-systems.com/arm-trusted-firmware.git + => cd arm-trusted-firmware + => make CROSS_COMPILE=aarch64-linux-gnu- PLAT=rk3399 bl31 + + (copy bl31.bin into U-Boot root dir) + => cp build/rk3399/release/bl31/bl31.bin /path/to/u-boot/bl31-rk3399.bin + + For rest of rk3399 boards. + + => git clone https://github.com/ARM-software/arm-trusted-firmware.git + => cd arm-trusted-firmware + + (export cross compiler path for Cortex-M0 MCU likely arm-none-eabi-) + => make realclean + => make CROSS_COMPILE=aarch64-linux-gnu- PLAT=rk3399 + + (copy bl31.elf into U-Boot root dir) + => cp build/rk3399/release/bl31/bl31.elf /path/to/u-boot + + - Compile PMU M0 firmware + + This is optional for most of the rk3399 boards and required only for Puma board. + + => git clone git://git.theobroma-systems.com/rk3399-cortex-m0.git + => cd rk3399-cortex-m0 + (export cross compiler path for Cortex-M0 PMU) + => make CROSS_COMPILE=arm-cortex_m0-eabi- + + (copy rk3399m0.bin into U-Boot root dir) + => cp rk3399m0.bin /path/to/u-boot + + - Compile U-Boot + + => cd /path/to/u-boot + => make orangepi-rk3399_defconfig + => make + => make u-boot.itb + + (Get spl/u-boot-spl-dtb.bin, u-boot.itb images and some boards would get + spl/u-boot-spl.bin since it doesn't enable CONFIG_SPL_OF_CONTROL) Writing to the board with USB ============================= @@ -225,6 +307,153 @@ tools/mkimage -n rk3188 -T rksd -d spl/u-boot-spl.bin out truncate -s %2048 u-boot.bin cat u-boot.bin | split -b 512 --filter='openssl rc4 -K 7C4E0304550509072D2C7B38170D1711' >> out +Booting from an SD card on RK3399 +================================= + +To write an image that boots from an SD card (assumed to be /dev/sdc): + +Option 1: Package the image with Rockchip miniloader: + + - Create idbloader.img + + => cd /path/to/u-boot + => ./tools/mkimage -n rk3399 -T rksd -d /path/to/rkbin/bin/rk33/rk3399_ddr_800MHz_v1.20.bin idbloader.img + => cat /path/to/rkbin/bin/rk33/rk3399_miniloader_v1.19.bin >> idbloader.img + + - Write idbloader.img at 64 sector + + => sudo dd if=idbloader.img of=/dev/sdc seek=64 + + - Write trust.img at 24576 + + => sudo dd if=trust.img of=/dev/sdc seek=24576 + + - Write uboot.img at 16384 sector + + => sudo dd if=uboot.img of=/dev/sdc seek=16384 + => sync + +Put this SD (or micro-SD) card into your board and reset it. You should see +something like: + +DDR Version 1.20 20190314 +In +Channel 0: DDR3, 933MHz +Bus Width=32 Col=10 Bank=8 Row=15 CS=1 Die Bus-Width=16 Size=1024MB +no stride +ch 0 ddrconfig = 0x101, ddrsize = 0x20 +pmugrf_os_reg[2] = 0x10006281, stride = 0x17 +OUT +Boot1: 2019-03-14, version: 1.19 +CPUId = 0x0 +ChipType = 0x10, 239 +mmc: ERROR: SDHCI ERR:cmd:0x102,stat:0x18000 +mmc: ERROR: Card did not respond to voltage select! +emmc reinit +mmc: ERROR: SDHCI ERR:cmd:0x102,stat:0x18000 +mmc: ERROR: Card did not respond to voltage select! +emmc reinit +mmc: ERROR: SDHCI ERR:cmd:0x102,stat:0x18000 +mmc: ERROR: Card did not respond to voltage select! +SdmmcInit=2 1 +mmc0:cmd5,20 +SdmmcInit=0 0 +BootCapSize=0 +UserCapSize=60543MB +FwPartOffset=2000 , 0 +StorageInit ok = 45266 +SecureMode = 0 +SecureInit read PBA: 0x4 +SecureInit read PBA: 0x404 +SecureInit read PBA: 0x804 +SecureInit read PBA: 0xc04 +SecureInit read PBA: 0x1004 +SecureInit read PBA: 0x1404 +SecureInit read PBA: 0x1804 +SecureInit read PBA: 0x1c04 +SecureInit ret = 0, SecureMode = 0 +atags_set_bootdev: ret:(0) +GPT 0x3380ec0 signature is wrong +recovery gpt... +GPT 0x3380ec0 signature is wrong +recovery gpt fail! +LoadTrust Addr:0x4000 +No find bl30.bin +Load uboot, ReadLba = 2000 +hdr 0000000003380880 + 0x0:0x88,0x41,0x3e,0x97,0xe6,0x61,0x54,0x23,0xe9,0x5a,0xd1,0x2b,0xdc,0x2f,0xf9,0x35, + +Load OK, addr=0x200000, size=0x9c9c0 +RunBL31 0x10000 +NOTICE: BL31: v1.3(debug):370ab80 +NOTICE: BL31: Built : 09:23:41, Mar 4 2019 +NOTICE: BL31: Rockchip release version: v1.1 +INFO: GICv3 with legacy support detected. ARM GICV3 driver initialized in EL3 +INFO: Using opteed sec cpu_context! +INFO: boot cpu mask: 0 +INFO: plat_rockchip_pmu_init(1181): pd status 3e +INFO: BL31: Initializing runtime services +INFO: BL31: Initializing BL32 +INF [0x0] TEE-CORE:init_primary_helper:337: Initializing (1.1.0-195-g8f090d20 #6 Fri Dec 7 06:11:20 UTC 2018 aarch64) + +INF [0x0] TEE-CORE:init_primary_helper:338: Release version: 1.2 + +INF [0x0] TEE-CORE:init_teecore:83: teecore inits done +INFO: BL31: Preparing for EL3 exit to normal world +INFO: Entry point address = 0x200000 +INFO: SPSR = 0x3c9 + + +U-Boot 2019.04-rc4-00136-gfd121f9641-dirty (Apr 16 2019 - 14:02:47 +0530) + +Model: FriendlyARM NanoPi NEO4 +DRAM: 1022 MiB +MMC: dwmmc@fe310000: 2, dwmmc@fe320000: 1, sdhci@fe330000: 0 +Loading Environment from MMC... *** Warning - bad CRC, using default environment + +In: serial@ff1a0000 +Out: serial@ff1a0000 +Err: serial@ff1a0000 +Model: FriendlyARM NanoPi NEO4 +Net: eth0: ethernet@fe300000 +Hit any key to stop autoboot: 0 +=> + +Option 2: Package the image with SPL: + + - Prefix rk3399 header to SPL image + + => cd /path/to/u-boot + => ./tools/mkimage -n rk3399 -T rksd -d spl/u-boot-spl-dtb.bin out + + - Write prefixed SPL at 64th sector + + => sudo dd if=out of=/dev/sdc seek=64 + + - Write U-Boot proper at 16384 sector + + => sudo dd if=u-boot.itb of=/dev/sdc seek=16384 + => sync + +Put this SD (or micro-SD) card into your board and reset it. You should see +something like: + +U-Boot SPL board init +Trying to boot from MMC1 + + +U-Boot 2019.01-00004-g14db5ee998 (Mar 11 2019 - 13:18:41 +0530) + +Model: Orange Pi RK3399 Board +DRAM: 2 GiB +MMC: dwmmc@fe310000: 2, dwmmc@fe320000: 1, sdhci@fe330000: 0 +Loading Environment from MMC... OK +In: serial@ff1a0000 +Out: serial@ff1a0000 +Err: serial@ff1a0000 +Model: Orange Pi RK3399 Board +Net: eth0: ethernet@fe300000 +Hit any key to stop autoboot: 0 +=> Using fastboot on rk3288 ======================== @@ -385,5 +614,7 @@ There are some documents about partitions in the links below. http://rockchip.wikidot.com/partitions -- +Jagan Teki +27 Mar 2019 Simon Glass 24 June 2015