From patchwork Fri May 3 22:02:04 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gwendal Grignou X-Patchwork-Id: 10929245 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 52A62912 for ; Fri, 3 May 2019 22:02:45 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 4283A287CF for ; Fri, 3 May 2019 22:02:45 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 364C0287D2; Fri, 3 May 2019 22:02:45 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D3C05287CF for ; Fri, 3 May 2019 22:02:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726549AbfECWCo (ORCPT ); Fri, 3 May 2019 18:02:44 -0400 Received: from mail-pl1-f194.google.com ([209.85.214.194]:40178 "EHLO mail-pl1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726432AbfECWCo (ORCPT ); Fri, 3 May 2019 18:02:44 -0400 Received: by mail-pl1-f194.google.com with SMTP id b3so3309122plr.7 for ; Fri, 03 May 2019 15:02:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=v8u/UWICJawrzrjLKRsjDtgT8+fxH2ub2bD/oCUZO04=; b=cTF4y69jR8iirJqdEiwoSqUcywThQjw2vb0JCsP1mctYrZCJv5Ih+xn35SbKEH0Hyd WAcuDt0ejpX2FhZNdNuFA00YGUpifRHNmuT9OPuqEMPRIbRcTlq0W6P/JFIIqRdBvIix tjZl5edO7sgX3JBMBziASxysSGMnof3aORxaM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=v8u/UWICJawrzrjLKRsjDtgT8+fxH2ub2bD/oCUZO04=; b=GORyEVRKehZdJzr2WQI+czx5mD87C/TIyTWjhU9VJT1sgMiSjnEQrLfhLuL9rUSH0c vQ8aGVlTcLc0WJI+FgIpWaBltTHiVjvZjPWyyOmqWps+dQHjm/sqSRdLupA3qXBg0c77 VBvZYdWgmnc+Z9hn4SJETsIvYQvY+VtVtyzj2FGiDkuLHzlu+mcwUbM6IW7DRWqYvgLu Yx6I6xXuGcg0JBvDt8Taey0HaZY2KBhmyATde9brPPk6ACUjqxak9lJ7cvn1joy3u1yS BZGj+nFIxhEl1GIoXjfp7ooy8j9WF/EnXkMmRCkKHtv0f/3aNwM1NWFQVSjQ2VkUXckT sMWw== X-Gm-Message-State: APjAAAUb0scWoYv9k0CCGKksb3paNMdzU1bT6gASvkSm8WMxf62+fsoV tiVMhJymgvt3IpW9KQQVDt8rQA== X-Google-Smtp-Source: APXvYqzIL9rRB4s5BW2jSsZP/BhewykiNVjhhJoLhPb8KanB8NbjVFItJh6KurKfr5QeygFKixUbGg== X-Received: by 2002:a17:902:6b:: with SMTP id 98mr13896864pla.271.1556920963689; Fri, 03 May 2019 15:02:43 -0700 (PDT) Received: from localhost ([2620:15c:202:1:3c8f:512b:3522:dfaf]) by smtp.gmail.com with ESMTPSA id n11sm3403981pgq.8.2019.05.03.15.02.42 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 03 May 2019 15:02:43 -0700 (PDT) From: Gwendal Grignou To: enric.balletbo@collabora.com, bleung@chromium.org, groeck@chromium.org, lee.jones@linaro.org, jic23@kernel.org, broonie@kernel.org, cychiang@chromium.org, tiwai@suse.com Cc: linux-iio@vger.kernel.org, alsa-devel@alsa-project.org, Gwendal Grignou Subject: [PATCH v2 01/30] mfd: cros_ec: Update license term Date: Fri, 3 May 2019 15:02:04 -0700 Message-Id: <20190503220233.64546-2-gwendal@chromium.org> X-Mailer: git-send-email 2.21.0.1020.gf2820cf01a-goog In-Reply-To: <20190503220233.64546-1-gwendal@chromium.org> References: <20190503220233.64546-1-gwendal@chromium.org> MIME-Version: 1.0 Sender: linux-iio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Update to SPDX-License-Identifier, GPL-2.0 Acked-by: Enric Balletbo i Serra Signed-off-by: Gwendal Grignou --- include/linux/mfd/cros_ec_commands.h | 20 +++++--------------- 1 file changed, 5 insertions(+), 15 deletions(-) diff --git a/include/linux/mfd/cros_ec_commands.h b/include/linux/mfd/cros_ec_commands.h index 43bee4f7d137..6fa508643da3 100644 --- a/include/linux/mfd/cros_ec_commands.h +++ b/include/linux/mfd/cros_ec_commands.h @@ -1,25 +1,15 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /* * Host communication command constants for ChromeOS EC * * Copyright (C) 2012 Google, Inc * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * The ChromeOS EC multi function device is used to mux all the requests - * to the EC device for its multiple features: keyboard controller, - * battery charging and regulator control, firmware update. - * - * NOTE: This file is copied verbatim from the ChromeOS EC Open Source - * project in an attempt to make future updates easy to make. + * NOTE: This file is auto-generated from ChromeOS EC Open Source code from + * https://chromium.googlesource.com/chromiumos/platform/ec/+/master/include/ec_commands.h */ +/* Host communication command constants for Chrome EC */ + #ifndef __CROS_EC_COMMANDS_H #define __CROS_EC_COMMANDS_H From patchwork Fri May 3 22:02:05 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gwendal Grignou X-Patchwork-Id: 10929247 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 2CAF91390 for ; Fri, 3 May 2019 22:02:47 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 1B51B287CF for ; Fri, 3 May 2019 22:02:47 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 09E6D287D2; Fri, 3 May 2019 22:02:47 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A7E41287CF for ; Fri, 3 May 2019 22:02:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726558AbfECWCq (ORCPT ); Fri, 3 May 2019 18:02:46 -0400 Received: from mail-pf1-f193.google.com ([209.85.210.193]:34294 "EHLO mail-pf1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726432AbfECWCq (ORCPT ); Fri, 3 May 2019 18:02:46 -0400 Received: by mail-pf1-f193.google.com with SMTP id b3so3549026pfd.1 for ; Fri, 03 May 2019 15:02:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=R1fjM9w2h70QiUrv+LoNu/lNneSjRxxrzXxb5mmKI3w=; b=FtEmcK2EAsDc4lbuEYIbz39AL2xpoQyeXHy70UQfD4vEaamR56r1fcjMjYeclr5ne+ 8aMYs0G65xWKu9T1R1ALpUd/xolxscn024lKVRLu6q8Y3XgjnqFezpNeaLw7iWT8YROL 9SieAdZYRkUmvxrjX3nTBWP1rZhBUOQiklSdY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=R1fjM9w2h70QiUrv+LoNu/lNneSjRxxrzXxb5mmKI3w=; b=fKLZsojolb4kcll+GCSnxVGUmLf52vdSgD19Y+zeFkKuLBb64VDTfZObVtcWR166w7 YOnu2gGSJRphvYZBHQ9y5jz9CDPCfkm9Zf3N4eRC1gBHHmV7fxPBN5MkG/ZnxOza04ZK qkL5LiOvw3Ye3NnnaCs826RKjoRrcu1uv5MfIgDoXdT42HLqpUsGDUtUH/2YjgBAlFuR ECkkOgtgi4VyP5+Il0qxUN28VSQBhDLuHAquvo/fuwRWqdf/h7a8Ec/eerRVvqSnZJno Shv+nvqkPBcbSZYCbekSCe1v6aLcipiQQnLw8J5LeZq+/MQAZ3o03IQJ7jYvY6fa88hY 9Xfw== X-Gm-Message-State: APjAAAUPtRgwLWpNj5y073bywnYYl6GcP5lTzeMgQX5A20OGviOSAV51 YdBNRCRK7bpcT8YNXCfAxSFP9w== X-Google-Smtp-Source: APXvYqyBJeOEF7xV0itUAXuRjhzZi8P2TOqSE1YE4DuxpYkK5TmwtKSlV6hXJc5Hd0s8mGFtfiURxA== X-Received: by 2002:a63:6ac1:: with SMTP id f184mr14167742pgc.25.1556920965411; Fri, 03 May 2019 15:02:45 -0700 (PDT) Received: from localhost ([2620:15c:202:1:3c8f:512b:3522:dfaf]) by smtp.gmail.com with ESMTPSA id v64sm4256040pfv.106.2019.05.03.15.02.44 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 03 May 2019 15:02:44 -0700 (PDT) From: Gwendal Grignou To: enric.balletbo@collabora.com, bleung@chromium.org, groeck@chromium.org, lee.jones@linaro.org, jic23@kernel.org, broonie@kernel.org, cychiang@chromium.org, tiwai@suse.com Cc: linux-iio@vger.kernel.org, alsa-devel@alsa-project.org, Gwendal Grignou Subject: [PATCH v2 02/30] mfd: cros_ec: Zero BUILD_ macro Date: Fri, 3 May 2019 15:02:05 -0700 Message-Id: <20190503220233.64546-3-gwendal@chromium.org> X-Mailer: git-send-email 2.21.0.1020.gf2820cf01a-goog In-Reply-To: <20190503220233.64546-1-gwendal@chromium.org> References: <20190503220233.64546-1-gwendal@chromium.org> MIME-Version: 1.0 Sender: linux-iio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Defined out build macro used when compiling embedded controller firmware. Acked-by: Enric Balletbo i Serra Signed-off-by: Gwendal Grignou --- include/linux/mfd/cros_ec_commands.h | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/include/linux/mfd/cros_ec_commands.h b/include/linux/mfd/cros_ec_commands.h index 6fa508643da3..374f64caeb5f 100644 --- a/include/linux/mfd/cros_ec_commands.h +++ b/include/linux/mfd/cros_ec_commands.h @@ -13,6 +13,11 @@ #ifndef __CROS_EC_COMMANDS_H #define __CROS_EC_COMMANDS_H + + + +#define BUILD_ASSERT(_cond) + /* * Current version of this protocol * From patchwork Fri May 3 22:02:06 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gwendal Grignou X-Patchwork-Id: 10929249 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 5C17C1390 for ; Fri, 3 May 2019 22:02:49 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 4D34A287CF for ; Fri, 3 May 2019 22:02:49 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 41464287D2; Fri, 3 May 2019 22:02:49 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7F54A287CF for ; Fri, 3 May 2019 22:02:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726584AbfECWCs (ORCPT ); Fri, 3 May 2019 18:02:48 -0400 Received: from mail-pg1-f195.google.com ([209.85.215.195]:42516 "EHLO mail-pg1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726432AbfECWCr (ORCPT ); Fri, 3 May 2019 18:02:47 -0400 Received: by mail-pg1-f195.google.com with SMTP id p6so3336235pgh.9 for ; Fri, 03 May 2019 15:02:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=KZ7ZFFXG9FmEd4ZAtYZzYgUA5iz2DGOn0dBk9pvKVUQ=; b=g1NhTcYtMRpYtte5UQBtSUNhkEwxm7fUiJ3OruF3Dj/lD6yVRRAWPYTqhSz1sSBejH 0NLwvqQEVfgsuMuoxAizShVsPEbOUjsIZpI0QL0Uuz+f9dhOmPtdENoJ5yOFGqEkUodU dqBA3DeZlWBVRdg0mpaPqgKjBOxADH7x4CVtU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=KZ7ZFFXG9FmEd4ZAtYZzYgUA5iz2DGOn0dBk9pvKVUQ=; b=XVDakyPIH39z6KVJJCUGKtQfiVD/Guu0acFUQJg3VWl/SjCa6zrRtq7HiUohhKSQkO fDY2PcXSH7B4SQ2Xv5FyW/IAlI8HXScrcEdyCHxRxJtrZQF0FkAaDFckNOlsBfCIEYzc VQMcu/JF6RzH5/fvsc+RhBocC7avSY8mHe6c1p4+w7L+Rv9UtSqCoPRfI0xgGU9QPqkA 0eMYkgt89A/NfVLr8VnbQ79hXLJvSM50uEJM2Hc5YT3R7nbIdbxKmmo0s+q8nX/RQVLc yg6Xa1A2yh5Z2fXx+2HfNDhQ3a57RLmXc4HT09oo8LmUfs7ny+XUnGapvX802P2VV61+ 7NGA== X-Gm-Message-State: APjAAAW/1ZRdSWWwfNySk7Tmb1SQ2fZo1xvQKBsAK6BZEmh44lvc9P6k RJzQbCkzaW0vzK87lBCQq55PMQ== X-Google-Smtp-Source: APXvYqxiu1XTeCZ582DjAOFx1BHtkCTrv5PcS6CuhJMUetNpsKpA8goHIj17NiSwtnvFeID2kQntRA== X-Received: by 2002:a62:fb0a:: with SMTP id x10mr14259744pfm.179.1556920967003; Fri, 03 May 2019 15:02:47 -0700 (PDT) Received: from localhost ([2620:15c:202:1:3c8f:512b:3522:dfaf]) by smtp.gmail.com with ESMTPSA id p20sm4103985pgj.86.2019.05.03.15.02.46 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 03 May 2019 15:02:46 -0700 (PDT) From: Gwendal Grignou To: enric.balletbo@collabora.com, bleung@chromium.org, groeck@chromium.org, lee.jones@linaro.org, jic23@kernel.org, broonie@kernel.org, cychiang@chromium.org, tiwai@suse.com Cc: linux-iio@vger.kernel.org, alsa-devel@alsa-project.org, Gwendal Grignou Subject: [PATCH v2 03/30] mfd: cros_ec: set comments properly Date: Fri, 3 May 2019 15:02:06 -0700 Message-Id: <20190503220233.64546-4-gwendal@chromium.org> X-Mailer: git-send-email 2.21.0.1020.gf2820cf01a-goog In-Reply-To: <20190503220233.64546-1-gwendal@chromium.org> References: <20190503220233.64546-1-gwendal@chromium.org> MIME-Version: 1.0 Sender: linux-iio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Fix comments syntax and spelling errors. Acked-by: Enric Balletbo i Serra Signed-off-by: Gwendal Grignou --- include/linux/mfd/cros_ec_commands.h | 67 +++++++++++++++++----------- 1 file changed, 41 insertions(+), 26 deletions(-) diff --git a/include/linux/mfd/cros_ec_commands.h b/include/linux/mfd/cros_ec_commands.h index 374f64caeb5f..43fe1697b18b 100644 --- a/include/linux/mfd/cros_ec_commands.h +++ b/include/linux/mfd/cros_ec_commands.h @@ -42,13 +42,16 @@ /* Protocol version 2 */ #define EC_LPC_ADDR_HOST_ARGS 0x800 /* And 0x801, 0x802, 0x803 */ #define EC_LPC_ADDR_HOST_PARAM 0x804 /* For version 2 params; size is - * EC_PROTO2_MAX_PARAM_SIZE */ + * EC_PROTO2_MAX_PARAM_SIZE + */ /* Protocol version 3 */ #define EC_LPC_ADDR_HOST_PACKET 0x800 /* Offset of version 3 packet */ #define EC_LPC_HOST_PACKET_SIZE 0x100 /* Max size of version 3 packet */ -/* The actual block is 0x800-0x8ff, but some BIOSes think it's 0x880-0x8ff - * and they tell the kernel that so we have to think of it as two parts. */ +/* + * The actual block is 0x800-0x8ff, but some BIOSes think it's 0x880-0x8ff + * and they tell the kernel that so we have to think of it as two parts. + */ #define EC_HOST_CMD_REGION0 0x800 #define EC_HOST_CMD_REGION1 0x880 #define EC_HOST_CMD_REGION_SIZE 0x80 @@ -324,7 +327,7 @@ struct ec_lpc_host_args { * If EC gets a command and this flag is not set, this is an old-style command. * Command version is 0 and params from host are at EC_LPC_ADDR_OLD_PARAM with * unknown length. EC must respond with an old-style response (that is, - * withouth setting EC_HOST_ARGS_FLAG_TO_HOST). + * without setting EC_HOST_ARGS_FLAG_TO_HOST). */ #define EC_HOST_ARGS_FLAG_FROM_HOST 0x01 /* @@ -511,7 +514,7 @@ struct ec_host_response { * Notes on commands: * * Each command is an 16-bit command value. Commands which take params or - * return response data specify structs for that data. If no struct is + * return response data specify structures for that data. If no structure is * specified, the command does not input or output data, respectively. * Parameter/response length is implicit in the structs. Some underlying * communication protocols (I2C, SPI) may add length or checksum headers, but @@ -684,7 +687,7 @@ struct ec_response_get_cmd_versions { } __packed; /* - * Check EC communcations status (busy). This is needed on i2c/spi but not + * Check EC communications status (busy). This is needed on i2c/spi but not * on lpc since it has its own out-of-band busy indicator. * * lpc must read the status from the command register. Attempting this on @@ -721,7 +724,7 @@ struct ec_response_test_protocol { uint8_t buf[32]; } __packed; -/* Get prococol information */ +/* Get protocol information */ #define EC_CMD_GET_PROTOCOL_INFO 0x0b /* Flags for ec_response_get_protocol_info.flags */ @@ -767,7 +770,7 @@ struct ec_response_get_set_value { uint32_t value; } __packed; -/* More than one command can use these structs to get/set paramters. */ +/* More than one command can use these structs to get/set parameters. */ #define EC_CMD_GSV_PAUSE_IN_S5 0x0c /*****************************************************************************/ @@ -835,7 +838,7 @@ enum ec_feature_code { * (Common Smart Battery System Interface Specification) */ EC_FEATURE_SMART_BATTERY = 18, - /* EC can dectect when the host hangs. */ + /* EC can detect when the host hangs. */ EC_FEATURE_HANG_DETECT = 19, /* Report power information, for pit only */ EC_FEATURE_PMU = 20, @@ -887,8 +890,10 @@ struct ec_response_flash_info { uint32_t protect_block_size; } __packed; -/* Flags for version 1+ flash info command */ -/* EC flash erases bits to 0 instead of 1 */ +/* + * Flags for version 1+ flash info command + * EC flash erases bits to 0 instead of 1. + */ #define EC_FLASH_INFO_ERASE_TO_0 (1 << 0) /** @@ -911,7 +916,8 @@ struct ec_response_flash_info { * fields following. * * gcc anonymous structs don't seem to get along with the __packed directive; - * if they did we'd define the version 0 struct as a sub-struct of this one. + * if they did we'd define the version 0 structure as a sub-structure of this + * one. */ struct ec_response_flash_info_1 { /* Version 0 fields; see above for description */ @@ -1006,7 +1012,7 @@ struct ec_params_flash_erase { * re-requesting the desired flags, or by a hard reset if that fails. */ #define EC_FLASH_PROTECT_ERROR_INCONSISTENT (1 << 5) -/* Entile flash code protected when the EC boots */ +/* Entire flash code protected when the EC boots */ #define EC_FLASH_PROTECT_ALL_AT_BOOT (1 << 6) /** @@ -1599,7 +1605,7 @@ struct ec_response_motion_sensor_data { union { int16_t data[3]; struct { - uint16_t rsvd; + uint16_t reserved; uint32_t timestamp; } __packed; struct { @@ -1798,7 +1804,7 @@ struct ec_response_rtc { #define EC_CMD_RTC_SET_VALUE 0x46 #define EC_CMD_RTC_SET_ALARM 0x47 -/* Pass as param to SET_ALARM to clear the current alarm */ +/* Pass as time param to SET_ALARM to clear the current alarm */ #define EC_RTC_ALARM_CLEAR 0 /*****************************************************************************/ @@ -1884,7 +1890,8 @@ enum ec_temp_thresholds { EC_TEMP_THRESH_COUNT }; -/* Thermal configuration for one temperature sensor. Temps are in degrees K. +/* + * Thermal configuration for one temperature sensor. Temps are in degrees K. * Zero values will be silently ignored by the thermal task. */ struct ec_thermal_config { @@ -1899,8 +1906,10 @@ struct ec_params_thermal_get_threshold_v1 { } __packed; /* This returns a struct ec_thermal_config */ -/* Version 1 - set config for one sensor. - * Use read-modify-write for best results! */ +/* + * Version 1 - set config for one sensor. + * Use read-modify-write for best results! + */ struct ec_params_thermal_set_threshold_v1 { uint32_t sensor_num; struct ec_thermal_config cfg; @@ -2049,7 +2058,12 @@ enum mkbp_config_valid { EC_MKBP_VALID_FIFO_MAX_DEPTH = 1 << 7, }; -/* Configuration for our key scanning algorithm */ +/* + * Configuration for our key scanning algorithm. + * + * Note that this is used as a sub-structure of + * ec_{params/response}_mkbp_get_config. + */ struct ec_mkbp_config { uint32_t valid_mask; /* valid fields */ uint8_t flags; /* some flags (enum mkbp_config_flags) */ @@ -2332,6 +2346,7 @@ struct ec_params_gpio_set { struct ec_params_gpio_get { char name[32]; } __packed; + struct ec_response_gpio_get { uint8_t val; } __packed; @@ -2372,8 +2387,10 @@ enum gpio_get_subcmd { /* I2C commands. Only available when flash write protect is unlocked. */ /* - * TODO(crosbug.com/p/23570): These commands are deprecated, and will be - * removed soon. Use EC_CMD_I2C_XFER instead. + * CAUTION: These commands are deprecated, and are not supported anymore in EC + * builds >= 8398.0.0 (see crosbug.com/p/23570). + * + * Use EC_CMD_I2C_PASSTHRU instead. */ /* Read I2C bus */ @@ -2385,6 +2402,7 @@ struct ec_params_i2c_read { uint8_t port; uint8_t offset; } __packed; + struct ec_response_i2c_read { uint16_t data; } __packed; @@ -2420,7 +2438,6 @@ struct ec_params_charge_control { } __packed; /*****************************************************************************/ -/* Console commands. Only available when flash write protect is unlocked. */ /* Snapshot console output buffer for use by EC_CMD_CONSOLE_READ. */ #define EC_CMD_CONSOLE_SNAPSHOT 0x97 @@ -2817,9 +2834,7 @@ enum ec_i2s_config { }; struct ec_param_codec_i2s { - /* - * enum ec_codec_i2s_subcmd - */ + /* enum ec_codec_i2s_subcmd */ uint8_t cmd; union { /* @@ -2894,7 +2909,7 @@ struct ec_response_codec_gain { enum ec_reboot_cmd { EC_REBOOT_CANCEL = 0, /* Cancel a pending reboot */ EC_REBOOT_JUMP_RO = 1, /* Jump to RO without rebooting */ - EC_REBOOT_JUMP_RW = 2, /* Jump to RW without rebooting */ + EC_REBOOT_JUMP_RW = 2, /* Jump to active RW without rebooting */ /* (command 3 was jump to RW-B) */ EC_REBOOT_COLD = 4, /* Cold-reboot */ EC_REBOOT_DISABLE_JUMP = 5, /* Disable jump until next reboot */ From patchwork Fri May 3 22:02:07 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gwendal Grignou X-Patchwork-Id: 10929255 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 8138713AD for ; Fri, 3 May 2019 22:02:56 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6F5D1287CF for ; Fri, 3 May 2019 22:02:56 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 63709287D2; Fri, 3 May 2019 22:02:56 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 06ECE287CF for ; Fri, 3 May 2019 22:02:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726632AbfECWCw (ORCPT ); Fri, 3 May 2019 18:02:52 -0400 Received: from mail-pg1-f195.google.com ([209.85.215.195]:33784 "EHLO mail-pg1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726432AbfECWCw (ORCPT ); Fri, 3 May 2019 18:02:52 -0400 Received: by mail-pg1-f195.google.com with SMTP id k19so3354323pgh.0 for ; Fri, 03 May 2019 15:02:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=oTnbZ0JVqOJuCviiKrZEFkB/EIxy969pDaCvDodDXyE=; b=BXrz2PQzLo2v6vgmML2jDhBlnpXAds6+onk3jO98JchDf2JvLcGnjNMB01G3DsL2w4 kFi6GtMSrzTgo60M55b9Sw/PZW30mKcdYJbqAoX8QP5xMZGWJ3lhZ8CEHYv6y19zlesN IAOQTytW9HHC5JN/ooKjbHkczptB5D3Qx7Ntg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=oTnbZ0JVqOJuCviiKrZEFkB/EIxy969pDaCvDodDXyE=; b=MB1hWUwLesp4Ty3OydSD8l9InJJXIM0fLP5MtJbNhnhjH+6mkENXAFDghDRDp5spiL vtVHyzvdGFXBuo0xDOXCPpOPy2qqs+sCdLyZeqKNcn/A8SEvOc12p91RE/jem9IetfS9 dUOw0j+mX0ICuPV4SCwol6y0Sc4H1bWz2UPHf3BA6ywWsbLPs9Rr/csFVj/0CIHYaE8E PmoUFL4BWibCupBgcfeG8KtH8/IuJQwzBUwvaKWFL6f7mYTNE54Y2Lx+cSSnYG6YnSiW 24iWE2Q7NeLeHhVCHdKMJ0fb5XCXuceuhPWNdc2YS5llH1jn6jyHwz8cO8A4NT6XR/nf MHpg== X-Gm-Message-State: APjAAAW+EocfEq+g5BNQ02gNvBBzCX2XX4jOeIyoskTq/kizpk3BRd1Q 8cO29KA3G0rkS5PmoLosKlVuIQ== X-Google-Smtp-Source: APXvYqy6Qyv2YY08UivT7tpENFcWihvJDtRuFgtHUyPQNDWJDvP48U6Rqsx/ioI9BhiCKgQo1vn2Lg== X-Received: by 2002:a65:4183:: with SMTP id a3mr13755924pgq.121.1556920970122; Fri, 03 May 2019 15:02:50 -0700 (PDT) Received: from localhost ([2620:15c:202:1:3c8f:512b:3522:dfaf]) by smtp.gmail.com with ESMTPSA id y14sm3499221pga.54.2019.05.03.15.02.48 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 03 May 2019 15:02:49 -0700 (PDT) From: Gwendal Grignou To: enric.balletbo@collabora.com, bleung@chromium.org, groeck@chromium.org, lee.jones@linaro.org, jic23@kernel.org, broonie@kernel.org, cychiang@chromium.org, tiwai@suse.com Cc: linux-iio@vger.kernel.org, alsa-devel@alsa-project.org, Gwendal Grignou Subject: [PATCH v2 04/30] mfd: cros_ec: add ec_align macros Date: Fri, 3 May 2019 15:02:07 -0700 Message-Id: <20190503220233.64546-5-gwendal@chromium.org> X-Mailer: git-send-email 2.21.0.1020.gf2820cf01a-goog In-Reply-To: <20190503220233.64546-1-gwendal@chromium.org> References: <20190503220233.64546-1-gwendal@chromium.org> MIME-Version: 1.0 Sender: linux-iio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP To reduce code and improve performance of the embedded controller firmware, pragma __aligned(2) or __aligned(4) are used when alignment to 16 or 32 bit boundary is expected. Define all ec_align to packed when compiling kernel. Acked-by: Enric Balletbo i Serra Signed-off-by: Gwendal Grignou --- include/linux/mfd/cros_ec_commands.h | 438 +++++++++++++++------------ 1 file changed, 236 insertions(+), 202 deletions(-) diff --git a/include/linux/mfd/cros_ec_commands.h b/include/linux/mfd/cros_ec_commands.h index 43fe1697b18b..e0f6e9d9f587 100644 --- a/include/linux/mfd/cros_ec_commands.h +++ b/include/linux/mfd/cros_ec_commands.h @@ -188,12 +188,46 @@ #ifndef __ACPI__ /* - * Define __packed if someone hasn't beat us to it. Linux kernel style - * checking prefers __packed over __attribute__((packed)). + * Attributes for EC request and response packets. Just defining __packed + * results in inefficient assembly code on ARM, if the structure is actually + * 32-bit aligned, as it should be for all buffers. + * + * Be very careful when adding these to existing structures. They will round + * up the structure size to the specified boundary. + * + * Also be very careful to make that if a structure is included in some other + * parent structure that the alignment will still be true given the packing of + * the parent structure. This is particularly important if the sub-structure + * will be passed as a pointer to another function, since that function will + * not know about the misaligment caused by the parent structure's packing. + * + * Also be very careful using __packed - particularly when nesting non-packed + * structures inside packed ones. In fact, DO NOT use __packed directly; + * always use one of these attributes. + * + * Once everything is annotated properly, the following search strings should + * not return ANY matches in this file other than right here: + * + * "__packed" - generates inefficient code; all sub-structs must also be packed + * + * "struct [^_]" - all structs should be annotated, except for structs that are + * members of other structs/unions (and their original declarations should be + * annotated). */ -#ifndef __packed -#define __packed __attribute__((packed)) -#endif + +/* + * Packed structures make no assumption about alignment, so they do inefficient + * byte-wise reads. + */ +#define __ec_align1 __packed +#define __ec_align2 __packed +#define __ec_align4 __packed +#define __ec_align_size1 __packed +#define __ec_align_offset1 __packed +#define __ec_align_offset2 __packed +#define __ec_todo_packed __packed +#define __ec_todo_unpacked + /* LPC command status byte masks */ /* EC has written a byte in the data register and host hasn't read it yet */ @@ -317,7 +351,7 @@ struct ec_lpc_host_args { uint8_t command_version; uint8_t data_size; uint8_t checksum; -} __packed; +} __ec_align4; /* Flags for ec_lpc_host_args.flags */ /* @@ -488,7 +522,7 @@ struct ec_host_request { uint8_t command_version; uint8_t reserved; uint16_t data_len; -} __packed; +} __ec_align4; #define EC_HOST_RESPONSE_VERSION 3 @@ -507,7 +541,7 @@ struct ec_host_response { uint16_t result; uint16_t data_len; uint16_t reserved; -} __packed; +} __ec_align4; /*****************************************************************************/ /* @@ -536,7 +570,7 @@ struct ec_host_response { */ struct ec_response_proto_version { uint32_t version; -} __packed; +} __ec_align4; /* * Hello. This is a simple command to test the EC is responsive to @@ -550,7 +584,7 @@ struct ec_response_proto_version { */ struct ec_params_hello { uint32_t in_data; -} __packed; +} __ec_align4; /** * struct ec_response_hello - Response to the hello command. @@ -558,7 +592,7 @@ struct ec_params_hello { */ struct ec_response_hello { uint32_t out_data; -} __packed; +} __ec_align4; /* Get version number */ #define EC_CMD_GET_VERSION 0x02 @@ -581,7 +615,7 @@ struct ec_response_get_version { char version_string_rw[32]; char reserved[32]; uint32_t current_image; -} __packed; +} __ec_align4; /* Read test */ #define EC_CMD_READ_TEST 0x03 @@ -594,7 +628,7 @@ struct ec_response_get_version { struct ec_params_read_test { uint32_t offset; uint32_t size; -} __packed; +} __ec_align4; /** * struct ec_response_read_test - Response to the read test command. @@ -602,7 +636,7 @@ struct ec_params_read_test { */ struct ec_response_read_test { uint32_t data[32]; -} __packed; +} __ec_align4; /* * Get build information @@ -624,7 +658,7 @@ struct ec_response_get_chip_info { char vendor[32]; char name[32]; char revision[32]; -} __packed; +} __ec_align4; /* Get board HW version */ #define EC_CMD_GET_BOARD_VERSION 0x06 @@ -635,7 +669,7 @@ struct ec_response_get_chip_info { */ struct ec_response_board_version { uint16_t board_version; -} __packed; +} __ec_align2; /* * Read memory-mapped data. @@ -655,7 +689,7 @@ struct ec_response_board_version { struct ec_params_read_memmap { uint8_t offset; uint8_t size; -} __packed; +} __ec_align1; /* Read versions supported for a command */ #define EC_CMD_GET_CMD_VERSIONS 0x08 @@ -666,7 +700,7 @@ struct ec_params_read_memmap { */ struct ec_params_get_cmd_versions { uint8_t cmd; -} __packed; +} __ec_align1; /** * struct ec_params_get_cmd_versions_v1 - Parameters for the get command @@ -675,7 +709,7 @@ struct ec_params_get_cmd_versions { */ struct ec_params_get_cmd_versions_v1 { uint16_t cmd; -} __packed; +} __ec_align2; /** * struct ec_response_get_cmd_version - Response to the get command versions. @@ -684,7 +718,7 @@ struct ec_params_get_cmd_versions_v1 { */ struct ec_response_get_cmd_versions { uint32_t version_mask; -} __packed; +} __ec_align4; /* * Check EC communications status (busy). This is needed on i2c/spi but not @@ -707,7 +741,7 @@ enum ec_comms_status { */ struct ec_response_get_comms_status { uint32_t flags; /* Mask of enum ec_comms_status */ -} __packed; +} __ec_align4; /* Fake a variety of responses, purely for testing purposes. */ #define EC_CMD_TEST_PROTOCOL 0x0a @@ -717,12 +751,12 @@ struct ec_params_test_protocol { uint32_t ec_result; uint32_t ret_len; uint8_t buf[32]; -} __packed; +} __ec_align4; /* Here it comes... */ struct ec_response_test_protocol { uint8_t buf[32]; -} __packed; +} __ec_align4; /* Get protocol information */ #define EC_CMD_GET_PROTOCOL_INFO 0x0b @@ -745,7 +779,7 @@ struct ec_response_get_protocol_info { uint16_t max_request_packet_size; uint16_t max_response_packet_size; uint32_t flags; -} __packed; +} __ec_align4; /*****************************************************************************/ @@ -763,12 +797,12 @@ struct ec_response_get_protocol_info { struct ec_params_get_set_value { uint32_t flags; uint32_t value; -} __packed; +} __ec_align4; struct ec_response_get_set_value { uint32_t flags; uint32_t value; -} __packed; +} __ec_align4; /* More than one command can use these structs to get/set parameters. */ #define EC_CMD_GSV_PAUSE_IN_S5 0x0c @@ -863,7 +897,7 @@ enum ec_feature_code { struct ec_response_get_features { uint32_t flags[2]; -} __packed; +} __ec_align4; /*****************************************************************************/ /* Flash commands */ @@ -888,7 +922,7 @@ struct ec_response_flash_info { uint32_t write_block_size; uint32_t erase_block_size; uint32_t protect_block_size; -} __packed; +} __ec_align4; /* * Flags for version 1+ flash info command @@ -929,7 +963,7 @@ struct ec_response_flash_info_1 { /* Version 1 adds these fields: */ uint32_t write_ideal_size; uint32_t flags; -} __packed; +} __ec_align4; /* * Read flash @@ -946,7 +980,7 @@ struct ec_response_flash_info_1 { struct ec_params_flash_read { uint32_t offset; uint32_t size; -} __packed; +} __ec_align4; /* Write flash */ #define EC_CMD_FLASH_WRITE 0x12 @@ -964,7 +998,7 @@ struct ec_params_flash_write { uint32_t offset; uint32_t size; /* Followed by data to write */ -} __packed; +} __ec_align4; /* Erase flash */ #define EC_CMD_FLASH_ERASE 0x13 @@ -977,7 +1011,7 @@ struct ec_params_flash_write { struct ec_params_flash_erase { uint32_t offset; uint32_t size; -} __packed; +} __ec_align4; /* * Get/set flash protection. @@ -1023,7 +1057,7 @@ struct ec_params_flash_erase { struct ec_params_flash_protect { uint32_t mask; uint32_t flags; -} __packed; +} __ec_align4; /** * struct ec_response_flash_protect - Response to the flash protect command. @@ -1038,7 +1072,7 @@ struct ec_response_flash_protect { uint32_t flags; uint32_t valid_flags; uint32_t writable_flags; -} __packed; +} __ec_align4; /* * Note: commands 0x14 - 0x19 version 0 were old commands to get/set flash @@ -1070,12 +1104,12 @@ enum ec_flash_region { */ struct ec_params_flash_region_info { uint32_t region; -} __packed; +} __ec_align4; struct ec_response_flash_region_info { uint32_t offset; uint32_t size; -} __packed; +} __ec_align4; /* Read/write VbNvContext */ #define EC_CMD_VBNV_CONTEXT 0x17 @@ -1090,11 +1124,11 @@ enum ec_vbnvcontext_op { struct ec_params_vbnvcontext { uint32_t op; uint8_t block[EC_VBNV_BLOCK_SIZE]; -} __packed; +} __ec_align4; struct ec_response_vbnvcontext { uint8_t block[EC_VBNV_BLOCK_SIZE]; -} __packed; +} __ec_align4; /*****************************************************************************/ /* PWM commands */ @@ -1104,14 +1138,14 @@ struct ec_response_vbnvcontext { struct ec_response_pwm_get_fan_rpm { uint32_t rpm; -} __packed; +} __ec_align4; /* Set target fan RPM */ -#define EC_CMD_PWM_SET_FAN_TARGET_RPM 0x21 +#define EC_CMD_PWM_SET_FAN_TARGET_RPM 0x0021 struct ec_params_pwm_set_fan_target_rpm { uint32_t rpm; -} __packed; +} __ec_align_size1; /* Get keyboard backlight */ #define EC_CMD_PWM_GET_KEYBOARD_BACKLIGHT 0x22 @@ -1119,21 +1153,21 @@ struct ec_params_pwm_set_fan_target_rpm { struct ec_response_pwm_get_keyboard_backlight { uint8_t percent; uint8_t enabled; -} __packed; +} __ec_align1; /* Set keyboard backlight */ #define EC_CMD_PWM_SET_KEYBOARD_BACKLIGHT 0x23 struct ec_params_pwm_set_keyboard_backlight { uint8_t percent; -} __packed; +} __ec_align1; /* Set target fan PWM duty cycle */ #define EC_CMD_PWM_SET_FAN_DUTY 0x24 struct ec_params_pwm_set_fan_duty { uint32_t percent; -} __packed; +} __ec_align4; #define EC_CMD_PWM_SET_DUTY 0x25 /* 16 bit duty cycle, 0xffff = 100% */ @@ -1153,18 +1187,18 @@ struct ec_params_pwm_set_duty { uint16_t duty; /* Duty cycle, EC_PWM_MAX_DUTY = 100% */ uint8_t pwm_type; /* ec_pwm_type */ uint8_t index; /* Type-specific index, or 0 if unique */ -} __packed; +} __ec_align4; #define EC_CMD_PWM_GET_DUTY 0x26 struct ec_params_pwm_get_duty { uint8_t pwm_type; /* ec_pwm_type */ uint8_t index; /* Type-specific index, or 0 if unique */ -} __packed; +} __ec_align1; struct ec_response_pwm_get_duty { uint16_t duty; /* Duty cycle, EC_PWM_MAX_DUTY = 100% */ -} __packed; +} __ec_align2; /*****************************************************************************/ /* @@ -1177,7 +1211,7 @@ struct ec_response_pwm_get_duty { struct rgb_s { uint8_t r, g, b; -}; +} __ec_todo_unpacked; #define LB_BATTERY_LEVELS 4 @@ -1217,7 +1251,7 @@ struct lightbar_params_v0 { /* Color palette */ struct rgb_s color[8]; /* 0-3 are Google colors */ -} __packed; +} __ec_todo_packed; struct lightbar_params_v1 { /* Timing */ @@ -1260,14 +1294,14 @@ struct lightbar_params_v1 { /* Color palette */ struct rgb_s color[8]; /* 0-3 are Google colors */ -} __packed; +} __ec_todo_packed; /* Lightbar program */ #define EC_LB_PROG_LEN 192 struct lightbar_program { uint8_t size; uint8_t data[EC_LB_PROG_LEN]; -}; +} __ec_todo_unpacked; struct ec_params_lightbar { uint8_t cmd; /* Command (see enum lightbar_command) */ @@ -1277,23 +1311,23 @@ struct ec_params_lightbar { } dump, off, on, init, get_seq, get_params_v0, get_params_v1, version, get_brightness, get_demo, suspend, resume; - struct { + struct __ec_todo_unpacked { uint8_t num; } set_brightness, seq, demo; - struct { + struct __ec_todo_unpacked { uint8_t ctrl, reg, value; } reg; - struct { + struct __ec_todo_unpacked { uint8_t led, red, green, blue; } set_rgb; - struct { + struct __ec_todo_unpacked { uint8_t led; } get_rgb; - struct { + struct __ec_todo_unpacked { uint8_t enable; } manual_suspend_ctrl; @@ -1301,31 +1335,31 @@ struct ec_params_lightbar { struct lightbar_params_v1 set_params_v1; struct lightbar_program set_program; }; -} __packed; +} __ec_todo_packed; struct ec_response_lightbar { union { - struct { - struct { + struct __ec_todo_unpacked { + struct __ec_todo_unpacked { uint8_t reg; uint8_t ic0; uint8_t ic1; } vals[23]; } dump; - struct { + struct __ec_todo_unpacked { uint8_t num; } get_seq, get_brightness, get_demo; struct lightbar_params_v0 get_params_v0; struct lightbar_params_v1 get_params_v1; - struct { + struct __ec_todo_unpacked { uint32_t num; uint32_t flags; } version; - struct { + struct __ec_todo_unpacked { uint8_t red, green, blue; } get_rgb; @@ -1335,7 +1369,7 @@ struct ec_response_lightbar { demo, set_params_v0, set_params_v1, set_program, manual_suspend_ctrl, suspend, resume; }; -} __packed; +} __ec_todo_packed; /* Lightbar commands */ enum lightbar_command { @@ -1402,7 +1436,7 @@ struct ec_params_led_control { uint8_t flags; /* Control flags */ uint8_t brightness[EC_LED_COLOR_COUNT]; -} __packed; +} __ec_align1; struct ec_response_led_control { /* @@ -1413,7 +1447,7 @@ struct ec_response_led_control { * Other values means the LED is control by PWM. */ uint8_t brightness_range[EC_LED_COLOR_COUNT]; -} __packed; +} __ec_align1; /*****************************************************************************/ /* Verified boot commands */ @@ -1434,7 +1468,7 @@ struct ec_params_vboot_hash { uint32_t offset; /* Offset in flash to hash */ uint32_t size; /* Number of bytes to hash */ uint8_t nonce_data[64]; /* Nonce data; ignored if nonce_size=0 */ -} __packed; +} __ec_align4; struct ec_response_vboot_hash { uint8_t status; /* enum ec_vboot_hash_status */ @@ -1444,7 +1478,7 @@ struct ec_response_vboot_hash { uint32_t offset; /* Offset in flash which was hashed */ uint32_t size; /* Number of bytes hashed */ uint8_t hash_digest[64]; /* Hash digest data */ -} __packed; +} __ec_align4; enum ec_vboot_hash_cmd { EC_VBOOT_HASH_GET = 0, /* Get current hash status */ @@ -1604,23 +1638,23 @@ struct ec_response_motion_sensor_data { /* Each sensor is up to 3-axis. */ union { int16_t data[3]; - struct { + struct __ec_todo_packed { uint16_t reserved; uint32_t timestamp; - } __packed; - struct { + }; + struct __ec_todo_unpacked { uint8_t activity; /* motionsensor_activity */ uint8_t state; int16_t add_info[2]; }; }; -} __packed; +} __ec_todo_packed; struct ec_params_motion_sense { uint8_t cmd; union { /* Used for MOTIONSENSE_CMD_DUMP. */ - struct { + struct __ec_todo_unpacked { /* no args */ } dump; @@ -1628,13 +1662,13 @@ struct ec_params_motion_sense { * Used for MOTIONSENSE_CMD_EC_RATE and * MOTIONSENSE_CMD_KB_WAKE_ANGLE. */ - struct { + struct __ec_todo_unpacked { /* Data to set or EC_MOTION_SENSE_NO_VALUE to read. */ int16_t data; } ec_rate, kb_wake_angle; /* Used for MOTIONSENSE_CMD_SENSOR_OFFSET */ - struct { + struct __ec_todo_packed { uint8_t sensor_num; /* @@ -1660,10 +1694,10 @@ struct ec_params_motion_sense { * Compass: 1/16 uT */ int16_t offset[3]; - } __packed sensor_offset; + } sensor_offset; /* Used for MOTIONSENSE_CMD_INFO. */ - struct { + struct __ec_todo_packed { uint8_t sensor_num; } info; @@ -1684,12 +1718,12 @@ struct ec_params_motion_sense { int32_t data; } sensor_odr, sensor_range; }; -} __packed; +} __ec_todo_packed; struct ec_response_motion_sense { union { /* Used for MOTIONSENSE_CMD_DUMP. */ - struct { + struct __ec_todo_unpacked { /* Flags representing the motion sensor module. */ uint8_t module_flags; @@ -1704,7 +1738,7 @@ struct ec_response_motion_sense { } dump; /* Used for MOTIONSENSE_CMD_INFO. */ - struct { + struct __ec_todo_unpacked { /* Should be element of enum motionsensor_type. */ uint8_t type; @@ -1723,18 +1757,18 @@ struct ec_response_motion_sense { * MOTIONSENSE_CMD_SENSOR_RANGE, and * MOTIONSENSE_CMD_KB_WAKE_ANGLE. */ - struct { + struct __ec_todo_unpacked { /* Current value of the parameter queried. */ int32_t ret; } ec_rate, sensor_odr, sensor_range, kb_wake_angle; /* Used for MOTIONSENSE_CMD_SENSOR_OFFSET */ - struct { + struct __ec_todo_unpacked { int16_t temp; int16_t offset[3]; } sensor_offset, perform_calib; }; -} __packed; +} __ec_todo_packed; /*****************************************************************************/ /* USB charging control commands */ @@ -1745,7 +1779,7 @@ struct ec_response_motion_sense { struct ec_params_usb_charge_set_mode { uint8_t usb_port_id; uint8_t mode; -} __packed; +} __ec_align1; /*****************************************************************************/ /* Persistent storage for host */ @@ -1761,7 +1795,7 @@ struct ec_response_pstore_info { uint32_t pstore_size; /* Access size; read/write offset and size must be a multiple of this */ uint32_t access_size; -} __packed; +} __ec_align4; /* * Read persistent storage @@ -1773,7 +1807,7 @@ struct ec_response_pstore_info { struct ec_params_pstore_read { uint32_t offset; /* Byte offset to read */ uint32_t size; /* Size to read in bytes */ -} __packed; +} __ec_align4; /* Write persistent storage */ #define EC_CMD_PSTORE_WRITE 0x42 @@ -1782,7 +1816,7 @@ struct ec_params_pstore_write { uint32_t offset; /* Byte offset to write */ uint32_t size; /* Size to write in bytes */ uint8_t data[EC_PSTORE_SIZE_MAX]; -} __packed; +} __ec_align4; /*****************************************************************************/ /* Real-time clock */ @@ -1790,11 +1824,11 @@ struct ec_params_pstore_write { /* RTC params and response structures */ struct ec_params_rtc { uint32_t time; -} __packed; +} __ec_align4; struct ec_response_rtc { uint32_t time; -} __packed; +} __ec_align4; /* These use ec_response_rtc */ #define EC_CMD_RTC_GET_VALUE 0x44 @@ -1825,29 +1859,29 @@ enum ec_port80_subcmd { struct ec_params_port80_read { uint16_t subcmd; union { - struct { + struct __ec_todo_unpacked { uint32_t offset; uint32_t num_entries; } read_buffer; }; -} __packed; +} __ec_todo_packed; struct ec_response_port80_read { union { - struct { + struct __ec_todo_unpacked { uint32_t writes; uint32_t history_size; uint32_t last_boot; } get_info; - struct { + struct __ec_todo_unpacked { uint16_t codes[EC_PORT80_SIZE_MAX]; } data; }; -} __packed; +} __ec_todo_packed; struct ec_response_port80_last_boot { uint16_t code; -} __packed; +} __ec_align2; /*****************************************************************************/ /* Thermal engine commands. Note that there are two implementations. We'll @@ -1868,17 +1902,17 @@ struct ec_params_thermal_set_threshold { uint8_t sensor_type; uint8_t threshold_id; uint16_t value; -} __packed; +} __ec_align2; /* Version 0 - get */ struct ec_params_thermal_get_threshold { uint8_t sensor_type; uint8_t threshold_id; -} __packed; +} __ec_align1; struct ec_response_thermal_get_threshold { uint16_t value; -} __packed; +} __ec_align2; /* The version 1 structs are visible. */ @@ -1898,12 +1932,12 @@ struct ec_thermal_config { uint32_t temp_host[EC_TEMP_THRESH_COUNT]; /* levels of hotness */ uint32_t temp_fan_off; /* no active cooling needed */ uint32_t temp_fan_max; /* max active cooling needed */ -} __packed; +} __ec_align4; /* Version 1 - get config for one sensor. */ struct ec_params_thermal_get_threshold_v1 { uint32_t sensor_num; -} __packed; +} __ec_align4; /* This returns a struct ec_thermal_config */ /* @@ -1913,7 +1947,7 @@ struct ec_params_thermal_get_threshold_v1 { struct ec_params_thermal_set_threshold_v1 { uint32_t sensor_num; struct ec_thermal_config cfg; -} __packed; +} __ec_align4; /* This returns no data */ /****************************************************************************/ @@ -1926,14 +1960,14 @@ struct ec_params_thermal_set_threshold_v1 { struct ec_params_tmp006_get_calibration { uint8_t index; -} __packed; +} __ec_align1; struct ec_response_tmp006_get_calibration { float s0; float b0; float b1; float b2; -} __packed; +} __ec_align4; /* Set TMP006 calibration data */ #define EC_CMD_TMP006_SET_CALIBRATION 0x54 @@ -1945,19 +1979,19 @@ struct ec_params_tmp006_set_calibration { float b0; float b1; float b2; -} __packed; +} __ec_align4; /* Read raw TMP006 data */ #define EC_CMD_TMP006_GET_RAW 0x55 struct ec_params_tmp006_get_raw { uint8_t index; -} __packed; +} __ec_align1; struct ec_response_tmp006_get_raw { int32_t t; /* In 1/100 K */ int32_t v; /* In nV */ -}; +} __ec_align4; /*****************************************************************************/ /* MKBP - Matrix KeyBoard Protocol */ @@ -1984,12 +2018,12 @@ struct ec_response_mkbp_info { uint32_t cols; /* Formerly "switches", which was 0. */ uint8_t reserved; -} __packed; +} __ec_align_size1; struct ec_params_mkbp_info { uint8_t info_type; uint8_t event_type; -} __packed; +} __ec_align1; enum ec_mkbp_info_type { /* @@ -2037,7 +2071,7 @@ struct ec_params_mkbp_simulate_key { uint8_t col; uint8_t row; uint8_t pressed; -} __packed; +} __ec_align1; /* Configure keyboard scanning */ #define EC_CMD_MKBP_SET_CONFIG 0x64 @@ -2083,15 +2117,15 @@ struct ec_mkbp_config { uint16_t debounce_up_us; /* time for debounce on key up */ /* maximum depth to allow for fifo (0 = no keyscan output) */ uint8_t fifo_max_depth; -} __packed; +} __ec_align_size1; struct ec_params_mkbp_set_config { struct ec_mkbp_config config; -} __packed; +} __ec_align_size1; struct ec_response_mkbp_get_config { struct ec_mkbp_config config; -} __packed; +} __ec_align_size1; /* Run the key scan emulation */ #define EC_CMD_KEYSCAN_SEQ_CTRL 0x66 @@ -2114,18 +2148,18 @@ enum ec_collect_flags { struct ec_collect_item { uint8_t flags; /* some flags (enum ec_collect_flags) */ -}; +} __ec_align1; struct ec_params_keyscan_seq_ctrl { uint8_t cmd; /* Command to send (enum ec_keyscan_seq_cmd) */ union { - struct { + struct __ec_align1 { uint8_t active; /* still active */ uint8_t num_items; /* number of items */ /* Current item being presented */ uint8_t cur_item; } status; - struct { + struct __ec_todo_unpacked { /* * Absolute time for this scan, measured from the * start of the sequence. @@ -2133,22 +2167,22 @@ struct ec_params_keyscan_seq_ctrl { uint32_t time_us; uint8_t scan[0]; /* keyscan data */ } add; - struct { + struct __ec_align1 { uint8_t start_item; /* First item to return */ uint8_t num_items; /* Number of items to return */ } collect; }; -} __packed; +} __ec_todo_packed; struct ec_result_keyscan_seq_ctrl { union { - struct { + struct __ec_todo_unpacked { uint8_t num_items; /* Number of items */ /* Data for each item */ struct ec_collect_item item[0]; } collect; }; -} __packed; +} __ec_todo_packed; /* * Command for retrieving the next pending MKBP event from the EC device @@ -2186,8 +2220,8 @@ enum ec_mkbp_event { EC_MKBP_EVENT_COUNT, }; -union ec_response_get_next_data { - uint8_t key_matrix[13]; +union __ec_align_offset1 ec_response_get_next_data { + uint8_t key_matrix[13]; /* Unaligned */ uint32_t host_event; @@ -2195,9 +2229,9 @@ union ec_response_get_next_data { uint32_t buttons; uint32_t switches; uint32_t sysrq; -} __packed; +}; -union ec_response_get_next_data_v1 { +union __ec_align_offset1 ec_response_get_next_data_v1 { uint8_t key_matrix[16]; uint32_t host_event; uint32_t buttons; @@ -2205,19 +2239,19 @@ union ec_response_get_next_data_v1 { uint32_t sysrq; uint32_t cec_events; uint8_t cec_message[16]; -} __packed; +}; struct ec_response_get_next_event { uint8_t event_type; /* Followed by event data if any */ union ec_response_get_next_data data; -} __packed; +} __ec_align1; struct ec_response_get_next_event_v1 { uint8_t event_type; /* Followed by event data if any */ union ec_response_get_next_data_v1 data; -} __packed; +} __ec_align1; /* Bit indices for buttons and switches.*/ /* Buttons */ @@ -2238,12 +2272,12 @@ struct ec_response_get_next_event_v1 { struct ec_params_temp_sensor_get_info { uint8_t id; -} __packed; +} __ec_align1; struct ec_response_temp_sensor_get_info { char sensor_name[32]; uint8_t sensor_type; -} __packed; +} __ec_align1; /*****************************************************************************/ @@ -2262,11 +2296,11 @@ struct ec_response_temp_sensor_get_info { */ struct ec_params_host_event_mask { uint32_t mask; -} __packed; +} __ec_align4; struct ec_response_host_event_mask { uint32_t mask; -} __packed; +} __ec_align4; /* These all use ec_response_host_event_mask */ #define EC_CMD_HOST_EVENT_GET_B 0x87 @@ -2289,7 +2323,7 @@ struct ec_response_host_event_mask { struct ec_params_switch_enable_backlight { uint8_t enabled; -} __packed; +} __ec_align1; /* Enable/disable WLAN/Bluetooth */ #define EC_CMD_SWITCH_ENABLE_WIRELESS 0x91 @@ -2298,7 +2332,7 @@ struct ec_params_switch_enable_backlight { /* Version 0 params; no response */ struct ec_params_switch_enable_wireless_v0 { uint8_t enabled; -} __packed; +} __ec_align1; /* Version 1 params */ struct ec_params_switch_enable_wireless_v1 { @@ -2317,7 +2351,7 @@ struct ec_params_switch_enable_wireless_v1 { /* Which flags to copy from suspend_flags */ uint8_t suspend_mask; -} __packed; +} __ec_align1; /* Version 1 response */ struct ec_response_switch_enable_wireless_v1 { @@ -2326,7 +2360,7 @@ struct ec_response_switch_enable_wireless_v1 { /* Flags to leave enabled in S3 */ uint8_t suspend_flags; -} __packed; +} __ec_align1; /*****************************************************************************/ /* GPIO commands. Only available on EC if write protect has been disabled. */ @@ -2337,7 +2371,7 @@ struct ec_response_switch_enable_wireless_v1 { struct ec_params_gpio_set { char name[32]; uint8_t val; -} __packed; +} __ec_align1; /* Get GPIO value */ #define EC_CMD_GPIO_GET 0x93 @@ -2345,37 +2379,37 @@ struct ec_params_gpio_set { /* Version 0 of input params and response */ struct ec_params_gpio_get { char name[32]; -} __packed; +} __ec_align1; struct ec_response_gpio_get { uint8_t val; -} __packed; +} __ec_align1; /* Version 1 of input params and response */ struct ec_params_gpio_get_v1 { uint8_t subcmd; union { - struct { + struct __ec_align1 { char name[32]; } get_value_by_name; - struct { + struct __ec_align1 { uint8_t index; } get_info; }; -} __packed; +} __ec_align1; struct ec_response_gpio_get_v1 { union { - struct { + struct __ec_align1 { uint8_t val; } get_value_by_name, get_count; - struct { + struct __ec_todo_unpacked { uint8_t val; char name[32]; uint32_t flags; } get_info; }; -} __packed; +} __ec_todo_packed; enum gpio_get_subcmd { EC_GPIO_GET_BY_NAME = 0, @@ -2401,11 +2435,11 @@ struct ec_params_i2c_read { uint8_t read_size; /* Either 8 or 16. */ uint8_t port; uint8_t offset; -} __packed; +} __ec_align_size1; struct ec_response_i2c_read { uint16_t data; -} __packed; +} __ec_align2; /* Write I2C bus */ #define EC_CMD_I2C_WRITE 0x95 @@ -2416,7 +2450,7 @@ struct ec_params_i2c_write { uint8_t write_size; /* Either 8 or 16. */ uint8_t port; uint8_t offset; -} __packed; +} __ec_align_size1; /*****************************************************************************/ /* Charge state commands. Only available when flash write protect unlocked. */ @@ -2435,7 +2469,7 @@ enum ec_charge_control_mode { struct ec_params_charge_control { uint32_t mode; /* enum charge_control_mode */ -} __packed; +} __ec_align4; /*****************************************************************************/ @@ -2463,7 +2497,7 @@ enum ec_console_read_subcmd { struct ec_params_console_read_v1 { uint8_t subcmd; /* enum ec_console_read_subcmd */ -} __packed; +} __ec_align1; /*****************************************************************************/ @@ -2481,7 +2515,7 @@ struct ec_params_console_read_v1 { struct ec_params_battery_cutoff { uint8_t flags; -} __packed; +} __ec_align1; /*****************************************************************************/ /* USB port mux control. */ @@ -2493,7 +2527,7 @@ struct ec_params_battery_cutoff { struct ec_params_usb_mux { uint8_t mux; -} __packed; +} __ec_align1; /*****************************************************************************/ /* LDOs / FETs control. */ @@ -2511,7 +2545,7 @@ enum ec_ldo_state { struct ec_params_ldo_set { uint8_t index; uint8_t state; -} __packed; +} __ec_align1; /* * Get LDO state. @@ -2520,11 +2554,11 @@ struct ec_params_ldo_set { struct ec_params_ldo_get { uint8_t index; -} __packed; +} __ec_align1; struct ec_response_ldo_get { uint8_t state; -} __packed; +} __ec_align1; /*****************************************************************************/ /* Power info. */ @@ -2540,7 +2574,7 @@ struct ec_response_power_info { uint16_t voltage_system; uint16_t current_system; uint16_t usb_current_limit; -} __packed; +} __ec_align4; /*****************************************************************************/ /* I2C passthru command */ @@ -2562,20 +2596,20 @@ struct ec_response_power_info { struct ec_params_i2c_passthru_msg { uint16_t addr_flags; /* I2C slave address (7 or 10 bits) and flags */ uint16_t len; /* Number of bytes to read or write */ -} __packed; +} __ec_align2; struct ec_params_i2c_passthru { uint8_t port; /* I2C port number */ uint8_t num_msgs; /* Number of messages */ struct ec_params_i2c_passthru_msg msg[]; /* Data to write for all messages is concatenated here */ -} __packed; +} __ec_align2; struct ec_response_i2c_passthru { uint8_t i2c_status; /* Status flags (EC_I2C_STATUS_...) */ uint8_t num_msgs; /* Number of messages processed */ uint8_t data[]; /* Data read by messages concatenated here */ -} __packed; +} __ec_align1; /*****************************************************************************/ /* Power button hang detect */ @@ -2630,7 +2664,7 @@ struct ec_params_hang_detect { /* Timeout in msec before generating warm reboot, if enabled */ uint16_t warm_reboot_timeout_msec; -} __packed; +} __ec_align4; /*****************************************************************************/ /* Commands for battery charging */ @@ -2676,20 +2710,20 @@ struct ec_params_charge_state { /* no args */ } get_state; - struct { + struct __ec_todo_unpacked { uint32_t param; /* enum charge_state_param */ } get_param; - struct { + struct __ec_todo_unpacked { uint32_t param; /* param to set */ uint32_t value; /* value to set */ } set_param; }; -} __packed; +} __ec_todo_packed; struct ec_response_charge_state { union { - struct { + struct __ec_align4 { int ac; int chg_voltage; int chg_current; @@ -2697,14 +2731,14 @@ struct ec_response_charge_state { int batt_state_of_charge; } get_state; - struct { + struct __ec_align4 { uint32_t value; } get_param; struct { /* no return values */ } set_param; }; -} __packed; +} __ec_align4; /* @@ -2714,7 +2748,7 @@ struct ec_response_charge_state { struct ec_params_current_limit { uint32_t limit; /* in mA */ -} __packed; +} __ec_align4; /* * Set maximum external voltage / current. @@ -2725,7 +2759,7 @@ struct ec_params_current_limit { struct ec_params_external_power_limit_v1 { uint16_t current_lim; /* in mA, or EC_POWER_LIMIT_NONE to clear limit */ uint16_t voltage_lim; /* in mV, or EC_POWER_LIMIT_NONE to clear limit */ -} __packed; +} __ec_align2; #define EC_POWER_LIMIT_NONE 0xffff @@ -2741,7 +2775,7 @@ enum host_sleep_event { struct ec_params_host_sleep_event { uint8_t sleep_event; -} __packed; +} __ec_align1; /*****************************************************************************/ /* Smart battery pass-through */ @@ -2758,25 +2792,25 @@ struct ec_params_host_sleep_event { struct ec_params_sb_rd { uint8_t reg; -} __packed; +} __ec_align1; struct ec_response_sb_rd_word { uint16_t value; -} __packed; +} __ec_align2; struct ec_params_sb_wr_word { uint8_t reg; uint16_t value; -} __packed; +} __ec_align1; struct ec_response_sb_rd_block { uint8_t data[32]; -} __packed; +} __ec_align1; struct ec_params_sb_wr_block { uint8_t reg; uint16_t data[32]; -} __packed; +} __ec_align1; /*****************************************************************************/ /* Battery vendor parameters @@ -2798,11 +2832,11 @@ struct ec_params_battery_vendor_param { uint32_t param; uint32_t value; uint8_t mode; -} __packed; +} __ec_align_size1; struct ec_response_battery_vendor_param { uint32_t value; -} __packed; +} __ec_align4; /*****************************************************************************/ /* Commands for I2S recording on audio codec. */ @@ -2833,7 +2867,7 @@ enum ec_i2s_config { EC_DAI_FMT_PCM_TDM = 5, }; -struct ec_param_codec_i2s { +struct __ec_todo_packed ec_param_codec_i2s { /* enum ec_codec_i2s_subcmd */ uint8_t cmd; union { @@ -2847,10 +2881,10 @@ struct ec_param_codec_i2s { * EC_CODEC_SET_GAIN * Value should be 0~43 for both channels. */ - struct ec_param_codec_i2s_set_gain { + struct __ec_align1 ec_param_codec_i2s_set_gain { uint8_t left; uint8_t right; - } __packed gain; + } gain; /* * EC_CODEC_I2S_ENABLE @@ -2868,7 +2902,7 @@ struct ec_param_codec_i2s { * EC_CODEC_I2S_SET_TDM_CONFIG * Value should be one of ec_i2s_config. */ - struct ec_param_codec_i2s_tdm { + struct __ec_todo_unpacked ec_param_codec_i2s_tdm { /* * 0 to 496 */ @@ -2879,14 +2913,14 @@ struct ec_param_codec_i2s { int16_t ch1_delay; uint8_t adjacent_to_ch0; uint8_t adjacent_to_ch1; - } __packed tdm_param; + } tdm_param; /* * EC_CODEC_I2S_SET_BCLK */ uint32_t bclk; }; -} __packed; +}; /* * For subcommand EC_CODEC_GET_GAIN. @@ -2894,7 +2928,7 @@ struct ec_param_codec_i2s { struct ec_response_codec_gain { uint8_t left; uint8_t right; -} __packed; +} __ec_align1; /*****************************************************************************/ /* System commands */ @@ -2923,7 +2957,7 @@ enum ec_reboot_cmd { struct ec_params_reboot_ec { uint8_t cmd; /* enum ec_reboot_cmd */ uint8_t flags; /* See EC_REBOOT_FLAG_* */ -} __packed; +} __ec_align1; /* * Get information on last EC panic. @@ -3066,7 +3100,7 @@ struct ec_params_reboot_ec { */ struct ec_params_cec_write { uint8_t msg[EC_MAX_CEC_MSG_LEN]; -} __packed; +} __ec_align1; /* Set various CEC parameters */ #define EC_CMD_CEC_SET 0x00BA @@ -3082,7 +3116,7 @@ struct ec_params_cec_write { struct ec_params_cec_set { uint8_t cmd; /* enum cec_command */ uint8_t val; -} __packed; +} __ec_align1; /* Read various CEC parameters */ #define EC_CMD_CEC_GET 0x00BB @@ -3093,7 +3127,7 @@ struct ec_params_cec_set { */ struct ec_params_cec_get { uint8_t cmd; /* enum cec_command */ -} __packed; +} __ec_align1; /** * struct ec_response_cec_get - CEC parameters get response @@ -3104,7 +3138,7 @@ struct ec_params_cec_get { */ struct ec_response_cec_get { uint8_t val; -} __packed; +} __ec_align1; /* CEC parameters command */ enum ec_cec_command { @@ -3177,13 +3211,13 @@ enum mkbp_cec_event { /* Status of EC being sent to PD */ struct ec_params_pd_status { int8_t batt_soc; /* battery state of charge */ -} __packed; +} __ec_align1; /* Status of PD being sent back to EC */ struct ec_response_pd_status { int8_t status; /* PD MCU status */ uint32_t curr_lim_ma; /* input current limit */ -} __packed; +} __ec_align_size1; /* Set USB type-C port role and muxes */ #define EC_CMD_USB_PD_CONTROL 0x101 @@ -3218,7 +3252,7 @@ struct ec_params_usb_pd_control { uint8_t role; uint8_t mux; uint8_t swap; -} __packed; +} __ec_align1; #define PD_CTRL_RESP_ENABLED_COMMS (1 << 0) /* Communication enabled */ #define PD_CTRL_RESP_ENABLED_CONNECTED (1 << 1) /* Device connected */ @@ -3237,7 +3271,7 @@ struct ec_response_usb_pd_control_v1 { uint8_t role; uint8_t polarity; char state[32]; -} __packed; +} __ec_align1; #define EC_CMD_USB_PD_PORTS 0x102 @@ -3246,14 +3280,14 @@ struct ec_response_usb_pd_control_v1 { struct ec_response_usb_pd_ports { uint8_t num_ports; -} __packed; +} __ec_align1; #define EC_CMD_USB_PD_POWER_INFO 0x103 #define PD_POWER_CHARGING_PORT 0xff struct ec_params_usb_pd_power_info { uint8_t port; -} __packed; +} __ec_align1; enum usb_chg_type { USB_CHG_TYPE_NONE, @@ -3279,7 +3313,7 @@ struct usb_chg_measures { uint16_t voltage_now; uint16_t current_max; uint16_t current_lim; -} __packed; +} __ec_align2; struct ec_response_usb_pd_power_info { uint8_t role; @@ -3288,11 +3322,11 @@ struct ec_response_usb_pd_power_info { uint8_t reserved1; struct usb_chg_measures meas; uint32_t max_power; -} __packed; +} __ec_align4; struct ec_params_usb_pd_info_request { uint8_t port; -} __packed; +} __ec_align1; /* * This command will return the number of USB PD charge port + the number @@ -3302,7 +3336,7 @@ struct ec_params_usb_pd_info_request { #define EC_CMD_CHARGE_PORT_COUNT 0x0105 struct ec_response_charge_port_count { uint8_t port_count; -} __packed; +} __ec_align1; /* Read USB-PD Device discovery info */ #define EC_CMD_USB_PD_DISCOVERY 0x0113 @@ -3310,7 +3344,7 @@ struct ec_params_usb_pd_discovery_entry { uint16_t vid; /* USB-IF VID */ uint16_t pid; /* USB-IF PID */ uint8_t ptype; /* product type (hub,periph,cable,ama) */ -} __packed; +} __ec_align_size1; /* Override default charge behavior */ #define EC_CMD_PD_CHARGE_PORT_OVERRIDE 0x0114 @@ -3324,7 +3358,7 @@ enum usb_pd_override_ports { struct ec_params_charge_port_override { int16_t override_port; /* Override port# */ -} __packed; +} __ec_align2; /* Read (and delete) one entry of PD event log */ #define EC_CMD_PD_GET_LOG_ENTRY 0x0115 @@ -3335,7 +3369,7 @@ struct ec_response_pd_log { uint8_t size_port; /* [7:5] port number [4:0] payload size in bytes */ uint16_t data; /* type-defined data payload */ uint8_t payload[0]; /* optional additional data payload: 0..16 bytes */ -} __packed; +} __ec_align4; /* The timestamp is the microsecond counter shifted to get about a ms. */ #define PD_LOG_TIMESTAMP_SHIFT 10 /* 1 LSB = 1024us */ @@ -3401,14 +3435,14 @@ struct mcdp_version { uint8_t major; uint8_t minor; uint16_t build; -} __packed; +} __ec_align4; struct mcdp_info { uint8_t family[2]; uint8_t chipid[2]; struct mcdp_version irom; struct mcdp_version fw; -} __packed; +} __ec_align4; /* struct mcdp_info field decoding */ #define MCDP_CHIPID(chipid) ((chipid[0] << 8) | chipid[1]) @@ -3419,7 +3453,7 @@ struct mcdp_info { struct ec_params_usb_pd_mux_info { uint8_t port; /* USB-C port number */ -} __packed; +} __ec_align1; /* Flags representing mux state */ #define USB_PD_MUX_USB_ENABLED (1 << 0) @@ -3429,7 +3463,7 @@ struct ec_params_usb_pd_mux_info { struct ec_response_usb_pd_mux_info { uint8_t flags; /* USB_PD_MUX_*-encoded USB mux state */ -} __packed; +} __ec_align1; /*****************************************************************************/ /* From patchwork Fri May 3 22:02:08 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gwendal Grignou X-Patchwork-Id: 10929251 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 52010912 for ; Fri, 3 May 2019 22:02:55 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 40DA8287D1 for ; Fri, 3 May 2019 22:02:55 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 34D03287DA; Fri, 3 May 2019 22:02:55 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9ABE8287D1 for ; Fri, 3 May 2019 22:02:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726735AbfECWCx (ORCPT ); Fri, 3 May 2019 18:02:53 -0400 Received: from mail-pg1-f194.google.com ([209.85.215.194]:40882 "EHLO mail-pg1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726604AbfECWCx (ORCPT ); Fri, 3 May 2019 18:02:53 -0400 Received: by mail-pg1-f194.google.com with SMTP id d31so3338756pgl.7 for ; Fri, 03 May 2019 15:02:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=wEhlFb3dFnzU517PiBEBYSzb6stIcz3WDrkwwMNroz0=; b=mX7YHQyTXsKdvNygLFHPsCS9SBVPOqk5ocoYjr7BQ3l7jtadYqGrraR7cr+sjz+mCF HMiiEYzlCumMIXXYCpb2ChrCkeprbLVFrYOBzF0RUZx4upXVMQJ+B8euWSwMwNl4fCoT gpJLa1XgqP9ZQqwpHk2x3kUBxgCo7P5zYaauo= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=wEhlFb3dFnzU517PiBEBYSzb6stIcz3WDrkwwMNroz0=; b=HkxTc9+MS/eV4xWE+wgwMr3KUW/ZNP88+67c0168C2+H46TM/wui8yjCJPVK37n7Hs VnErdiGmsIcQCN87KhgMZn6keAD+kqddI97HAC58UWaHvzJ0NMptFYd6AxTQtxJzcHvj deTGHpU7pnHNzX69PXXLr+lztggf5NbbxWVscDZqF1xgWmYGf8CqvqKI0y2BUSRnORE2 4tGPxqEI2nn9bA3JHT76bfr6AHzLz3SCt8hboUKJ5DOhVrzBMGQXqk1mlpXxbQmz0Y5U FDBevdLMO4goHciOGyP6SZJ4ISxirZDFszFefb1XL/jqHyK0VQ0HoYyTD8SUGbbj1fc+ FjIQ== X-Gm-Message-State: APjAAAW6ZQKbUMv//sspCk8Zw2m9fQYfhGkkS8g5njKlbXrSsf6IzhXA moQ7MT6NwcKJ/d1MS1XTN4b8fQ== X-Google-Smtp-Source: APXvYqzVHV13Imyl6DnjBh2QWPJJmHboFQ+AdcX397TeZbFhUyD0kZw1+O3lC6ViTLg1dPCt/2sstg== X-Received: by 2002:a63:5742:: with SMTP id h2mr13701150pgm.194.1556920971744; Fri, 03 May 2019 15:02:51 -0700 (PDT) Received: from localhost ([2620:15c:202:1:3c8f:512b:3522:dfaf]) by smtp.gmail.com with ESMTPSA id f14sm6176366pgj.24.2019.05.03.15.02.50 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 03 May 2019 15:02:51 -0700 (PDT) From: Gwendal Grignou To: enric.balletbo@collabora.com, bleung@chromium.org, groeck@chromium.org, lee.jones@linaro.org, jic23@kernel.org, broonie@kernel.org, cychiang@chromium.org, tiwai@suse.com Cc: linux-iio@vger.kernel.org, alsa-devel@alsa-project.org, Gwendal Grignou Subject: [PATCH v2 05/30] mfd: cros_ec: Define commands as 4-digit UPPER CASE hex values Date: Fri, 3 May 2019 15:02:08 -0700 Message-Id: <20190503220233.64546-6-gwendal@chromium.org> X-Mailer: git-send-email 2.21.0.1020.gf2820cf01a-goog In-Reply-To: <20190503220233.64546-1-gwendal@chromium.org> References: <20190503220233.64546-1-gwendal@chromium.org> MIME-Version: 1.0 Sender: linux-iio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This change is required for compilation of embedded controller firmware to work properly (See CONFIG_HOSTCMD_SECTION_SORTED). Acked-by: Enric Balletbo i Serra Signed-off-by: Gwendal Grignou --- include/linux/mfd/cros_ec_commands.h | 235 ++++++++++++++++----------- 1 file changed, 136 insertions(+), 99 deletions(-) diff --git a/include/linux/mfd/cros_ec_commands.h b/include/linux/mfd/cros_ec_commands.h index e0f6e9d9f587..735d4f8ce09d 100644 --- a/include/linux/mfd/cros_ec_commands.h +++ b/include/linux/mfd/cros_ec_commands.h @@ -553,6 +553,9 @@ struct ec_host_response { * Parameter/response length is implicit in the structs. Some underlying * communication protocols (I2C, SPI) may add length or checksum headers, but * those are implementation-dependent and not defined here. + * + * All commands MUST be #defined to be 4-digit UPPER CASE hex values + * (e.g., 0x00AB, not 0xab) for CONFIG_HOSTCMD_SECTION_SORTED to work. */ /*****************************************************************************/ @@ -562,7 +565,7 @@ struct ec_host_response { * Get protocol version, used to deal with non-backward compatible protocol * changes. */ -#define EC_CMD_PROTO_VERSION 0x00 +#define EC_CMD_PROTO_VERSION 0x0000 /** * struct ec_response_proto_version - Response to the proto version command. @@ -576,7 +579,7 @@ struct ec_response_proto_version { * Hello. This is a simple command to test the EC is responsive to * commands. */ -#define EC_CMD_HELLO 0x01 +#define EC_CMD_HELLO 0x0001 /** * struct ec_params_hello - Parameters to the hello command. @@ -595,7 +598,7 @@ struct ec_response_hello { } __ec_align4; /* Get version number */ -#define EC_CMD_GET_VERSION 0x02 +#define EC_CMD_GET_VERSION 0x0002 enum ec_current_image { EC_IMAGE_UNKNOWN = 0, @@ -618,7 +621,7 @@ struct ec_response_get_version { } __ec_align4; /* Read test */ -#define EC_CMD_READ_TEST 0x03 +#define EC_CMD_READ_TEST 0x0003 /** * struct ec_params_read_test - Parameters for the read test command. @@ -643,10 +646,10 @@ struct ec_response_read_test { * * Response is null-terminated string. */ -#define EC_CMD_GET_BUILD_INFO 0x04 +#define EC_CMD_GET_BUILD_INFO 0x0004 /* Get chip info */ -#define EC_CMD_GET_CHIP_INFO 0x05 +#define EC_CMD_GET_CHIP_INFO 0x0005 /** * struct ec_response_get_chip_info - Response to the get chip info command. @@ -661,7 +664,7 @@ struct ec_response_get_chip_info { } __ec_align4; /* Get board HW version */ -#define EC_CMD_GET_BOARD_VERSION 0x06 +#define EC_CMD_GET_BOARD_VERSION 0x0006 /** * struct ec_response_board_version - Response to the board version command. @@ -679,7 +682,7 @@ struct ec_response_board_version { * * Response is params.size bytes of data. */ -#define EC_CMD_READ_MEMMAP 0x07 +#define EC_CMD_READ_MEMMAP 0x0007 /** * struct ec_params_read_memmap - Parameters for the read memory map command. @@ -692,7 +695,7 @@ struct ec_params_read_memmap { } __ec_align1; /* Read versions supported for a command */ -#define EC_CMD_GET_CMD_VERSIONS 0x08 +#define EC_CMD_GET_CMD_VERSIONS 0x0008 /** * struct ec_params_get_cmd_versions - Parameters for the get command versions. @@ -727,7 +730,7 @@ struct ec_response_get_cmd_versions { * lpc must read the status from the command register. Attempting this on * lpc will overwrite the args/parameter space and corrupt its data. */ -#define EC_CMD_GET_COMMS_STATUS 0x09 +#define EC_CMD_GET_COMMS_STATUS 0x0009 /* Avoid using ec_status which is for return values */ enum ec_comms_status { @@ -744,7 +747,7 @@ struct ec_response_get_comms_status { } __ec_align4; /* Fake a variety of responses, purely for testing purposes. */ -#define EC_CMD_TEST_PROTOCOL 0x0a +#define EC_CMD_TEST_PROTOCOL 0x000A /* Tell the EC what to send back to us. */ struct ec_params_test_protocol { @@ -759,7 +762,7 @@ struct ec_response_test_protocol { } __ec_align4; /* Get protocol information */ -#define EC_CMD_GET_PROTOCOL_INFO 0x0b +#define EC_CMD_GET_PROTOCOL_INFO 0x000B /* Flags for ec_response_get_protocol_info.flags */ /* EC_RES_IN_PROGRESS may be returned if a command is slow */ @@ -805,11 +808,11 @@ struct ec_response_get_set_value { } __ec_align4; /* More than one command can use these structs to get/set parameters. */ -#define EC_CMD_GSV_PAUSE_IN_S5 0x0c +#define EC_CMD_GSV_PAUSE_IN_S5 0x000C /*****************************************************************************/ /* List the features supported by the firmware */ -#define EC_CMD_GET_FEATURES 0x0d +#define EC_CMD_GET_FEATURES 0x000D /* Supported features */ enum ec_feature_code { @@ -903,7 +906,7 @@ struct ec_response_get_features { /* Flash commands */ /* Get flash info */ -#define EC_CMD_FLASH_INFO 0x10 +#define EC_CMD_FLASH_INFO 0x0010 /** * struct ec_response_flash_info - Response to the flash info command. @@ -970,7 +973,7 @@ struct ec_response_flash_info_1 { * * Response is params.size bytes of data. */ -#define EC_CMD_FLASH_READ 0x11 +#define EC_CMD_FLASH_READ 0x0011 /** * struct ec_params_flash_read - Parameters for the flash read command. @@ -983,7 +986,7 @@ struct ec_params_flash_read { } __ec_align4; /* Write flash */ -#define EC_CMD_FLASH_WRITE 0x12 +#define EC_CMD_FLASH_WRITE 0x0012 #define EC_VER_FLASH_WRITE 1 /* Version 0 of the flash command supported only 64 bytes of data */ @@ -1001,7 +1004,7 @@ struct ec_params_flash_write { } __ec_align4; /* Erase flash */ -#define EC_CMD_FLASH_ERASE 0x13 +#define EC_CMD_FLASH_ERASE 0x0013 /** * struct ec_params_flash_erase - Parameters for the flash erase command. @@ -1023,7 +1026,7 @@ struct ec_params_flash_erase { * * If mask=0, simply returns the current flags state. */ -#define EC_CMD_FLASH_PROTECT 0x15 +#define EC_CMD_FLASH_PROTECT 0x0015 #define EC_VER_FLASH_PROTECT 1 /* Command version 1 */ /* Flags for flash protection */ @@ -1080,7 +1083,7 @@ struct ec_response_flash_protect { */ /* Get the region offset/size */ -#define EC_CMD_FLASH_REGION_INFO 0x16 +#define EC_CMD_FLASH_REGION_INFO 0x0016 #define EC_VER_FLASH_REGION_INFO 1 enum ec_flash_region { @@ -1112,7 +1115,7 @@ struct ec_response_flash_region_info { } __ec_align4; /* Read/write VbNvContext */ -#define EC_CMD_VBNV_CONTEXT 0x17 +#define EC_CMD_VBNV_CONTEXT 0x0017 #define EC_VER_VBNV_CONTEXT 1 #define EC_VBNV_BLOCK_SIZE 16 @@ -1134,7 +1137,7 @@ struct ec_response_vbnvcontext { /* PWM commands */ /* Get fan target RPM */ -#define EC_CMD_PWM_GET_FAN_TARGET_RPM 0x20 +#define EC_CMD_PWM_GET_FAN_TARGET_RPM 0x0020 struct ec_response_pwm_get_fan_rpm { uint32_t rpm; @@ -1148,7 +1151,7 @@ struct ec_params_pwm_set_fan_target_rpm { } __ec_align_size1; /* Get keyboard backlight */ -#define EC_CMD_PWM_GET_KEYBOARD_BACKLIGHT 0x22 +#define EC_CMD_PWM_GET_KEYBOARD_BACKLIGHT 0x0022 struct ec_response_pwm_get_keyboard_backlight { uint8_t percent; @@ -1156,20 +1159,20 @@ struct ec_response_pwm_get_keyboard_backlight { } __ec_align1; /* Set keyboard backlight */ -#define EC_CMD_PWM_SET_KEYBOARD_BACKLIGHT 0x23 +#define EC_CMD_PWM_SET_KEYBOARD_BACKLIGHT 0x0023 struct ec_params_pwm_set_keyboard_backlight { uint8_t percent; } __ec_align1; /* Set target fan PWM duty cycle */ -#define EC_CMD_PWM_SET_FAN_DUTY 0x24 +#define EC_CMD_PWM_SET_FAN_DUTY 0x0024 struct ec_params_pwm_set_fan_duty { uint32_t percent; } __ec_align4; -#define EC_CMD_PWM_SET_DUTY 0x25 +#define EC_CMD_PWM_SET_DUTY 0x0025 /* 16 bit duty cycle, 0xffff = 100% */ #define EC_PWM_MAX_DUTY 0xffff @@ -1189,7 +1192,7 @@ struct ec_params_pwm_set_duty { uint8_t index; /* Type-specific index, or 0 if unique */ } __ec_align4; -#define EC_CMD_PWM_GET_DUTY 0x26 +#define EC_CMD_PWM_GET_DUTY 0x0026 struct ec_params_pwm_get_duty { uint8_t pwm_type; /* ec_pwm_type */ @@ -1207,7 +1210,7 @@ struct ec_response_pwm_get_duty { * into a subcommand. We'll make separate structs for subcommands with * different input args, so that we know how much to expect. */ -#define EC_CMD_LIGHTBAR_CMD 0x28 +#define EC_CMD_LIGHTBAR_CMD 0x0028 struct rgb_s { uint8_t r, g, b; @@ -1401,7 +1404,7 @@ enum lightbar_command { /*****************************************************************************/ /* LED control commands */ -#define EC_CMD_LED_CONTROL 0x29 +#define EC_CMD_LED_CONTROL 0x0029 enum ec_led_id { /* LED to indicate battery state of charge */ @@ -1458,7 +1461,7 @@ struct ec_response_led_control { */ /* Verified boot hash command */ -#define EC_CMD_VBOOT_HASH 0x2A +#define EC_CMD_VBOOT_HASH 0x002A struct ec_params_vboot_hash { uint8_t cmd; /* enum ec_vboot_hash_cmd */ @@ -1510,7 +1513,7 @@ enum ec_vboot_hash_status { * Motion sense commands. We'll make separate structs for sub-commands with * different input args, so that we know how much to expect. */ -#define EC_CMD_MOTION_SENSE_CMD 0x2B +#define EC_CMD_MOTION_SENSE_CMD 0x002B /* Motion sense commands */ enum motionsense_command { @@ -1774,7 +1777,7 @@ struct ec_response_motion_sense { /* USB charging control commands */ /* Set USB port charging mode */ -#define EC_CMD_USB_CHARGE_SET_MODE 0x30 +#define EC_CMD_USB_CHARGE_SET_MODE 0x0030 struct ec_params_usb_charge_set_mode { uint8_t usb_port_id; @@ -1788,7 +1791,7 @@ struct ec_params_usb_charge_set_mode { #define EC_PSTORE_SIZE_MAX 64 /* Get persistent storage info */ -#define EC_CMD_PSTORE_INFO 0x40 +#define EC_CMD_PSTORE_INFO 0x0040 struct ec_response_pstore_info { /* Persistent storage size, in bytes */ @@ -1802,7 +1805,7 @@ struct ec_response_pstore_info { * * Response is params.size bytes of data. */ -#define EC_CMD_PSTORE_READ 0x41 +#define EC_CMD_PSTORE_READ 0x0041 struct ec_params_pstore_read { uint32_t offset; /* Byte offset to read */ @@ -1810,7 +1813,7 @@ struct ec_params_pstore_read { } __ec_align4; /* Write persistent storage */ -#define EC_CMD_PSTORE_WRITE 0x42 +#define EC_CMD_PSTORE_WRITE 0x0042 struct ec_params_pstore_write { uint32_t offset; /* Byte offset to write */ @@ -1831,12 +1834,12 @@ struct ec_response_rtc { } __ec_align4; /* These use ec_response_rtc */ -#define EC_CMD_RTC_GET_VALUE 0x44 -#define EC_CMD_RTC_GET_ALARM 0x45 +#define EC_CMD_RTC_GET_VALUE 0x0044 +#define EC_CMD_RTC_GET_ALARM 0x0045 /* These all use ec_params_rtc */ -#define EC_CMD_RTC_SET_VALUE 0x46 -#define EC_CMD_RTC_SET_ALARM 0x47 +#define EC_CMD_RTC_SET_VALUE 0x0046 +#define EC_CMD_RTC_SET_ALARM 0x0047 /* Pass as time param to SET_ALARM to clear the current alarm */ #define EC_RTC_ALARM_CLEAR 0 @@ -1848,8 +1851,8 @@ struct ec_response_rtc { #define EC_PORT80_SIZE_MAX 32 /* Get last port80 code from previous boot */ -#define EC_CMD_PORT80_LAST_BOOT 0x48 -#define EC_CMD_PORT80_READ 0x48 +#define EC_CMD_PORT80_LAST_BOOT 0x0048 +#define EC_CMD_PORT80_READ 0x0048 enum ec_port80_subcmd { EC_PORT80_GET_INFO = 0, @@ -1890,8 +1893,8 @@ struct ec_response_port80_last_boot { * Version 1 separates the CPU thermal limits from the fan control. */ -#define EC_CMD_THERMAL_SET_THRESHOLD 0x50 -#define EC_CMD_THERMAL_GET_THRESHOLD 0x51 +#define EC_CMD_THERMAL_SET_THRESHOLD 0x0050 +#define EC_CMD_THERMAL_GET_THRESHOLD 0x0051 /* The version 0 structs are opaque. You have to know what they are for * the get/set commands to make any sense. @@ -1953,10 +1956,10 @@ struct ec_params_thermal_set_threshold_v1 { /****************************************************************************/ /* Toggle automatic fan control */ -#define EC_CMD_THERMAL_AUTO_FAN_CTRL 0x52 +#define EC_CMD_THERMAL_AUTO_FAN_CTRL 0x0052 /* Get TMP006 calibration data */ -#define EC_CMD_TMP006_GET_CALIBRATION 0x53 +#define EC_CMD_TMP006_GET_CALIBRATION 0x0053 struct ec_params_tmp006_get_calibration { uint8_t index; @@ -1970,7 +1973,7 @@ struct ec_response_tmp006_get_calibration { } __ec_align4; /* Set TMP006 calibration data */ -#define EC_CMD_TMP006_SET_CALIBRATION 0x54 +#define EC_CMD_TMP006_SET_CALIBRATION 0x0054 struct ec_params_tmp006_set_calibration { uint8_t index; @@ -1982,7 +1985,7 @@ struct ec_params_tmp006_set_calibration { } __ec_align4; /* Read raw TMP006 data */ -#define EC_CMD_TMP006_GET_RAW 0x55 +#define EC_CMD_TMP006_GET_RAW 0x0055 struct ec_params_tmp006_get_raw { uint8_t index; @@ -2006,12 +2009,12 @@ struct ec_response_tmp006_get_raw { * to obtain the instantaneous state, use EC_CMD_MKBP_INFO with the type * EC_MKBP_INFO_CURRENT and event EC_MKBP_EVENT_KEY_MATRIX. */ -#define EC_CMD_MKBP_STATE 0x60 +#define EC_CMD_MKBP_STATE 0x0060 /* * Provide information about various MKBP things. See enum ec_mkbp_info_type. */ -#define EC_CMD_MKBP_INFO 0x61 +#define EC_CMD_MKBP_INFO 0x0061 struct ec_response_mkbp_info { uint32_t rows; @@ -2065,7 +2068,7 @@ enum ec_mkbp_info_type { }; /* Simulate key press */ -#define EC_CMD_MKBP_SIMULATE_KEY 0x62 +#define EC_CMD_MKBP_SIMULATE_KEY 0x0062 struct ec_params_mkbp_simulate_key { uint8_t col; @@ -2074,8 +2077,8 @@ struct ec_params_mkbp_simulate_key { } __ec_align1; /* Configure keyboard scanning */ -#define EC_CMD_MKBP_SET_CONFIG 0x64 -#define EC_CMD_MKBP_GET_CONFIG 0x65 +#define EC_CMD_MKBP_SET_CONFIG 0x0064 +#define EC_CMD_MKBP_GET_CONFIG 0x0065 /* flags */ enum mkbp_config_flags { @@ -2128,7 +2131,7 @@ struct ec_response_mkbp_get_config { } __ec_align_size1; /* Run the key scan emulation */ -#define EC_CMD_KEYSCAN_SEQ_CTRL 0x66 +#define EC_CMD_KEYSCAN_SEQ_CTRL 0x0066 enum ec_keyscan_seq_cmd { EC_KEYSCAN_SEQ_STATUS = 0, /* Get status information */ @@ -2189,7 +2192,7 @@ struct ec_result_keyscan_seq_ctrl { * * The device replies with UNAVAILABLE if there aren't any pending events. */ -#define EC_CMD_GET_NEXT_EVENT 0x67 +#define EC_CMD_GET_NEXT_EVENT 0x0067 enum ec_mkbp_event { /* Keyboard matrix changed. The event data is the new matrix state. */ @@ -2268,7 +2271,7 @@ struct ec_response_get_next_event_v1 { /* Temperature sensor commands */ /* Read temperature sensor info */ -#define EC_CMD_TEMP_SENSOR_GET_INFO 0x70 +#define EC_CMD_TEMP_SENSOR_GET_INFO 0x0070 struct ec_params_temp_sensor_get_info { uint8_t id; @@ -2303,30 +2306,30 @@ struct ec_response_host_event_mask { } __ec_align4; /* These all use ec_response_host_event_mask */ -#define EC_CMD_HOST_EVENT_GET_B 0x87 -#define EC_CMD_HOST_EVENT_GET_SMI_MASK 0x88 -#define EC_CMD_HOST_EVENT_GET_SCI_MASK 0x89 -#define EC_CMD_HOST_EVENT_GET_WAKE_MASK 0x8d +#define EC_CMD_HOST_EVENT_GET_B 0x0087 +#define EC_CMD_HOST_EVENT_GET_SMI_MASK 0x0088 +#define EC_CMD_HOST_EVENT_GET_SCI_MASK 0x0089 +#define EC_CMD_HOST_EVENT_GET_WAKE_MASK 0x008D /* These all use ec_params_host_event_mask */ -#define EC_CMD_HOST_EVENT_SET_SMI_MASK 0x8a -#define EC_CMD_HOST_EVENT_SET_SCI_MASK 0x8b -#define EC_CMD_HOST_EVENT_CLEAR 0x8c -#define EC_CMD_HOST_EVENT_SET_WAKE_MASK 0x8e -#define EC_CMD_HOST_EVENT_CLEAR_B 0x8f +#define EC_CMD_HOST_EVENT_SET_SMI_MASK 0x008A +#define EC_CMD_HOST_EVENT_SET_SCI_MASK 0x008B +#define EC_CMD_HOST_EVENT_CLEAR 0x008C +#define EC_CMD_HOST_EVENT_SET_WAKE_MASK 0x008E +#define EC_CMD_HOST_EVENT_CLEAR_B 0x008F /*****************************************************************************/ /* Switch commands */ /* Enable/disable LCD backlight */ -#define EC_CMD_SWITCH_ENABLE_BKLIGHT 0x90 +#define EC_CMD_SWITCH_ENABLE_BKLIGHT 0x0090 struct ec_params_switch_enable_backlight { uint8_t enabled; } __ec_align1; /* Enable/disable WLAN/Bluetooth */ -#define EC_CMD_SWITCH_ENABLE_WIRELESS 0x91 +#define EC_CMD_SWITCH_ENABLE_WIRELESS 0x0091 #define EC_VER_SWITCH_ENABLE_WIRELESS 1 /* Version 0 params; no response */ @@ -2366,7 +2369,7 @@ struct ec_response_switch_enable_wireless_v1 { /* GPIO commands. Only available on EC if write protect has been disabled. */ /* Set GPIO output value */ -#define EC_CMD_GPIO_SET 0x92 +#define EC_CMD_GPIO_SET 0x0092 struct ec_params_gpio_set { char name[32]; @@ -2374,7 +2377,7 @@ struct ec_params_gpio_set { } __ec_align1; /* Get GPIO value */ -#define EC_CMD_GPIO_GET 0x93 +#define EC_CMD_GPIO_GET 0x0093 /* Version 0 of input params and response */ struct ec_params_gpio_get { @@ -2428,7 +2431,7 @@ enum gpio_get_subcmd { */ /* Read I2C bus */ -#define EC_CMD_I2C_READ 0x94 +#define EC_CMD_I2C_READ 0x0094 struct ec_params_i2c_read { uint16_t addr; /* 8-bit address (7-bit shifted << 1) */ @@ -2442,7 +2445,7 @@ struct ec_response_i2c_read { } __ec_align2; /* Write I2C bus */ -#define EC_CMD_I2C_WRITE 0x95 +#define EC_CMD_I2C_WRITE 0x0095 struct ec_params_i2c_write { uint16_t data; @@ -2458,7 +2461,7 @@ struct ec_params_i2c_write { /* Force charge state machine to stop charging the battery or force it to * discharge the battery. */ -#define EC_CMD_CHARGE_CONTROL 0x96 +#define EC_CMD_CHARGE_CONTROL 0x0096 #define EC_VER_CHARGE_CONTROL 1 enum ec_charge_control_mode { @@ -2474,7 +2477,7 @@ struct ec_params_charge_control { /*****************************************************************************/ /* Snapshot console output buffer for use by EC_CMD_CONSOLE_READ. */ -#define EC_CMD_CONSOLE_SNAPSHOT 0x97 +#define EC_CMD_CONSOLE_SNAPSHOT 0x0097 /* * Read data from the saved snapshot. If the subcmd parameter is @@ -2488,7 +2491,7 @@ struct ec_params_charge_control { * Response is null-terminated string. Empty string, if there is no more * remaining output. */ -#define EC_CMD_CONSOLE_READ 0x98 +#define EC_CMD_CONSOLE_READ 0x0098 enum ec_console_read_subcmd { CONSOLE_READ_NEXT = 0, @@ -2508,8 +2511,7 @@ struct ec_params_console_read_v1 { * EC_RES_SUCCESS if the command was successful. * EC_RES_ERROR if the cut off command failed. */ - -#define EC_CMD_BATTERY_CUT_OFF 0x99 +#define EC_CMD_BATTERY_CUT_OFF 0x0099 #define EC_BATTERY_CUTOFF_FLAG_AT_SHUTDOWN (1 << 0) @@ -2523,7 +2525,7 @@ struct ec_params_battery_cutoff { /* * Switch USB mux or return to automatic switching. */ -#define EC_CMD_USB_MUX 0x9a +#define EC_CMD_USB_MUX 0x009A struct ec_params_usb_mux { uint8_t mux; @@ -2540,7 +2542,7 @@ enum ec_ldo_state { /* * Switch on/off a LDO. */ -#define EC_CMD_LDO_SET 0x9b +#define EC_CMD_LDO_SET 0x009B struct ec_params_ldo_set { uint8_t index; @@ -2550,7 +2552,7 @@ struct ec_params_ldo_set { /* * Get LDO state. */ -#define EC_CMD_LDO_GET 0x9c +#define EC_CMD_LDO_GET 0x009C struct ec_params_ldo_get { uint8_t index; @@ -2566,7 +2568,7 @@ struct ec_response_ldo_get { /* * Get power info. */ -#define EC_CMD_POWER_INFO 0x9d +#define EC_CMD_POWER_INFO 0x009D struct ec_response_power_info { uint32_t usb_dev_type; @@ -2579,7 +2581,7 @@ struct ec_response_power_info { /*****************************************************************************/ /* I2C passthru command */ -#define EC_CMD_I2C_PASSTHRU 0x9e +#define EC_CMD_I2C_PASSTHRU 0x009E /* Read data; if not present, message is a write */ #define EC_I2C_FLAG_READ (1 << 15) @@ -2614,7 +2616,7 @@ struct ec_response_i2c_passthru { /*****************************************************************************/ /* Power button hang detect */ -#define EC_CMD_HANG_DETECT 0x9f +#define EC_CMD_HANG_DETECT 0x009F /* Reasons to start hang detection timer */ /* Power button pressed */ @@ -2673,7 +2675,7 @@ struct ec_params_hang_detect { * This is the single catch-all host command to exchange data regarding the * charge state machine (v2 and up). */ -#define EC_CMD_CHARGE_STATE 0xa0 +#define EC_CMD_CHARGE_STATE 0x00A0 /* Subcommands for this host command */ enum charge_state_command { @@ -2744,7 +2746,7 @@ struct ec_response_charge_state { /* * Set maximum battery charging current. */ -#define EC_CMD_CHARGE_CURRENT_LIMIT 0xa1 +#define EC_CMD_CHARGE_CURRENT_LIMIT 0x00A1 struct ec_params_current_limit { uint32_t limit; /* in mA */ @@ -2764,7 +2766,7 @@ struct ec_params_external_power_limit_v1 { #define EC_POWER_LIMIT_NONE 0xffff /* Inform the EC when entering a sleep state */ -#define EC_CMD_HOST_SLEEP_EVENT 0xa9 +#define EC_CMD_HOST_SLEEP_EVENT 0x00A9 enum host_sleep_event { HOST_SLEEP_EVENT_S3_SUSPEND = 1, @@ -2781,14 +2783,14 @@ struct ec_params_host_sleep_event { /* Smart battery pass-through */ /* Get / Set 16-bit smart battery registers */ -#define EC_CMD_SB_READ_WORD 0xb0 -#define EC_CMD_SB_WRITE_WORD 0xb1 +#define EC_CMD_SB_READ_WORD 0x00B0 +#define EC_CMD_SB_WRITE_WORD 0x00B1 /* Get / Set string smart battery parameters * formatted as SMBUS "block". */ -#define EC_CMD_SB_READ_BLOCK 0xb2 -#define EC_CMD_SB_WRITE_BLOCK 0xb3 +#define EC_CMD_SB_READ_BLOCK 0x00B2 +#define EC_CMD_SB_WRITE_BLOCK 0x00B3 struct ec_params_sb_rd { uint8_t reg; @@ -2821,7 +2823,7 @@ struct ec_params_sb_wr_block { * requested value. */ -#define EC_CMD_BATTERY_VENDOR_PARAM 0xb4 +#define EC_CMD_BATTERY_VENDOR_PARAM 0x00B4 enum ec_battery_vendor_param_mode { BATTERY_VENDOR_PARAM_MODE_GET = 0, @@ -2937,7 +2939,7 @@ struct ec_response_codec_gain { * TODO(crosbug.com/p/23747): This is a confusing name, since it doesn't * necessarily reboot the EC. Rename to "image" or something similar? */ -#define EC_CMD_REBOOT_EC 0xd2 +#define EC_CMD_REBOOT_EC 0x00D2 /* Command */ enum ec_reboot_cmd { @@ -2965,7 +2967,7 @@ struct ec_params_reboot_ec { * Returns variable-length platform-dependent panic information. See panic.h * for details. */ -#define EC_CMD_GET_PANIC_INFO 0xd3 +#define EC_CMD_GET_PANIC_INFO 0x00D3 /*****************************************************************************/ /* @@ -3173,7 +3175,7 @@ enum mkbp_cec_event { * * Use EC_CMD_REBOOT_EC to reboot the EC more politely. */ -#define EC_CMD_REBOOT 0xd1 /* Think "die" */ +#define EC_CMD_REBOOT 0x00D1 /* Think "die" */ /* * Resend last response (not supported on LPC). @@ -3182,7 +3184,7 @@ enum mkbp_cec_event { * there was no previous command, or the previous command's response was too * big to save. */ -#define EC_CMD_RESEND_RESPONSE 0xdb +#define EC_CMD_RESEND_RESPONSE 0x00DB /* * This header byte on a command indicate version 0. Any header byte less @@ -3194,7 +3196,7 @@ enum mkbp_cec_event { * * The old EC interface must not use commands 0xdc or higher. */ -#define EC_CMD_VERSION0 0xdc +#define EC_CMD_VERSION0 0x00DC #endif /* !__ACPI__ */ @@ -3206,7 +3208,7 @@ enum mkbp_cec_event { */ /* EC to PD MCU exchange status command */ -#define EC_CMD_PD_EXCHANGE_STATUS 0x100 +#define EC_CMD_PD_EXCHANGE_STATUS 0x0100 /* Status of EC being sent to PD */ struct ec_params_pd_status { @@ -3220,7 +3222,7 @@ struct ec_response_pd_status { } __ec_align_size1; /* Set USB type-C port role and muxes */ -#define EC_CMD_USB_PD_CONTROL 0x101 +#define EC_CMD_USB_PD_CONTROL 0x0101 enum usb_pd_control_role { USB_PD_CTRL_ROLE_NO_CHANGE = 0, @@ -3273,7 +3275,7 @@ struct ec_response_usb_pd_control_v1 { char state[32]; } __ec_align1; -#define EC_CMD_USB_PD_PORTS 0x102 +#define EC_CMD_USB_PD_PORTS 0x0102 /* Maximum number of PD ports on a device, num_ports will be <= this */ #define EC_USB_PD_MAX_PORTS 8 @@ -3282,7 +3284,7 @@ struct ec_response_usb_pd_ports { uint8_t num_ports; } __ec_align1; -#define EC_CMD_USB_PD_POWER_INFO 0x103 +#define EC_CMD_USB_PD_POWER_INFO 0x0103 #define PD_POWER_CHARGING_PORT 0xff struct ec_params_usb_pd_power_info { @@ -3449,7 +3451,7 @@ struct mcdp_info { #define MCDP_FAMILY(family) ((family[0] << 8) | family[1]) /* Get info about USB-C SS muxes */ -#define EC_CMD_USB_PD_MUX_INFO 0x11a +#define EC_CMD_USB_PD_MUX_INFO 0x011A struct ec_params_usb_pd_mux_info { uint8_t port; /* USB-C port number */ @@ -3464,6 +3466,41 @@ struct ec_params_usb_pd_mux_info { struct ec_response_usb_pd_mux_info { uint8_t flags; /* USB_PD_MUX_*-encoded USB mux state */ } __ec_align1; +/*****************************************************************************/ +/* + * Reserve a range of host commands for board-specific, experimental, or + * special purpose features. These can be (re)used without updating this file. + * + * CAUTION: Don't go nuts with this. Shipping products should document ALL + * their EC commands for easier development, testing, debugging, and support. + * + * All commands MUST be #defined to be 4-digit UPPER CASE hex values + * (e.g., 0x00AB, not 0xab) for CONFIG_HOSTCMD_SECTION_SORTED to work. + * + * In your experimental code, you may want to do something like this: + * + * #define EC_CMD_MAGIC_FOO 0x0000 + * #define EC_CMD_MAGIC_BAR 0x0001 + * #define EC_CMD_MAGIC_HEY 0x0002 + * + * DECLARE_PRIVATE_HOST_COMMAND(EC_CMD_MAGIC_FOO, magic_foo_handler, + * EC_VER_MASK(0); + * + * DECLARE_PRIVATE_HOST_COMMAND(EC_CMD_MAGIC_BAR, magic_bar_handler, + * EC_VER_MASK(0); + * + * DECLARE_PRIVATE_HOST_COMMAND(EC_CMD_MAGIC_HEY, magic_hey_handler, + * EC_VER_MASK(0); + */ +#define EC_CMD_BOARD_SPECIFIC_BASE 0x3E00 +#define EC_CMD_BOARD_SPECIFIC_LAST 0x3FFF + +/* + * Given the private host command offset, calculate the true private host + * command value. + */ +#define EC_PRIVATE_HOST_COMMAND_VALUE(command) \ + (EC_CMD_BOARD_SPECIFIC_BASE + (command)) /*****************************************************************************/ /* From patchwork Fri May 3 22:02:09 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gwendal Grignou X-Patchwork-Id: 10929253 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 45C441390 for ; Fri, 3 May 2019 22:02:56 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 369EB287D1 for ; Fri, 3 May 2019 22:02:56 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 2AB51287DA; Fri, 3 May 2019 22:02:56 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5836C287D1 for ; Fri, 3 May 2019 22:02:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726862AbfECWCz (ORCPT ); Fri, 3 May 2019 18:02:55 -0400 Received: from mail-pl1-f196.google.com ([209.85.214.196]:45964 "EHLO mail-pl1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726604AbfECWCy (ORCPT ); Fri, 3 May 2019 18:02:54 -0400 Received: by mail-pl1-f196.google.com with SMTP id o5so3301922pls.12 for ; Fri, 03 May 2019 15:02:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=r3rCMyQRuqNEJNAJZNewCbprIO59xrVvdV6v6duMLLg=; b=B6GEnkZtf7V5O3+ShAMbO4FvWXRdQGVwVvtL6ncU0Zg/8zRl8WtgsTZ5ZlepmrfYwp slqaqHJihFE0LNTCwxmVHtrrjlhuwiKlQ1arTZekWfbMfBtLP9Ch6rAbzg3mMqj7DJNP QEoU+V71jbcy8bIxkEqRWq/ZROR2SUzy7AQw0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=r3rCMyQRuqNEJNAJZNewCbprIO59xrVvdV6v6duMLLg=; b=S0aR8ZxbMlkdMNeJffBoNpiIjanDeOvJo4ZX5p17pIjFRBfCkCbbCFRIOJ8yJjS5Eh iO40rru/O6+GHyhov/+pIorFH8d4NRRXNhfzPAx+mNWin54Qr08T/CL0hrT4GsEk/PKT 17yIzxWNI8tr50XXjJu9vSJP6Pvelng3mFDCfe1e0NZhv83gCS/QGp0CiGck9zfth7U0 88zm7yR7eCT53tno+OQY9OWxVuSNdE0DhKAC9DzcSPwJ+dFkoibhIywkszo/AdrYqxNK +saOkr8CZg166Yx5Nr4+OqTTbgJuP43ug416p5abNqreII/7PAxyY9U6oLxeC7DgYCH4 B9eQ== X-Gm-Message-State: APjAAAWY6OqyaT5jgusf0cuVncu1J02dWgr7nWHCY2b3GX5eTFkReYbE lWAwd32FPu0c97OU4Bcb6gN8Ng== X-Google-Smtp-Source: APXvYqxpmhY4wRnFjUhE/QDZC50dZN6pP5IiCdtYRL3sHZgxX7WwRdnViwZ/iI5k0jxfhPsAtv2+rA== X-Received: by 2002:a17:902:4a:: with SMTP id 68mr14093554pla.212.1556920973305; Fri, 03 May 2019 15:02:53 -0700 (PDT) Received: from localhost ([2620:15c:202:1:3c8f:512b:3522:dfaf]) by smtp.gmail.com with ESMTPSA id j2sm3800877pff.77.2019.05.03.15.02.52 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 03 May 2019 15:02:52 -0700 (PDT) From: Gwendal Grignou To: enric.balletbo@collabora.com, bleung@chromium.org, groeck@chromium.org, lee.jones@linaro.org, jic23@kernel.org, broonie@kernel.org, cychiang@chromium.org, tiwai@suse.com Cc: linux-iio@vger.kernel.org, alsa-devel@alsa-project.org, Gwendal Grignou Subject: [PATCH v2 06/30] mfd: cros_ec: use BIT macro Date: Fri, 3 May 2019 15:02:09 -0700 Message-Id: <20190503220233.64546-7-gwendal@chromium.org> X-Mailer: git-send-email 2.21.0.1020.gf2820cf01a-goog In-Reply-To: <20190503220233.64546-1-gwendal@chromium.org> References: <20190503220233.64546-1-gwendal@chromium.org> MIME-Version: 1.0 Sender: linux-iio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Replace (1 << ...) with BIT(). Acked-by: Enric Balletbo i Serra Signed-off-by: Gwendal Grignou --- include/linux/mfd/cros_ec_commands.h | 110 +++++++++++++-------------- 1 file changed, 55 insertions(+), 55 deletions(-) diff --git a/include/linux/mfd/cros_ec_commands.h b/include/linux/mfd/cros_ec_commands.h index 735d4f8ce09d..7044f459cb1d 100644 --- a/include/linux/mfd/cros_ec_commands.h +++ b/include/linux/mfd/cros_ec_commands.h @@ -28,7 +28,7 @@ #define EC_PROTO_VERSION 0x00000002 /* Command version mask */ -#define EC_VER_MASK(version) (1UL << (version)) +#define EC_VER_MASK(version) BIT(version) /* I/O addresses for ACPI commands */ #define EC_LPC_ADDR_ACPI_DATA 0x62 @@ -57,13 +57,13 @@ #define EC_HOST_CMD_REGION_SIZE 0x80 /* EC command register bit functions */ -#define EC_LPC_CMDR_DATA (1 << 0) /* Data ready for host to read */ -#define EC_LPC_CMDR_PENDING (1 << 1) /* Write pending to EC */ -#define EC_LPC_CMDR_BUSY (1 << 2) /* EC is busy processing a command */ -#define EC_LPC_CMDR_CMD (1 << 3) /* Last host write was a command */ -#define EC_LPC_CMDR_ACPI_BRST (1 << 4) /* Burst mode (not used) */ -#define EC_LPC_CMDR_SCI (1 << 5) /* SCI event is pending */ -#define EC_LPC_CMDR_SMI (1 << 6) /* SMI event is pending */ +#define EC_LPC_CMDR_DATA BIT(0) /* Data ready for host to read */ +#define EC_LPC_CMDR_PENDING BIT(1) /* Write pending to EC */ +#define EC_LPC_CMDR_BUSY BIT(2) /* EC is busy processing a command */ +#define EC_LPC_CMDR_CMD BIT(3) /* Last host write was a command */ +#define EC_LPC_CMDR_ACPI_BRST BIT(4) /* Burst mode (not used) */ +#define EC_LPC_CMDR_SCI BIT(5) /* SCI event is pending */ +#define EC_LPC_CMDR_SMI BIT(6) /* SMI event is pending */ #define EC_LPC_ADDR_MEMMAP 0x900 #define EC_MEMMAP_SIZE 255 /* ACPI IO buffer max is 255 bytes */ @@ -110,8 +110,8 @@ /* Define the format of the accelerometer mapped memory status byte. */ #define EC_MEMMAP_ACC_STATUS_SAMPLE_ID_MASK 0x0f -#define EC_MEMMAP_ACC_STATUS_BUSY_BIT (1 << 4) -#define EC_MEMMAP_ACC_STATUS_PRESENCE_BIT (1 << 7) +#define EC_MEMMAP_ACC_STATUS_BUSY_BIT BIT(4) +#define EC_MEMMAP_ACC_STATUS_PRESENCE_BIT BIT(7) /* Number of temp sensors at EC_MEMMAP_TEMP_SENSOR */ #define EC_TEMP_SENSOR_ENTRIES 16 @@ -336,7 +336,7 @@ enum host_event_code { EC_HOST_EVENT_INVALID = 32 }; /* Host event mask */ -#define EC_HOST_EVENT_MASK(event_code) (1UL << ((event_code) - 1)) +#define EC_HOST_EVENT_MASK(event_code) BIT_ULL((event_code) - 1) /** * struct ec_lpc_host_args - Arguments at EC_LPC_ADDR_HOST_ARGS @@ -734,7 +734,7 @@ struct ec_response_get_cmd_versions { /* Avoid using ec_status which is for return values */ enum ec_comms_status { - EC_COMMS_STATUS_PROCESSING = 1 << 0, /* Processing cmd */ + EC_COMMS_STATUS_PROCESSING = BIT(0), /* Processing cmd */ }; /** @@ -766,7 +766,7 @@ struct ec_response_test_protocol { /* Flags for ec_response_get_protocol_info.flags */ /* EC_RES_IN_PROGRESS may be returned if a command is slow */ -#define EC_PROTOCOL_INFO_IN_PROGRESS_SUPPORTED (1 << 0) +#define EC_PROTOCOL_INFO_IN_PROGRESS_SUPPORTED BIT(0) /** * struct ec_response_get_protocol_info - Response to the get protocol info. @@ -895,8 +895,8 @@ enum ec_feature_code { EC_FEATURE_ISH = 40, }; -#define EC_FEATURE_MASK_0(event_code) (1UL << (event_code % 32)) -#define EC_FEATURE_MASK_1(event_code) (1UL << (event_code - 32)) +#define EC_FEATURE_MASK_0(event_code) BIT(event_code % 32) +#define EC_FEATURE_MASK_1(event_code) BIT(event_code - 32) struct ec_response_get_features { uint32_t flags[2]; @@ -931,7 +931,7 @@ struct ec_response_flash_info { * Flags for version 1+ flash info command * EC flash erases bits to 0 instead of 1. */ -#define EC_FLASH_INFO_ERASE_TO_0 (1 << 0) +#define EC_FLASH_INFO_ERASE_TO_0 BIT(0) /** * struct ec_response_flash_info_1 - Response to the flash info v1 command. @@ -1031,26 +1031,26 @@ struct ec_params_flash_erase { /* Flags for flash protection */ /* RO flash code protected when the EC boots */ -#define EC_FLASH_PROTECT_RO_AT_BOOT (1 << 0) +#define EC_FLASH_PROTECT_RO_AT_BOOT BIT(0) /* * RO flash code protected now. If this bit is set, at-boot status cannot * be changed. */ -#define EC_FLASH_PROTECT_RO_NOW (1 << 1) +#define EC_FLASH_PROTECT_RO_NOW BIT(1) /* Entire flash code protected now, until reboot. */ -#define EC_FLASH_PROTECT_ALL_NOW (1 << 2) +#define EC_FLASH_PROTECT_ALL_NOW BIT(2) /* Flash write protect GPIO is asserted now */ -#define EC_FLASH_PROTECT_GPIO_ASSERTED (1 << 3) +#define EC_FLASH_PROTECT_GPIO_ASSERTED BIT(3) /* Error - at least one bank of flash is stuck locked, and cannot be unlocked */ -#define EC_FLASH_PROTECT_ERROR_STUCK (1 << 4) +#define EC_FLASH_PROTECT_ERROR_STUCK BIT(4) /* * Error - flash protection is in inconsistent state. At least one bank of * flash which should be protected is not protected. Usually fixed by * re-requesting the desired flags, or by a hard reset if that fails. */ -#define EC_FLASH_PROTECT_ERROR_INCONSISTENT (1 << 5) +#define EC_FLASH_PROTECT_ERROR_INCONSISTENT BIT(5) /* Entire flash code protected when the EC boots */ -#define EC_FLASH_PROTECT_ALL_AT_BOOT (1 << 6) +#define EC_FLASH_PROTECT_ALL_AT_BOOT BIT(6) /** * struct ec_params_flash_protect - Parameters for the flash protect command. @@ -1421,8 +1421,8 @@ enum ec_led_id { }; /* LED control flags */ -#define EC_LED_FLAGS_QUERY (1 << 0) /* Query LED capability only */ -#define EC_LED_FLAGS_AUTO (1 << 1) /* Switch LED back to automatic control */ +#define EC_LED_FLAGS_QUERY BIT(0) /* Query LED capability only */ +#define EC_LED_FLAGS_AUTO BIT(1) /* Switch LED back to automatic control */ enum ec_led_colors { EC_LED_COLOR_RED = 0, @@ -2086,13 +2086,13 @@ enum mkbp_config_flags { }; enum mkbp_config_valid { - EC_MKBP_VALID_SCAN_PERIOD = 1 << 0, - EC_MKBP_VALID_POLL_TIMEOUT = 1 << 1, - EC_MKBP_VALID_MIN_POST_SCAN_DELAY = 1 << 3, - EC_MKBP_VALID_OUTPUT_SETTLE = 1 << 4, - EC_MKBP_VALID_DEBOUNCE_DOWN = 1 << 5, - EC_MKBP_VALID_DEBOUNCE_UP = 1 << 6, - EC_MKBP_VALID_FIFO_MAX_DEPTH = 1 << 7, + EC_MKBP_VALID_SCAN_PERIOD = BIT(0), + EC_MKBP_VALID_POLL_TIMEOUT = BIT(1), + EC_MKBP_VALID_MIN_POST_SCAN_DELAY = BIT(3), + EC_MKBP_VALID_OUTPUT_SETTLE = BIT(4), + EC_MKBP_VALID_DEBOUNCE_DOWN = BIT(5), + EC_MKBP_VALID_DEBOUNCE_UP = BIT(6), + EC_MKBP_VALID_FIFO_MAX_DEPTH = BIT(7), }; /* @@ -2146,7 +2146,7 @@ enum ec_collect_flags { * Indicates this scan was processed by the EC. Due to timing, some * scans may be skipped. */ - EC_KEYSCAN_SEQ_FLAG_DONE = 1 << 0, + EC_KEYSCAN_SEQ_FLAG_DONE = BIT(0), }; struct ec_collect_item { @@ -2513,7 +2513,7 @@ struct ec_params_console_read_v1 { */ #define EC_CMD_BATTERY_CUT_OFF 0x0099 -#define EC_BATTERY_CUTOFF_FLAG_AT_SHUTDOWN (1 << 0) +#define EC_BATTERY_CUTOFF_FLAG_AT_SHUTDOWN BIT(0) struct ec_params_battery_cutoff { uint8_t flags; @@ -2584,13 +2584,13 @@ struct ec_response_power_info { #define EC_CMD_I2C_PASSTHRU 0x009E /* Read data; if not present, message is a write */ -#define EC_I2C_FLAG_READ (1 << 15) +#define EC_I2C_FLAG_READ BIT(15) /* Mask for address */ #define EC_I2C_ADDR_MASK 0x3ff -#define EC_I2C_STATUS_NAK (1 << 0) /* Transfer was not acknowledged */ -#define EC_I2C_STATUS_TIMEOUT (1 << 1) /* Timeout during transfer */ +#define EC_I2C_STATUS_NAK BIT(0) /* Transfer was not acknowledged */ +#define EC_I2C_STATUS_TIMEOUT BIT(1) /* Timeout during transfer */ /* Any error */ #define EC_I2C_STATUS_ERROR (EC_I2C_STATUS_NAK | EC_I2C_STATUS_TIMEOUT) @@ -2620,27 +2620,27 @@ struct ec_response_i2c_passthru { /* Reasons to start hang detection timer */ /* Power button pressed */ -#define EC_HANG_START_ON_POWER_PRESS (1 << 0) +#define EC_HANG_START_ON_POWER_PRESS BIT(0) /* Lid closed */ -#define EC_HANG_START_ON_LID_CLOSE (1 << 1) +#define EC_HANG_START_ON_LID_CLOSE BIT(1) /* Lid opened */ -#define EC_HANG_START_ON_LID_OPEN (1 << 2) +#define EC_HANG_START_ON_LID_OPEN BIT(2) /* Start of AP S3->S0 transition (booting or resuming from suspend) */ -#define EC_HANG_START_ON_RESUME (1 << 3) +#define EC_HANG_START_ON_RESUME BIT(3) /* Reasons to cancel hang detection */ /* Power button released */ -#define EC_HANG_STOP_ON_POWER_RELEASE (1 << 8) +#define EC_HANG_STOP_ON_POWER_RELEASE BIT(8) /* Any host command from AP received */ -#define EC_HANG_STOP_ON_HOST_COMMAND (1 << 9) +#define EC_HANG_STOP_ON_HOST_COMMAND BIT(9) /* Stop on end of AP S0->S3 transition (suspending or shutting down) */ -#define EC_HANG_STOP_ON_SUSPEND (1 << 10) +#define EC_HANG_STOP_ON_SUSPEND BIT(10) /* * If this flag is set, all the other fields are ignored, and the hang detect @@ -2648,14 +2648,14 @@ struct ec_response_i2c_passthru { * without reconfiguring any of the other hang detect settings. Note that * you must previously have configured the timeouts. */ -#define EC_HANG_START_NOW (1 << 30) +#define EC_HANG_START_NOW BIT(30) /* * If this flag is set, all the other fields are ignored (including * EC_HANG_START_NOW). This provides the AP a way to stop the hang timer * without reconfiguring any of the other hang detect settings. */ -#define EC_HANG_STOP_NOW (1 << 31) +#define EC_HANG_STOP_NOW BIT(31) struct ec_params_hang_detect { /* Flags; see EC_HANG_* */ @@ -2953,8 +2953,8 @@ enum ec_reboot_cmd { }; /* Flags for ec_params_reboot_ec.reboot_flags */ -#define EC_REBOOT_FLAG_RESERVED0 (1 << 0) /* Was recovery request */ -#define EC_REBOOT_FLAG_ON_AP_SHUTDOWN (1 << 1) /* Reboot after AP shutdown */ +#define EC_REBOOT_FLAG_RESERVED0 BIT(0) /* Was recovery request */ +#define EC_REBOOT_FLAG_ON_AP_SHUTDOWN BIT(1) /* Reboot after AP shutdown */ struct ec_params_reboot_ec { uint8_t cmd; /* enum ec_reboot_cmd */ @@ -3256,9 +3256,9 @@ struct ec_params_usb_pd_control { uint8_t swap; } __ec_align1; -#define PD_CTRL_RESP_ENABLED_COMMS (1 << 0) /* Communication enabled */ -#define PD_CTRL_RESP_ENABLED_CONNECTED (1 << 1) /* Device connected */ -#define PD_CTRL_RESP_ENABLED_PD_CAPABLE (1 << 2) /* Partner is PD capable */ +#define PD_CTRL_RESP_ENABLED_COMMS BIT(0) /* Communication enabled */ +#define PD_CTRL_RESP_ENABLED_CONNECTED BIT(1) /* Device connected */ +#define PD_CTRL_RESP_ENABLED_PD_CAPABLE BIT(2) /* Partner is PD capable */ #define PD_CTRL_RESP_ROLE_POWER BIT(0) /* 0=SNK/1=SRC */ #define PD_CTRL_RESP_ROLE_DATA BIT(1) /* 0=UFP/1=DFP */ @@ -3458,10 +3458,10 @@ struct ec_params_usb_pd_mux_info { } __ec_align1; /* Flags representing mux state */ -#define USB_PD_MUX_USB_ENABLED (1 << 0) -#define USB_PD_MUX_DP_ENABLED (1 << 1) -#define USB_PD_MUX_POLARITY_INVERTED (1 << 2) -#define USB_PD_MUX_HPD_IRQ (1 << 3) +#define USB_PD_MUX_USB_ENABLED BIT(0) /* USB connected */ +#define USB_PD_MUX_DP_ENABLED BIT(1) /* DP connected */ +#define USB_PD_MUX_POLARITY_INVERTED BIT(2) /* CC line Polarity inverted */ +#define USB_PD_MUX_HPD_IRQ BIT(3) /* HPD IRQ is asserted */ struct ec_response_usb_pd_mux_info { uint8_t flags; /* USB_PD_MUX_*-encoded USB mux state */ From patchwork Fri May 3 22:02:10 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gwendal Grignou X-Patchwork-Id: 10929257 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 48E45912 for ; Fri, 3 May 2019 22:02:58 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 36DAD287D2 for ; Fri, 3 May 2019 22:02:58 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 2B338287D3; Fri, 3 May 2019 22:02:58 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E6C0E287CF for ; Fri, 3 May 2019 22:02:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726883AbfECWC4 (ORCPT ); Fri, 3 May 2019 18:02:56 -0400 Received: from mail-pg1-f195.google.com ([209.85.215.195]:40885 "EHLO mail-pg1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726604AbfECWC4 (ORCPT ); Fri, 3 May 2019 18:02:56 -0400 Received: by mail-pg1-f195.google.com with SMTP id d31so3338793pgl.7 for ; Fri, 03 May 2019 15:02:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=utRRZmBDWriiA0qDDgbJrblOhySAxZnovWhMOsEjBZs=; b=BhXWWpZZMoC99Esz0ClhppXkaxOLS6Ybl04UG4OUj2pwpqZgyC4LTicpVkUP9Ho7RN awz5cISU+fSxoFIs4m4Ty0kalbqsFRbv1IwoXVVY9Q8XM5kFanzdN3hNX8r1XOO9M0Sp 20Rx6cJfM3jkP9zGEmddP5W5LiSopim6krpC0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=utRRZmBDWriiA0qDDgbJrblOhySAxZnovWhMOsEjBZs=; b=eSn8TO3XfUYLMx0YZho+7h/L7fY4NMvYL4ivt0o6N7PoxGyFmzfRk/q/HganHrIvmA kV4lTaVkXz1w02uJZtTiG4NfCa3WeU7t6605vYVSJPOIMUp5GVeBqXKmXsJbyFWGfoN8 XUg/oNLKkr9Gf4ojPRm48tLrAr/m7o7PcaLK4lmbDobtDbW35omFFnEnxU+mVnvQIMNX EqileKd3v215uu43NMc5Q7dzCalQp8R4q5LBv54BkBeFg9ovddYOM4c2KbHrH5LqWgqH m6s9t+wuFsxcXtq3mdY9Tql1R98FbB8qRY8mlLCIJ4zmQau+U86iZkK422ajjwvP/2TE IIvw== X-Gm-Message-State: APjAAAVh25TLXH0uX0LaVyg7ohg+MxyGYQCUacDlZ42Z4Dr5Wyq7I7qt rK59nCF4RuAm3wjLR2TlycEIqA== X-Google-Smtp-Source: APXvYqwNEZgu9Zn2zQsuKNxoXIhL7gRW7+Zo7ztZYwRpHEzwUeD38ihOrk9MRX8X5e5EfK1czFGRiQ== X-Received: by 2002:a62:d286:: with SMTP id c128mr14704663pfg.159.1556920974909; Fri, 03 May 2019 15:02:54 -0700 (PDT) Received: from localhost ([2620:15c:202:1:3c8f:512b:3522:dfaf]) by smtp.gmail.com with ESMTPSA id j5sm3896947pfe.15.2019.05.03.15.02.53 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 03 May 2019 15:02:54 -0700 (PDT) From: Gwendal Grignou To: enric.balletbo@collabora.com, bleung@chromium.org, groeck@chromium.org, lee.jones@linaro.org, jic23@kernel.org, broonie@kernel.org, cychiang@chromium.org, tiwai@suse.com Cc: linux-iio@vger.kernel.org, alsa-devel@alsa-project.org, Gwendal Grignou Subject: [PATCH v2 07/30] mfd: cros_ec: Update ACPI interface definition Date: Fri, 3 May 2019 15:02:10 -0700 Message-Id: <20190503220233.64546-8-gwendal@chromium.org> X-Mailer: git-send-email 2.21.0.1020.gf2820cf01a-goog In-Reply-To: <20190503220233.64546-1-gwendal@chromium.org> References: <20190503220233.64546-1-gwendal@chromium.org> MIME-Version: 1.0 Sender: linux-iio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add more fields and improve API when EC presents data through ACPI memory space. Acked-by: Enric Balletbo i Serra Signed-off-by: Gwendal Grignou --- include/linux/mfd/cros_ec_commands.h | 419 +++++++++++++++++++-------- 1 file changed, 293 insertions(+), 126 deletions(-) diff --git a/include/linux/mfd/cros_ec_commands.h b/include/linux/mfd/cros_ec_commands.h index 7044f459cb1d..6538c5789c43 100644 --- a/include/linux/mfd/cros_ec_commands.h +++ b/include/linux/mfd/cros_ec_commands.h @@ -83,13 +83,15 @@ /* Unused 0x28 - 0x2f */ #define EC_MEMMAP_SWITCHES 0x30 /* 8 bits */ /* Unused 0x31 - 0x33 */ -#define EC_MEMMAP_HOST_EVENTS 0x34 /* 32 bits */ -/* Reserve 0x38 - 0x3f for additional host event-related stuff */ -/* Battery values are all 32 bits */ +#define EC_MEMMAP_HOST_EVENTS 0x34 /* 64 bits */ +/* Battery values are all 32 bits, unless otherwise noted. */ #define EC_MEMMAP_BATT_VOLT 0x40 /* Battery Present Voltage */ #define EC_MEMMAP_BATT_RATE 0x44 /* Battery Present Rate */ #define EC_MEMMAP_BATT_CAP 0x48 /* Battery Remaining Capacity */ -#define EC_MEMMAP_BATT_FLAG 0x4c /* Battery State, defined below */ +#define EC_MEMMAP_BATT_FLAG 0x4c /* Battery State, see below (8-bit) */ +#define EC_MEMMAP_BATT_COUNT 0x4d /* Battery Count (8-bit) */ +#define EC_MEMMAP_BATT_INDEX 0x4e /* Current Battery Data Index (8-bit) */ +/* Unused 0x4f */ #define EC_MEMMAP_BATT_DCAP 0x50 /* Battery Design Capacity */ #define EC_MEMMAP_BATT_DVLT 0x54 /* Battery Design Voltage */ #define EC_MEMMAP_BATT_LFCC 0x58 /* Battery Last Full Charge Capacity */ @@ -103,10 +105,19 @@ /* Unused 0x84 - 0x8f */ #define EC_MEMMAP_ACC_STATUS 0x90 /* Accelerometer status (8 bits )*/ /* Unused 0x91 */ -#define EC_MEMMAP_ACC_DATA 0x92 /* Accelerometer data 0x92 - 0x9f */ +#define EC_MEMMAP_ACC_DATA 0x92 /* Accelerometers data 0x92 - 0x9f */ +/* 0x92: Lid Angle if available, LID_ANGLE_UNRELIABLE otherwise */ +/* 0x94 - 0x99: 1st Accelerometer */ +/* 0x9a - 0x9f: 2nd Accelerometer */ #define EC_MEMMAP_GYRO_DATA 0xa0 /* Gyroscope data 0xa0 - 0xa5 */ -/* Unused 0xa6 - 0xfe (remember, 0xff is NOT part of the memmap region) */ +/* Unused 0xa6 - 0xdf */ +/* + * ACPI is unable to access memory mapped data at or above this offset due to + * limitations of the ACPI protocol. Do not place data in the range 0xe0 - 0xfe + * which might be needed by ACPI. + */ +#define EC_MEMMAP_NO_ACPI 0xe0 /* Define the format of the accelerometer mapped memory status byte. */ #define EC_MEMMAP_ACC_STATUS_SAMPLE_ID_MASK 0x0f @@ -155,6 +166,8 @@ #define EC_BATT_FLAG_DISCHARGING 0x04 #define EC_BATT_FLAG_CHARGING 0x08 #define EC_BATT_FLAG_LEVEL_CRITICAL 0x10 +/* Set if some of the static/dynamic data is invalid (or outdated). */ +#define EC_BATT_FLAG_INVALID_DATA 0x20 /* Switch flags at EC_MEMMAP_SWITCHES */ #define EC_SWITCH_LID_OPEN 0x01 @@ -180,12 +193,200 @@ #define EC_WIRELESS_SWITCH_WWAN 0x04 /* WWAN power */ #define EC_WIRELESS_SWITCH_WLAN_POWER 0x08 /* WLAN power */ +/*****************************************************************************/ +/* + * ACPI commands + * + * These are valid ONLY on the ACPI command/data port. + */ + +/* + * ACPI Read Embedded Controller + * + * This reads from ACPI memory space on the EC (EC_ACPI_MEM_*). + * + * Use the following sequence: + * + * - Write EC_CMD_ACPI_READ to EC_LPC_ADDR_ACPI_CMD + * - Wait for EC_LPC_CMDR_PENDING bit to clear + * - Write address to EC_LPC_ADDR_ACPI_DATA + * - Wait for EC_LPC_CMDR_DATA bit to set + * - Read value from EC_LPC_ADDR_ACPI_DATA + */ +#define EC_CMD_ACPI_READ 0x0080 + +/* + * ACPI Write Embedded Controller + * + * This reads from ACPI memory space on the EC (EC_ACPI_MEM_*). + * + * Use the following sequence: + * + * - Write EC_CMD_ACPI_WRITE to EC_LPC_ADDR_ACPI_CMD + * - Wait for EC_LPC_CMDR_PENDING bit to clear + * - Write address to EC_LPC_ADDR_ACPI_DATA + * - Wait for EC_LPC_CMDR_PENDING bit to clear + * - Write value to EC_LPC_ADDR_ACPI_DATA + */ +#define EC_CMD_ACPI_WRITE 0x0081 + +/* + * ACPI Burst Enable Embedded Controller + * + * This enables burst mode on the EC to allow the host to issue several + * commands back-to-back. While in this mode, writes to mapped multi-byte + * data are locked out to ensure data consistency. + */ +#define EC_CMD_ACPI_BURST_ENABLE 0x0082 + +/* + * ACPI Burst Disable Embedded Controller + * + * This disables burst mode on the EC and stops preventing EC writes to mapped + * multi-byte data. + */ +#define EC_CMD_ACPI_BURST_DISABLE 0x0083 + +/* + * ACPI Query Embedded Controller + * + * This clears the lowest-order bit in the currently pending host events, and + * sets the result code to the 1-based index of the bit (event 0x00000001 = 1, + * event 0x80000000 = 32), or 0 if no event was pending. + */ +#define EC_CMD_ACPI_QUERY_EVENT 0x0084 + +/* Valid addresses in ACPI memory space, for read/write commands */ + +/* Memory space version; set to EC_ACPI_MEM_VERSION_CURRENT */ +#define EC_ACPI_MEM_VERSION 0x00 +/* + * Test location; writing value here updates test compliment byte to (0xff - + * value). + */ +#define EC_ACPI_MEM_TEST 0x01 +/* Test compliment; writes here are ignored. */ +#define EC_ACPI_MEM_TEST_COMPLIMENT 0x02 + +/* Keyboard backlight brightness percent (0 - 100) */ +#define EC_ACPI_MEM_KEYBOARD_BACKLIGHT 0x03 +/* DPTF Target Fan Duty (0-100, 0xff for auto/none) */ +#define EC_ACPI_MEM_FAN_DUTY 0x04 + +/* + * DPTF temp thresholds. Any of the EC's temp sensors can have up to two + * independent thresholds attached to them. The current value of the ID + * register determines which sensor is affected by the THRESHOLD and COMMIT + * registers. The THRESHOLD register uses the same EC_TEMP_SENSOR_OFFSET scheme + * as the memory-mapped sensors. The COMMIT register applies those settings. + * + * The spec does not mandate any way to read back the threshold settings + * themselves, but when a threshold is crossed the AP needs a way to determine + * which sensor(s) are responsible. Each reading of the ID register clears and + * returns one sensor ID that has crossed one of its threshold (in either + * direction) since the last read. A value of 0xFF means "no new thresholds + * have tripped". Setting or enabling the thresholds for a sensor will clear + * the unread event count for that sensor. + */ +#define EC_ACPI_MEM_TEMP_ID 0x05 +#define EC_ACPI_MEM_TEMP_THRESHOLD 0x06 +#define EC_ACPI_MEM_TEMP_COMMIT 0x07 +/* + * Here are the bits for the COMMIT register: + * bit 0 selects the threshold index for the chosen sensor (0/1) + * bit 1 enables/disables the selected threshold (0 = off, 1 = on) + * Each write to the commit register affects one threshold. + */ +#define EC_ACPI_MEM_TEMP_COMMIT_SELECT_MASK BIT(0) +#define EC_ACPI_MEM_TEMP_COMMIT_ENABLE_MASK BIT(1) +/* + * Example: + * + * Set the thresholds for sensor 2 to 50 C and 60 C: + * write 2 to [0x05] -- select temp sensor 2 + * write 0x7b to [0x06] -- C_TO_K(50) - EC_TEMP_SENSOR_OFFSET + * write 0x2 to [0x07] -- enable threshold 0 with this value + * write 0x85 to [0x06] -- C_TO_K(60) - EC_TEMP_SENSOR_OFFSET + * write 0x3 to [0x07] -- enable threshold 1 with this value + * + * Disable the 60 C threshold, leaving the 50 C threshold unchanged: + * write 2 to [0x05] -- select temp sensor 2 + * write 0x1 to [0x07] -- disable threshold 1 + */ + +/* DPTF battery charging current limit */ +#define EC_ACPI_MEM_CHARGING_LIMIT 0x08 + +/* Charging limit is specified in 64 mA steps */ +#define EC_ACPI_MEM_CHARGING_LIMIT_STEP_MA 64 +/* Value to disable DPTF battery charging limit */ +#define EC_ACPI_MEM_CHARGING_LIMIT_DISABLED 0xff + +/* + * Report device orientation + * Bits Definition + * 3:1 Device DPTF Profile Number (DDPN) + * 0 = Reserved for backward compatibility (indicates no valid + * profile number. Host should fall back to using TBMD). + * 1..7 = DPTF Profile number to indicate to host which table needs + * to be loaded. + * 0 Tablet Mode Device Indicator (TBMD) + */ +#define EC_ACPI_MEM_DEVICE_ORIENTATION 0x09 +#define EC_ACPI_MEM_TBMD_SHIFT 0 +#define EC_ACPI_MEM_TBMD_MASK 0x1 +#define EC_ACPI_MEM_DDPN_SHIFT 1 +#define EC_ACPI_MEM_DDPN_MASK 0x7 + +/* + * Report device features. Uses the same format as the host command, except: + * + * bit 0 (EC_FEATURE_LIMITED) changes meaning from "EC code has a limited set + * of features", which is of limited interest when the system is already + * interpreting ACPI bytecode, to "EC_FEATURES[0-7] is not supported". Since + * these are supported, it defaults to 0. + * This allows detecting the presence of this field since older versions of + * the EC codebase would simply return 0xff to that unknown address. Check + * FEATURES0 != 0xff (or FEATURES0[0] == 0) to make sure that the other bits + * are valid. + */ +#define EC_ACPI_MEM_DEVICE_FEATURES0 0x0a +#define EC_ACPI_MEM_DEVICE_FEATURES1 0x0b +#define EC_ACPI_MEM_DEVICE_FEATURES2 0x0c +#define EC_ACPI_MEM_DEVICE_FEATURES3 0x0d +#define EC_ACPI_MEM_DEVICE_FEATURES4 0x0e +#define EC_ACPI_MEM_DEVICE_FEATURES5 0x0f +#define EC_ACPI_MEM_DEVICE_FEATURES6 0x10 +#define EC_ACPI_MEM_DEVICE_FEATURES7 0x11 + +#define EC_ACPI_MEM_BATTERY_INDEX 0x12 + +/* + * USB Port Power. Each bit indicates whether the corresponding USB ports' power + * is enabled (1) or disabled (0). + * bit 0 USB port ID 0 + * ... + * bit 7 USB port ID 7 + */ +#define EC_ACPI_MEM_USB_PORT_POWER 0x13 + +/* + * ACPI addresses 0x20 - 0xff map to EC_MEMMAP offset 0x00 - 0xdf. This data + * is read-only from the AP. Added in EC_ACPI_MEM_VERSION 2. + */ +#define EC_ACPI_MEM_MAPPED_BEGIN 0x20 +#define EC_ACPI_MEM_MAPPED_SIZE 0xe0 + +/* Current version of ACPI memory address space */ +#define EC_ACPI_MEM_VERSION_CURRENT 2 + + /* * This header file is used in coreboot both in C and ACPI code. The ACPI code * is pre-processed to handle constants but the ASL compiler is unable to * handle actual C code so keep it separate. */ -#ifndef __ACPI__ + /* * Attributes for EC request and response packets. Just defining __packed @@ -238,7 +439,7 @@ #define EC_LPC_STATUS_PROCESSING 0x04 /* Last write to EC was a command, not data */ #define EC_LPC_STATUS_LAST_CMD 0x08 -/* EC is in burst mode. Unsupported by Chrome EC, so this bit is never set */ +/* EC is in burst mode */ #define EC_LPC_STATUS_BURST_MODE 0x10 /* SCI event is pending (requesting SCI query) */ #define EC_LPC_STATUS_SCI_PENDING 0x20 @@ -2293,6 +2494,8 @@ struct ec_response_temp_sensor_get_info { /*****************************************************************************/ /* Host event commands */ + +/* Obsolete. New implementation should use EC_CMD_HOST_EVENT instead */ /* * Host event mask params and response structures, shared by all of the host * event commands below. @@ -2318,6 +2521,86 @@ struct ec_response_host_event_mask { #define EC_CMD_HOST_EVENT_SET_WAKE_MASK 0x008E #define EC_CMD_HOST_EVENT_CLEAR_B 0x008F +/* + * Unified host event programming interface - Should be used by newer versions + * of BIOS/OS to program host events and masks + */ + +struct ec_params_host_event { + + /* Action requested by host - one of enum ec_host_event_action. */ + uint8_t action; + + /* + * Mask type that the host requested the action on - one of + * enum ec_host_event_mask_type. + */ + uint8_t mask_type; + + /* Set to 0, ignore on read */ + uint16_t reserved; + + /* Value to be used in case of set operations. */ + uint64_t value; +} __ec_align4; + +/* + * Response structure returned by EC_CMD_HOST_EVENT. + * Update the value on a GET request. Set to 0 on GET/CLEAR + */ + +struct ec_response_host_event { + + /* Mask value in case of get operation */ + uint64_t value; +} __ec_align4; + +enum ec_host_event_action { + /* + * params.value is ignored. Value of mask_type populated + * in response.value + */ + EC_HOST_EVENT_GET, + + /* Bits in params.value are set */ + EC_HOST_EVENT_SET, + + /* Bits in params.value are cleared */ + EC_HOST_EVENT_CLEAR, +}; + +enum ec_host_event_mask_type { + + /* Main host event copy */ + EC_HOST_EVENT_MAIN, + + /* Copy B of host events */ + EC_HOST_EVENT_B, + + /* SCI Mask */ + EC_HOST_EVENT_SCI_MASK, + + /* SMI Mask */ + EC_HOST_EVENT_SMI_MASK, + + /* Mask of events that should be always reported in hostevents */ + EC_HOST_EVENT_ALWAYS_REPORT_MASK, + + /* Active wake mask */ + EC_HOST_EVENT_ACTIVE_WAKE_MASK, + + /* Lazy wake mask for S0ix */ + EC_HOST_EVENT_LAZY_WAKE_MASK_S0IX, + + /* Lazy wake mask for S3 */ + EC_HOST_EVENT_LAZY_WAKE_MASK_S3, + + /* Lazy wake mask for S5 */ + EC_HOST_EVENT_LAZY_WAKE_MASK_S5, +}; + +#define EC_CMD_HOST_EVENT 0x00A4 + /*****************************************************************************/ /* Switch commands */ @@ -2969,122 +3252,6 @@ struct ec_params_reboot_ec { */ #define EC_CMD_GET_PANIC_INFO 0x00D3 -/*****************************************************************************/ -/* - * ACPI commands - * - * These are valid ONLY on the ACPI command/data port. - */ - -/* - * ACPI Read Embedded Controller - * - * This reads from ACPI memory space on the EC (EC_ACPI_MEM_*). - * - * Use the following sequence: - * - * - Write EC_CMD_ACPI_READ to EC_LPC_ADDR_ACPI_CMD - * - Wait for EC_LPC_CMDR_PENDING bit to clear - * - Write address to EC_LPC_ADDR_ACPI_DATA - * - Wait for EC_LPC_CMDR_DATA bit to set - * - Read value from EC_LPC_ADDR_ACPI_DATA - */ -#define EC_CMD_ACPI_READ 0x80 - -/* - * ACPI Write Embedded Controller - * - * This reads from ACPI memory space on the EC (EC_ACPI_MEM_*). - * - * Use the following sequence: - * - * - Write EC_CMD_ACPI_WRITE to EC_LPC_ADDR_ACPI_CMD - * - Wait for EC_LPC_CMDR_PENDING bit to clear - * - Write address to EC_LPC_ADDR_ACPI_DATA - * - Wait for EC_LPC_CMDR_PENDING bit to clear - * - Write value to EC_LPC_ADDR_ACPI_DATA - */ -#define EC_CMD_ACPI_WRITE 0x81 - -/* - * ACPI Query Embedded Controller - * - * This clears the lowest-order bit in the currently pending host events, and - * sets the result code to the 1-based index of the bit (event 0x00000001 = 1, - * event 0x80000000 = 32), or 0 if no event was pending. - */ -#define EC_CMD_ACPI_QUERY_EVENT 0x84 - -/* Valid addresses in ACPI memory space, for read/write commands */ - -/* Memory space version; set to EC_ACPI_MEM_VERSION_CURRENT */ -#define EC_ACPI_MEM_VERSION 0x00 -/* - * Test location; writing value here updates test compliment byte to (0xff - - * value). - */ -#define EC_ACPI_MEM_TEST 0x01 -/* Test compliment; writes here are ignored. */ -#define EC_ACPI_MEM_TEST_COMPLIMENT 0x02 - -/* Keyboard backlight brightness percent (0 - 100) */ -#define EC_ACPI_MEM_KEYBOARD_BACKLIGHT 0x03 -/* DPTF Target Fan Duty (0-100, 0xff for auto/none) */ -#define EC_ACPI_MEM_FAN_DUTY 0x04 - -/* - * DPTF temp thresholds. Any of the EC's temp sensors can have up to two - * independent thresholds attached to them. The current value of the ID - * register determines which sensor is affected by the THRESHOLD and COMMIT - * registers. The THRESHOLD register uses the same EC_TEMP_SENSOR_OFFSET scheme - * as the memory-mapped sensors. The COMMIT register applies those settings. - * - * The spec does not mandate any way to read back the threshold settings - * themselves, but when a threshold is crossed the AP needs a way to determine - * which sensor(s) are responsible. Each reading of the ID register clears and - * returns one sensor ID that has crossed one of its threshold (in either - * direction) since the last read. A value of 0xFF means "no new thresholds - * have tripped". Setting or enabling the thresholds for a sensor will clear - * the unread event count for that sensor. - */ -#define EC_ACPI_MEM_TEMP_ID 0x05 -#define EC_ACPI_MEM_TEMP_THRESHOLD 0x06 -#define EC_ACPI_MEM_TEMP_COMMIT 0x07 -/* - * Here are the bits for the COMMIT register: - * bit 0 selects the threshold index for the chosen sensor (0/1) - * bit 1 enables/disables the selected threshold (0 = off, 1 = on) - * Each write to the commit register affects one threshold. - */ -#define EC_ACPI_MEM_TEMP_COMMIT_SELECT_MASK (1 << 0) -#define EC_ACPI_MEM_TEMP_COMMIT_ENABLE_MASK (1 << 1) -/* - * Example: - * - * Set the thresholds for sensor 2 to 50 C and 60 C: - * write 2 to [0x05] -- select temp sensor 2 - * write 0x7b to [0x06] -- C_TO_K(50) - EC_TEMP_SENSOR_OFFSET - * write 0x2 to [0x07] -- enable threshold 0 with this value - * write 0x85 to [0x06] -- C_TO_K(60) - EC_TEMP_SENSOR_OFFSET - * write 0x3 to [0x07] -- enable threshold 1 with this value - * - * Disable the 60 C threshold, leaving the 50 C threshold unchanged: - * write 2 to [0x05] -- select temp sensor 2 - * write 0x1 to [0x07] -- disable threshold 1 - */ - -/* DPTF battery charging current limit */ -#define EC_ACPI_MEM_CHARGING_LIMIT 0x08 - -/* Charging limit is specified in 64 mA steps */ -#define EC_ACPI_MEM_CHARGING_LIMIT_STEP_MA 64 -/* Value to disable DPTF battery charging limit */ -#define EC_ACPI_MEM_CHARGING_LIMIT_DISABLED 0xff - -/* Current version of ACPI memory address space */ -#define EC_ACPI_MEM_VERSION_CURRENT 1 - - /*****************************************************************************/ /* * HDMI CEC commands @@ -3198,8 +3365,6 @@ enum mkbp_cec_event { */ #define EC_CMD_VERSION0 0x00DC -#endif /* !__ACPI__ */ - /*****************************************************************************/ /* * PD commands @@ -3540,4 +3705,6 @@ struct ec_response_usb_pd_mux_info { #define EC_LPC_ADDR_OLD_PARAM EC_HOST_CMD_REGION1 #define EC_OLD_PARAM_SIZE EC_HOST_CMD_REGION_SIZE + + #endif /* __CROS_EC_COMMANDS_H */ From patchwork Fri May 3 22:02:11 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gwendal Grignou X-Patchwork-Id: 10929259 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 63DAE13AD for ; Fri, 3 May 2019 22:02:58 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 53BEE287CF for ; Fri, 3 May 2019 22:02:58 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 47BDF287DB; Fri, 3 May 2019 22:02:58 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id BD03D287D1 for ; Fri, 3 May 2019 22:02:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726914AbfECWC5 (ORCPT ); Fri, 3 May 2019 18:02:57 -0400 Received: from mail-pg1-f193.google.com ([209.85.215.193]:45401 "EHLO mail-pg1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726604AbfECWC5 (ORCPT ); Fri, 3 May 2019 18:02:57 -0400 Received: by mail-pg1-f193.google.com with SMTP id i21so3328554pgi.12 for ; Fri, 03 May 2019 15:02:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=vpZvwbwPYf0W1R0nI9DxhgS6xPRoVjEGctnuxzxQJHk=; b=DipJLBxoHg1BLPKIRZddMWg/EqPnObfT+6lYTDOxLu21MmXIkTYwph/62KDAqyDefh Up+0e0LNnMggYvpeGKk1BtJQxx5gvZKDPMvjEjB5oeJ1sH3YvwNaMXAf83CEiaRnyrs2 8dQ5vtMP6WlDZJLKwu5eU0LY6rewLcCuc9AZc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=vpZvwbwPYf0W1R0nI9DxhgS6xPRoVjEGctnuxzxQJHk=; b=FAb169gL7yMsyRDbtUxpAhvgg2NJDor0mVtkynu3LOMiUQMuJ0/ksCCtz+PgBgK8KG MI8/guOqy1ySpKoXCmGZ7eQQnWQ5g6JfiBKUCo44/yG/uDjBIlz9RHt3G9xZUSCusSWk aSm6sqBRWaGTQ8zFveg4LmQROYpkSHDOETQvFnG3uAgUTnBJHe0pjN+/zuIiP+Y0qgTV tZajkpA9GSB8e30Oi5hnrI24lkqnoqHVLPXF/tnuHfcNFAb/1AN0N7JaLjIQIWx2CXJZ Ao4p2joAkMkbrZKOD465NATtWe/xh2BptJcQjWtSaDaBxDj8F2kt1HWIUo9WQFogAZw8 2Pmg== X-Gm-Message-State: APjAAAVKUXNnvzsrsJ2+zXSHSxDpoT/8GEAYHZC5ZyZd/5pmJoOmGFiK OF+aTLWbevnU9c8bkCYeK7yjbw== X-Google-Smtp-Source: APXvYqyeAHIyL2YmcO+ypKIGK7enHbm/KXpWVRaOzEMqlfkAxyMgome5IOAVzPA+81fPABPUXt83TA== X-Received: by 2002:a63:1e0c:: with SMTP id e12mr13199791pge.218.1556920976472; Fri, 03 May 2019 15:02:56 -0700 (PDT) Received: from localhost ([2620:15c:202:1:3c8f:512b:3522:dfaf]) by smtp.gmail.com with ESMTPSA id l10sm9412937pfc.46.2019.05.03.15.02.55 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 03 May 2019 15:02:55 -0700 (PDT) From: Gwendal Grignou To: enric.balletbo@collabora.com, bleung@chromium.org, groeck@chromium.org, lee.jones@linaro.org, jic23@kernel.org, broonie@kernel.org, cychiang@chromium.org, tiwai@suse.com Cc: linux-iio@vger.kernel.org, alsa-devel@alsa-project.org, Gwendal Grignou Subject: [PATCH v2 08/30] mfd: cros_ec: move HDMI CEC API definition Date: Fri, 3 May 2019 15:02:11 -0700 Message-Id: <20190503220233.64546-9-gwendal@chromium.org> X-Mailer: git-send-email 2.21.0.1020.gf2820cf01a-goog In-Reply-To: <20190503220233.64546-1-gwendal@chromium.org> References: <20190503220233.64546-1-gwendal@chromium.org> MIME-Version: 1.0 Sender: linux-iio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Move near the end of file. Acked-by: Enric Balletbo i Serra Signed-off-by: Gwendal Grignou --- include/linux/mfd/cros_ec_commands.h | 148 ++++++++++++++------------- 1 file changed, 75 insertions(+), 73 deletions(-) diff --git a/include/linux/mfd/cros_ec_commands.h b/include/linux/mfd/cros_ec_commands.h index 6538c5789c43..67e15c29e083 100644 --- a/include/linux/mfd/cros_ec_commands.h +++ b/include/linux/mfd/cros_ec_commands.h @@ -3124,6 +3124,81 @@ struct ec_response_battery_vendor_param { } __ec_align4; /*****************************************************************************/ +/* + * HDMI CEC commands + * + * These commands are for sending and receiving message via HDMI CEC + */ + +#define MAX_CEC_MSG_LEN 16 + +/* CEC message from the AP to be written on the CEC bus */ +#define EC_CMD_CEC_WRITE_MSG 0x00B8 + +/** + * struct ec_params_cec_write - Message to write to the CEC bus + * @msg: message content to write to the CEC bus + */ +struct ec_params_cec_write { + uint8_t msg[MAX_CEC_MSG_LEN]; +} __ec_align1; + +/* Set various CEC parameters */ +#define EC_CMD_CEC_SET 0x00BA + +/** + * struct ec_params_cec_set - CEC parameters set + * @cmd: parameter type, can be CEC_CMD_ENABLE or CEC_CMD_LOGICAL_ADDRESS + * @val: in case cmd is CEC_CMD_ENABLE, this field can be 0 to disable CEC + * or 1 to enable CEC functionality, in case cmd is + * CEC_CMD_LOGICAL_ADDRESS, this field encodes the requested logical + * address between 0 and 15 or 0xff to unregister + */ +struct ec_params_cec_set { + uint8_t cmd; /* enum cec_command */ + uint8_t val; +} __ec_align1; + +/* Read various CEC parameters */ +#define EC_CMD_CEC_GET 0x00BB + +/** + * struct ec_params_cec_get - CEC parameters get + * @cmd: parameter type, can be CEC_CMD_ENABLE or CEC_CMD_LOGICAL_ADDRESS + */ +struct ec_params_cec_get { + uint8_t cmd; /* enum cec_command */ +} __ec_align1; + +/** + * struct ec_response_cec_get - CEC parameters get response + * @val: in case cmd was CEC_CMD_ENABLE, this field will 0 if CEC is + * disabled or 1 if CEC functionality is enabled, + * in case cmd was CEC_CMD_LOGICAL_ADDRESS, this will encode the + * configured logical address between 0 and 15 or 0xff if unregistered + */ +struct ec_response_cec_get { + uint8_t val; +} __ec_align1; + +/* CEC parameters command */ +enum cec_command { + /* CEC reading, writing and events enable */ + CEC_CMD_ENABLE, + /* CEC logical address */ + CEC_CMD_LOGICAL_ADDRESS, +}; + +/* Events from CEC to AP */ +enum mkbp_cec_event { + /* Outgoing message was acknowledged by a follower */ + EC_MKBP_CEC_SEND_OK = BIT(0), + /* Outgoing message was not acknowledged */ + EC_MKBP_CEC_SEND_FAILED = BIT(1), +}; + +/*****************************************************************************/ + /* Commands for I2S recording on audio codec. */ #define EC_CMD_CODEC_I2S 0x00BC @@ -3252,79 +3327,6 @@ struct ec_params_reboot_ec { */ #define EC_CMD_GET_PANIC_INFO 0x00D3 -/*****************************************************************************/ -/* - * HDMI CEC commands - * - * These commands are for sending and receiving message via HDMI CEC - */ -#define EC_MAX_CEC_MSG_LEN 16 - -/* CEC message from the AP to be written on the CEC bus */ -#define EC_CMD_CEC_WRITE_MSG 0x00B8 - -/** - * struct ec_params_cec_write - Message to write to the CEC bus - * @msg: message content to write to the CEC bus - */ -struct ec_params_cec_write { - uint8_t msg[EC_MAX_CEC_MSG_LEN]; -} __ec_align1; - -/* Set various CEC parameters */ -#define EC_CMD_CEC_SET 0x00BA - -/** - * struct ec_params_cec_set - CEC parameters set - * @cmd: parameter type, can be CEC_CMD_ENABLE or CEC_CMD_LOGICAL_ADDRESS - * @val: in case cmd is CEC_CMD_ENABLE, this field can be 0 to disable CEC - * or 1 to enable CEC functionality, in case cmd is CEC_CMD_LOGICAL_ADDRESS, - * this field encodes the requested logical address between 0 and 15 - * or 0xff to unregister - */ -struct ec_params_cec_set { - uint8_t cmd; /* enum cec_command */ - uint8_t val; -} __ec_align1; - -/* Read various CEC parameters */ -#define EC_CMD_CEC_GET 0x00BB - -/** - * struct ec_params_cec_get - CEC parameters get - * @cmd: parameter type, can be CEC_CMD_ENABLE or CEC_CMD_LOGICAL_ADDRESS - */ -struct ec_params_cec_get { - uint8_t cmd; /* enum cec_command */ -} __ec_align1; - -/** - * struct ec_response_cec_get - CEC parameters get response - * @val: in case cmd was CEC_CMD_ENABLE, this field will 0 if CEC is - * disabled or 1 if CEC functionality is enabled, - * in case cmd was CEC_CMD_LOGICAL_ADDRESS, this will encode the - * configured logical address between 0 and 15 or 0xff if unregistered - */ -struct ec_response_cec_get { - uint8_t val; -} __ec_align1; - -/* CEC parameters command */ -enum ec_cec_command { - /* CEC reading, writing and events enable */ - CEC_CMD_ENABLE, - /* CEC logical address */ - CEC_CMD_LOGICAL_ADDRESS, -}; - -/* Events from CEC to AP */ -enum mkbp_cec_event { - /* Outgoing message was acknowledged by a follower */ - EC_MKBP_CEC_SEND_OK = BIT(0), - /* Outgoing message was not acknowledged */ - EC_MKBP_CEC_SEND_FAILED = BIT(1), -}; - /*****************************************************************************/ /* * Special commands From patchwork Fri May 3 22:02:12 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gwendal Grignou X-Patchwork-Id: 10929261 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C168613AD for ; Fri, 3 May 2019 22:02:59 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B337A287CF for ; Fri, 3 May 2019 22:02:59 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id A716A287D2; Fri, 3 May 2019 22:02:59 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 4BCA4287CF for ; Fri, 3 May 2019 22:02:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726432AbfECWC7 (ORCPT ); Fri, 3 May 2019 18:02:59 -0400 Received: from mail-pf1-f193.google.com ([209.85.210.193]:44807 "EHLO mail-pf1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726604AbfECWC6 (ORCPT ); Fri, 3 May 2019 18:02:58 -0400 Received: by mail-pf1-f193.google.com with SMTP id y13so3527074pfm.11 for ; Fri, 03 May 2019 15:02:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=jhMP+EYsF7thTSOZC6IuVUmea4P1pderJRDss92eoz8=; b=EdoNQ8RoL8xGsXIXKZyJ40YLQ9yRJ/6/wKnmdK/XhooMvd2G1H9O55nKpVfAyTuWyV XMbp4/FDFDh8FnO3eJ/kVj1HGXrEXoqBlIy08ifyKw+9ZcsSCX1XeUgJGvAvUKzk3q/M Fy6OkH/k6yE2p8tb+W/B/NCTfkSwV6Yo7WzTc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=jhMP+EYsF7thTSOZC6IuVUmea4P1pderJRDss92eoz8=; b=WNttDhF/wkao0irVi93bFEZVBxc/r7Rr9kf3gL0TtbZ/SJsQrN52McPpD0dvwargPL iIPtJehGnrZBfMF7hxxuif8vad06ZLJwBC6qLNdmD7CdlMaA7Oeux6SEkwOdFlY6vXbV dcm0XZAuJibu//RodgbJMvzmsW+qbpJokLBLcw13ZpHlZ4GhccM3BaQjrEmG6Ce8WxnO UHBXDiEtsF702S+tO3h5Bj5XGA9GX9H4KWiOBItxndNKjcwLwx15xXHEpZCgsPyD4/Oo ZK9qptLUJipq/lARQL/GWCNYB+urBJYlFNM5tIERW6e1hkqfFB9OakLagubKea6Q54B1 Uaxg== X-Gm-Message-State: APjAAAV8986UiY7F8UBrMuPSzAAYrGGpP9WTwESpAWqmu6PuickxSP/b mFd8vBfWUxCIw/z1f4Ursu6Gvg== X-Google-Smtp-Source: APXvYqzlWcuXSUxEH7AfZ9a3T24GZ2bbv83kotRdaDRJLfwrjQctGDViZ4aZbXisd6XHnFLT7UDXSg== X-Received: by 2002:a63:330e:: with SMTP id z14mr13613746pgz.4.1556920978074; Fri, 03 May 2019 15:02:58 -0700 (PDT) Received: from localhost ([2620:15c:202:1:3c8f:512b:3522:dfaf]) by smtp.gmail.com with ESMTPSA id p7sm3772420pgn.64.2019.05.03.15.02.57 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 03 May 2019 15:02:57 -0700 (PDT) From: Gwendal Grignou To: enric.balletbo@collabora.com, bleung@chromium.org, groeck@chromium.org, lee.jones@linaro.org, jic23@kernel.org, broonie@kernel.org, cychiang@chromium.org, tiwai@suse.com Cc: linux-iio@vger.kernel.org, alsa-devel@alsa-project.org, Gwendal Grignou Subject: [PATCH v2 09/30] mfd: cros_ec: Remove zero-size structs Date: Fri, 3 May 2019 15:02:12 -0700 Message-Id: <20190503220233.64546-10-gwendal@chromium.org> X-Mailer: git-send-email 2.21.0.1020.gf2820cf01a-goog In-Reply-To: <20190503220233.64546-1-gwendal@chromium.org> References: <20190503220233.64546-1-gwendal@chromium.org> MIME-Version: 1.0 Sender: linux-iio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Empty structure size is different between C and C++. To prevent clang warning when compiling this include file in C++ programs, remove empty structures. Acked-by: Enric Balletbo i Serra Signed-off-by: Gwendal Grignou --- include/linux/mfd/cros_ec_commands.h | 33 +++++++++++++++------------- 1 file changed, 18 insertions(+), 15 deletions(-) diff --git a/include/linux/mfd/cros_ec_commands.h b/include/linux/mfd/cros_ec_commands.h index 67e15c29e083..2e5c93d858d8 100644 --- a/include/linux/mfd/cros_ec_commands.h +++ b/include/linux/mfd/cros_ec_commands.h @@ -1510,10 +1510,14 @@ struct lightbar_program { struct ec_params_lightbar { uint8_t cmd; /* Command (see enum lightbar_command) */ union { - struct { - /* no args */ - } dump, off, on, init, get_seq, get_params_v0, get_params_v1, - version, get_brightness, get_demo, suspend, resume; + /* + * The following commands have no args: + * + * dump, off, on, init, get_seq, get_params_v0, get_params_v1, + * version, get_brightness, get_demo, suspend, resume + * + * Don't use an empty struct, because C++ hates that. + */ struct __ec_todo_unpacked { uint8_t num; @@ -1567,11 +1571,13 @@ struct ec_response_lightbar { uint8_t red, green, blue; } get_rgb; - struct { - /* no return params */ - } off, on, init, set_brightness, seq, reg, set_rgb, - demo, set_params_v0, set_params_v1, - set_program, manual_suspend_ctrl, suspend, resume; + /* + * The following commands have no response: + * + * off, on, init, set_brightness, seq, reg, set_rgb, + * set_params_v0, set_params_v1, set_program, + * manual_suspend_ctrl, suspend, resume + */ }; } __ec_todo_packed; @@ -2991,9 +2997,7 @@ enum charge_state_params { struct ec_params_charge_state { uint8_t cmd; /* enum charge_state_command */ union { - struct { - /* no args */ - } get_state; + /* get_state has no args */ struct __ec_todo_unpacked { uint32_t param; /* enum charge_state_param */ @@ -3019,9 +3023,8 @@ struct ec_response_charge_state { struct __ec_align4 { uint32_t value; } get_param; - struct { - /* no return values */ - } set_param; + + /* set_param returns no args */ }; } __ec_align4; From patchwork Fri May 3 22:02:13 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gwendal Grignou X-Patchwork-Id: 10929263 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3596D1390 for ; Fri, 3 May 2019 22:03:02 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 261B2287CF for ; Fri, 3 May 2019 22:03:02 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 19B3B287D2; Fri, 3 May 2019 22:03:02 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 641F6287CF for ; Fri, 3 May 2019 22:03:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726924AbfECWDA (ORCPT ); Fri, 3 May 2019 18:03:00 -0400 Received: from mail-pf1-f196.google.com ([209.85.210.196]:40435 "EHLO mail-pf1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726604AbfECWDA (ORCPT ); Fri, 3 May 2019 18:03:00 -0400 Received: by mail-pf1-f196.google.com with SMTP id u17so3534518pfn.7 for ; Fri, 03 May 2019 15:03:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Egt+s52dQG9eH0skde5B48O/Z/VpY0b6FfwVDwMGURs=; b=EjKwPGCs0LSjtMEPQucZNlHZZttpHzAQjPOFnQuP1Hqi8z9LEUziGwrGcTqFx7YV0X lrYsr0/Y/YljqDBFpxluEA/GwnYztg/CTGCc6a5lWeC557leKs5PcKNWALDpHxFs8Bab TNWoYH9j91Mt86ogZNJ+gVt301yewprHVZhLg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Egt+s52dQG9eH0skde5B48O/Z/VpY0b6FfwVDwMGURs=; b=Mq/vRNJvdDwwZg3vdlZItTkmNMVFXesDbeteSLFctKKN+JDhzQzWnFI/tj5z0gR5lK EwKknVaTziIVN9z0XPHwiiC4MhzE3RtCO0NrzIQpea3w3p36opWLNMkO60wdmsYAX/zC 07l4UU8iknjYwaKKrkStt5B5b+RBe+FrpYugQUAicfEordYqClZfiRndHLRhyYVUP/k/ 5swvE2eor61i0pqhp84d8jzPdHOenQcS2ghgGDnvOcaKbYJIssUi0fUm2GDJlAdsjAwz 3wyGJcP031jt+YZl+zx5seusCmxrtowzjBJQf+QFyeye01kSvGTrwL2WbeBO6b0qPS2n 9R8Q== X-Gm-Message-State: APjAAAWnk/j2X6pGTIVKIFdlpSPJnofJrX7pRlrGbn8g6qo+wCifb/ka iBAUQZO6TFeLVeH1WKrkpmPWdQ== X-Google-Smtp-Source: APXvYqyXUU4R6fS5yhtw5PjmBJSi+rLqMS0f4l8SNgmv/I9ieoJqDItoRKhfRcbtxpKdekJCDTAYvg== X-Received: by 2002:a63:5953:: with SMTP id j19mr13675507pgm.260.1556920979764; Fri, 03 May 2019 15:02:59 -0700 (PDT) Received: from localhost ([2620:15c:202:1:3c8f:512b:3522:dfaf]) by smtp.gmail.com with ESMTPSA id t9sm3388801pgp.66.2019.05.03.15.02.58 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 03 May 2019 15:02:59 -0700 (PDT) From: Gwendal Grignou To: enric.balletbo@collabora.com, bleung@chromium.org, groeck@chromium.org, lee.jones@linaro.org, jic23@kernel.org, broonie@kernel.org, cychiang@chromium.org, tiwai@suse.com Cc: linux-iio@vger.kernel.org, alsa-devel@alsa-project.org, Gwendal Grignou Subject: [PATCH v2 10/30] mfd: cros_ec: Add Flash V2 commands API Date: Fri, 3 May 2019 15:02:13 -0700 Message-Id: <20190503220233.64546-11-gwendal@chromium.org> X-Mailer: git-send-email 2.21.0.1020.gf2820cf01a-goog In-Reply-To: <20190503220233.64546-1-gwendal@chromium.org> References: <20190503220233.64546-1-gwendal@chromium.org> MIME-Version: 1.0 Sender: linux-iio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Added for supporting larger embedded controller flash. Acked-by: Enric Balletbo i Serra Signed-off-by: Gwendal Grignou --- include/linux/mfd/cros_ec_commands.h | 150 ++++++++++++++++++++++++++- 1 file changed, 147 insertions(+), 3 deletions(-) diff --git a/include/linux/mfd/cros_ec_commands.h b/include/linux/mfd/cros_ec_commands.h index 2e5c93d858d8..393c5abab7a0 100644 --- a/include/linux/mfd/cros_ec_commands.h +++ b/include/linux/mfd/cros_ec_commands.h @@ -1108,6 +1108,7 @@ struct ec_response_get_features { /* Get flash info */ #define EC_CMD_FLASH_INFO 0x0010 +#define EC_VER_FLASH_INFO 2 /** * struct ec_response_flash_info - Response to the flash info command. @@ -1134,6 +1135,15 @@ struct ec_response_flash_info { */ #define EC_FLASH_INFO_ERASE_TO_0 BIT(0) +/* + * Flash must be selected for read/write/erase operations to succeed. This may + * be necessary on a chip where write/erase can be corrupted by other board + * activity, or where the chip needs to enable some sort of programming voltage, + * or where the read/write/erase operations require cleanly suspending other + * chip functionality. + */ +#define EC_FLASH_INFO_SELECT_REQUIRED BIT(1) + /** * struct ec_response_flash_info_1 - Response to the flash info v1 command. * @flash_size: Usable flash size in bytes. @@ -1156,6 +1166,12 @@ struct ec_response_flash_info { * gcc anonymous structs don't seem to get along with the __packed directive; * if they did we'd define the version 0 structure as a sub-structure of this * one. + * + * Version 2 supports flash banks of different sizes: + * The caller specified the number of banks it has preallocated + * (num_banks_desc) + * The EC returns the number of banks describing the flash memory. + * It adds banks descriptions up to num_banks_desc. */ struct ec_response_flash_info_1 { /* Version 0 fields; see above for description */ @@ -1169,6 +1185,42 @@ struct ec_response_flash_info_1 { uint32_t flags; } __ec_align4; +struct ec_params_flash_info_2 { + /* Number of banks to describe */ + uint16_t num_banks_desc; + /* Reserved; set 0; ignore on read */ + uint8_t reserved[2]; +} __ec_align4; + +struct ec_flash_bank { + /* Number of sector is in this bank. */ + uint16_t count; + /* Size in power of 2 of each sector (8 --> 256 bytes) */ + uint8_t size_exp; + /* Minimal write size for the sectors in this bank */ + uint8_t write_size_exp; + /* Erase size for the sectors in this bank */ + uint8_t erase_size_exp; + /* Size for write protection, usually identical to erase size. */ + uint8_t protect_size_exp; + /* Reserved; set 0; ignore on read */ + uint8_t reserved[2]; +}; + +struct ec_response_flash_info_2 { + /* Total flash in the EC. */ + uint32_t flash_size; + /* Flags; see EC_FLASH_INFO_* */ + uint32_t flags; + /* Maximum size to use to send data to write to the EC. */ + uint32_t write_ideal_size; + /* Number of banks present in the EC. */ + uint16_t num_banks_total; + /* Number of banks described in banks array. */ + uint16_t num_banks_desc; + struct ec_flash_bank banks[0]; +} __ec_align4; + /* * Read flash * @@ -1208,7 +1260,7 @@ struct ec_params_flash_write { #define EC_CMD_FLASH_ERASE 0x0013 /** - * struct ec_params_flash_erase - Parameters for the flash erase command. + * struct ec_params_flash_erase - Parameters for the flash erase command, v0. * @offset: Byte offset to erase. * @size: Size to erase in bytes. */ @@ -1217,6 +1269,43 @@ struct ec_params_flash_erase { uint32_t size; } __ec_align4; +/* + * v1 add async erase: + * subcommands can returns: + * EC_RES_SUCCESS : erased (see ERASE_SECTOR_ASYNC case below). + * EC_RES_INVALID_PARAM : offset/size are not aligned on a erase boundary. + * EC_RES_ERROR : other errors. + * EC_RES_BUSY : an existing erase operation is in progress. + * EC_RES_ACCESS_DENIED: Trying to erase running image. + * + * When ERASE_SECTOR_ASYNC returns EC_RES_SUCCESS, the operation is just + * properly queued. The user must call ERASE_GET_RESULT subcommand to get + * the proper result. + * When ERASE_GET_RESULT returns EC_RES_BUSY, the caller must wait and send + * ERASE_GET_RESULT again to get the result of ERASE_SECTOR_ASYNC. + * ERASE_GET_RESULT command may timeout on EC where flash access is not + * permitted while erasing. (For instance, STM32F4). + */ +enum ec_flash_erase_cmd { + FLASH_ERASE_SECTOR, /* Erase and wait for result */ + FLASH_ERASE_SECTOR_ASYNC, /* Erase and return immediately. */ + FLASH_ERASE_GET_RESULT, /* Ask for last erase result */ +}; + +/** + * struct ec_params_flash_erase_v1 - Parameters for the flash erase command, v1. + * @cmd: One of ec_flash_erase_cmd. + * @reserved: Pad byte; currently always contains 0. + * @flag: No flags defined yet; set to 0. + * @params: Same as v0 parameters. + */ +struct ec_params_flash_erase_v1 { + uint8_t cmd; + uint8_t reserved; + uint16_t flag; + struct ec_params_flash_erase params; +} __ec_align4; + /* * Get/set flash protection. * @@ -1252,6 +1341,15 @@ struct ec_params_flash_erase { #define EC_FLASH_PROTECT_ERROR_INCONSISTENT BIT(5) /* Entire flash code protected when the EC boots */ #define EC_FLASH_PROTECT_ALL_AT_BOOT BIT(6) +/* RW flash code protected when the EC boots */ +#define EC_FLASH_PROTECT_RW_AT_BOOT BIT(7) +/* RW flash code protected now. */ +#define EC_FLASH_PROTECT_RW_NOW BIT(8) +/* Rollback information flash region protected when the EC boots */ +#define EC_FLASH_PROTECT_ROLLBACK_AT_BOOT BIT(9) +/* Rollback information flash region protected now */ +#define EC_FLASH_PROTECT_ROLLBACK_NOW BIT(10) + /** * struct ec_params_flash_protect - Parameters for the flash protect command. @@ -1290,16 +1388,31 @@ struct ec_response_flash_protect { enum ec_flash_region { /* Region which holds read-only EC image */ EC_FLASH_REGION_RO = 0, - /* Region which holds rewritable EC image */ - EC_FLASH_REGION_RW, + /* + * Region which holds active RW image. 'Active' is different from + * 'running'. Active means 'scheduled-to-run'. Since RO image always + * scheduled to run, active/non-active applies only to RW images (for + * the same reason 'update' applies only to RW images. It's a state of + * an image on a flash. Running image can be RO, RW_A, RW_B but active + * image can only be RW_A or RW_B. In recovery mode, an active RW image + * doesn't enter 'running' state but it's still active on a flash. + */ + EC_FLASH_REGION_ACTIVE, /* * Region which should be write-protected in the factory (a superset of * EC_FLASH_REGION_RO) */ EC_FLASH_REGION_WP_RO, + /* Region which holds updatable (non-active) RW image */ + EC_FLASH_REGION_UPDATE, /* Number of regions */ EC_FLASH_REGION_COUNT, }; +/* + * 'RW' is vague if there are multiple RW images; we mean the active one, + * so the old constant is deprecated. + */ +#define EC_FLASH_REGION_RW EC_FLASH_REGION_ACTIVE /** * struct ec_params_flash_region_info - Parameters for the flash region info @@ -1334,6 +1447,37 @@ struct ec_response_vbnvcontext { uint8_t block[EC_VBNV_BLOCK_SIZE]; } __ec_align4; + +/* Get SPI flash information */ +#define EC_CMD_FLASH_SPI_INFO 0x0018 + +struct ec_response_flash_spi_info { + /* JEDEC info from command 0x9F (manufacturer, memory type, size) */ + uint8_t jedec[3]; + + /* Pad byte; currently always contains 0 */ + uint8_t reserved0; + + /* Manufacturer / device ID from command 0x90 */ + uint8_t mfr_dev_id[2]; + + /* Status registers from command 0x05 and 0x35 */ + uint8_t sr1, sr2; +} __ec_align1; + + +/* Select flash during flash operations */ +#define EC_CMD_FLASH_SELECT 0x0019 + +/** + * struct ec_params_flash_select - Parameters for the flash select command. + * @select: 1 to select flash, 0 to deselect flash + */ +struct ec_params_flash_select { + uint8_t select; +} __ec_align4; + + /*****************************************************************************/ /* PWM commands */ From patchwork Fri May 3 22:02:14 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gwendal Grignou X-Patchwork-Id: 10929265 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 44C37912 for ; Fri, 3 May 2019 22:03:03 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 367D7287CF for ; Fri, 3 May 2019 22:03:03 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 2AFA1287D2; Fri, 3 May 2019 22:03:03 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id CCB62287CF for ; Fri, 3 May 2019 22:03:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726925AbfECWDC (ORCPT ); Fri, 3 May 2019 18:03:02 -0400 Received: from mail-pf1-f195.google.com ([209.85.210.195]:46476 "EHLO mail-pf1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726604AbfECWDC (ORCPT ); Fri, 3 May 2019 18:03:02 -0400 Received: by mail-pf1-f195.google.com with SMTP id j11so3515681pff.13 for ; Fri, 03 May 2019 15:03:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=yl9LIaaw5zAtBfEcA+TBAKczFNYIZa1zYtQlrYAdLxY=; b=TarcXvnKwae48olHX/4jlj+Ay6ojofQt2b8GTMshyqsqe62/8fSEP6HG+X2mAblTx7 P1Ads56S7dF2EL6OWLjXvhAVZNpMS0X4SyQIUVGA9hyd2N8DhExkOCDoQ1gOnyZA+dXD CHulYOGk8lhFWjgPXUiD3Bmx8QXxUS64QFo04= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=yl9LIaaw5zAtBfEcA+TBAKczFNYIZa1zYtQlrYAdLxY=; b=Wg5JXdsW+3wfOzboPALnjid/0ztaKn0474ypB4twQKVfAP29btUt7ceeiKR1syUcCE ZyPlTjiDDfkRBxhGg+uB7D9+YsC1i2zawEsjDsVIEw0y/P1K6x5oAKOq3shKQ172tL3t WXNH9du9QmbSF6Iy6juyc3EVSwuFDSQ4aP1UQR7O4QrYjn3HuM7oJFDp03J2/5lUqHgA 0ohlCcg45m7JS3u9Uo2fTfkTA1gJJxGt02yxNakp1D+4siPKpz2VBG1Tjh4j3Tquu0AJ 2gqQgACtd0B2LNG23hBizVGtKrsId5ljoJH/2gQo7AM36SBMMCEz+nfBAwlhgfqac38Z +hSg== X-Gm-Message-State: APjAAAXaSVOYxnykWrRPHDFsirhzEg6H/I2VKEZsd8hHrv8Of4uLuuMu FsiWtD7U1rlFvsaStyBLtR7Xzg== X-Google-Smtp-Source: APXvYqyNpyWPQJ9mM+GWxXQytWrgsHiA9LYsw79pt4iZnkwhf1QDmNVIfMK+779lK5G6iNvO6rxN3w== X-Received: by 2002:a65:4185:: with SMTP id a5mr13670008pgq.82.1556920981573; Fri, 03 May 2019 15:03:01 -0700 (PDT) Received: from localhost ([2620:15c:202:1:3c8f:512b:3522:dfaf]) by smtp.gmail.com with ESMTPSA id x66sm4241659pfb.78.2019.05.03.15.03.00 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 03 May 2019 15:03:00 -0700 (PDT) From: Gwendal Grignou To: enric.balletbo@collabora.com, bleung@chromium.org, groeck@chromium.org, lee.jones@linaro.org, jic23@kernel.org, broonie@kernel.org, cychiang@chromium.org, tiwai@suse.com Cc: linux-iio@vger.kernel.org, alsa-devel@alsa-project.org, Gwendal Grignou Subject: [PATCH v2 11/30] mfd: cros_ec: Add PWM_SET_DUTY API Date: Fri, 3 May 2019 15:02:14 -0700 Message-Id: <20190503220233.64546-12-gwendal@chromium.org> X-Mailer: git-send-email 2.21.0.1020.gf2820cf01a-goog In-Reply-To: <20190503220233.64546-1-gwendal@chromium.org> References: <20190503220233.64546-1-gwendal@chromium.org> MIME-Version: 1.0 Sender: linux-iio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add API for fan control. Acked-by: Enric Balletbo i Serra Signed-off-by: Gwendal Grignou --- include/linux/mfd/cros_ec_commands.h | 20 ++++++++++++++++++-- 1 file changed, 18 insertions(+), 2 deletions(-) diff --git a/include/linux/mfd/cros_ec_commands.h b/include/linux/mfd/cros_ec_commands.h index 393c5abab7a0..5747bbcfa45f 100644 --- a/include/linux/mfd/cros_ec_commands.h +++ b/include/linux/mfd/cros_ec_commands.h @@ -1491,11 +1491,19 @@ struct ec_response_pwm_get_fan_rpm { /* Set target fan RPM */ #define EC_CMD_PWM_SET_FAN_TARGET_RPM 0x0021 -struct ec_params_pwm_set_fan_target_rpm { +/* Version 0 of input params */ +struct ec_params_pwm_set_fan_target_rpm_v0 { uint32_t rpm; +} __ec_align4; + +/* Version 1 of input params */ +struct ec_params_pwm_set_fan_target_rpm_v1 { + uint32_t rpm; + uint8_t fan_idx; } __ec_align_size1; /* Get keyboard backlight */ +/* OBSOLETE - Use EC_CMD_PWM_SET_DUTY */ #define EC_CMD_PWM_GET_KEYBOARD_BACKLIGHT 0x0022 struct ec_response_pwm_get_keyboard_backlight { @@ -1504,6 +1512,7 @@ struct ec_response_pwm_get_keyboard_backlight { } __ec_align1; /* Set keyboard backlight */ +/* OBSOLETE - Use EC_CMD_PWM_SET_DUTY */ #define EC_CMD_PWM_SET_KEYBOARD_BACKLIGHT 0x0023 struct ec_params_pwm_set_keyboard_backlight { @@ -1513,10 +1522,17 @@ struct ec_params_pwm_set_keyboard_backlight { /* Set target fan PWM duty cycle */ #define EC_CMD_PWM_SET_FAN_DUTY 0x0024 -struct ec_params_pwm_set_fan_duty { +/* Version 0 of input params */ +struct ec_params_pwm_set_fan_duty_v0 { uint32_t percent; } __ec_align4; +/* Version 1 of input params */ +struct ec_params_pwm_set_fan_duty_v1 { + uint32_t percent; + uint8_t fan_idx; +} __ec_align_size1; + #define EC_CMD_PWM_SET_DUTY 0x0025 /* 16 bit duty cycle, 0xffff = 100% */ #define EC_PWM_MAX_DUTY 0xffff From patchwork Fri May 3 22:02:15 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gwendal Grignou X-Patchwork-Id: 10929267 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 814311390 for ; Fri, 3 May 2019 22:03:05 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 72C73287CF for ; Fri, 3 May 2019 22:03:05 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 670D0287D2; Fri, 3 May 2019 22:03:05 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id C7D82287CF for ; Fri, 3 May 2019 22:03:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726928AbfECWDE (ORCPT ); Fri, 3 May 2019 18:03:04 -0400 Received: from mail-pl1-f193.google.com ([209.85.214.193]:35695 "EHLO mail-pl1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726604AbfECWDE (ORCPT ); Fri, 3 May 2019 18:03:04 -0400 Received: by mail-pl1-f193.google.com with SMTP id w24so3324847plp.2 for ; Fri, 03 May 2019 15:03:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=syLGbC6LgwBEoz8/wCdHT2oo9MnmTLydtGDQC37+PpE=; b=VGM0uTCHMN7Lc3t5K0dqxzV1Q7drtr4cvIKkzAX8TO8AX+EfXYIue2a/yCCxSfqEvE p1FS/uE1Hlfx6lIeH7c6J3GTVliAsQCwCYZTi7Enccanr++Q8UPa3hNDU1vWB1Xai9hF WyuHUSWx6KyIfx2uONQwRMsxZiArCJFIugvyg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=syLGbC6LgwBEoz8/wCdHT2oo9MnmTLydtGDQC37+PpE=; b=r8XtbPbiy5qZRMAllqpFfmKbOdgTvW8s+E96jifI8/vBX2qmHpeRyiSvJDQD/7VLcK 5KUbI9pZTo2czH3EcsjtFeHzyXqBRBwp4u4KapELKKwOwE/Jd37dADx10EaMpa4MM+2M 2uHjH5mvCqu0RBpkSfY9cdAAV8m5cDzeW1ziXDx1u75dJ8ovJyAokmr+OJyeb51SiC6g V5Mu1cXjEwIDnsWuah5GKJzfcGJz1gpwCChy63Qa6DegX+TmGGOESOwKaMO71bJL4zst slGSN5PHHLd0Yy4dKMJTkitCi6ADV/uGeS1GQjkSRKlDSOtMWBldwujaWpq2DIbkqLXH TIEQ== X-Gm-Message-State: APjAAAUyXl6pRDoTYBWTtFeg+EUuzNoYHwAs0MB/zClAkt9qhATGAzcT 12wi7kCPnHzuW9il4bDRkliQGQ== X-Google-Smtp-Source: APXvYqyqSKdgYuq4rVzeteojAToyJ2tKxqFIyRSHj93FOrhWxTjqzpGdvDx/AjkBxpU2KazdTs3cjw== X-Received: by 2002:a17:902:8b86:: with SMTP id ay6mr14013894plb.4.1556920983194; Fri, 03 May 2019 15:03:03 -0700 (PDT) Received: from localhost ([2620:15c:202:1:3c8f:512b:3522:dfaf]) by smtp.gmail.com with ESMTPSA id s20sm4308642pgs.39.2019.05.03.15.03.02 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 03 May 2019 15:03:02 -0700 (PDT) From: Gwendal Grignou To: enric.balletbo@collabora.com, bleung@chromium.org, groeck@chromium.org, lee.jones@linaro.org, jic23@kernel.org, broonie@kernel.org, cychiang@chromium.org, tiwai@suse.com Cc: linux-iio@vger.kernel.org, alsa-devel@alsa-project.org, Gwendal Grignou Subject: [PATCH v2 12/30] mfd: cros_ec: Add lightbar v2 API Date: Fri, 3 May 2019 15:02:15 -0700 Message-Id: <20190503220233.64546-13-gwendal@chromium.org> X-Mailer: git-send-email 2.21.0.1020.gf2820cf01a-goog In-Reply-To: <20190503220233.64546-1-gwendal@chromium.org> References: <20190503220233.64546-1-gwendal@chromium.org> MIME-Version: 1.0 Sender: linux-iio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP New API split commands, improve EC command latency. Acked-by: Enric Balletbo i Serra Signed-off-by: Gwendal Grignou --- include/linux/mfd/cros_ec_commands.h | 124 ++++++++++++++++++++++++++- 1 file changed, 120 insertions(+), 4 deletions(-) diff --git a/include/linux/mfd/cros_ec_commands.h b/include/linux/mfd/cros_ec_commands.h index 5747bbcfa45f..d55f155eb735 100644 --- a/include/linux/mfd/cros_ec_commands.h +++ b/include/linux/mfd/cros_ec_commands.h @@ -1628,7 +1628,10 @@ struct lightbar_params_v1 { int32_t s3_sleep_for; int32_t s3_ramp_up; int32_t s3_ramp_down; + int32_t s5_ramp_up; + int32_t s5_ramp_down; int32_t tap_tick_delay; + int32_t tap_gate_delay; int32_t tap_display_time; /* Tap-for-battery params */ @@ -1656,11 +1659,82 @@ struct lightbar_params_v1 { uint8_t s0_idx[2][LB_BATTERY_LEVELS]; /* AP is running */ uint8_t s3_idx[2][LB_BATTERY_LEVELS]; /* AP is sleeping */ + /* s5: single color pulse on inhibited power-up */ + uint8_t s5_idx; + /* Color palette */ struct rgb_s color[8]; /* 0-3 are Google colors */ } __ec_todo_packed; -/* Lightbar program */ +/* Lightbar command params v2 + * crbug.com/467716 + * + * lightbar_parms_v1 was too big for i2c, therefore in v2, we split them up by + * logical groups to make it more manageable ( < 120 bytes). + * + * NOTE: Each of these groups must be less than 120 bytes. + */ + +struct lightbar_params_v2_timing { + /* Timing */ + int32_t google_ramp_up; + int32_t google_ramp_down; + int32_t s3s0_ramp_up; + int32_t s0_tick_delay[2]; /* AC=0/1 */ + int32_t s0a_tick_delay[2]; /* AC=0/1 */ + int32_t s0s3_ramp_down; + int32_t s3_sleep_for; + int32_t s3_ramp_up; + int32_t s3_ramp_down; + int32_t s5_ramp_up; + int32_t s5_ramp_down; + int32_t tap_tick_delay; + int32_t tap_gate_delay; + int32_t tap_display_time; +} __ec_todo_packed; + +struct lightbar_params_v2_tap { + /* Tap-for-battery params */ + uint8_t tap_pct_red; + uint8_t tap_pct_green; + uint8_t tap_seg_min_on; + uint8_t tap_seg_max_on; + uint8_t tap_seg_osc; + uint8_t tap_idx[3]; +} __ec_todo_packed; + +struct lightbar_params_v2_oscillation { + /* Oscillation */ + uint8_t osc_min[2]; /* AC=0/1 */ + uint8_t osc_max[2]; /* AC=0/1 */ + uint8_t w_ofs[2]; /* AC=0/1 */ +} __ec_todo_packed; + +struct lightbar_params_v2_brightness { + /* Brightness limits based on the backlight and AC. */ + uint8_t bright_bl_off_fixed[2]; /* AC=0/1 */ + uint8_t bright_bl_on_min[2]; /* AC=0/1 */ + uint8_t bright_bl_on_max[2]; /* AC=0/1 */ +} __ec_todo_packed; + +struct lightbar_params_v2_thresholds { + /* Battery level thresholds */ + uint8_t battery_threshold[LB_BATTERY_LEVELS - 1]; +} __ec_todo_packed; + +struct lightbar_params_v2_colors { + /* Map [AC][battery_level] to color index */ + uint8_t s0_idx[2][LB_BATTERY_LEVELS]; /* AP is running */ + uint8_t s3_idx[2][LB_BATTERY_LEVELS]; /* AP is sleeping */ + + /* s5: single color pulse on inhibited power-up */ + uint8_t s5_idx; + + /* Color palette */ + struct rgb_s color[8]; /* 0-3 are Google colors */ +} __ec_todo_packed; + +/* Lightbar program. */ #define EC_LB_PROG_LEN 192 struct lightbar_program { uint8_t size; @@ -1674,7 +1748,10 @@ struct ec_params_lightbar { * The following commands have no args: * * dump, off, on, init, get_seq, get_params_v0, get_params_v1, - * version, get_brightness, get_demo, suspend, resume + * version, get_brightness, get_demo, suspend, resume, + * get_params_v2_timing, get_params_v2_tap, get_params_v2_osc, + * get_params_v2_bright, get_params_v2_thlds, + * get_params_v2_colors * * Don't use an empty struct, because C++ hates that. */ @@ -1701,6 +1778,14 @@ struct ec_params_lightbar { struct lightbar_params_v0 set_params_v0; struct lightbar_params_v1 set_params_v1; + + struct lightbar_params_v2_timing set_v2par_timing; + struct lightbar_params_v2_tap set_v2par_tap; + struct lightbar_params_v2_oscillation set_v2par_osc; + struct lightbar_params_v2_brightness set_v2par_bright; + struct lightbar_params_v2_thresholds set_v2par_thlds; + struct lightbar_params_v2_colors set_v2par_colors; + struct lightbar_program set_program; }; } __ec_todo_packed; @@ -1722,6 +1807,14 @@ struct ec_response_lightbar { struct lightbar_params_v0 get_params_v0; struct lightbar_params_v1 get_params_v1; + + struct lightbar_params_v2_timing get_params_v2_timing; + struct lightbar_params_v2_tap get_params_v2_tap; + struct lightbar_params_v2_oscillation get_params_v2_osc; + struct lightbar_params_v2_brightness get_params_v2_bright; + struct lightbar_params_v2_thresholds get_params_v2_thlds; + struct lightbar_params_v2_colors get_params_v2_colors; + struct __ec_todo_unpacked { uint32_t num; uint32_t flags; @@ -1734,9 +1827,11 @@ struct ec_response_lightbar { /* * The following commands have no response: * - * off, on, init, set_brightness, seq, reg, set_rgb, + * off, on, init, set_brightness, seq, reg, set_rgb, demo, * set_params_v0, set_params_v1, set_program, - * manual_suspend_ctrl, suspend, resume + * manual_suspend_ctrl, suspend, resume, set_v2par_timing, + * set_v2par_tap, set_v2par_osc, set_v2par_bright, + * set_v2par_thlds, set_v2par_colors */ }; } __ec_todo_packed; @@ -1765,6 +1860,18 @@ enum lightbar_command { LIGHTBAR_CMD_MANUAL_SUSPEND_CTRL = 19, LIGHTBAR_CMD_SUSPEND = 20, LIGHTBAR_CMD_RESUME = 21, + LIGHTBAR_CMD_GET_PARAMS_V2_TIMING = 22, + LIGHTBAR_CMD_SET_PARAMS_V2_TIMING = 23, + LIGHTBAR_CMD_GET_PARAMS_V2_TAP = 24, + LIGHTBAR_CMD_SET_PARAMS_V2_TAP = 25, + LIGHTBAR_CMD_GET_PARAMS_V2_OSCILLATION = 26, + LIGHTBAR_CMD_SET_PARAMS_V2_OSCILLATION = 27, + LIGHTBAR_CMD_GET_PARAMS_V2_BRIGHTNESS = 28, + LIGHTBAR_CMD_SET_PARAMS_V2_BRIGHTNESS = 29, + LIGHTBAR_CMD_GET_PARAMS_V2_THRESHOLDS = 30, + LIGHTBAR_CMD_SET_PARAMS_V2_THRESHOLDS = 31, + LIGHTBAR_CMD_GET_PARAMS_V2_COLORS = 32, + LIGHTBAR_CMD_SET_PARAMS_V2_COLORS = 33, LIGHTBAR_NUM_CMDS }; @@ -1783,6 +1890,14 @@ enum ec_led_id { EC_LED_ID_POWER_LED, /* LED on power adapter or its plug */ EC_LED_ID_ADAPTER_LED, + /* LED to indicate left side */ + EC_LED_ID_LEFT_LED, + /* LED to indicate right side */ + EC_LED_ID_RIGHT_LED, + /* LED to indicate recovery mode with HW_REINIT */ + EC_LED_ID_RECOVERY_HW_REINIT_LED, + /* LED to indicate sysrq debug mode. */ + EC_LED_ID_SYSRQ_DEBUG_LED, EC_LED_ID_COUNT }; @@ -1797,6 +1912,7 @@ enum ec_led_colors { EC_LED_COLOR_BLUE, EC_LED_COLOR_YELLOW, EC_LED_COLOR_WHITE, + EC_LED_COLOR_AMBER, EC_LED_COLOR_COUNT }; From patchwork Fri May 3 22:02:16 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gwendal Grignou X-Patchwork-Id: 10929269 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 73E461390 for ; Fri, 3 May 2019 22:03:06 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 66902287CF for ; Fri, 3 May 2019 22:03:06 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 5AD6B287D2; Fri, 3 May 2019 22:03:06 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id F196B287CF for ; Fri, 3 May 2019 22:03:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726932AbfECWDF (ORCPT ); Fri, 3 May 2019 18:03:05 -0400 Received: from mail-pf1-f194.google.com ([209.85.210.194]:43011 "EHLO mail-pf1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726604AbfECWDF (ORCPT ); Fri, 3 May 2019 18:03:05 -0400 Received: by mail-pf1-f194.google.com with SMTP id e67so3528053pfe.10 for ; Fri, 03 May 2019 15:03:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=9gD0rOjpw9ms8AskrbFlvCfQcUbKxm7TEx3UNlNN04U=; b=KH+5ig0DFc1zTwYKNJYOfHBjhc2PDb4Cds1wnM6NJoj1pelSlCwD/PCI21VlyaKWeJ WBphiyOpclP72T09Qs/LHN9XCItuX2i3ZLjMOvbJRxd9GWum9L7g5DWHl98Vbr0P2SMq vrgaz8+K8v6/032e198xX5xM0XwAzfnEb13YI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=9gD0rOjpw9ms8AskrbFlvCfQcUbKxm7TEx3UNlNN04U=; b=JjuFeNhLdt+USyjVp1y+2Xv4B318KXKXGtio1bgHXJs4o2WnSmW57+VrY71aTugi+7 wNWkayXhnQ00KBbrj0CeAC+N0cIG3F6Vmbwe5PzCjH0Xt3F5OMN6PAgOsWB7N250J/gt iZIDOvPLYce4GQXr7DBVVs7Ovy1QtQToQGRszSQuYdA5KJTWmh9muhOJpKn7a6mXQlIS oR4acjCQ0IzP6tyyfxyzZdRf5egRGQfbPa8qZDQ/uGqX4EV5c1sT8KJTpDcLzJw+i39X TTDQMsVV8vOiGs7NQ4spc0kwvY4UXW+YZmmn+Uz2zOk7eL7+1QTSDq8Irdq7FO4xoTLT Nv1Q== X-Gm-Message-State: APjAAAXaOcxZfoCbhwAjbv6WBNHz6Qy6yKe6ib7s1txTwgLfV8bGhY/L iKZpTv7NkiV/hlPTZk0qXQTRGg== X-Google-Smtp-Source: APXvYqwRZYTa/D/WqinOmvSIQQW6Xl5SMl55y+eG88O+PeZB5rLTHyfZLrobLweqWzUamBC3Cj9fRQ== X-Received: by 2002:aa7:9085:: with SMTP id i5mr11520540pfa.209.1556920984859; Fri, 03 May 2019 15:03:04 -0700 (PDT) Received: from localhost ([2620:15c:202:1:3c8f:512b:3522:dfaf]) by smtp.gmail.com with ESMTPSA id f22sm3884355pgv.45.2019.05.03.15.03.03 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 03 May 2019 15:03:04 -0700 (PDT) From: Gwendal Grignou To: enric.balletbo@collabora.com, bleung@chromium.org, groeck@chromium.org, lee.jones@linaro.org, jic23@kernel.org, broonie@kernel.org, cychiang@chromium.org, tiwai@suse.com Cc: linux-iio@vger.kernel.org, alsa-devel@alsa-project.org, Gwendal Grignou Subject: [PATCH v2 13/30] mfd: cros_ec: Expand hash API Date: Fri, 3 May 2019 15:02:16 -0700 Message-Id: <20190503220233.64546-14-gwendal@chromium.org> X-Mailer: git-send-email 2.21.0.1020.gf2820cf01a-goog In-Reply-To: <20190503220233.64546-1-gwendal@chromium.org> References: <20190503220233.64546-1-gwendal@chromium.org> MIME-Version: 1.0 Sender: linux-iio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Improve API to verify EC image signature. Acked-by: Enric Balletbo i Serra Signed-off-by: Gwendal Grignou --- include/linux/mfd/cros_ec_commands.h | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/include/linux/mfd/cros_ec_commands.h b/include/linux/mfd/cros_ec_commands.h index d55f155eb735..29a996832af0 100644 --- a/include/linux/mfd/cros_ec_commands.h +++ b/include/linux/mfd/cros_ec_commands.h @@ -1988,8 +1988,15 @@ enum ec_vboot_hash_status { * If one of these is specified, the EC will automatically update offset and * size to the correct values for the specified image (RO or RW). */ -#define EC_VBOOT_HASH_OFFSET_RO 0xfffffffe -#define EC_VBOOT_HASH_OFFSET_RW 0xfffffffd +#define EC_VBOOT_HASH_OFFSET_RO 0xfffffffe +#define EC_VBOOT_HASH_OFFSET_ACTIVE 0xfffffffd +#define EC_VBOOT_HASH_OFFSET_UPDATE 0xfffffffc + +/* + * 'RW' is vague if there are multiple RW images; we mean the active one, + * so the old constant is deprecated. + */ +#define EC_VBOOT_HASH_OFFSET_RW EC_VBOOT_HASH_OFFSET_ACTIVE /*****************************************************************************/ /* From patchwork Fri May 3 22:02:17 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gwendal Grignou X-Patchwork-Id: 10929271 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7B32B912 for ; Fri, 3 May 2019 22:03:11 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6D148287CF for ; Fri, 3 May 2019 22:03:11 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 61588287DB; Fri, 3 May 2019 22:03:11 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 597E5287CF for ; Fri, 3 May 2019 22:03:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726935AbfECWDJ (ORCPT ); Fri, 3 May 2019 18:03:09 -0400 Received: from mail-pl1-f194.google.com ([209.85.214.194]:46915 "EHLO mail-pl1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726604AbfECWDI (ORCPT ); Fri, 3 May 2019 18:03:08 -0400 Received: by mail-pl1-f194.google.com with SMTP id bi2so3298669plb.13 for ; Fri, 03 May 2019 15:03:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=GvWQKN4ldbQtxhC2Mo0V29fBja+ZKnVpKgJauRZWMXc=; b=Sb3qIa/c+z5t+KRSwycp0sHfuZBmeJVIWsbLbDE1cTRbxd6STgm44tjW51Y675C368 dJuQTOfPjLohmWBYgflYxi2FpEi3pUAQhut9WrqyP2QuZZ4TXqtQpgIpuv5+UWKIGYh7 bOG1/BBm4cfSigOEoM2C2qkYWLX/OzGlrTNb4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=GvWQKN4ldbQtxhC2Mo0V29fBja+ZKnVpKgJauRZWMXc=; b=B99rWph5tbblLMVDS/XE9ICltC12bZxCtnyBvhTgFlYFswSwxme8Qlk4htguF7tyz4 pyIvWM77wCEtyyy2KOoE8IJTcCJqyIIN7uo81WK7ndguIeYK1Pmp5wtWlFCNlk+TtkZf bTSSILlXA3ZZU/+HjJ2Zbda/dqAE0wQLZJtAqPP7C5GLAgSnuLbnwQzLmdYXrcdlekpM vQvg3gjCsbg8SWEa3pjbUDSj59Ug5MtpRGqJg81sl32XNtV0tnbUF8bO4Qa7STMhMzeW DfNsVGVgEYHz/FZVFTjqnkTnHZ/QZgKTp3ul1p8RL249IM0Eq6f3SWhs8plOZ9E+9OuM VYGA== X-Gm-Message-State: APjAAAWCJ9ZQrKqdDO5yJi6u4kRKYKxIXR33T1SJqSReBRZhqWcjB3Gm gO5RLgSVMHZWqigtIhRpQjmh7g== X-Google-Smtp-Source: APXvYqxv5YQ9QUjYnNZopsONp33NCin2jYenipJ8UTsEYFIN9EDQKqUXVX/ukdjXJemvrSNPAAMIUA== X-Received: by 2002:a17:902:7d90:: with SMTP id a16mr13457675plm.122.1556920986539; Fri, 03 May 2019 15:03:06 -0700 (PDT) Received: from localhost ([2620:15c:202:1:3c8f:512b:3522:dfaf]) by smtp.gmail.com with ESMTPSA id p2sm8513289pfi.73.2019.05.03.15.03.05 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 03 May 2019 15:03:05 -0700 (PDT) From: Gwendal Grignou To: enric.balletbo@collabora.com, bleung@chromium.org, groeck@chromium.org, lee.jones@linaro.org, jic23@kernel.org, broonie@kernel.org, cychiang@chromium.org, tiwai@suse.com Cc: linux-iio@vger.kernel.org, alsa-devel@alsa-project.org, Gwendal Grignou Subject: [PATCH v2 14/30] mfd: cros_ec: Add EC transport protocol v4 Date: Fri, 3 May 2019 15:02:17 -0700 Message-Id: <20190503220233.64546-15-gwendal@chromium.org> X-Mailer: git-send-email 2.21.0.1020.gf2820cf01a-goog In-Reply-To: <20190503220233.64546-1-gwendal@chromium.org> References: <20190503220233.64546-1-gwendal@chromium.org> MIME-Version: 1.0 Sender: linux-iio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Introduce a new transport procotol between EC and host. Acked-by: Enric Balletbo i Serra Signed-off-by: Gwendal Grignou --- include/linux/mfd/cros_ec_commands.h | 143 ++++++++++++++++++++++++++- 1 file changed, 141 insertions(+), 2 deletions(-) diff --git a/include/linux/mfd/cros_ec_commands.h b/include/linux/mfd/cros_ec_commands.h index 29a996832af0..48e753df7e2d 100644 --- a/include/linux/mfd/cros_ec_commands.h +++ b/include/linux/mfd/cros_ec_commands.h @@ -455,7 +455,10 @@ #define EC_LPC_STATUS_BUSY_MASK \ (EC_LPC_STATUS_FROM_HOST | EC_LPC_STATUS_PROCESSING) -/* Host command response codes */ +/* + * Host command response codes (16-bit). Note that response codes should be + * stored in a uint16_t rather than directly in a value of this type. + */ enum ec_status { EC_RES_SUCCESS = 0, EC_RES_INVALID_COMMAND = 1, @@ -471,7 +474,13 @@ enum ec_status { EC_RES_OVERFLOW = 11, /* Table / data overflow */ EC_RES_INVALID_HEADER = 12, /* Header contains invalid data */ EC_RES_REQUEST_TRUNCATED = 13, /* Didn't get the entire request */ - EC_RES_RESPONSE_TOO_BIG = 14 /* Response was too big to handle */ + EC_RES_RESPONSE_TOO_BIG = 14, /* Response was too big to handle */ + EC_RES_BUS_ERROR = 15, /* Communications bus error */ + EC_RES_BUSY = 16, /* Up but too busy. Should retry */ + EC_RES_INVALID_HEADER_VERSION = 17, /* Header version invalid */ + EC_RES_INVALID_HEADER_CRC = 18, /* Header CRC invalid */ + EC_RES_INVALID_DATA_CRC = 19, /* Data CRC invalid */ + EC_RES_DUP_UNAVAILABLE = 20, /* Can't resend response */ }; /* @@ -744,6 +753,136 @@ struct ec_host_response { uint16_t reserved; } __ec_align4; +/*****************************************************************************/ + +/* + * Host command protocol V4. + * + * Packets always start with a request or response header. They are followed + * by data_len bytes of data. If the data_crc_present flag is set, the data + * bytes are followed by a CRC-8 of that data, using using x^8 + x^2 + x + 1 + * polynomial. + * + * Host algorithm when sending a request q: + * + * 101) tries_left=(some value, e.g. 3); + * 102) q.seq_num++ + * 103) q.seq_dup=0 + * 104) Calculate q.header_crc. + * 105) Send request q to EC. + * 106) Wait for response r. Go to 201 if received or 301 if timeout. + * + * 201) If r.struct_version != 4, go to 301. + * 202) If r.header_crc mismatches calculated CRC for r header, go to 301. + * 203) If r.data_crc_present and r.data_crc mismatches, go to 301. + * 204) If r.seq_num != q.seq_num, go to 301. + * 205) If r.seq_dup == q.seq_dup, return success. + * 207) If r.seq_dup == 1, go to 301. + * 208) Return error. + * + * 301) If --tries_left <= 0, return error. + * 302) If q.seq_dup == 1, go to 105. + * 303) q.seq_dup = 1 + * 304) Go to 104. + * + * EC algorithm when receiving a request q. + * EC has response buffer r, error buffer e. + * + * 101) If q.struct_version != 4, set e.result = EC_RES_INVALID_HEADER_VERSION + * and go to 301 + * 102) If q.header_crc mismatches calculated CRC, set e.result = + * EC_RES_INVALID_HEADER_CRC and go to 301 + * 103) If q.data_crc_present, calculate data CRC. If that mismatches the CRC + * byte at the end of the packet, set e.result = EC_RES_INVALID_DATA_CRC + * and go to 301. + * 104) If q.seq_dup == 0, go to 201. + * 105) If q.seq_num != r.seq_num, go to 201. + * 106) If q.seq_dup == r.seq_dup, go to 205, else go to 203. + * + * 201) Process request q into response r. + * 202) r.seq_num = q.seq_num + * 203) r.seq_dup = q.seq_dup + * 204) Calculate r.header_crc + * 205) If r.data_len > 0 and data is no longer available, set e.result = + * EC_RES_DUP_UNAVAILABLE and go to 301. + * 206) Send response r. + * + * 301) e.seq_num = q.seq_num + * 302) e.seq_dup = q.seq_dup + * 303) Calculate e.header_crc. + * 304) Send error response e. + */ + +/* Version 4 request from host */ +struct ec_host_request4 { + /* + * bits 0-3: struct_version: Structure version (=4) + * bit 4: is_response: Is response (=0) + * bits 5-6: seq_num: Sequence number + * bit 7: seq_dup: Sequence duplicate flag + */ + uint8_t fields0; + + /* + * bits 0-4: command_version: Command version + * bits 5-6: Reserved (set 0, ignore on read) + * bit 7: data_crc_present: Is data CRC present after data + */ + uint8_t fields1; + + /* Command code (EC_CMD_*) */ + uint16_t command; + + /* Length of data which follows this header (not including data CRC) */ + uint16_t data_len; + + /* Reserved (set 0, ignore on read) */ + uint8_t reserved; + + /* CRC-8 of above fields, using x^8 + x^2 + x + 1 polynomial */ + uint8_t header_crc; +} __ec_align4; + +/* Version 4 response from EC */ +struct ec_host_response4 { + /* + * bits 0-3: struct_version: Structure version (=4) + * bit 4: is_response: Is response (=1) + * bits 5-6: seq_num: Sequence number + * bit 7: seq_dup: Sequence duplicate flag + */ + uint8_t fields0; + + /* + * bits 0-6: Reserved (set 0, ignore on read) + * bit 7: data_crc_present: Is data CRC present after data + */ + uint8_t fields1; + + /* Result code (EC_RES_*) */ + uint16_t result; + + /* Length of data which follows this header (not including data CRC) */ + uint16_t data_len; + + /* Reserved (set 0, ignore on read) */ + uint8_t reserved; + + /* CRC-8 of above fields, using x^8 + x^2 + x + 1 polynomial */ + uint8_t header_crc; +} __ec_align4; + +/* Fields in fields0 byte */ +#define EC_PACKET4_0_STRUCT_VERSION_MASK 0x0f +#define EC_PACKET4_0_IS_RESPONSE_MASK 0x10 +#define EC_PACKET4_0_SEQ_NUM_SHIFT 5 +#define EC_PACKET4_0_SEQ_NUM_MASK 0x60 +#define EC_PACKET4_0_SEQ_DUP_MASK 0x80 + +/* Fields in fields1 byte */ +#define EC_PACKET4_1_COMMAND_VERSION_MASK 0x1f /* (request only) */ +#define EC_PACKET4_1_DATA_CRC_PRESENT_MASK 0x80 + /*****************************************************************************/ /* * Notes on commands: From patchwork Fri May 3 22:02:18 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gwendal Grignou X-Patchwork-Id: 10929273 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 994A913AD for ; Fri, 3 May 2019 22:03:11 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8ACB0287CF for ; Fri, 3 May 2019 22:03:11 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 7F4A3287D3; Fri, 3 May 2019 22:03:11 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 263F8287D1 for ; Fri, 3 May 2019 22:03:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726604AbfECWDJ (ORCPT ); Fri, 3 May 2019 18:03:09 -0400 Received: from mail-pl1-f193.google.com ([209.85.214.193]:35902 "EHLO mail-pl1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726934AbfECWDJ (ORCPT ); Fri, 3 May 2019 18:03:09 -0400 Received: by mail-pl1-f193.google.com with SMTP id w20so3323652plq.3 for ; Fri, 03 May 2019 15:03:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=BzlB6FmzRj3nZuBUkAxaNllK7w7zuAjCYEiFuMWM32A=; b=MI1dF1cafShlYSiiILnManvw+XVHtFj9CdiD4dHMkxtcTCjrwABytVRyOlwG04HsDX KWLkf4CrVskchQaapzB2g2VBAEHSZ3yDa+ipWGTBHHnr4GiM+YbWr7KYPHMPfa59c2us 6XnENELF4pZSr4ZweyVwKvqAcSS6Zl58zpW18= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=BzlB6FmzRj3nZuBUkAxaNllK7w7zuAjCYEiFuMWM32A=; b=IM4HyCx4HlUIKQaJYMMx1vdEP25Nl2884LpNMeMWu4waganDrWJaOigKdKFhw8pSld oAB7wpRoXXdWqwOCEIFMpnFuZ2drrUS80j9bmuWmNPDFwRvKCCr2nwmERZCydExs0KdL u/HsQXrJLeoQFx+NMnrxnezkkWLwN5PIkidTUJWfB1WSBPKnDOHSabCFdLJA656KZP7P 8HRRz0XDgSPtFa0Jy4qmyrNzTSjcgCaSUuCuxdUbBnrxVcNrWViCTwQ+vDeNlavob9nm lzYRWKjGNzxchK9h8hRRcbkNGkgHnnbWLQtcl3lgeRK702yRFyr+BVAUvFSUrQJ5zs+H yxNg== X-Gm-Message-State: APjAAAU7reimGNgLY2ADvkNS4jcSTo1cK3eJJsmbsUR/65EQ/rvjrwZW J6oBoFpXbbrEQJsxvDmLBRRv0A== X-Google-Smtp-Source: APXvYqxYPtLmrXJywnSkWNQEU1MWMWtQTGHsdHNrSQ9jGjbbngEfACkbFxhTFm4lc4ibd4uHN2zFDA== X-Received: by 2002:a17:902:aa5:: with SMTP id 34mr13881726plp.263.1556920988124; Fri, 03 May 2019 15:03:08 -0700 (PDT) Received: from localhost ([2620:15c:202:1:3c8f:512b:3522:dfaf]) by smtp.gmail.com with ESMTPSA id h127sm3940175pgc.31.2019.05.03.15.03.07 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 03 May 2019 15:03:07 -0700 (PDT) From: Gwendal Grignou To: enric.balletbo@collabora.com, bleung@chromium.org, groeck@chromium.org, lee.jones@linaro.org, jic23@kernel.org, broonie@kernel.org, cychiang@chromium.org, tiwai@suse.com Cc: linux-iio@vger.kernel.org, alsa-devel@alsa-project.org, Gwendal Grignou Subject: [PATCH v2 15/30] mfd: cros_ec: Complete MEMS sensor API Date: Fri, 3 May 2019 15:02:18 -0700 Message-Id: <20190503220233.64546-16-gwendal@chromium.org> X-Mailer: git-send-email 2.21.0.1020.gf2820cf01a-goog In-Reply-To: <20190503220233.64546-1-gwendal@chromium.org> References: <20190503220233.64546-1-gwendal@chromium.org> MIME-Version: 1.0 Sender: linux-iio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add new command for batched mode, add support for more sensors. Acked-by: Enric Balletbo i Serra Signed-off-by: Gwendal Grignou --- include/linux/mfd/cros_ec_commands.h | 464 +++++++++++++++++++++++---- 1 file changed, 406 insertions(+), 58 deletions(-) diff --git a/include/linux/mfd/cros_ec_commands.h b/include/linux/mfd/cros_ec_commands.h index 48e753df7e2d..594db631452f 100644 --- a/include/linux/mfd/cros_ec_commands.h +++ b/include/linux/mfd/cros_ec_commands.h @@ -2161,7 +2161,13 @@ enum motionsense_command { /* * EC Rate command is a setter/getter command for the EC sampling rate - * of all motion sensors in milliseconds. + * in milliseconds. + * It is per sensor, the EC run sample task at the minimum of all + * sensors EC_RATE. + * For sensors without hardware FIFO, EC_RATE should be equals to 1/ODR + * to collect all the sensor samples. + * For sensor with hardware FIFO, EC_RATE is used as the maximal delay + * to process of all motion sensors in milliseconds. */ MOTIONSENSE_CMD_EC_RATE = 2, @@ -2192,32 +2198,76 @@ enum motionsense_command { MOTIONSENSE_CMD_DATA = 6, /* - * Perform low level calibration.. On sensors that support it, ask to - * do offset calibration. + * Return sensor fifo info. + */ + MOTIONSENSE_CMD_FIFO_INFO = 7, + + /* + * Insert a flush element in the fifo and return sensor fifo info. + * The host can use that element to synchronize its operation. + */ + MOTIONSENSE_CMD_FIFO_FLUSH = 8, + + /* + * Return a portion of the fifo. + */ + MOTIONSENSE_CMD_FIFO_READ = 9, + + /* + * Perform low level calibration. + * On sensors that support it, ask to do offset calibration. */ MOTIONSENSE_CMD_PERFORM_CALIB = 10, /* - * Sensor Offset command is a setter/getter command for the offset used - * for calibration. The offsets can be calculated by the host, or via + * Sensor Offset command is a setter/getter command for the offset + * used for calibration. + * The offsets can be calculated by the host, or via * PERFORM_CALIB command. */ MOTIONSENSE_CMD_SENSOR_OFFSET = 11, - /* Number of motionsense sub-commands. */ - MOTIONSENSE_NUM_CMDS -}; + /* + * List available activities for a MOTION sensor. + * Indicates if they are enabled or disabled. + */ + MOTIONSENSE_CMD_LIST_ACTIVITIES = 12, + + /* + * Activity management + * Enable/Disable activity recognition. + */ + MOTIONSENSE_CMD_SET_ACTIVITY = 13, + + /* + * Lid Angle + */ + MOTIONSENSE_CMD_LID_ANGLE = 14, + + /* + * Allow the FIFO to trigger interrupt via MKBP events. + * By default the FIFO does not send interrupt to process the FIFO + * until the AP is ready or it is coming from a wakeup sensor. + */ + MOTIONSENSE_CMD_FIFO_INT_ENABLE = 15, + + /* + * Spoof the readings of the sensors. The spoofed readings can be set + * to arbitrary values, or will lock to the last read actual values. + */ + MOTIONSENSE_CMD_SPOOF = 16, -enum motionsensor_id { - EC_MOTION_SENSOR_ACCEL_BASE = 0, - EC_MOTION_SENSOR_ACCEL_LID = 1, - EC_MOTION_SENSOR_GYRO = 2, + /* Set lid angle for tablet mode detection. */ + MOTIONSENSE_CMD_TABLET_MODE_LID_ANGLE = 17, /* - * Note, if more sensors are added and this count changes, the padding - * in ec_response_motion_sense dump command must be modified. + * Sensor Scale command is a setter/getter command for the calibration + * scale. */ - EC_MOTION_SENSOR_COUNT = 3 + MOTIONSENSE_CMD_SENSOR_SCALE = 18, + + /* Number of motionsense sub-commands. */ + MOTIONSENSE_NUM_CMDS }; /* List of motion sensor types. */ @@ -2229,6 +2279,7 @@ enum motionsensor_type { MOTIONSENSE_TYPE_LIGHT = 4, MOTIONSENSE_TYPE_ACTIVITY = 5, MOTIONSENSE_TYPE_BARO = 6, + MOTIONSENSE_TYPE_SYNC = 7, MOTIONSENSE_TYPE_MAX, }; @@ -2236,36 +2287,48 @@ enum motionsensor_type { enum motionsensor_location { MOTIONSENSE_LOC_BASE = 0, MOTIONSENSE_LOC_LID = 1, + MOTIONSENSE_LOC_CAMERA = 2, MOTIONSENSE_LOC_MAX, }; /* List of motion sensor chips. */ enum motionsensor_chip { MOTIONSENSE_CHIP_KXCJ9 = 0, + MOTIONSENSE_CHIP_LSM6DS0 = 1, + MOTIONSENSE_CHIP_BMI160 = 2, + MOTIONSENSE_CHIP_SI1141 = 3, + MOTIONSENSE_CHIP_SI1142 = 4, + MOTIONSENSE_CHIP_SI1143 = 5, + MOTIONSENSE_CHIP_KX022 = 6, + MOTIONSENSE_CHIP_L3GD20H = 7, + MOTIONSENSE_CHIP_BMA255 = 8, + MOTIONSENSE_CHIP_BMP280 = 9, + MOTIONSENSE_CHIP_OPT3001 = 10, + MOTIONSENSE_CHIP_BH1730 = 11, + MOTIONSENSE_CHIP_GPIO = 12, + MOTIONSENSE_CHIP_LIS2DH = 13, + MOTIONSENSE_CHIP_LSM6DSM = 14, + MOTIONSENSE_CHIP_LIS2DE = 15, + MOTIONSENSE_CHIP_LIS2MDL = 16, + MOTIONSENSE_CHIP_LSM6DS3 = 17, + MOTIONSENSE_CHIP_LSM6DSO = 18, + MOTIONSENSE_CHIP_LNG2DM = 19, + MOTIONSENSE_CHIP_MAX, }; -/* Module flag masks used for the dump sub-command. */ -#define MOTIONSENSE_MODULE_FLAG_ACTIVE (1<<0) - -/* Sensor flag masks used for the dump sub-command. */ -#define MOTIONSENSE_SENSOR_FLAG_PRESENT (1<<0) - -/* - * Send this value for the data element to only perform a read. If you - * send any other value, the EC will interpret it as data to set and will - * return the actual value set. - */ -#define EC_MOTION_SENSE_NO_VALUE -1 - -#define EC_MOTION_SENSE_INVALID_CALIB_TEMP 0x8000 - -/* Set Calibration information */ -#define MOTION_SENSE_SET_OFFSET 1 +/* List of orientation positions */ +enum motionsensor_orientation { + MOTIONSENSE_ORIENTATION_LANDSCAPE = 0, + MOTIONSENSE_ORIENTATION_PORTRAIT = 1, + MOTIONSENSE_ORIENTATION_UPSIDE_DOWN_PORTRAIT = 2, + MOTIONSENSE_ORIENTATION_UPSIDE_DOWN_LANDSCAPE = 3, + MOTIONSENSE_ORIENTATION_UNKNOWN = 4, +}; struct ec_response_motion_sensor_data { /* Flags for each sensor. */ uint8_t flags; - /* Sensor number the data comes from */ + /* Sensor number the data comes from. */ uint8_t sensor_num; /* Each sensor is up to 3-axis. */ union { @@ -2282,22 +2345,138 @@ struct ec_response_motion_sensor_data { }; } __ec_todo_packed; +/* Note: used in ec_response_get_next_data */ +struct ec_response_motion_sense_fifo_info { + /* Size of the fifo */ + uint16_t size; + /* Amount of space used in the fifo */ + uint16_t count; + /* Timestamp recorded in us. + * aka accurate timestamp when host event was triggered. + */ + uint32_t timestamp; + /* Total amount of vector lost */ + uint16_t total_lost; + /* Lost events since the last fifo_info, per sensors */ + uint16_t lost[0]; +} __ec_todo_packed; + +struct ec_response_motion_sense_fifo_data { + uint32_t number_data; + struct ec_response_motion_sensor_data data[0]; +} __ec_todo_packed; + +/* List supported activity recognition */ +enum motionsensor_activity { + MOTIONSENSE_ACTIVITY_RESERVED = 0, + MOTIONSENSE_ACTIVITY_SIG_MOTION = 1, + MOTIONSENSE_ACTIVITY_DOUBLE_TAP = 2, + MOTIONSENSE_ACTIVITY_ORIENTATION = 3, +}; + +struct ec_motion_sense_activity { + uint8_t sensor_num; + uint8_t activity; /* one of enum motionsensor_activity */ + uint8_t enable; /* 1: enable, 0: disable */ + uint8_t reserved; + uint16_t parameters[3]; /* activity dependent parameters */ +} __ec_todo_unpacked; + +/* Module flag masks used for the dump sub-command. */ +#define MOTIONSENSE_MODULE_FLAG_ACTIVE BIT(0) + +/* Sensor flag masks used for the dump sub-command. */ +#define MOTIONSENSE_SENSOR_FLAG_PRESENT BIT(0) + +/* + * Flush entry for synchronization. + * data contains time stamp + */ +#define MOTIONSENSE_SENSOR_FLAG_FLUSH BIT(0) +#define MOTIONSENSE_SENSOR_FLAG_TIMESTAMP BIT(1) +#define MOTIONSENSE_SENSOR_FLAG_WAKEUP BIT(2) +#define MOTIONSENSE_SENSOR_FLAG_TABLET_MODE BIT(3) +#define MOTIONSENSE_SENSOR_FLAG_ODR BIT(4) + +/* + * Send this value for the data element to only perform a read. If you + * send any other value, the EC will interpret it as data to set and will + * return the actual value set. + */ +#define EC_MOTION_SENSE_NO_VALUE -1 + +#define EC_MOTION_SENSE_INVALID_CALIB_TEMP 0x8000 + +/* MOTIONSENSE_CMD_SENSOR_OFFSET subcommand flag */ +/* Set Calibration information */ +#define MOTION_SENSE_SET_OFFSET BIT(0) + +/* Default Scale value, factor 1. */ +#define MOTION_SENSE_DEFAULT_SCALE BIT(15) + +#define LID_ANGLE_UNRELIABLE 500 + +enum motionsense_spoof_mode { + /* Disable spoof mode. */ + MOTIONSENSE_SPOOF_MODE_DISABLE = 0, + + /* Enable spoof mode, but use provided component values. */ + MOTIONSENSE_SPOOF_MODE_CUSTOM, + + /* Enable spoof mode, but use the current sensor values. */ + MOTIONSENSE_SPOOF_MODE_LOCK_CURRENT, + + /* Query the current spoof mode status for the sensor. */ + MOTIONSENSE_SPOOF_MODE_QUERY, +}; + struct ec_params_motion_sense { uint8_t cmd; union { /* Used for MOTIONSENSE_CMD_DUMP. */ struct __ec_todo_unpacked { - /* no args */ + /* + * Maximal number of sensor the host is expecting. + * 0 means the host is only interested in the number + * of sensors controlled by the EC. + */ + uint8_t max_sensor_count; } dump; /* - * Used for MOTIONSENSE_CMD_EC_RATE and - * MOTIONSENSE_CMD_KB_WAKE_ANGLE. + * Used for MOTIONSENSE_CMD_KB_WAKE_ANGLE. */ struct __ec_todo_unpacked { - /* Data to set or EC_MOTION_SENSE_NO_VALUE to read. */ + /* Data to set or EC_MOTION_SENSE_NO_VALUE to read. + * kb_wake_angle: angle to wakup AP. + */ int16_t data; - } ec_rate, kb_wake_angle; + } kb_wake_angle; + + /* + * Used for MOTIONSENSE_CMD_INFO, MOTIONSENSE_CMD_DATA + * and MOTIONSENSE_CMD_PERFORM_CALIB. + */ + struct __ec_todo_unpacked { + uint8_t sensor_num; + } info, info_3, data, fifo_flush, perform_calib, + list_activities; + + /* + * Used for MOTIONSENSE_CMD_EC_RATE, MOTIONSENSE_CMD_SENSOR_ODR + * and MOTIONSENSE_CMD_SENSOR_RANGE. + */ + struct __ec_todo_unpacked { + uint8_t sensor_num; + + /* Rounding flag, true for round-up, false for down. */ + uint8_t roundup; + + uint16_t reserved; + + /* Data to set or EC_MOTION_SENSE_NO_VALUE to read. */ + int32_t data; + } ec_rate, sensor_odr, sensor_range; /* Used for MOTIONSENSE_CMD_SENSOR_OFFSET */ struct __ec_todo_packed { @@ -2328,33 +2507,99 @@ struct ec_params_motion_sense { int16_t offset[3]; } sensor_offset; - /* Used for MOTIONSENSE_CMD_INFO. */ + /* Used for MOTIONSENSE_CMD_SENSOR_SCALE */ struct __ec_todo_packed { uint8_t sensor_num; - } info; - /* - * Used for MOTIONSENSE_CMD_SENSOR_ODR and - * MOTIONSENSE_CMD_SENSOR_RANGE. - */ - struct { - /* Should be element of enum motionsensor_id. */ - uint8_t sensor_num; + /* + * bit 0: If set (MOTION_SENSE_SET_OFFSET), set + * the calibration information in the EC. + * If unset, just retrieve calibration information. + */ + uint16_t flags; - /* Rounding flag, true for round-up, false for down. */ - uint8_t roundup; + /* + * Temperature at calibration, in units of 0.01 C + * 0x8000: invalid / unknown. + * 0x0: 0C + * 0x7fff: +327.67C + */ + int16_t temp; - uint16_t reserved; + /* + * Scale for calibration: + * By default scale is 1, it is encoded on 16bits: + * 1 = BIT(15) + * ~2 = 0xFFFF + * ~0 = 0. + */ + uint16_t scale[3]; + } sensor_scale; - /* Data to set or EC_MOTION_SENSE_NO_VALUE to read. */ - int32_t data; - } sensor_odr, sensor_range; + + /* Used for MOTIONSENSE_CMD_FIFO_INFO */ + /* (no params) */ + + /* Used for MOTIONSENSE_CMD_FIFO_READ */ + struct __ec_todo_unpacked { + /* + * Number of expected vector to return. + * EC may return less or 0 if none available. + */ + uint32_t max_data_vector; + } fifo_read; + + struct ec_motion_sense_activity set_activity; + + /* Used for MOTIONSENSE_CMD_LID_ANGLE */ + /* (no params) */ + + /* Used for MOTIONSENSE_CMD_FIFO_INT_ENABLE */ + struct __ec_todo_unpacked { + /* + * 1: enable, 0 disable fifo, + * EC_MOTION_SENSE_NO_VALUE return value. + */ + int8_t enable; + } fifo_int_enable; + + /* Used for MOTIONSENSE_CMD_SPOOF */ + struct __ec_todo_packed { + uint8_t sensor_id; + + /* See enum motionsense_spoof_mode. */ + uint8_t spoof_enable; + + /* Ignored, used for alignment. */ + uint8_t reserved; + + /* Individual component values to spoof. */ + int16_t components[3]; + } spoof; + + /* Used for MOTIONSENSE_CMD_TABLET_MODE_LID_ANGLE. */ + struct __ec_todo_unpacked { + /* + * Lid angle threshold for switching between tablet and + * clamshell mode. + */ + int16_t lid_angle; + + /* + * Hysteresis degree to prevent fluctuations between + * clamshell and tablet mode if lid angle keeps + * changing around the threshold. Lid motion driver will + * use lid_angle + hys_degree to trigger tablet mode and + * lid_angle - hys_degree to trigger clamshell mode. + */ + int16_t hys_degree; + } tablet_mode_threshold; }; } __ec_todo_packed; struct ec_response_motion_sense { union { - /* Used for MOTIONSENSE_CMD_DUMP. */ + /* Used for MOTIONSENSE_CMD_DUMP */ struct __ec_todo_unpacked { /* Flags representing the motion sensor module. */ uint8_t module_flags; @@ -2381,27 +2626,118 @@ struct ec_response_motion_sense { uint8_t chip; } info; + /* Used for MOTIONSENSE_CMD_INFO version 3 */ + struct __ec_todo_unpacked { + /* Should be element of enum motionsensor_type. */ + uint8_t type; + + /* Should be element of enum motionsensor_location. */ + uint8_t location; + + /* Should be element of enum motionsensor_chip. */ + uint8_t chip; + + /* Minimum sensor sampling frequency */ + uint32_t min_frequency; + + /* Maximum sensor sampling frequency */ + uint32_t max_frequency; + + /* Max number of sensor events that could be in fifo */ + uint32_t fifo_max_event_count; + } info_3; + /* Used for MOTIONSENSE_CMD_DATA */ struct ec_response_motion_sensor_data data; /* * Used for MOTIONSENSE_CMD_EC_RATE, MOTIONSENSE_CMD_SENSOR_ODR, - * MOTIONSENSE_CMD_SENSOR_RANGE, and - * MOTIONSENSE_CMD_KB_WAKE_ANGLE. + * MOTIONSENSE_CMD_SENSOR_RANGE, + * MOTIONSENSE_CMD_KB_WAKE_ANGLE, + * MOTIONSENSE_CMD_FIFO_INT_ENABLE and + * MOTIONSENSE_CMD_SPOOF. */ struct __ec_todo_unpacked { /* Current value of the parameter queried. */ int32_t ret; - } ec_rate, sensor_odr, sensor_range, kb_wake_angle; + } ec_rate, sensor_odr, sensor_range, kb_wake_angle, + fifo_int_enable, spoof; - /* Used for MOTIONSENSE_CMD_SENSOR_OFFSET */ + /* + * Used for MOTIONSENSE_CMD_SENSOR_OFFSET, + * PERFORM_CALIB. + */ struct __ec_todo_unpacked { int16_t temp; int16_t offset[3]; } sensor_offset, perform_calib; + + /* Used for MOTIONSENSE_CMD_SENSOR_SCALE */ + struct __ec_todo_unpacked { + int16_t temp; + uint16_t scale[3]; + } sensor_scale; + + struct ec_response_motion_sense_fifo_info fifo_info, fifo_flush; + + struct ec_response_motion_sense_fifo_data fifo_read; + + struct __ec_todo_packed { + uint16_t reserved; + uint32_t enabled; + uint32_t disabled; + } list_activities; + + /* No params for set activity */ + + /* Used for MOTIONSENSE_CMD_LID_ANGLE */ + struct __ec_todo_unpacked { + /* + * Angle between 0 and 360 degree if available, + * LID_ANGLE_UNRELIABLE otherwise. + */ + uint16_t value; + } lid_angle; + + /* Used for MOTIONSENSE_CMD_TABLET_MODE_LID_ANGLE. */ + struct __ec_todo_unpacked { + /* + * Lid angle threshold for switching between tablet and + * clamshell mode. + */ + uint16_t lid_angle; + + /* Hysteresis degree. */ + uint16_t hys_degree; + } tablet_mode_threshold; + }; } __ec_todo_packed; +/*****************************************************************************/ +/* Force lid open command */ + +/* Make lid event always open */ +#define EC_CMD_FORCE_LID_OPEN 0x002C + +struct ec_params_force_lid_open { + uint8_t enabled; +} __ec_align1; + +/*****************************************************************************/ +/* Configure the behavior of the power button */ +#define EC_CMD_CONFIG_POWER_BUTTON 0x002D + +enum ec_config_power_button_flags { + /* Enable/Disable power button pulses for x86 devices */ + EC_POWER_BUTTON_ENABLE_PULSE = BIT(0), +}; + +struct ec_params_config_power_button { + /* See enum ec_config_power_button_flags */ + uint8_t flags; +} __ec_align1; + /*****************************************************************************/ /* USB charging control commands */ @@ -2858,6 +3194,12 @@ union __ec_align_offset1 ec_response_get_next_data { /* Unaligned */ uint32_t host_event; + struct __ec_todo_unpacked { + /* For aligning the fifo_info */ + uint8_t reserved[3]; + struct ec_response_motion_sense_fifo_info info; + } sensor_fifo; + uint32_t buttons; uint32_t switches; uint32_t sysrq; @@ -2866,6 +3208,12 @@ union __ec_align_offset1 ec_response_get_next_data { union __ec_align_offset1 ec_response_get_next_data_v1 { uint8_t key_matrix[16]; uint32_t host_event; + struct __ec_todo_unpacked { + /* For aligning the fifo_info */ + uint8_t reserved[3]; + struct ec_response_motion_sense_fifo_info info; + } sensor_fifo; + uint32_t buttons; uint32_t switches; uint32_t sysrq; From patchwork Fri May 3 22:02:19 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gwendal Grignou X-Patchwork-Id: 10929275 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 065581850 for ; Fri, 3 May 2019 22:03:12 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id EB1EF287CF for ; Fri, 3 May 2019 22:03:11 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id DFBD3287D1; Fri, 3 May 2019 22:03:11 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E0134287D2 for ; Fri, 3 May 2019 22:03:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726939AbfECWDK (ORCPT ); Fri, 3 May 2019 18:03:10 -0400 Received: from mail-pl1-f194.google.com ([209.85.214.194]:35701 "EHLO mail-pl1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726934AbfECWDK (ORCPT ); Fri, 3 May 2019 18:03:10 -0400 Received: by mail-pl1-f194.google.com with SMTP id w24so3324940plp.2 for ; Fri, 03 May 2019 15:03:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=bSuxoZ7+qYB19ztbsWp6BeCaVFDU7BjmtK6s9ryilDs=; b=Ao+NzMz/+/OEYvZWA3aRImeh+izLu7ADfRtCMc/YP7vKVJ/CtYBT3w1bew7nYm8vUJ r176MgFGsI2YE0lYETFQEpDaXDdYuMp5q95QVCYpm2kRysjgyQABlr4y7vbCRP831LIS yUHVKDUR0tAmiTNyPa3IjSkhuvATh2jBzCY+k= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=bSuxoZ7+qYB19ztbsWp6BeCaVFDU7BjmtK6s9ryilDs=; b=h7RPX9Yy6kgSQLAYvWx9R4Y63JNZgeeCbq7kF0u16HZTT1tvsBzAALmSh9g7T5RA3k u/FFZcVd9Y7vj8cp8dg3WQt1PF1mwqP4kI4KQWsmUGXWnbb8LL00mehWjI7Mvhwmjc6H /pN0SDQ8EpDHWmo/opLCzrq0OxbNEUoCj2mBJZqsoJNixAc/gHgl7gJ3RfwIZ8ESR+uN 2NS6xASAZS6W1S8+F5kyGtmAQ9Qw70casV+aCPAr+2Ed2S34t3WJEpz2zPAoY7tMsswf 9Poz3ifEIIl7FsIYIgPBhLMeySmncMytSgpPYSAOrVuXXLW7F7LE7KrA9MnUY6PvzElo HWdQ== X-Gm-Message-State: APjAAAUh93XHSPS19XZMtyPVsZa+WLoH04iC3c+q/xpnFpboclPLtPx3 iJYG4SGphvQLjrlK2V2+WzQrfA== X-Google-Smtp-Source: APXvYqx5iDGBZFLs41qnvLeFfoo8z02V77Yp1/nm8OQcOzyhBV726RNWuFdfN2FqD7es15wrqCGfuw== X-Received: by 2002:a17:902:bd4b:: with SMTP id b11mr13654767plx.68.1556920989636; Fri, 03 May 2019 15:03:09 -0700 (PDT) Received: from localhost ([2620:15c:202:1:3c8f:512b:3522:dfaf]) by smtp.gmail.com with ESMTPSA id o81sm6009287pfa.156.2019.05.03.15.03.08 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 03 May 2019 15:03:08 -0700 (PDT) From: Gwendal Grignou To: enric.balletbo@collabora.com, bleung@chromium.org, groeck@chromium.org, lee.jones@linaro.org, jic23@kernel.org, broonie@kernel.org, cychiang@chromium.org, tiwai@suse.com Cc: linux-iio@vger.kernel.org, alsa-devel@alsa-project.org, Gwendal Grignou Subject: [PATCH v2 16/30] mfd: cros_ec: Fix event processing API Date: Fri, 3 May 2019 15:02:19 -0700 Message-Id: <20190503220233.64546-17-gwendal@chromium.org> X-Mailer: git-send-email 2.21.0.1020.gf2820cf01a-goog In-Reply-To: <20190503220233.64546-1-gwendal@chromium.org> References: <20190503220233.64546-1-gwendal@chromium.org> MIME-Version: 1.0 Sender: linux-iio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Improve API between EC and Host to report events. Acked-by: Enric Balletbo i Serra Signed-off-by: Gwendal Grignou --- include/linux/mfd/cros_ec_commands.h | 115 ++++++++++++++++++++++++--- 1 file changed, 105 insertions(+), 10 deletions(-) diff --git a/include/linux/mfd/cros_ec_commands.h b/include/linux/mfd/cros_ec_commands.h index 594db631452f..2d59b4480876 100644 --- a/include/linux/mfd/cros_ec_commands.h +++ b/include/linux/mfd/cros_ec_commands.h @@ -500,7 +500,8 @@ enum host_event_code { EC_HOST_EVENT_BATTERY_CRITICAL = 7, EC_HOST_EVENT_BATTERY = 8, EC_HOST_EVENT_THERMAL_THRESHOLD = 9, - EC_HOST_EVENT_THERMAL_OVERLOAD = 10, + /* Event generated by a device attached to the EC */ + EC_HOST_EVENT_DEVICE = 10, EC_HOST_EVENT_THERMAL = 11, EC_HOST_EVENT_USB_CHARGER = 12, EC_HOST_EVENT_KEY_PRESSED = 13, @@ -527,15 +528,34 @@ enum host_event_code { EC_HOST_EVENT_HANG_DETECT = 20, /* Hang detect logic detected a hang and warm rebooted the AP */ EC_HOST_EVENT_HANG_REBOOT = 21, + /* PD MCU triggering host event */ EC_HOST_EVENT_PD_MCU = 22, - /* EC desires to change state of host-controlled USB mux */ - EC_HOST_EVENT_USB_MUX = 28, + /* Battery Status flags have changed */ + EC_HOST_EVENT_BATTERY_STATUS = 23, + + /* EC encountered a panic, triggering a reset */ + EC_HOST_EVENT_PANIC = 24, + + /* Keyboard fastboot combo has been pressed */ + EC_HOST_EVENT_KEYBOARD_FASTBOOT = 25, /* EC RTC event occurred */ EC_HOST_EVENT_RTC = 26, + /* Emulate MKBP event */ + EC_HOST_EVENT_MKBP = 27, + + /* EC desires to change state of host-controlled USB mux */ + EC_HOST_EVENT_USB_MUX = 28, + + /* TABLET/LAPTOP mode or detachable base attach/detach event */ + EC_HOST_EVENT_MODE_CHANGE = 29, + + /* Keyboard recovery combo with hardware reinitialization */ + EC_HOST_EVENT_KEYBOARD_RECOVERY_HW_REINIT = 30, + /* * The high bit of the event mask is not used as a host event code. If * it reads back as set, then the entire event mask should be @@ -1227,10 +1247,40 @@ enum ec_feature_code { EC_FEATURE_USB_MUX = 23, /* Motion Sensor code has an internal software FIFO */ EC_FEATURE_MOTION_SENSE_FIFO = 24, + /* Support temporary secure vstore */ + EC_FEATURE_VSTORE = 25, + /* EC decides on USB-C SS mux state, muxes configured by host */ + EC_FEATURE_USBC_SS_MUX_VIRTUAL = 26, /* EC has RTC feature that can be controlled by host commands */ EC_FEATURE_RTC = 27, + /* The MCU exposes a Fingerprint sensor */ + EC_FEATURE_FINGERPRINT = 28, + /* The MCU exposes a Touchpad */ + EC_FEATURE_TOUCHPAD = 29, + /* The MCU has RWSIG task enabled */ + EC_FEATURE_RWSIG = 30, + /* EC has device events support */ + EC_FEATURE_DEVICE_EVENT = 31, + /* EC supports the unified wake masks for LPC/eSPI systems */ + EC_FEATURE_UNIFIED_WAKE_MASKS = 32, + /* EC supports 64-bit host events */ + EC_FEATURE_HOST_EVENT64 = 33, + /* EC runs code in RAM (not in place, a.k.a. XIP) */ + EC_FEATURE_EXEC_IN_RAM = 34, /* EC supports CEC commands */ EC_FEATURE_CEC = 35, + /* EC supports tight sensor timestamping. */ + EC_FEATURE_MOTION_SENSE_TIGHT_TIMESTAMPS = 36, + /* + * EC supports tablet mode detection aligned to Chrome and allows + * setting of threshold by host command using + * MOTIONSENSE_CMD_TABLET_MODE_LID_ANGLE. + */ + EC_FEATURE_REFINED_TABLET_MODE_HYSTERESIS = 37, + /* EC supports audio codec. */ + EC_FEATURE_AUDIO_CODEC = 38, + /* The MCU is a System Companion Processor (SCP). */ + EC_FEATURE_SCP = 39, /* The MCU is an Integrated Sensor Hub */ EC_FEATURE_ISH = 40, }; @@ -3153,12 +3203,23 @@ struct ec_result_keyscan_seq_ctrl { } __ec_todo_packed; /* - * Command for retrieving the next pending MKBP event from the EC device + * Get the next pending MKBP event. * - * The device replies with UNAVAILABLE if there aren't any pending events. + * Returns EC_RES_UNAVAILABLE if there is no event pending. */ #define EC_CMD_GET_NEXT_EVENT 0x0067 +#define EC_MKBP_HAS_MORE_EVENTS_SHIFT 7 + +/* + * We use the most significant bit of the event type to indicate to the host + * that the EC has more MKBP events available to provide. + */ +#define EC_MKBP_HAS_MORE_EVENTS BIT(EC_MKBP_HAS_MORE_EVENTS_SHIFT) + +/* The mask to apply to get the raw event type */ +#define EC_MKBP_EVENT_TYPE_MASK (BIT(EC_MKBP_HAS_MORE_EVENTS_SHIFT) - 1) + enum ec_mkbp_event { /* Keyboard matrix changed. The event data is the new matrix state. */ EC_MKBP_EVENT_KEY_MATRIX = 0, @@ -3175,9 +3236,21 @@ enum ec_mkbp_event { /* The state of the switches have changed. */ EC_MKBP_EVENT_SWITCH = 4, - /* EC sent a sysrq command */ + /* New Fingerprint sensor event, the event data is fp_events bitmap. */ + EC_MKBP_EVENT_FINGERPRINT = 5, + + /* + * Sysrq event: send emulated sysrq. The event data is sysrq, + * corresponding to the key to be pressed. + */ EC_MKBP_EVENT_SYSRQ = 6, + /* + * New 64-bit host event. + * The event data is 8 bytes of host event flags. + */ + EC_MKBP_EVENT_HOST_EVENT64 = 7, + /* Notify the AP that something happened on CEC */ EC_MKBP_EVENT_CEC_EVENT = 8, @@ -3187,12 +3260,14 @@ enum ec_mkbp_event { /* Number of MKBP events */ EC_MKBP_EVENT_COUNT, }; +BUILD_ASSERT(EC_MKBP_EVENT_COUNT <= EC_MKBP_EVENT_TYPE_MASK); union __ec_align_offset1 ec_response_get_next_data { uint8_t key_matrix[13]; /* Unaligned */ - uint32_t host_event; + uint32_t host_event; + uint64_t host_event64; struct __ec_todo_unpacked { /* For aligning the fifo_info */ @@ -3200,14 +3275,25 @@ union __ec_align_offset1 ec_response_get_next_data { struct ec_response_motion_sense_fifo_info info; } sensor_fifo; - uint32_t buttons; - uint32_t switches; - uint32_t sysrq; + uint32_t buttons; + + uint32_t switches; + + uint32_t fp_events; + + uint32_t sysrq; + + /* CEC events from enum mkbp_cec_event */ + uint32_t cec_events; }; union __ec_align_offset1 ec_response_get_next_data_v1 { uint8_t key_matrix[16]; + + /* Unaligned */ uint32_t host_event; + uint64_t host_event64; + struct __ec_todo_unpacked { /* For aligning the fifo_info */ uint8_t reserved[3]; @@ -3215,11 +3301,19 @@ union __ec_align_offset1 ec_response_get_next_data_v1 { } sensor_fifo; uint32_t buttons; + uint32_t switches; + + uint32_t fp_events; + uint32_t sysrq; + + /* CEC events from enum mkbp_cec_event */ uint32_t cec_events; + uint8_t cec_message[16]; }; +BUILD_ASSERT(sizeof(union ec_response_get_next_data_v1) == 16); struct ec_response_get_next_event { uint8_t event_type; @@ -3238,6 +3332,7 @@ struct ec_response_get_next_event_v1 { #define EC_MKBP_POWER_BUTTON 0 #define EC_MKBP_VOL_UP 1 #define EC_MKBP_VOL_DOWN 2 +#define EC_MKBP_RECOVERY 3 /* Switches */ #define EC_MKBP_LID_OPEN 0 From patchwork Fri May 3 22:02:20 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gwendal Grignou X-Patchwork-Id: 10929277 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id ED72B1390 for ; Fri, 3 May 2019 22:03:12 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id DEECD287CF for ; Fri, 3 May 2019 22:03:12 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id D3036287D2; Fri, 3 May 2019 22:03:12 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7A8B8287CF for ; Fri, 3 May 2019 22:03:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726940AbfECWDM (ORCPT ); Fri, 3 May 2019 18:03:12 -0400 Received: from mail-pf1-f194.google.com ([209.85.210.194]:42349 "EHLO mail-pf1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726934AbfECWDL (ORCPT ); Fri, 3 May 2019 18:03:11 -0400 Received: by mail-pf1-f194.google.com with SMTP id 13so3227305pfw.9 for ; Fri, 03 May 2019 15:03:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=/YdMBv2JbD+JMuVmqPdEWtBwMJQhsKyQHNFOHdvl1N0=; b=eJsxHrmwC2QbMKNCw6wdkeVDYXxoP1tLcZbMrimsNjsvUS6jk1V/T8nMJdqGAdD6Cb B9hGeT6WwVpKQxoKwO6oH1OJqRMIHPXQLbagoQP50PIyZfD+nWTiXKwprjiWq/lFhfo7 Tn6cpGYiGzKxJrl9gc1Lmyxsq6ZtoT/uyFL9w= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=/YdMBv2JbD+JMuVmqPdEWtBwMJQhsKyQHNFOHdvl1N0=; b=CbVDtLosoStq56GrQdPgtoFKhNOr0MHBIIxErtytF/mAl5Zk7mj0kL+YI6GV17m7lO Y7ubUIFUAa51+SpYRnnfuGHFJjVyL/pWCDEi4ulqbnkm0LzlI+saK7D9MdyG0xvZisUu UGa1oD2Xox0RmTA1k+E7H8407DE8MSzFXvGcITXuqMC3dltyooKiXPx+N0G1bP9B2NIH 1lJIvJVKPulQbU+yeMpxJ/EQobqFJJQynQhiSgcYVVQwF62+YAfn/H/CogeoeI16DNUT QNTmRNv4WPLY9V5LheEKmB94gvOmyPn1brlhzevGoHT48nzSNRI4lVne2TqR4mJDi9gt Y2qQ== X-Gm-Message-State: APjAAAVAxzFqHCSQUOKJvPagxMJ9QirAh/UelMT54C1fANvY7jT9E6b7 CR0SpGxWR6SuFHUSlxxO/xpT+g== X-Google-Smtp-Source: APXvYqw5tCuqq+vYOC4kMN4VAag5nQaDGAjptCMcGAquI0SAsN4sRjIbD7bxOhn6RGSAe6MjN2PnOA== X-Received: by 2002:a63:3dca:: with SMTP id k193mr13875616pga.146.1556920991276; Fri, 03 May 2019 15:03:11 -0700 (PDT) Received: from localhost ([2620:15c:202:1:3c8f:512b:3522:dfaf]) by smtp.gmail.com with ESMTPSA id g72sm8053070pfg.63.2019.05.03.15.03.10 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 03 May 2019 15:03:10 -0700 (PDT) From: Gwendal Grignou To: enric.balletbo@collabora.com, bleung@chromium.org, groeck@chromium.org, lee.jones@linaro.org, jic23@kernel.org, broonie@kernel.org, cychiang@chromium.org, tiwai@suse.com Cc: linux-iio@vger.kernel.org, alsa-devel@alsa-project.org, Gwendal Grignou Subject: [PATCH v2 17/30] mfd: cros_ec: Add fingerprint API Date: Fri, 3 May 2019 15:02:20 -0700 Message-Id: <20190503220233.64546-18-gwendal@chromium.org> X-Mailer: git-send-email 2.21.0.1020.gf2820cf01a-goog In-Reply-To: <20190503220233.64546-1-gwendal@chromium.org> References: <20190503220233.64546-1-gwendal@chromium.org> MIME-Version: 1.0 Sender: linux-iio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add support for fingerprint sensors managed by embedded controller. Acked-by: Enric Balletbo i Serra Signed-off-by: Gwendal Grignou --- include/linux/mfd/cros_ec_commands.h | 34 ++++++++++++++++++++++++++++ 1 file changed, 34 insertions(+) diff --git a/include/linux/mfd/cros_ec_commands.h b/include/linux/mfd/cros_ec_commands.h index 2d59b4480876..399fedebc388 100644 --- a/include/linux/mfd/cros_ec_commands.h +++ b/include/linux/mfd/cros_ec_commands.h @@ -3339,6 +3339,40 @@ struct ec_response_get_next_event_v1 { #define EC_MKBP_TABLET_MODE 1 #define EC_MKBP_BASE_ATTACHED 2 +/* Fingerprint events in 'fp_events' for EC_MKBP_EVENT_FINGERPRINT */ +#define EC_MKBP_FP_RAW_EVENT(fp_events) ((fp_events) & 0x00FFFFFF) +#define EC_MKBP_FP_ERRCODE(fp_events) ((fp_events) & 0x0000000F) +#define EC_MKBP_FP_ENROLL_PROGRESS_OFFSET 4 +#define EC_MKBP_FP_ENROLL_PROGRESS(fpe) (((fpe) & 0x00000FF0) \ + >> EC_MKBP_FP_ENROLL_PROGRESS_OFFSET) +#define EC_MKBP_FP_MATCH_IDX_OFFSET 12 +#define EC_MKBP_FP_MATCH_IDX_MASK 0x0000F000 +#define EC_MKBP_FP_MATCH_IDX(fpe) (((fpe) & EC_MKBP_FP_MATCH_IDX_MASK) \ + >> EC_MKBP_FP_MATCH_IDX_OFFSET) +#define EC_MKBP_FP_ENROLL BIT(27) +#define EC_MKBP_FP_MATCH BIT(28) +#define EC_MKBP_FP_FINGER_DOWN BIT(29) +#define EC_MKBP_FP_FINGER_UP BIT(30) +#define EC_MKBP_FP_IMAGE_READY BIT(31) +/* code given by EC_MKBP_FP_ERRCODE() when EC_MKBP_FP_ENROLL is set */ +#define EC_MKBP_FP_ERR_ENROLL_OK 0 +#define EC_MKBP_FP_ERR_ENROLL_LOW_QUALITY 1 +#define EC_MKBP_FP_ERR_ENROLL_IMMOBILE 2 +#define EC_MKBP_FP_ERR_ENROLL_LOW_COVERAGE 3 +#define EC_MKBP_FP_ERR_ENROLL_INTERNAL 5 +/* Can be used to detect if image was usable for enrollment or not. */ +#define EC_MKBP_FP_ERR_ENROLL_PROBLEM_MASK 1 +/* code given by EC_MKBP_FP_ERRCODE() when EC_MKBP_FP_MATCH is set */ +#define EC_MKBP_FP_ERR_MATCH_NO 0 +#define EC_MKBP_FP_ERR_MATCH_NO_INTERNAL 6 +#define EC_MKBP_FP_ERR_MATCH_NO_TEMPLATES 7 +#define EC_MKBP_FP_ERR_MATCH_NO_LOW_QUALITY 2 +#define EC_MKBP_FP_ERR_MATCH_NO_LOW_COVERAGE 4 +#define EC_MKBP_FP_ERR_MATCH_YES 1 +#define EC_MKBP_FP_ERR_MATCH_YES_UPDATED 3 +#define EC_MKBP_FP_ERR_MATCH_YES_UPDATE_FAILED 5 + + /*****************************************************************************/ /* Temperature sensor commands */ From patchwork Fri May 3 22:02:21 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gwendal Grignou X-Patchwork-Id: 10929279 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D3195912 for ; Fri, 3 May 2019 22:03:14 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id C351B287CF for ; Fri, 3 May 2019 22:03:14 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id B3E49287CE; Fri, 3 May 2019 22:03:14 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 41A6A287CE for ; Fri, 3 May 2019 22:03:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726943AbfECWDO (ORCPT ); Fri, 3 May 2019 18:03:14 -0400 Received: from mail-pg1-f193.google.com ([209.85.215.193]:36376 "EHLO mail-pg1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726934AbfECWDN (ORCPT ); Fri, 3 May 2019 18:03:13 -0400 Received: by mail-pg1-f193.google.com with SMTP id 85so3346481pgc.3 for ; Fri, 03 May 2019 15:03:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=zj+rDjSkJOhz1N/XOl6SSLdylSUBECWuuj+dvjAws5U=; b=mWhkG9Oq3psODcE+spBqrH00KjwcvEqznb20Xem+1sKld/AL1TZdOIgmqIhiGlJUn1 WJ7uJSAuND/tkiBqdQLNeMUzrGMI6ixuhA2M5/6jcElGtVn5mLvmbjLkb1z+QEowxDh5 QO4sIpvSbej6CGdINoA4+FQlEN4uOb2/0ORhM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=zj+rDjSkJOhz1N/XOl6SSLdylSUBECWuuj+dvjAws5U=; b=Z3G3lX2C5rgXwyhu/kxNJCdfLB/TYAuSyTAZc3hRCMuUj3zJ5DOaz2Y8ZTONfsKL8k 9aSYjZj5IMHrKLC6L3iDLiUvO91yw0zJOaPW5fzShZNOaSA6k6jRtOmtIlRLubtU2C5o wqEV9YsQey+1O7BdHQvRUF6XiIp252yUaWWUoFhHWeoga/HyWj4rGAs47mvYVxA+E6Xj nuquNcOz12Z95HekhKH1WXZrcBjaWqmBGFrJJc0MDiFxnbN3BLdQBHNg1Kgo7sZpvLjJ lLPlRzNIZ8y14BpgQV35hNhyDwpZCfBmIsUt3hG5W2c6dpnkfvAypFrU1KLno67/Mu9+ UlZw== X-Gm-Message-State: APjAAAXV2IUXTo5BPG6y8+Sx5ffPdyfUAu0ghxbCWgks6/Y88N96J532 gvFLtmSJ3TRKFOK2PS5zfveySQ== X-Google-Smtp-Source: APXvYqzKXhg1UL8DtpnCX9QtnX3aYyyTtbNoHDcvoVolx8di+OCrTQPCMyA3hYufYClD5jff0AT+Mg== X-Received: by 2002:a63:e003:: with SMTP id e3mr14035652pgh.0.1556920993153; Fri, 03 May 2019 15:03:13 -0700 (PDT) Received: from localhost ([2620:15c:202:1:3c8f:512b:3522:dfaf]) by smtp.gmail.com with ESMTPSA id z7sm3604397pgh.81.2019.05.03.15.03.12 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 03 May 2019 15:03:12 -0700 (PDT) From: Gwendal Grignou To: enric.balletbo@collabora.com, bleung@chromium.org, groeck@chromium.org, lee.jones@linaro.org, jic23@kernel.org, broonie@kernel.org, cychiang@chromium.org, tiwai@suse.com Cc: linux-iio@vger.kernel.org, alsa-devel@alsa-project.org, Gwendal Grignou Subject: [PATCH v2 18/30] mfd: cros_ec: Fix temperature API Date: Fri, 3 May 2019 15:02:21 -0700 Message-Id: <20190503220233.64546-19-gwendal@chromium.org> X-Mailer: git-send-email 2.21.0.1020.gf2820cf01a-goog In-Reply-To: <20190503220233.64546-1-gwendal@chromium.org> References: <20190503220233.64546-1-gwendal@chromium.org> MIME-Version: 1.0 Sender: linux-iio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Improve API to retrieve temperature information. Acked-by: Enric Balletbo i Serra Signed-off-by: Gwendal Grignou --- include/linux/mfd/cros_ec_commands.h | 64 +++++++++++++++++++++++++--- 1 file changed, 57 insertions(+), 7 deletions(-) diff --git a/include/linux/mfd/cros_ec_commands.h b/include/linux/mfd/cros_ec_commands.h index 399fedebc388..94689698330f 100644 --- a/include/linux/mfd/cros_ec_commands.h +++ b/include/linux/mfd/cros_ec_commands.h @@ -2945,9 +2945,28 @@ enum ec_temp_thresholds { /* * Thermal configuration for one temperature sensor. Temps are in degrees K. * Zero values will be silently ignored by the thermal task. + * + * Set 'temp_host' value allows thermal task to trigger some event with 1 degree + * hysteresis. + * For example, + * temp_host[EC_TEMP_THRESH_HIGH] = 300 K + * temp_host_release[EC_TEMP_THRESH_HIGH] = 0 K + * EC will throttle ap when temperature >= 301 K, and release throttling when + * temperature <= 299 K. + * + * Set 'temp_host_release' value allows thermal task has a custom hysteresis. + * For example, + * temp_host[EC_TEMP_THRESH_HIGH] = 300 K + * temp_host_release[EC_TEMP_THRESH_HIGH] = 295 K + * EC will throttle ap when temperature >= 301 K, and release throttling when + * temperature <= 294 K. + * + * Note that this structure is a sub-structure of + * ec_params_thermal_set_threshold_v1, but maintains its alignment there. */ struct ec_thermal_config { uint32_t temp_host[EC_TEMP_THRESH_COUNT]; /* levels of hotness */ + uint32_t temp_host_release[EC_TEMP_THRESH_COUNT]; /* release levels */ uint32_t temp_fan_off; /* no active cooling needed */ uint32_t temp_fan_max; /* max active cooling needed */ } __ec_align4; @@ -2973,32 +2992,63 @@ struct ec_params_thermal_set_threshold_v1 { /* Toggle automatic fan control */ #define EC_CMD_THERMAL_AUTO_FAN_CTRL 0x0052 -/* Get TMP006 calibration data */ +/* Version 1 of input params */ +struct ec_params_auto_fan_ctrl_v1 { + uint8_t fan_idx; +} __ec_align1; + +/* Get/Set TMP006 calibration data */ #define EC_CMD_TMP006_GET_CALIBRATION 0x0053 +#define EC_CMD_TMP006_SET_CALIBRATION 0x0054 + +/* + * The original TMP006 calibration only needed four params, but now we need + * more. Since the algorithm is nothing but magic numbers anyway, we'll leave + * the params opaque. The v1 "get" response will include the algorithm number + * and how many params it requires. That way we can change the EC code without + * needing to update this file. We can also use a different algorithm on each + * sensor. + */ +/* This is the same struct for both v0 and v1. */ struct ec_params_tmp006_get_calibration { uint8_t index; } __ec_align1; -struct ec_response_tmp006_get_calibration { +/* Version 0 */ +struct ec_response_tmp006_get_calibration_v0 { float s0; float b0; float b1; float b2; } __ec_align4; -/* Set TMP006 calibration data */ -#define EC_CMD_TMP006_SET_CALIBRATION 0x0054 - -struct ec_params_tmp006_set_calibration { +struct ec_params_tmp006_set_calibration_v0 { uint8_t index; - uint8_t reserved[3]; /* Reserved; set 0 */ + uint8_t reserved[3]; float s0; float b0; float b1; float b2; } __ec_align4; +/* Version 1 */ +struct ec_response_tmp006_get_calibration_v1 { + uint8_t algorithm; + uint8_t num_params; + uint8_t reserved[2]; + float val[0]; +} __ec_align4; + +struct ec_params_tmp006_set_calibration_v1 { + uint8_t index; + uint8_t algorithm; + uint8_t num_params; + uint8_t reserved; + float val[0]; +} __ec_align4; + + /* Read raw TMP006 data */ #define EC_CMD_TMP006_GET_RAW 0x0055 From patchwork Fri May 3 22:02:22 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gwendal Grignou X-Patchwork-Id: 10929281 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 467201390 for ; Fri, 3 May 2019 22:03:17 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 35F91287CE for ; Fri, 3 May 2019 22:03:17 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 29430287D1; Fri, 3 May 2019 22:03:17 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 48E87287CE for ; Fri, 3 May 2019 22:03:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726944AbfECWDP (ORCPT ); Fri, 3 May 2019 18:03:15 -0400 Received: from mail-pg1-f193.google.com ([209.85.215.193]:42549 "EHLO mail-pg1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726934AbfECWDP (ORCPT ); Fri, 3 May 2019 18:03:15 -0400 Received: by mail-pg1-f193.google.com with SMTP id p6so3336681pgh.9 for ; Fri, 03 May 2019 15:03:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=+X3AK2omrSxZh6Yt9q7Y+gWn9FBDG22axBFybcJaAB4=; b=Nx0jmtWEznFrPI+n9vT1de0+QA/NoHl/WRpQ/maFzC/8ZHz+ducJLpV6BKZnC8abln FB/B77pDg65g2X4V99LYP99q5VN+d/dX1Iykgd+xA7qg/1Dno8vEzm94QPIYIJmCGWyf LDcrr66GdPJacNRS0KSFw+jUDEW0rQvpRLP5Y= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=+X3AK2omrSxZh6Yt9q7Y+gWn9FBDG22axBFybcJaAB4=; b=hz6X26rgY9oMgZsbswOA853xB4QWwj8ZO/XUw0vd852ut9loO6wQyeRW6Toe+AnHDz i6fALUZV63eHIlA9aMkQpv23H4dFUnTB48lp1rd/D9g4hmcgHLMTrT+RtyBNWx7xPpgc Br5eG/B0lFLP7wjGr2ufF2vAs1cx8q9YhjS6Xx+oQZ+LqYa/+C2+I+5yNxwHWW2s71Bx tG081q2blhanxq2w4xVeHISriaQ/2z393ygy/1fI8rZqXRaBaXWuXldnEMS9sXjt6gc9 0AfDCfkAkRkKrb/Cf1wHo1W9NRAfD8cj6lBLZinpK6pJgh1uhBRJMplFSXJvcD/voBJ8 Hk+w== X-Gm-Message-State: APjAAAXsUX5N1TTfj3YWaUDjzl1tIh12fPmxpYnMhMYvBS3yi47VDtHh SozkmXDGD1KdDhokq2bbeLA1DA== X-Google-Smtp-Source: APXvYqxhwNqVp4zwSwNVAnnR10YyhFYqnyMsXEwSYMJ6DjmKDhY+1Seu+CGlni8bD1Nj3iSJ7HoZQQ== X-Received: by 2002:a63:3182:: with SMTP id x124mr5540538pgx.364.1556920994721; Fri, 03 May 2019 15:03:14 -0700 (PDT) Received: from localhost ([2620:15c:202:1:3c8f:512b:3522:dfaf]) by smtp.gmail.com with ESMTPSA id p2sm4664760pfb.80.2019.05.03.15.03.13 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 03 May 2019 15:03:14 -0700 (PDT) From: Gwendal Grignou To: enric.balletbo@collabora.com, bleung@chromium.org, groeck@chromium.org, lee.jones@linaro.org, jic23@kernel.org, broonie@kernel.org, cychiang@chromium.org, tiwai@suse.com Cc: linux-iio@vger.kernel.org, alsa-devel@alsa-project.org, Gwendal Grignou Subject: [PATCH v2 19/30] mfd: cros_ec: Complete Power and USB PD API Date: Fri, 3 May 2019 15:02:22 -0700 Message-Id: <20190503220233.64546-20-gwendal@chromium.org> X-Mailer: git-send-email 2.21.0.1020.gf2820cf01a-goog In-Reply-To: <20190503220233.64546-1-gwendal@chromium.org> References: <20190503220233.64546-1-gwendal@chromium.org> MIME-Version: 1.0 Sender: linux-iio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Improve API for USB Powe delivery and power management. Acked-by: Enric Balletbo i Serra Signed-off-by: Gwendal Grignou --- include/linux/mfd/cros_ec_commands.h | 236 ++++++++++++++++++++++++++- 1 file changed, 228 insertions(+), 8 deletions(-) diff --git a/include/linux/mfd/cros_ec_commands.h b/include/linux/mfd/cros_ec_commands.h index 94689698330f..4784f3634793 100644 --- a/include/linux/mfd/cros_ec_commands.h +++ b/include/linux/mfd/cros_ec_commands.h @@ -2796,7 +2796,8 @@ struct ec_params_config_power_button { struct ec_params_usb_charge_set_mode { uint8_t usb_port_id; - uint8_t mode; + uint8_t mode:7; + uint8_t inhibit_charge:1; } __ec_align1; /*****************************************************************************/ @@ -3933,6 +3934,11 @@ enum charge_state_params { CS_PARAM_CHG_INPUT_CURRENT, /* charger input current limit */ CS_PARAM_CHG_STATUS, /* charger-specific status */ CS_PARAM_CHG_OPTION, /* charger-specific options */ + CS_PARAM_LIMIT_POWER, /* + * Check if power is limited due to + * low battery and / or a weak external + * charger. READ ONLY. + */ /* How many so far? */ CS_NUM_BASE_PARAMS, @@ -3940,6 +3946,17 @@ enum charge_state_params { CS_PARAM_CUSTOM_PROFILE_MIN = 0x10000, CS_PARAM_CUSTOM_PROFILE_MAX = 0x1ffff, + /* Range for CONFIG_CHARGE_STATE_DEBUG params */ + CS_PARAM_DEBUG_MIN = 0x20000, + CS_PARAM_DEBUG_CTL_MODE = 0x20000, + CS_PARAM_DEBUG_MANUAL_MODE, + CS_PARAM_DEBUG_SEEMS_DEAD, + CS_PARAM_DEBUG_SEEMS_DISCONNECTED, + CS_PARAM_DEBUG_BATT_REMOVED, + CS_PARAM_DEBUG_MANUAL_CURRENT, + CS_PARAM_DEBUG_MANUAL_VOLTAGE, + CS_PARAM_DEBUG_MAX = 0x2ffff, + /* Other custom param ranges go here... */ }; @@ -4000,6 +4017,16 @@ struct ec_params_external_power_limit_v1 { #define EC_POWER_LIMIT_NONE 0xffff +/* + * Set maximum voltage & current of a dedicated charge port + */ +#define EC_CMD_OVERRIDE_DEDICATED_CHARGER_LIMIT 0x00A3 + +struct ec_params_dedicated_charger_limit { + uint16_t current_lim; /* in mA */ + uint16_t voltage_lim; /* in mV */ +} __ec_align2; + /* Inform the EC when entering a sleep state */ #define EC_CMD_HOST_SLEEP_EVENT 0x00A9 @@ -4328,18 +4355,53 @@ struct ec_params_reboot_ec { /* EC to PD MCU exchange status command */ #define EC_CMD_PD_EXCHANGE_STATUS 0x0100 +#define EC_VER_PD_EXCHANGE_STATUS 2 + +enum pd_charge_state { + PD_CHARGE_NO_CHANGE = 0, /* Don't change charge state */ + PD_CHARGE_NONE, /* No charging allowed */ + PD_CHARGE_5V, /* 5V charging only */ + PD_CHARGE_MAX /* Charge at max voltage */ +}; /* Status of EC being sent to PD */ +#define EC_STATUS_HIBERNATING BIT(0) + struct ec_params_pd_status { - int8_t batt_soc; /* battery state of charge */ + uint8_t status; /* EC status */ + int8_t batt_soc; /* battery state of charge */ + uint8_t charge_state; /* charging state (from enum pd_charge_state) */ } __ec_align1; /* Status of PD being sent back to EC */ +#define PD_STATUS_HOST_EVENT BIT(0) /* Forward host event to AP */ +#define PD_STATUS_IN_RW BIT(1) /* Running RW image */ +#define PD_STATUS_JUMPED_TO_IMAGE BIT(2) /* Current image was jumped to */ +#define PD_STATUS_TCPC_ALERT_0 BIT(3) /* Alert active in port 0 TCPC */ +#define PD_STATUS_TCPC_ALERT_1 BIT(4) /* Alert active in port 1 TCPC */ +#define PD_STATUS_TCPC_ALERT_2 BIT(5) /* Alert active in port 2 TCPC */ +#define PD_STATUS_TCPC_ALERT_3 BIT(6) /* Alert active in port 3 TCPC */ +#define PD_STATUS_EC_INT_ACTIVE (PD_STATUS_TCPC_ALERT_0 | \ + PD_STATUS_TCPC_ALERT_1 | \ + PD_STATUS_HOST_EVENT) struct ec_response_pd_status { - int8_t status; /* PD MCU status */ - uint32_t curr_lim_ma; /* input current limit */ + uint32_t curr_lim_ma; /* input current limit */ + uint16_t status; /* PD MCU status */ + int8_t active_charge_port; /* active charging port */ } __ec_align_size1; +/* AP to PD MCU host event status command, cleared on read */ +#define EC_CMD_PD_HOST_EVENT_STATUS 0x0104 + +/* PD MCU host event status bits */ +#define PD_EVENT_UPDATE_DEVICE BIT(0) +#define PD_EVENT_POWER_CHANGE BIT(1) +#define PD_EVENT_IDENTITY_RECEIVED BIT(2) +#define PD_EVENT_DATA_SWAP BIT(3) +struct ec_response_host_event_status { + uint32_t status; /* PD MCU host event status */ +} __ec_align4; + /* Set USB type-C port role and muxes */ #define EC_CMD_USB_PD_CONTROL 0x0101 @@ -4349,6 +4411,8 @@ enum usb_pd_control_role { USB_PD_CTRL_ROLE_TOGGLE_OFF = 2, USB_PD_CTRL_ROLE_FORCE_SINK = 3, USB_PD_CTRL_ROLE_FORCE_SOURCE = 4, + USB_PD_CTRL_ROLE_FREEZE = 5, + USB_PD_CTRL_ROLE_COUNT }; enum usb_pd_control_mux { @@ -4358,6 +4422,7 @@ enum usb_pd_control_mux { USB_PD_CTRL_MUX_DP = 3, USB_PD_CTRL_MUX_DOCK = 4, USB_PD_CTRL_MUX_AUTO = 5, + USB_PD_CTRL_MUX_COUNT }; enum usb_pd_control_swap { @@ -4387,6 +4452,13 @@ struct ec_params_usb_pd_control { #define PD_CTRL_RESP_ROLE_USB_COMM BIT(5) /* Partner USB comm capable */ #define PD_CTRL_RESP_ROLE_EXT_POWERED BIT(6) /* Partner externally powerd */ +struct ec_response_usb_pd_control { + uint8_t enabled; + uint8_t role; + uint8_t polarity; + uint8_t state; +} __ec_align1; + struct ec_response_usb_pd_control_v1 { uint8_t enabled; uint8_t role; @@ -4394,6 +4466,25 @@ struct ec_response_usb_pd_control_v1 { char state[32]; } __ec_align1; +/* Values representing usbc PD CC state */ +#define USBC_PD_CC_NONE 0 /* No accessory connected */ +#define USBC_PD_CC_NO_UFP 1 /* No UFP accessory connected */ +#define USBC_PD_CC_AUDIO_ACC 2 /* Audio accessory connected */ +#define USBC_PD_CC_DEBUG_ACC 3 /* Debug accessory connected */ +#define USBC_PD_CC_UFP_ATTACHED 4 /* UFP attached to usbc */ +#define USBC_PD_CC_DFP_ATTACHED 5 /* DPF attached to usbc */ + +struct ec_response_usb_pd_control_v2 { + uint8_t enabled; + uint8_t role; + uint8_t polarity; + char state[32]; + uint8_t cc_state; /* USBC_PD_CC_*Encoded cc state */ + uint8_t dp_mode; /* Current DP pin mode (MODE_DP_PIN_[A-E]) */ + /* CL:1500994 Current cable type */ + uint8_t reserved_cable_type; +} __ec_align1; + #define EC_CMD_USB_PD_PORTS 0x0102 /* Maximum number of PD ports on a device, num_ports will be <= this */ @@ -4421,6 +4512,7 @@ enum usb_chg_type { USB_CHG_TYPE_OTHER, USB_CHG_TYPE_VBUS, USB_CHG_TYPE_UNKNOWN, + USB_CHG_TYPE_DEDICATED, }; enum usb_power_roles { USB_PD_PORT_POWER_DISCONNECTED, @@ -4445,9 +4537,6 @@ struct ec_response_usb_pd_power_info { uint32_t max_power; } __ec_align4; -struct ec_params_usb_pd_info_request { - uint8_t port; -} __ec_align1; /* * This command will return the number of USB PD charge port + the number @@ -4459,6 +4548,46 @@ struct ec_response_charge_port_count { uint8_t port_count; } __ec_align1; +/* Write USB-PD device FW */ +#define EC_CMD_USB_PD_FW_UPDATE 0x0110 + +enum usb_pd_fw_update_cmds { + USB_PD_FW_REBOOT, + USB_PD_FW_FLASH_ERASE, + USB_PD_FW_FLASH_WRITE, + USB_PD_FW_ERASE_SIG, +}; + +struct ec_params_usb_pd_fw_update { + uint16_t dev_id; + uint8_t cmd; + uint8_t port; + uint32_t size; /* Size to write in bytes */ + /* Followed by data to write */ +} __ec_align4; + +/* Write USB-PD Accessory RW_HASH table entry */ +#define EC_CMD_USB_PD_RW_HASH_ENTRY 0x0111 +/* RW hash is first 20 bytes of SHA-256 of RW section */ +#define PD_RW_HASH_SIZE 20 +struct ec_params_usb_pd_rw_hash_entry { + uint16_t dev_id; + uint8_t dev_rw_hash[PD_RW_HASH_SIZE]; + uint8_t reserved; /* + * For alignment of current_image + * TODO(rspangler) but it's not aligned! + * Should have been reserved[2]. + */ + uint32_t current_image; /* One of ec_current_image */ +} __ec_align1; + +/* Read USB-PD Accessory info */ +#define EC_CMD_USB_PD_DEV_INFO 0x0112 + +struct ec_params_usb_pd_info_request { + uint8_t port; +} __ec_align1; + /* Read USB-PD Device discovery info */ #define EC_CMD_USB_PD_DISCOVERY 0x0113 struct ec_params_usb_pd_discovery_entry { @@ -4481,7 +4610,11 @@ struct ec_params_charge_port_override { int16_t override_port; /* Override port# */ } __ec_align2; -/* Read (and delete) one entry of PD event log */ +/* + * Read (and delete) one entry of PD event log. + * TODO(crbug.com/751742): Make this host command more generic to accommodate + * future non-PD logs that use the same internal EC event_log. + */ #define EC_CMD_PD_GET_LOG_ENTRY 0x0115 struct ec_response_pd_log { @@ -4569,6 +4702,60 @@ struct mcdp_info { #define MCDP_CHIPID(chipid) ((chipid[0] << 8) | chipid[1]) #define MCDP_FAMILY(family) ((family[0] << 8) | family[1]) +/* Get/Set USB-PD Alternate mode info */ +#define EC_CMD_USB_PD_GET_AMODE 0x0116 +struct ec_params_usb_pd_get_mode_request { + uint16_t svid_idx; /* SVID index to get */ + uint8_t port; /* port */ +} __ec_align_size1; + +struct ec_params_usb_pd_get_mode_response { + uint16_t svid; /* SVID */ + uint16_t opos; /* Object Position */ + uint32_t vdo[6]; /* Mode VDOs */ +} __ec_align4; + +#define EC_CMD_USB_PD_SET_AMODE 0x0117 + +enum pd_mode_cmd { + PD_EXIT_MODE = 0, + PD_ENTER_MODE = 1, + /* Not a command. Do NOT remove. */ + PD_MODE_CMD_COUNT, +}; + +struct ec_params_usb_pd_set_mode_request { + uint32_t cmd; /* enum pd_mode_cmd */ + uint16_t svid; /* SVID to set */ + uint8_t opos; /* Object Position */ + uint8_t port; /* port */ +} __ec_align4; + +/* Ask the PD MCU to record a log of a requested type */ +#define EC_CMD_PD_WRITE_LOG_ENTRY 0x0118 + +struct ec_params_pd_write_log_entry { + uint8_t type; /* event type : see PD_EVENT_xx above */ + uint8_t port; /* port#, or 0 for events unrelated to a given port */ +} __ec_align1; + + +/* Control USB-PD chip */ +#define EC_CMD_PD_CONTROL 0x0119 + +enum ec_pd_control_cmd { + PD_SUSPEND = 0, /* Suspend the PD chip (EC: stop talking to PD) */ + PD_RESUME, /* Resume the PD chip (EC: start talking to PD) */ + PD_RESET, /* Force reset the PD chip */ + PD_CONTROL_DISABLE, /* Disable further calls to this command */ + PD_CHIP_ON, /* Power on the PD chip */ +}; + +struct ec_params_pd_control { + uint8_t chip; /* chip id */ + uint8_t subcmd; +} __ec_align1; + /* Get info about USB-C SS muxes */ #define EC_CMD_USB_PD_MUX_INFO 0x011A @@ -4581,10 +4768,43 @@ struct ec_params_usb_pd_mux_info { #define USB_PD_MUX_DP_ENABLED BIT(1) /* DP connected */ #define USB_PD_MUX_POLARITY_INVERTED BIT(2) /* CC line Polarity inverted */ #define USB_PD_MUX_HPD_IRQ BIT(3) /* HPD IRQ is asserted */ +#define USB_PD_MUX_HPD_LVL BIT(4) /* HPD level is asserted */ struct ec_response_usb_pd_mux_info { uint8_t flags; /* USB_PD_MUX_*-encoded USB mux state */ } __ec_align1; + +#define EC_CMD_PD_CHIP_INFO 0x011B + +struct ec_params_pd_chip_info { + uint8_t port; /* USB-C port number */ + uint8_t renew; /* Force renewal */ +} __ec_align1; + +struct ec_response_pd_chip_info { + uint16_t vendor_id; + uint16_t product_id; + uint16_t device_id; + union { + uint8_t fw_version_string[8]; + uint64_t fw_version_number; + }; +} __ec_align2; + +struct ec_response_pd_chip_info_v1 { + uint16_t vendor_id; + uint16_t product_id; + uint16_t device_id; + union { + uint8_t fw_version_string[8]; + uint64_t fw_version_number; + }; + union { + uint8_t min_req_fw_version_string[8]; + uint64_t min_req_fw_version_number; + }; +} __ec_align2; + /*****************************************************************************/ /* * Reserve a range of host commands for board-specific, experimental, or From patchwork Fri May 3 22:02:23 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gwendal Grignou X-Patchwork-Id: 10929283 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C831A13AD for ; Fri, 3 May 2019 22:03:17 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B7E21287CE for ; Fri, 3 May 2019 22:03:17 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id AB720287D1; Fri, 3 May 2019 22:03:17 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5B07D287CE for ; Fri, 3 May 2019 22:03:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726953AbfECWDR (ORCPT ); Fri, 3 May 2019 18:03:17 -0400 Received: from mail-pf1-f195.google.com ([209.85.210.195]:41260 "EHLO mail-pf1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726934AbfECWDQ (ORCPT ); Fri, 3 May 2019 18:03:16 -0400 Received: by mail-pf1-f195.google.com with SMTP id 188so3533365pfd.8 for ; Fri, 03 May 2019 15:03:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=cRgm0qDqKkO9nHce1jIyvsnpRoCozsYkiM3QTeACa/M=; b=kEJQb8Ggi8JIZDAqIR6BEWhyS5Lgt+lE4RYW7XlvPt1CliAZqqtV+2ITRI3LROH6zs A6F83E8q0q+gHehhZZQR7Cjw1+X2/ImYD9jT61oBO5JVCVNGhLpIBXeEw9bJ1kjarp4E bOESk1a4FANb0XT56/qLll2M6G48CAUCCUr7E= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=cRgm0qDqKkO9nHce1jIyvsnpRoCozsYkiM3QTeACa/M=; b=Jf4deTxl8uV+YYQxxMH98KVFmGLQOPgqcalnJ+7pcUuOGRBVYw+H0hp7hMcpyLcgEf Qlpamm9jgNPqGMWvV6AyBS1G2xrEGUW7hyozd2yY/N44RPykldQZROsjEf333YxerFRi OBto1ln9SsoExsASchm699ZXZbeh/bRFkdK+Ql53wayM4gO296y0TnaSCxJHeWYeFkkD EC08FNToPZKNYNXXj7L/9SDrSM7PsW/wBGy5gfiNuKhm3UTV6mTRshAybdnhycD+ojGW XnS8Ut6kb88rN4mQwXkKVqDLrOu5mkJq9Y8wbhRQfiuBHev8fd3ADvG1vkfKf/d2xnEH /9FQ== X-Gm-Message-State: APjAAAWzMMcQ3Q+AH2k4Cc7mUFWD9mcw1WiockWxZ+wKTkqM/AKIrYwl YbT3q94m9550f1hKpWawm23YMQ== X-Google-Smtp-Source: APXvYqwaByD00JCRJ1cESt6WorgkKEhgWw8iTNslqdb3gvD3bAAKNZdW5kQrkcH2uhTSleBF+TTcZw== X-Received: by 2002:a63:778b:: with SMTP id s133mr13727689pgc.198.1556920996213; Fri, 03 May 2019 15:03:16 -0700 (PDT) Received: from localhost ([2620:15c:202:1:3c8f:512b:3522:dfaf]) by smtp.gmail.com with ESMTPSA id 132sm4148388pfw.87.2019.05.03.15.03.15 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 03 May 2019 15:03:15 -0700 (PDT) From: Gwendal Grignou To: enric.balletbo@collabora.com, bleung@chromium.org, groeck@chromium.org, lee.jones@linaro.org, jic23@kernel.org, broonie@kernel.org, cychiang@chromium.org, tiwai@suse.com Cc: linux-iio@vger.kernel.org, alsa-devel@alsa-project.org, Gwendal Grignou Subject: [PATCH v2 20/30] mfd: cros_ec: Add API for keyboard testing Date: Fri, 3 May 2019 15:02:23 -0700 Message-Id: <20190503220233.64546-21-gwendal@chromium.org> X-Mailer: git-send-email 2.21.0.1020.gf2820cf01a-goog In-Reply-To: <20190503220233.64546-1-gwendal@chromium.org> References: <20190503220233.64546-1-gwendal@chromium.org> MIME-Version: 1.0 Sender: linux-iio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add command to allow keyboard testing in factory. Acked-by: Enric Balletbo i Serra Signed-off-by: Gwendal Grignou --- include/linux/mfd/cros_ec_commands.h | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/include/linux/mfd/cros_ec_commands.h b/include/linux/mfd/cros_ec_commands.h index 4784f3634793..88d08aa85738 100644 --- a/include/linux/mfd/cros_ec_commands.h +++ b/include/linux/mfd/cros_ec_commands.h @@ -3142,6 +3142,17 @@ struct ec_params_mkbp_simulate_key { uint8_t pressed; } __ec_align1; +#define EC_CMD_GET_KEYBOARD_ID 0x0063 + +struct ec_response_keyboard_id { + uint32_t keyboard_id; +} __ec_align4; + +enum keyboard_id { + KEYBOARD_ID_UNSUPPORTED = 0, + KEYBOARD_ID_UNREADABLE = 0xffffffff, +}; + /* Configure keyboard scanning */ #define EC_CMD_MKBP_SET_CONFIG 0x0064 #define EC_CMD_MKBP_GET_CONFIG 0x0065 @@ -3390,6 +3401,13 @@ struct ec_response_get_next_event_v1 { #define EC_MKBP_TABLET_MODE 1 #define EC_MKBP_BASE_ATTACHED 2 +/* Run keyboard factory test scanning */ +#define EC_CMD_KEYBOARD_FACTORY_TEST 0x0068 + +struct ec_response_keyboard_factory_test { + uint16_t shorted; /* Keyboard pins are shorted */ +} __ec_align2; + /* Fingerprint events in 'fp_events' for EC_MKBP_EVENT_FINGERPRINT */ #define EC_MKBP_FP_RAW_EVENT(fp_events) ((fp_events) & 0x00FFFFFF) #define EC_MKBP_FP_ERRCODE(fp_events) ((fp_events) & 0x0000000F) From patchwork Fri May 3 22:02:24 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gwendal Grignou X-Patchwork-Id: 10929285 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 0EFFB912 for ; Fri, 3 May 2019 22:03:20 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id F32E8287CE for ; Fri, 3 May 2019 22:03:19 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id E731F287D1; Fri, 3 May 2019 22:03:19 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6A020287CE for ; Fri, 3 May 2019 22:03:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726954AbfECWDT (ORCPT ); Fri, 3 May 2019 18:03:19 -0400 Received: from mail-pf1-f195.google.com ([209.85.210.195]:45686 "EHLO mail-pf1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726934AbfECWDS (ORCPT ); Fri, 3 May 2019 18:03:18 -0400 Received: by mail-pf1-f195.google.com with SMTP id e24so3520727pfi.12 for ; Fri, 03 May 2019 15:03:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=GaS6M4lZppmXoFuVVxZhUE8hMF24Q3vazmIS9Ea3b7g=; b=Axp9HxCRAXI3pFBQ32Ll1nDuYsJawqXclGjWfqZytau8KDMUID0AGSBVvAy9LYa1Us CByt+i6wTDRhnw+I6b/YetjS8+p2ZAe+KL7CZ0SV7Ok20Oo5EwgnFAHr0M9q9pWzZQ9U L4bUQnIiexiwgK19PT/78bd0ROgNydfraxpDE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=GaS6M4lZppmXoFuVVxZhUE8hMF24Q3vazmIS9Ea3b7g=; b=OtVBxHhWKK1sTykc7i7RtnybvzzLvM2Bi5oHJsO578BPmu7/2kYTOpc7Bb7RYaesXA MqkSnq/R+S+EmpDuFzKMrmNEHtStwP8hXvufNmVvKFwYxoMOZ5oWvkUX0d9YFDda+qFt 7vEQttNRPmrtrSp2C3iTgc9VR+19iRTfAnvGDOS5QCEM7MSivO/+9XRiTP/ZiKqnrM94 q7xdVsIUXGyqP1SkyQpG4aiRome/462jWyFybNVHZNdin4FVaRzdFLEKO5G+skR3HZPM /aMLUXKcwY5NvbElOezhys+9VaYhSG+1xT4TADkrtfYmie2jbe/HmBBvAHqDX7qvYgMn 6qog== X-Gm-Message-State: APjAAAWw7ITeiTJCENNBh68KKtJt/0PaM4t6oW2tM8gQ6CeviFQ147aX wG8kZ+gr5mnMf/Uih8VVUrXL3NKxmQU= X-Google-Smtp-Source: APXvYqzDeSFO3ZBXK9CVEDX19Ck2fauVSo/A2U0471pzZ9mqHoqz0Pc8t9uCLH1xQlF9xwgvogGeVg== X-Received: by 2002:a63:f64f:: with SMTP id u15mr13823708pgj.192.1556920997911; Fri, 03 May 2019 15:03:17 -0700 (PDT) Received: from localhost ([2620:15c:202:1:3c8f:512b:3522:dfaf]) by smtp.gmail.com with ESMTPSA id u7sm3894776pfu.157.2019.05.03.15.03.16 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 03 May 2019 15:03:17 -0700 (PDT) From: Gwendal Grignou To: enric.balletbo@collabora.com, bleung@chromium.org, groeck@chromium.org, lee.jones@linaro.org, jic23@kernel.org, broonie@kernel.org, cychiang@chromium.org, tiwai@suse.com Cc: linux-iio@vger.kernel.org, alsa-devel@alsa-project.org, Gwendal Grignou Subject: [PATCH v2 21/30] mfd: cros_ec: Add Hibernate API Date: Fri, 3 May 2019 15:02:24 -0700 Message-Id: <20190503220233.64546-22-gwendal@chromium.org> X-Mailer: git-send-email 2.21.0.1020.gf2820cf01a-goog In-Reply-To: <20190503220233.64546-1-gwendal@chromium.org> References: <20190503220233.64546-1-gwendal@chromium.org> MIME-Version: 1.0 Sender: linux-iio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add support for controlling hibernation of the Embedded Controller. Acked-by: Enric Balletbo i Serra Signed-off-by: Gwendal Grignou --- include/linux/mfd/cros_ec_commands.h | 129 ++++++++++++++++++++++++++- 1 file changed, 127 insertions(+), 2 deletions(-) diff --git a/include/linux/mfd/cros_ec_commands.h b/include/linux/mfd/cros_ec_commands.h index 88d08aa85738..7f98c6e63ad1 100644 --- a/include/linux/mfd/cros_ec_commands.h +++ b/include/linux/mfd/cros_ec_commands.h @@ -4045,6 +4045,40 @@ struct ec_params_dedicated_charger_limit { uint16_t voltage_lim; /* in mV */ } __ec_align2; +/*****************************************************************************/ +/* Hibernate/Deep Sleep Commands */ + +/* Set the delay before going into hibernation. */ +#define EC_CMD_HIBERNATION_DELAY 0x00A8 + +struct ec_params_hibernation_delay { + /* + * Seconds to wait in G3 before hibernate. Pass in 0 to read the + * current settings without changing them. + */ + uint32_t seconds; +} __ec_align4; + +struct ec_response_hibernation_delay { + /* + * The current time in seconds in which the system has been in the G3 + * state. This value is reset if the EC transitions out of G3. + */ + uint32_t time_g3; + + /* + * The current time remaining in seconds until the EC should hibernate. + * This value is also reset if the EC transitions out of G3. + */ + uint32_t time_remaining; + + /* + * The current time in seconds that the EC should wait in G3 before + * hibernating. + */ + uint32_t hibernate_delay; +} __ec_align4; + /* Inform the EC when entering a sleep state */ #define EC_CMD_HOST_SLEEP_EVENT 0x00A9 @@ -4052,13 +4086,102 @@ enum host_sleep_event { HOST_SLEEP_EVENT_S3_SUSPEND = 1, HOST_SLEEP_EVENT_S3_RESUME = 2, HOST_SLEEP_EVENT_S0IX_SUSPEND = 3, - HOST_SLEEP_EVENT_S0IX_RESUME = 4 + HOST_SLEEP_EVENT_S0IX_RESUME = 4, + /* S3 suspend with additional enabled wake sources */ + HOST_SLEEP_EVENT_S3_WAKEABLE_SUSPEND = 5, }; struct ec_params_host_sleep_event { uint8_t sleep_event; } __ec_align1; +/* + * Use a default timeout value (CONFIG_SLEEP_TIMEOUT_MS) for detecting sleep + * transition failures + */ +#define EC_HOST_SLEEP_TIMEOUT_DEFAULT 0 + +/* Disable timeout detection for this sleep transition */ +#define EC_HOST_SLEEP_TIMEOUT_INFINITE 0xFFFF + +struct ec_params_host_sleep_event_v1 { + /* The type of sleep being entered or exited. */ + uint8_t sleep_event; + + /* Padding */ + uint8_t reserved; + union { + /* Parameters that apply for suspend messages. */ + struct { + /* + * The timeout in milliseconds between when this message + * is received and when the EC will declare sleep + * transition failure if the sleep signal is not + * asserted. + */ + uint16_t sleep_timeout_ms; + } suspend_params; + + /* No parameters for non-suspend messages. */ + }; +} __ec_align2; + +/* A timeout occurred when this bit is set */ +#define EC_HOST_RESUME_SLEEP_TIMEOUT 0x80000000 + +/* + * The mask defining which bits correspond to the number of sleep transitions, + * as well as the maximum number of suspend line transitions that will be + * reported back to the host. + */ +#define EC_HOST_RESUME_SLEEP_TRANSITIONS_MASK 0x7FFFFFFF + +struct ec_response_host_sleep_event_v1 { + union { + /* Response fields that apply for resume messages. */ + struct { + /* + * The number of sleep power signal transitions that + * occurred since the suspend message. The high bit + * indicates a timeout occurred. + */ + uint32_t sleep_transitions; + } resume_response; + + /* No response fields for non-resume messages. */ + }; +} __ec_align4; + +/*****************************************************************************/ +/* Device events */ +#define EC_CMD_DEVICE_EVENT 0x00AA + +enum ec_device_event { + EC_DEVICE_EVENT_TRACKPAD, + EC_DEVICE_EVENT_DSP, + EC_DEVICE_EVENT_WIFI, +}; + +enum ec_device_event_param { + /* Get and clear pending device events */ + EC_DEVICE_EVENT_PARAM_GET_CURRENT_EVENTS, + /* Get device event mask */ + EC_DEVICE_EVENT_PARAM_GET_ENABLED_EVENTS, + /* Set device event mask */ + EC_DEVICE_EVENT_PARAM_SET_ENABLED_EVENTS, +}; + +#define EC_DEVICE_EVENT_MASK(event_code) BIT(event_code % 32) + +struct ec_params_device_event { + uint32_t event_mask; + uint8_t param; +} __ec_align_size1; + +struct ec_response_device_event { + uint32_t event_mask; +} __ec_align4; + /*****************************************************************************/ /* Smart battery pass-through */ @@ -4304,12 +4427,14 @@ enum ec_reboot_cmd { /* (command 3 was jump to RW-B) */ EC_REBOOT_COLD = 4, /* Cold-reboot */ EC_REBOOT_DISABLE_JUMP = 5, /* Disable jump until next reboot */ - EC_REBOOT_HIBERNATE = 6 /* Hibernate EC */ + EC_REBOOT_HIBERNATE = 6, /* Hibernate EC */ + EC_REBOOT_HIBERNATE_CLEAR_AP_OFF = 7, /* and clears AP_OFF flag */ }; /* Flags for ec_params_reboot_ec.reboot_flags */ #define EC_REBOOT_FLAG_RESERVED0 BIT(0) /* Was recovery request */ #define EC_REBOOT_FLAG_ON_AP_SHUTDOWN BIT(1) /* Reboot after AP shutdown */ +#define EC_REBOOT_FLAG_SWITCH_RW_SLOT BIT(2) /* Switch RW slot */ struct ec_params_reboot_ec { uint8_t cmd; /* enum ec_reboot_cmd */ From patchwork Fri May 3 22:02:25 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gwendal Grignou X-Patchwork-Id: 10929287 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 1D3E61390 for ; Fri, 3 May 2019 22:03:21 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0E6DF287CE for ; Fri, 3 May 2019 22:03:21 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 00C18287D1; Fri, 3 May 2019 22:03:20 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 95812287CE for ; Fri, 3 May 2019 22:03:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726934AbfECWDU (ORCPT ); Fri, 3 May 2019 18:03:20 -0400 Received: from mail-pg1-f195.google.com ([209.85.215.195]:40913 "EHLO mail-pg1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726846AbfECWDU (ORCPT ); Fri, 3 May 2019 18:03:20 -0400 Received: by mail-pg1-f195.google.com with SMTP id d31so3339220pgl.7 for ; Fri, 03 May 2019 15:03:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=lxLZO/4ISZtGoVIWN9Kc9oyM9nBCPCMCt4kbgFkVnf8=; b=AxOMGj62vqtLEIw5xuQKj/4VxrT7xtpQy0vIG2vE1jf4VGHB/OV5PlG42KJw6GQ/bY GNgN6PCiVXnF3A5SZu4Z3ou5LMN6Kxh6Jm+Pn5Net6W6XjajzyS3CgbrsqUT3UH5gNdV Z5rc2NrBUpQlW9qvecX2ifbDPoEJ6ncLARoFI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=lxLZO/4ISZtGoVIWN9Kc9oyM9nBCPCMCt4kbgFkVnf8=; b=EYfpR0HU7Ti/ScqR2VkcRUB3BAsi0xnLqSR+JWddNhuL2tWipShAPluQ1V3OW6DzEp 2ZCWh4sejH/Ey3YbIHtahV/gubw+BaxE8Nech6SY1iyp4A+Kyyz66EaXNbd/zsQXP65q 2uyCeM33DyA+o9/mBU1zIpR8YLpL/p7wNhTcXqUID7uiWIf2LA1fnjKdu0D3qMh5MceF jq9jjY0fqT3PFG2ySOn3DQCOSVXuvja7kjj1MvSnABCQvn9QqX1JayBgnst9bpgEW+hf gS3dhmjf72+YjLzOlcvm+8UIWJtQaye3+/MTas9xoezkGEkYuPpf1zB3xzDl9qLc+AFF VHmQ== X-Gm-Message-State: APjAAAUXEjVYR8jTYMYy+Fymk7XyeUP3axw5+CysTbNdlt1o7BBXpekc xQ8CYvQXOM+e23tar50Krj6FxOli0Qg= X-Google-Smtp-Source: APXvYqw/XHZ72GtFKQcUPZWWf/9sHyinZWxSv5HSP6F2RFrwm54VMdy6r04t5LZp20l33mowhq1rQA== X-Received: by 2002:a63:cf:: with SMTP id 198mr13258139pga.228.1556920999413; Fri, 03 May 2019 15:03:19 -0700 (PDT) Received: from localhost ([2620:15c:202:1:3c8f:512b:3522:dfaf]) by smtp.gmail.com with ESMTPSA id 4sm3977071pfi.94.2019.05.03.15.03.18 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 03 May 2019 15:03:18 -0700 (PDT) From: Gwendal Grignou To: enric.balletbo@collabora.com, bleung@chromium.org, groeck@chromium.org, lee.jones@linaro.org, jic23@kernel.org, broonie@kernel.org, cychiang@chromium.org, tiwai@suse.com Cc: linux-iio@vger.kernel.org, alsa-devel@alsa-project.org, Gwendal Grignou Subject: [PATCH v2 22/30] mfd: cros_ec: Add Smart Battery Firmware update API Date: Fri, 3 May 2019 15:02:25 -0700 Message-Id: <20190503220233.64546-23-gwendal@chromium.org> X-Mailer: git-send-email 2.21.0.1020.gf2820cf01a-goog In-Reply-To: <20190503220233.64546-1-gwendal@chromium.org> References: <20190503220233.64546-1-gwendal@chromium.org> MIME-Version: 1.0 Sender: linux-iio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add API to update battery firmware. Acked-by: Enric Balletbo i Serra Signed-off-by: Gwendal Grignou --- include/linux/mfd/cros_ec_commands.h | 73 ++++++++++++++++++++++++++++ 1 file changed, 73 insertions(+) diff --git a/include/linux/mfd/cros_ec_commands.h b/include/linux/mfd/cros_ec_commands.h index 7f98c6e63ad1..49ea905cfd18 100644 --- a/include/linux/mfd/cros_ec_commands.h +++ b/include/linux/mfd/cros_ec_commands.h @@ -4243,6 +4243,79 @@ struct ec_response_battery_vendor_param { uint32_t value; } __ec_align4; +/*****************************************************************************/ +/* + * Smart Battery Firmware Update Commands + */ +#define EC_CMD_SB_FW_UPDATE 0x00B5 + +enum ec_sb_fw_update_subcmd { + EC_SB_FW_UPDATE_PREPARE = 0x0, + EC_SB_FW_UPDATE_INFO = 0x1, /*query sb info */ + EC_SB_FW_UPDATE_BEGIN = 0x2, /*check if protected */ + EC_SB_FW_UPDATE_WRITE = 0x3, /*check if protected */ + EC_SB_FW_UPDATE_END = 0x4, + EC_SB_FW_UPDATE_STATUS = 0x5, + EC_SB_FW_UPDATE_PROTECT = 0x6, + EC_SB_FW_UPDATE_MAX = 0x7, +}; + +#define SB_FW_UPDATE_CMD_WRITE_BLOCK_SIZE 32 +#define SB_FW_UPDATE_CMD_STATUS_SIZE 2 +#define SB_FW_UPDATE_CMD_INFO_SIZE 8 + +struct ec_sb_fw_update_header { + uint16_t subcmd; /* enum ec_sb_fw_update_subcmd */ + uint16_t fw_id; /* firmware id */ +} __ec_align4; + +struct ec_params_sb_fw_update { + struct ec_sb_fw_update_header hdr; + union { + /* EC_SB_FW_UPDATE_PREPARE = 0x0 */ + /* EC_SB_FW_UPDATE_INFO = 0x1 */ + /* EC_SB_FW_UPDATE_BEGIN = 0x2 */ + /* EC_SB_FW_UPDATE_END = 0x4 */ + /* EC_SB_FW_UPDATE_STATUS = 0x5 */ + /* EC_SB_FW_UPDATE_PROTECT = 0x6 */ + /* Those have no args */ + + /* EC_SB_FW_UPDATE_WRITE = 0x3 */ + struct __ec_align4 { + uint8_t data[SB_FW_UPDATE_CMD_WRITE_BLOCK_SIZE]; + } write; + }; +} __ec_align4; + +struct ec_response_sb_fw_update { + union { + /* EC_SB_FW_UPDATE_INFO = 0x1 */ + struct __ec_align1 { + uint8_t data[SB_FW_UPDATE_CMD_INFO_SIZE]; + } info; + + /* EC_SB_FW_UPDATE_STATUS = 0x5 */ + struct __ec_align1 { + uint8_t data[SB_FW_UPDATE_CMD_STATUS_SIZE]; + } status; + }; +} __ec_align1; + +/* + * Entering Verified Boot Mode Command + * Default mode is VBOOT_MODE_NORMAL if EC did not receive this command. + * Valid Modes are: normal, developer, and recovery. + */ +#define EC_CMD_ENTERING_MODE 0x00B6 + +struct ec_params_entering_mode { + int vboot_mode; +} __ec_align4; + +#define VBOOT_MODE_NORMAL 0 +#define VBOOT_MODE_DEVELOPER 1 +#define VBOOT_MODE_RECOVERY 2 + /*****************************************************************************/ /* * HDMI CEC commands From patchwork Fri May 3 22:02:26 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gwendal Grignou X-Patchwork-Id: 10929289 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 8B2561390 for ; Fri, 3 May 2019 22:03:22 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7C4C5287CE for ; Fri, 3 May 2019 22:03:22 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 70D3D287D1; Fri, 3 May 2019 22:03:22 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 20B85287CE for ; Fri, 3 May 2019 22:03:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726957AbfECWDV (ORCPT ); Fri, 3 May 2019 18:03:21 -0400 Received: from mail-pf1-f194.google.com ([209.85.210.194]:35447 "EHLO mail-pf1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726846AbfECWDV (ORCPT ); Fri, 3 May 2019 18:03:21 -0400 Received: by mail-pf1-f194.google.com with SMTP id t87so2960267pfa.2 for ; Fri, 03 May 2019 15:03:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=a7jf11BSROJYGYWGaMhdpSMdF9KlDBwardIcOhZ2vpE=; b=EYBs6j1u0ar6LZWMBPa86O/T+vhocQtHOspqto4ssJRYHXEOM+oclp5oo9qqEVSXJE iGjb5qXVAba/toGOcYwwd08qubZYp4aic0BGEbf+ZZXh+YqF0c0t++xBwveBanRismxc MG7ABlf5AgEJukxjvW/dfWTIhwFyPp/IFVWXs= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=a7jf11BSROJYGYWGaMhdpSMdF9KlDBwardIcOhZ2vpE=; b=IjNy87rVrCkjIV/z/DxbZ8iCw/qjq0UpI9fYlLgJl4nqKCg/Hjjxyu3IYCHFb+H7fi mxD9F4uMjPbTALGMOM1SQxv95kMnuqKicu3HqqChjFw8OPRqeKspiBMI7StsWBHePbsi Cpicj9fGjVGoL9zb+Yrl+BK4yUMVDzVp4tgZjT1jBhpeEETsxrSiepqFbXbgdfjWUjQc 1j0iGkPv+Y4GLagMpC8cRRXl0exWh2WOG38tLkhOGtAhLgiRLi4mozkcr0YGLTWemcvh cPvr5jvn4DsdpEVU+UcncxXkKQ3p8MB3OG7/I2WQZROQqaVdlVp/BL6N5hQsADGhnpqi 0ibw== X-Gm-Message-State: APjAAAWbNVPIpxZQmt0Q/uAOCM5bWVm+F7l++w9TPqoPCK6HE0pkqZwn W/k/Ujl+wUyfRgDv290rEpnNhw== X-Google-Smtp-Source: APXvYqxg3DK7BDo0zppzRV9+Yt/49X75Nmj33RT+e5uAVKjOE1je0wqzV6pqO1AUwhuUXWk6YH9LOw== X-Received: by 2002:a65:4c07:: with SMTP id u7mr13282550pgq.93.1556921000826; Fri, 03 May 2019 15:03:20 -0700 (PDT) Received: from localhost ([2620:15c:202:1:3c8f:512b:3522:dfaf]) by smtp.gmail.com with ESMTPSA id m131sm7612238pfc.25.2019.05.03.15.03.19 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 03 May 2019 15:03:20 -0700 (PDT) From: Gwendal Grignou To: enric.balletbo@collabora.com, bleung@chromium.org, groeck@chromium.org, lee.jones@linaro.org, jic23@kernel.org, broonie@kernel.org, cychiang@chromium.org, tiwai@suse.com Cc: linux-iio@vger.kernel.org, alsa-devel@alsa-project.org, Gwendal Grignou Subject: [PATCH v2 23/30] mfd: cros_ec: Add I2C passthru protection API Date: Fri, 3 May 2019 15:02:26 -0700 Message-Id: <20190503220233.64546-24-gwendal@chromium.org> X-Mailer: git-send-email 2.21.0.1020.gf2820cf01a-goog In-Reply-To: <20190503220233.64546-1-gwendal@chromium.org> References: <20190503220233.64546-1-gwendal@chromium.org> MIME-Version: 1.0 Sender: linux-iio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Prevent direct i2c access to device behind EC when not in development mode. Acked-by: Enric Balletbo i Serra Signed-off-by: Gwendal Grignou --- include/linux/mfd/cros_ec_commands.h | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/include/linux/mfd/cros_ec_commands.h b/include/linux/mfd/cros_ec_commands.h index 49ea905cfd18..59ad6bae3f9b 100644 --- a/include/linux/mfd/cros_ec_commands.h +++ b/include/linux/mfd/cros_ec_commands.h @@ -4316,6 +4316,28 @@ struct ec_params_entering_mode { #define VBOOT_MODE_DEVELOPER 1 #define VBOOT_MODE_RECOVERY 2 +/*****************************************************************************/ +/* + * I2C passthru protection command: Protects I2C tunnels against access on + * certain addresses (board-specific). + */ +#define EC_CMD_I2C_PASSTHRU_PROTECT 0x00B7 + +enum ec_i2c_passthru_protect_subcmd { + EC_CMD_I2C_PASSTHRU_PROTECT_STATUS = 0x0, + EC_CMD_I2C_PASSTHRU_PROTECT_ENABLE = 0x1, +}; + +struct ec_params_i2c_passthru_protect { + uint8_t subcmd; + uint8_t port; /* I2C port number */ +} __ec_align1; + +struct ec_response_i2c_passthru_protect { + uint8_t status; /* Status flags (0: unlocked, 1: locked) */ +} __ec_align1; + + /*****************************************************************************/ /* * HDMI CEC commands From patchwork Fri May 3 22:02:27 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gwendal Grignou X-Patchwork-Id: 10929291 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 83001912 for ; Fri, 3 May 2019 22:03:24 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 74F51287CE for ; Fri, 3 May 2019 22:03:24 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 693A8287D1; Fri, 3 May 2019 22:03:24 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E5263287CE for ; Fri, 3 May 2019 22:03:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726963AbfECWDX (ORCPT ); Fri, 3 May 2019 18:03:23 -0400 Received: from mail-pg1-f196.google.com ([209.85.215.196]:41478 "EHLO mail-pg1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726958AbfECWDX (ORCPT ); Fri, 3 May 2019 18:03:23 -0400 Received: by mail-pg1-f196.google.com with SMTP id f6so3334773pgs.8 for ; Fri, 03 May 2019 15:03:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=q1PKEqDM378kY+fiX0biAqbBpeI8zOEYVZPaEEhsQfc=; b=UAtBg6n5bXdlAdjlBcRXonMnEy8aQ1/zsgfeP1VOfuTFsrcenQqlBXzdZfJ+5cmAum mlPVNuimtSdlNEfL/zLwb5vRtlrvi6WRou9e2lrZ+SdNsvFyd9IbXlFOXVAjyXF/JOX8 mGLPKDttdiF972NtQa4s0Y1UQfNRizf9hGaf0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=q1PKEqDM378kY+fiX0biAqbBpeI8zOEYVZPaEEhsQfc=; b=I6Azno4CevZMQeRbwCmhg1eWJbbfrQtxGLte4Sj9/lYtCEb1TYLf582aAegraf8/ZB h+nVzhcodH81hR/93U309KqtA8cLVKQxEExDes9CiYyemRXwtOTtouY470ZwfmoXZR/M p8lRFfj7uXsqfEgyd1tGubLeByozSwZH/QiYWhPR3xWV8SDj4BPzHdjDJBLB4flY00SY UWBMzgpr1gb7DxFzJQSk4QtCouJCo4WlKDmqUbQu9qAcGB8vERyj6KoQewkOM0dSxbm8 Zbz0D3UNg3mlpCATLlbw6IlUj0qeCGcxXFfaQg3bsE955xP5hiJ2ueFiw2Byq0rDO8no X6sA== X-Gm-Message-State: APjAAAWXCstWSUGBEVaaqEu+oZnQVqVGod4h3VNftd7q+SVE5F0YjkdK n0wrdArJa2iIZHSrbCXeFdmT6g== X-Google-Smtp-Source: APXvYqzFG5JHQMwF1zwyuVu33jSdE9Z0d14+r7tp18tTYjUtUaK8k5Wou9ZPJDFKWSjUZi67hh+qvA== X-Received: by 2002:a63:4f41:: with SMTP id p1mr13845074pgl.63.1556921002394; Fri, 03 May 2019 15:03:22 -0700 (PDT) Received: from localhost ([2620:15c:202:1:3c8f:512b:3522:dfaf]) by smtp.gmail.com with ESMTPSA id j12sm8701522pgg.79.2019.05.03.15.03.21 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 03 May 2019 15:03:21 -0700 (PDT) From: Gwendal Grignou To: enric.balletbo@collabora.com, bleung@chromium.org, groeck@chromium.org, lee.jones@linaro.org, jic23@kernel.org, broonie@kernel.org, cychiang@chromium.org, tiwai@suse.com Cc: linux-iio@vger.kernel.org, alsa-devel@alsa-project.org, Gwendal Grignou Subject: [PATCH v2 24/30] mfd: cros_ec: Add API for EC-EC communication Date: Fri, 3 May 2019 15:02:27 -0700 Message-Id: <20190503220233.64546-25-gwendal@chromium.org> X-Mailer: git-send-email 2.21.0.1020.gf2820cf01a-goog In-Reply-To: <20190503220233.64546-1-gwendal@chromium.org> References: <20190503220233.64546-1-gwendal@chromium.org> MIME-Version: 1.0 Sender: linux-iio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Allow EC to talk to other ECs that are not presented to the host. Neeed when EC are present in detachable keyboard. Acked-by: Enric Balletbo i Serra Signed-off-by: Gwendal Grignou --- include/linux/mfd/cros_ec_commands.h | 95 ++++++++++++++++++++++++++++ 1 file changed, 95 insertions(+) diff --git a/include/linux/mfd/cros_ec_commands.h b/include/linux/mfd/cros_ec_commands.h index 59ad6bae3f9b..52fd9bfafc7f 100644 --- a/include/linux/mfd/cros_ec_commands.h +++ b/include/linux/mfd/cros_ec_commands.h @@ -5043,6 +5043,101 @@ struct ec_response_pd_chip_info_v1 { }; } __ec_align2; +/*****************************************************************************/ +/* EC-EC communication commands: range 0x0600-0x06FF */ + +#define EC_COMM_TEXT_MAX 8 + +/* + * Get battery static information, i.e. information that never changes, or + * very infrequently. + */ +#define EC_CMD_BATTERY_GET_STATIC 0x0600 + +/** + * struct ec_params_battery_static_info - Battery static info parameters + * @index: Battery index. + */ +struct ec_params_battery_static_info { + uint8_t index; +} __ec_align_size1; + +/** + * struct ec_response_battery_static_info - Battery static info response + * @design_capacity: Battery Design Capacity (mAh) + * @design_voltage: Battery Design Voltage (mV) + * @manufacturer: Battery Manufacturer String + * @model: Battery Model Number String + * @serial: Battery Serial Number String + * @type: Battery Type String + * @cycle_count: Battery Cycle Count + */ +struct ec_response_battery_static_info { + uint16_t design_capacity; + uint16_t design_voltage; + char manufacturer[EC_COMM_TEXT_MAX]; + char model[EC_COMM_TEXT_MAX]; + char serial[EC_COMM_TEXT_MAX]; + char type[EC_COMM_TEXT_MAX]; + /* TODO(crbug.com/795991): Consider moving to dynamic structure. */ + uint32_t cycle_count; +} __ec_align4; + +/* + * Get battery dynamic information, i.e. information that is likely to change + * every time it is read. + */ +#define EC_CMD_BATTERY_GET_DYNAMIC 0x0601 + +/** + * struct ec_params_battery_dynamic_info - Battery dynamic info parameters + * @index: Battery index. + */ +struct ec_params_battery_dynamic_info { + uint8_t index; +} __ec_align_size1; + +/** + * struct ec_response_battery_dynamic_info - Battery dynamic info response + * @actual_voltage: Battery voltage (mV) + * @actual_current: Battery current (mA); negative=discharging + * @remaining_capacity: Remaining capacity (mAh) + * @full_capacity: Capacity (mAh, might change occasionally) + * @flags: Flags, see EC_BATT_FLAG_* + * @desired_voltage: Charging voltage desired by battery (mV) + * @desired_current: Charging current desired by battery (mA) + */ +struct ec_response_battery_dynamic_info { + int16_t actual_voltage; + int16_t actual_current; + int16_t remaining_capacity; + int16_t full_capacity; + int16_t flags; + int16_t desired_voltage; + int16_t desired_current; +} __ec_align2; + +/* + * Control charger chip. Used to control charger chip on the slave. + */ +#define EC_CMD_CHARGER_CONTROL 0x0602 + +/** + * struct ec_params_charger_control - Charger control parameters + * @max_current: Charger current (mA). Positive to allow base to draw up to + * max_current and (possibly) charge battery, negative to request current + * from base (OTG). + * @otg_voltage: Voltage (mV) to use in OTG mode, ignored if max_current is + * >= 0. + * @allow_charging: Allow base battery charging (only makes sense if + * max_current > 0). + */ +struct ec_params_charger_control { + int16_t max_current; + uint16_t otg_voltage; + uint8_t allow_charging; +} __ec_align_size1; + /*****************************************************************************/ /* * Reserve a range of host commands for board-specific, experimental, or From patchwork Fri May 3 22:02:28 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gwendal Grignou X-Patchwork-Id: 10929293 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id BF4891390 for ; Fri, 3 May 2019 22:03:25 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B0847287CE for ; Fri, 3 May 2019 22:03:25 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id A45FE287D1; Fri, 3 May 2019 22:03:25 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 4E7A0287CE for ; Fri, 3 May 2019 22:03:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726965AbfECWDZ (ORCPT ); Fri, 3 May 2019 18:03:25 -0400 Received: from mail-pg1-f194.google.com ([209.85.215.194]:36391 "EHLO mail-pg1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726958AbfECWDY (ORCPT ); Fri, 3 May 2019 18:03:24 -0400 Received: by mail-pg1-f194.google.com with SMTP id 85so3346674pgc.3 for ; Fri, 03 May 2019 15:03:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=av7W5ynTFf4qECgZY1aSKemrc6LUQhXC9NlzuZ12Hu4=; b=YoYGS1F1oQXjukBhnrK7t6lGE2Tg29COzefrmIkQ6mGImiL3BLJ92f4PEqNxBPM3fR Z5vPlUfkJg6BIHFdZwtNYXSnxzHjylfOhpq7wUl1budX4PbRRu1id/ExV8hy/jvjM9G8 +ofIx9lhjnZP7HcFpfp6q/RUiDRDLCB16uM1g= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=av7W5ynTFf4qECgZY1aSKemrc6LUQhXC9NlzuZ12Hu4=; b=ISezwY5A4wOZDE1ffqAYDzuT3Pgp6aMmZMSMqYLjoHlBMc8jvnaBXrTC++eVIZcjUp fvBcDgZJD1ARi7zfL2xYkENVqXZwqrXEARTjdzl0uUzv+bMRsnR8JJzBpf9zOx6fKH6V tPUIkOjgm6zG6pKn7iUFmxk9ZRM1F6yrSyEqaxv9gocBgDISJ71WO0iiYS8I0iwcSC6G yKKKt0ZpFLifysoqYphbYFaLDJN82Z8aMvgee7bspdAYJVwr8McpWts6bBVpvGVGSR/X kZYAmNs/exI/v8Ye2dgxs+fiS+jpfrtvWSmdII3xXwAGarfCFX9wJGFThX8M9r4d0in7 9vwg== X-Gm-Message-State: APjAAAX1hBWwZt7piotrskHp4fTyhrXmPLlA5xPSwz+a/6Wge+lBTW9q e/mhwal33Cp+xpGvIHkDOZIBGA== X-Google-Smtp-Source: APXvYqwHuNR0rW4qS/p65gY4BZJtqs4GTLUnV/TC2lkxU7YO7LxbSGm8WH2nSWsutq1pXSfgqda8lA== X-Received: by 2002:aa7:928b:: with SMTP id j11mr14486184pfa.200.1556921004119; Fri, 03 May 2019 15:03:24 -0700 (PDT) Received: from localhost ([2620:15c:202:1:3c8f:512b:3522:dfaf]) by smtp.gmail.com with ESMTPSA id a6sm4097402pfn.181.2019.05.03.15.03.23 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 03 May 2019 15:03:23 -0700 (PDT) From: Gwendal Grignou To: enric.balletbo@collabora.com, bleung@chromium.org, groeck@chromium.org, lee.jones@linaro.org, jic23@kernel.org, broonie@kernel.org, cychiang@chromium.org, tiwai@suse.com Cc: linux-iio@vger.kernel.org, alsa-devel@alsa-project.org, Gwendal Grignou Subject: [PATCH v2 25/30] mfd: cros_ec: Add API for Touchpad support Date: Fri, 3 May 2019 15:02:28 -0700 Message-Id: <20190503220233.64546-26-gwendal@chromium.org> X-Mailer: git-send-email 2.21.0.1020.gf2820cf01a-goog In-Reply-To: <20190503220233.64546-1-gwendal@chromium.org> References: <20190503220233.64546-1-gwendal@chromium.org> MIME-Version: 1.0 Sender: linux-iio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add API to control touchpad presented by Embedded Controller. Acked-by: Enric Balletbo i Serra Signed-off-by: Gwendal Grignou --- include/linux/mfd/cros_ec_commands.h | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/include/linux/mfd/cros_ec_commands.h b/include/linux/mfd/cros_ec_commands.h index 52fd9bfafc7f..1d0311df44d3 100644 --- a/include/linux/mfd/cros_ec_commands.h +++ b/include/linux/mfd/cros_ec_commands.h @@ -5043,6 +5043,32 @@ struct ec_response_pd_chip_info_v1 { }; } __ec_align2; +/*****************************************************************************/ +/* Touchpad MCU commands: range 0x0500-0x05FF */ + +/* Perform touchpad self test */ +#define EC_CMD_TP_SELF_TEST 0x0500 + +/* Get number of frame types, and the size of each type */ +#define EC_CMD_TP_FRAME_INFO 0x0501 + +struct ec_response_tp_frame_info { + uint32_t n_frames; + uint32_t frame_sizes[0]; +} __ec_align4; + +/* Create a snapshot of current frame readings */ +#define EC_CMD_TP_FRAME_SNAPSHOT 0x0502 + +/* Read the frame */ +#define EC_CMD_TP_FRAME_GET 0x0503 + +struct ec_params_tp_frame_get { + uint32_t frame_index; + uint32_t offset; + uint32_t size; +} __ec_align4; + /*****************************************************************************/ /* EC-EC communication commands: range 0x0600-0x06FF */ From patchwork Fri May 3 22:02:29 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gwendal Grignou X-Patchwork-Id: 10929295 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id DA5591390 for ; Fri, 3 May 2019 22:03:27 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id CB200287CE for ; Fri, 3 May 2019 22:03:27 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id BF79B287D1; Fri, 3 May 2019 22:03:27 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 16D62287CE for ; Fri, 3 May 2019 22:03:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726969AbfECWD0 (ORCPT ); Fri, 3 May 2019 18:03:26 -0400 Received: from mail-pl1-f195.google.com ([209.85.214.195]:34660 "EHLO mail-pl1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726958AbfECWD0 (ORCPT ); Fri, 3 May 2019 18:03:26 -0400 Received: by mail-pl1-f195.google.com with SMTP id ck18so3326696plb.1 for ; Fri, 03 May 2019 15:03:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=FnxnmeRQLnAu3kKQSWUmXhVXGKQwnD4lOR+V0w7FiEg=; b=BUI5WDLJGAhJnYoV3PoRm4frZBPFX2lGSc2/O1P44sRM08IsczyIR8s0BtKpVWw1jx g+9h1P4eMIVSLdbJw/SQbSPcvKMMT19Am7u0wJn2WHKtfrGDGTyXojeNLlFECQQts0yy 2pkG8IXXKhNR9mcBTAfyUI6kZi9oCTiIuTCqE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=FnxnmeRQLnAu3kKQSWUmXhVXGKQwnD4lOR+V0w7FiEg=; b=XJDSCNZ5is0xSfpA4y8k6rygXWc7XzCeeCFqLSPLLY79lKg8KpdkEX+NovyMor74Nc ilgWnNj/5Hx+laK0g+ycRRycdh4SSNVos/NCYWJ2KD5durPMmEG9RjIuTEX4WY9NhEmB uqPvrlRvZjFu4LE2TcY0cAtZtRfviAcNigZKO+l4C7dP2zqW00kN0VZPNSdPeIoavRkx X0tVAo7pm98PJi0ERhTPUuW5Q1kiog6AbKw5AUwcDVlm4actUMBH+6tMJy1Vr8O3+iAk c1sCd9Laqnn8U1p2NFY2kNqbCvMEkmgipqxJk2ZvcX3E7edwnbIIFbz990moiPvPTd+m +UcA== X-Gm-Message-State: APjAAAW6KBI9JPkBhKG8YNionB11l542EU0zjY1y+NfO3kkxdo9vOmgW UTlVQyeNdNnLUfQppYqtiwYHcA== X-Google-Smtp-Source: APXvYqyOetCJGtv/BFCFakMKotwrU6fH6CsKssboeJIw//hyZvVd4V/4v/hJgV2lz5j5wMzPmaxcyA== X-Received: by 2002:a17:902:8a95:: with SMTP id p21mr13894236plo.126.1556921005689; Fri, 03 May 2019 15:03:25 -0700 (PDT) Received: from localhost ([2620:15c:202:1:3c8f:512b:3522:dfaf]) by smtp.gmail.com with ESMTPSA id z10sm3627670pge.87.2019.05.03.15.03.24 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 03 May 2019 15:03:24 -0700 (PDT) From: Gwendal Grignou To: enric.balletbo@collabora.com, bleung@chromium.org, groeck@chromium.org, lee.jones@linaro.org, jic23@kernel.org, broonie@kernel.org, cychiang@chromium.org, tiwai@suse.com Cc: linux-iio@vger.kernel.org, alsa-devel@alsa-project.org, Gwendal Grignou Subject: [PATCH v2 26/30] mfd: cros_ec: Add API for Fingerprint support Date: Fri, 3 May 2019 15:02:29 -0700 Message-Id: <20190503220233.64546-27-gwendal@chromium.org> X-Mailer: git-send-email 2.21.0.1020.gf2820cf01a-goog In-Reply-To: <20190503220233.64546-1-gwendal@chromium.org> References: <20190503220233.64546-1-gwendal@chromium.org> MIME-Version: 1.0 Sender: linux-iio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add API for fingerprint sensor presented by embedded controller. Acked-by: Enric Balletbo i Serra Signed-off-by: Gwendal Grignou --- include/linux/mfd/cros_ec_commands.h | 228 +++++++++++++++++++++++++++ 1 file changed, 228 insertions(+) diff --git a/include/linux/mfd/cros_ec_commands.h b/include/linux/mfd/cros_ec_commands.h index 1d0311df44d3..4a9ac3861bdd 100644 --- a/include/linux/mfd/cros_ec_commands.h +++ b/include/linux/mfd/cros_ec_commands.h @@ -5043,6 +5043,234 @@ struct ec_response_pd_chip_info_v1 { }; } __ec_align2; +/*****************************************************************************/ +/* Fingerprint MCU commands: range 0x0400-0x040x */ + +/* Fingerprint SPI sensor passthru command: prototyping ONLY */ +#define EC_CMD_FP_PASSTHRU 0x0400 + +#define EC_FP_FLAG_NOT_COMPLETE 0x1 + +struct ec_params_fp_passthru { + uint16_t len; /* Number of bytes to write then read */ + uint16_t flags; /* EC_FP_FLAG_xxx */ + uint8_t data[]; /* Data to send */ +} __ec_align2; + +/* Configure the Fingerprint MCU behavior */ +#define EC_CMD_FP_MODE 0x0402 + +/* Put the sensor in its lowest power mode */ +#define FP_MODE_DEEPSLEEP BIT(0) +/* Wait to see a finger on the sensor */ +#define FP_MODE_FINGER_DOWN BIT(1) +/* Poll until the finger has left the sensor */ +#define FP_MODE_FINGER_UP BIT(2) +/* Capture the current finger image */ +#define FP_MODE_CAPTURE BIT(3) +/* Finger enrollment session on-going */ +#define FP_MODE_ENROLL_SESSION BIT(4) +/* Enroll the current finger image */ +#define FP_MODE_ENROLL_IMAGE BIT(5) +/* Try to match the current finger image */ +#define FP_MODE_MATCH BIT(6) +/* Reset and re-initialize the sensor. */ +#define FP_MODE_RESET_SENSOR BIT(7) +/* special value: don't change anything just read back current mode */ +#define FP_MODE_DONT_CHANGE BIT(31) + +#define FP_VALID_MODES (FP_MODE_DEEPSLEEP | \ + FP_MODE_FINGER_DOWN | \ + FP_MODE_FINGER_UP | \ + FP_MODE_CAPTURE | \ + FP_MODE_ENROLL_SESSION | \ + FP_MODE_ENROLL_IMAGE | \ + FP_MODE_MATCH | \ + FP_MODE_RESET_SENSOR | \ + FP_MODE_DONT_CHANGE) + +/* Capture types defined in bits [30..28] */ +#define FP_MODE_CAPTURE_TYPE_SHIFT 28 +#define FP_MODE_CAPTURE_TYPE_MASK (0x7 << FP_MODE_CAPTURE_TYPE_SHIFT) +/* + * This enum must remain ordered, if you add new values you must ensure that + * FP_CAPTURE_TYPE_MAX is still the last one. + */ +enum fp_capture_type { + /* Full blown vendor-defined capture (produces 'frame_size' bytes) */ + FP_CAPTURE_VENDOR_FORMAT = 0, + /* Simple raw image capture (produces width x height x bpp bits) */ + FP_CAPTURE_SIMPLE_IMAGE = 1, + /* Self test pattern (e.g. checkerboard) */ + FP_CAPTURE_PATTERN0 = 2, + /* Self test pattern (e.g. inverted checkerboard) */ + FP_CAPTURE_PATTERN1 = 3, + /* Capture for Quality test with fixed contrast */ + FP_CAPTURE_QUALITY_TEST = 4, + /* Capture for pixel reset value test */ + FP_CAPTURE_RESET_TEST = 5, + FP_CAPTURE_TYPE_MAX, +}; +/* Extracts the capture type from the sensor 'mode' word */ +#define FP_CAPTURE_TYPE(mode) (((mode) & FP_MODE_CAPTURE_TYPE_MASK) \ + >> FP_MODE_CAPTURE_TYPE_SHIFT) + +struct ec_params_fp_mode { + uint32_t mode; /* as defined by FP_MODE_ constants */ +} __ec_align4; + +struct ec_response_fp_mode { + uint32_t mode; /* as defined by FP_MODE_ constants */ +} __ec_align4; + +/* Retrieve Fingerprint sensor information */ +#define EC_CMD_FP_INFO 0x0403 + +/* Number of dead pixels detected on the last maintenance */ +#define FP_ERROR_DEAD_PIXELS(errors) ((errors) & 0x3FF) +/* Unknown number of dead pixels detected on the last maintenance */ +#define FP_ERROR_DEAD_PIXELS_UNKNOWN (0x3FF) +/* No interrupt from the sensor */ +#define FP_ERROR_NO_IRQ BIT(12) +/* SPI communication error */ +#define FP_ERROR_SPI_COMM BIT(13) +/* Invalid sensor Hardware ID */ +#define FP_ERROR_BAD_HWID BIT(14) +/* Sensor initialization failed */ +#define FP_ERROR_INIT_FAIL BIT(15) + +struct ec_response_fp_info_v0 { + /* Sensor identification */ + uint32_t vendor_id; + uint32_t product_id; + uint32_t model_id; + uint32_t version; + /* Image frame characteristics */ + uint32_t frame_size; + uint32_t pixel_format; /* using V4L2_PIX_FMT_ */ + uint16_t width; + uint16_t height; + uint16_t bpp; + uint16_t errors; /* see FP_ERROR_ flags above */ +} __ec_align4; + +struct ec_response_fp_info { + /* Sensor identification */ + uint32_t vendor_id; + uint32_t product_id; + uint32_t model_id; + uint32_t version; + /* Image frame characteristics */ + uint32_t frame_size; + uint32_t pixel_format; /* using V4L2_PIX_FMT_ */ + uint16_t width; + uint16_t height; + uint16_t bpp; + uint16_t errors; /* see FP_ERROR_ flags above */ + /* Template/finger current information */ + uint32_t template_size; /* max template size in bytes */ + uint16_t template_max; /* maximum number of fingers/templates */ + uint16_t template_valid; /* number of valid fingers/templates */ + uint32_t template_dirty; /* bitmap of templates with MCU side changes */ + uint32_t template_version; /* version of the template format */ +} __ec_align4; + +/* Get the last captured finger frame or a template content */ +#define EC_CMD_FP_FRAME 0x0404 + +/* constants defining the 'offset' field which also contains the frame index */ +#define FP_FRAME_INDEX_SHIFT 28 +/* Frame buffer where the captured image is stored */ +#define FP_FRAME_INDEX_RAW_IMAGE 0 +/* First frame buffer holding a template */ +#define FP_FRAME_INDEX_TEMPLATE 1 +#define FP_FRAME_GET_BUFFER_INDEX(offset) ((offset) >> FP_FRAME_INDEX_SHIFT) +#define FP_FRAME_OFFSET_MASK 0x0FFFFFFF + +/* Version of the format of the encrypted templates. */ +#define FP_TEMPLATE_FORMAT_VERSION 3 + +/* Constants for encryption parameters */ +#define FP_CONTEXT_NONCE_BYTES 12 +#define FP_CONTEXT_USERID_WORDS (32 / sizeof(uint32_t)) +#define FP_CONTEXT_TAG_BYTES 16 +#define FP_CONTEXT_SALT_BYTES 16 +#define FP_CONTEXT_TPM_BYTES 32 + +struct ec_fp_template_encryption_metadata { + /* + * Version of the structure format (N=3). + */ + uint16_t struct_version; + /* Reserved bytes, set to 0. */ + uint16_t reserved; + /* + * The salt is *only* ever used for key derivation. The nonce is unique, + * a different one is used for every message. + */ + uint8_t nonce[FP_CONTEXT_NONCE_BYTES]; + uint8_t salt[FP_CONTEXT_SALT_BYTES]; + uint8_t tag[FP_CONTEXT_TAG_BYTES]; +}; + +struct ec_params_fp_frame { + /* + * The offset contains the template index or FP_FRAME_INDEX_RAW_IMAGE + * in the high nibble, and the real offset within the frame in + * FP_FRAME_OFFSET_MASK. + */ + uint32_t offset; + uint32_t size; +} __ec_align4; + +/* Load a template into the MCU */ +#define EC_CMD_FP_TEMPLATE 0x0405 + +/* Flag in the 'size' field indicating that the full template has been sent */ +#define FP_TEMPLATE_COMMIT 0x80000000 + +struct ec_params_fp_template { + uint32_t offset; + uint32_t size; + uint8_t data[]; +} __ec_align4; + +/* Clear the current fingerprint user context and set a new one */ +#define EC_CMD_FP_CONTEXT 0x0406 + +struct ec_params_fp_context { + uint32_t userid[FP_CONTEXT_USERID_WORDS]; +} __ec_align4; + +#define EC_CMD_FP_STATS 0x0407 + +#define FPSTATS_CAPTURE_INV BIT(0) +#define FPSTATS_MATCHING_INV BIT(1) + +struct ec_response_fp_stats { + uint32_t capture_time_us; + uint32_t matching_time_us; + uint32_t overall_time_us; + struct { + uint32_t lo; + uint32_t hi; + } overall_t0; + uint8_t timestamps_invalid; + int8_t template_matched; +} __ec_align2; + +#define EC_CMD_FP_SEED 0x0408 +struct ec_params_fp_seed { + /* + * Version of the structure format (N=3). + */ + uint16_t struct_version; + /* Reserved bytes, set to 0. */ + uint16_t reserved; + /* Seed from the TPM. */ + uint8_t seed[FP_CONTEXT_TPM_BYTES]; +} __ec_align4; + /*****************************************************************************/ /* Touchpad MCU commands: range 0x0500-0x05FF */ From patchwork Fri May 3 22:02:30 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gwendal Grignou X-Patchwork-Id: 10929297 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 02CBF912 for ; Fri, 3 May 2019 22:03:29 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E8E83287CE for ; Fri, 3 May 2019 22:03:28 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id DCC58287D1; Fri, 3 May 2019 22:03:28 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8D329287CE for ; Fri, 3 May 2019 22:03:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726846AbfECWD2 (ORCPT ); Fri, 3 May 2019 18:03:28 -0400 Received: from mail-pl1-f195.google.com ([209.85.214.195]:32904 "EHLO mail-pl1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726958AbfECWD1 (ORCPT ); Fri, 3 May 2019 18:03:27 -0400 Received: by mail-pl1-f195.google.com with SMTP id y3so3327606plp.0 for ; Fri, 03 May 2019 15:03:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=kqldmXxauyhkjN+cmd6rsXcdSJy2DQw8nApvvLnMwiY=; b=JDf99JEQRfx0Cx33Wp9McW5W66XB/ORRYg1ryMaOk8WYyCkfpEFT6m+p6p/iuoVz3A nRoVB6X5NNxqouyMIutQjcjLirSPQst8jP5ek8GqYt+dEmrnVHPjDsjbhUPzaq5I5RSb JmyISC2jg/MdruxzFCTJwulITIteXEpHW3FbI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=kqldmXxauyhkjN+cmd6rsXcdSJy2DQw8nApvvLnMwiY=; b=mztJigGRCagZqpFM8Y7YnytEf0sEtaQXuE4J9x5e9oovlIeCoUtpk8s9ZWguSs6Arf 3WcZtz6JLt/VJRg2lsk1+Bs3JdbTZPmDVpliUUIeK+pXEurFkBzFkKY0UmYizjqQ8O7+ iu/mpTgCR5Z3B2+Mace44NuY1bkYQaB84Fysnsnjs3xe2jSLY2qEkkm6uiVMVAAr/bwE EjPYGWFuFwr0ZvgaT6wbMAd8AaaOzVmdb4+/hZpP/DtggYCrySaui2bZJjH0Kc85ScMn uMfJfURJatcFtkhVdFIRHD4Px8g53tn24lYWxt93HGs1cGnMUEL304t0GsLypyjb5Psy LdQA== X-Gm-Message-State: APjAAAUzwdnuNdiYXxalBOCWSMH2wMKS7QsKQH7VWugajc/rVIuCs26b SLm+RQP1yRCr14gD9IeQFtMhCw== X-Google-Smtp-Source: APXvYqw7tV0azTVEBxn5kH4OCN7wzuXYAelyzUoomae87dAK3qQRrv4nBkkR8IfYh/pfjlrFS2NthA== X-Received: by 2002:a17:902:b210:: with SMTP id t16mr13867898plr.84.1556921007113; Fri, 03 May 2019 15:03:27 -0700 (PDT) Received: from localhost ([2620:15c:202:1:3c8f:512b:3522:dfaf]) by smtp.gmail.com with ESMTPSA id u5sm4540867pfa.169.2019.05.03.15.03.26 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 03 May 2019 15:03:26 -0700 (PDT) From: Gwendal Grignou To: enric.balletbo@collabora.com, bleung@chromium.org, groeck@chromium.org, lee.jones@linaro.org, jic23@kernel.org, broonie@kernel.org, cychiang@chromium.org, tiwai@suse.com Cc: linux-iio@vger.kernel.org, alsa-devel@alsa-project.org, Gwendal Grignou Subject: [PATCH v2 27/30] mfd: cros_ec: Add API for rwsig Date: Fri, 3 May 2019 15:02:30 -0700 Message-Id: <20190503220233.64546-28-gwendal@chromium.org> X-Mailer: git-send-email 2.21.0.1020.gf2820cf01a-goog In-Reply-To: <20190503220233.64546-1-gwendal@chromium.org> References: <20190503220233.64546-1-gwendal@chromium.org> MIME-Version: 1.0 Sender: linux-iio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add command to retrieve signature of image stored in the RW memory slot(s). Acked-by: Enric Balletbo i Serra Signed-off-by: Gwendal Grignou --- include/linux/mfd/cros_ec_commands.h | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/include/linux/mfd/cros_ec_commands.h b/include/linux/mfd/cros_ec_commands.h index 4a9ac3861bdd..3d3a37b11002 100644 --- a/include/linux/mfd/cros_ec_commands.h +++ b/include/linux/mfd/cros_ec_commands.h @@ -5043,6 +5043,32 @@ struct ec_response_pd_chip_info_v1 { }; } __ec_align2; +/* Run RW signature verification and get status */ +#define EC_CMD_RWSIG_CHECK_STATUS 0x011C + +struct ec_response_rwsig_check_status { + uint32_t status; +} __ec_align4; + +/* For controlling RWSIG task */ +#define EC_CMD_RWSIG_ACTION 0x011D + +enum rwsig_action { + RWSIG_ACTION_ABORT = 0, /* Abort RWSIG and prevent jumping */ + RWSIG_ACTION_CONTINUE = 1, /* Jump to RW immediately */ +}; + +struct ec_params_rwsig_action { + uint32_t action; +} __ec_align4; + +/* Run verification on a slot */ +#define EC_CMD_EFS_VERIFY 0x011E + +struct ec_params_efs_verify { + uint8_t region; /* enum ec_flash_region */ +} __ec_align1; + /*****************************************************************************/ /* Fingerprint MCU commands: range 0x0400-0x040x */ From patchwork Fri May 3 22:02:31 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gwendal Grignou X-Patchwork-Id: 10929299 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C1790912 for ; Fri, 3 May 2019 22:03:30 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B2B62287CE for ; Fri, 3 May 2019 22:03:30 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id A6DD9287D1; Fri, 3 May 2019 22:03:30 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2DA66287CE for ; Fri, 3 May 2019 22:03:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726970AbfECWD3 (ORCPT ); Fri, 3 May 2019 18:03:29 -0400 Received: from mail-pf1-f193.google.com ([209.85.210.193]:41269 "EHLO mail-pf1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726958AbfECWD3 (ORCPT ); Fri, 3 May 2019 18:03:29 -0400 Received: by mail-pf1-f193.google.com with SMTP id 188so3533567pfd.8 for ; Fri, 03 May 2019 15:03:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=0KFNP7GDxDVEn9/0waadn8XQgo26+DaIg8QC4SSrhCE=; b=ZK/hzflXSHwQRNZeB46eyN2GXgSBKKeiaOpn5NHjSmqIYS9P9eFF3ToPrx1GTh79p2 WwZNTz9Yek/pFQYTn5TE7LHgN9CjYGtxFaiBZhHrKL8mcriCNUMzixDU10G5nFOCYF+c 3/IiRWIx0oqqukDwrGHdT+zMeBVH/we05f8XY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=0KFNP7GDxDVEn9/0waadn8XQgo26+DaIg8QC4SSrhCE=; b=Q6mJyyc/aMCRAqNzrJDEoc3KqNB1EoYKmdE62YTOGSn8a/NvznWyLxLpV97dGWdfl0 Hj7Rl7dlER4YwWItwhYn369yDr0ASLNhA80Dtu24XqF71x1cCZ0Kr6sCFUovoaodf3H/ UDCc+1/xp7lvwJKemjd30rFashhaB860saVTCLDSnOdqqU5d7JhHUyGRqsvPC02Ck+JF IwUdttpu2Q/55McW6+85h3XFWayG5u7tYQ0VdB4DwOy89xKIwVZGyThKDeTI562DPj14 HAC7lwnj29Hq6FzPuDARFBpI1MRue2D+Vb3YwY2lS78i4b4l29gjg3+t/pyLSGR7737E vPsA== X-Gm-Message-State: APjAAAWEB+qvvpLi2QGb253oSRj11lEV5Xe+BRbrSAMIzy5rziIMJoky 85h6Ac1KyzIYjTYxK8KON1WPTQ== X-Google-Smtp-Source: APXvYqx5VrA3v5VfP99PPmGv2TIOUjM51+ZlFhs4G5gk2qqiWd7NEl4qs6v558WRJ3QSesV2tF1dOw== X-Received: by 2002:a63:31d7:: with SMTP id x206mr13546801pgx.74.1556921008643; Fri, 03 May 2019 15:03:28 -0700 (PDT) Received: from localhost ([2620:15c:202:1:3c8f:512b:3522:dfaf]) by smtp.gmail.com with ESMTPSA id g63sm6073757pfc.127.2019.05.03.15.03.27 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 03 May 2019 15:03:27 -0700 (PDT) From: Gwendal Grignou To: enric.balletbo@collabora.com, bleung@chromium.org, groeck@chromium.org, lee.jones@linaro.org, jic23@kernel.org, broonie@kernel.org, cychiang@chromium.org, tiwai@suse.com Cc: linux-iio@vger.kernel.org, alsa-devel@alsa-project.org, Gwendal Grignou Subject: [PATCH v2 28/30] mfd: cros_ec: Add SKU ID and Secure storage API Date: Fri, 3 May 2019 15:02:31 -0700 Message-Id: <20190503220233.64546-29-gwendal@chromium.org> X-Mailer: git-send-email 2.21.0.1020.gf2820cf01a-goog In-Reply-To: <20190503220233.64546-1-gwendal@chromium.org> References: <20190503220233.64546-1-gwendal@chromium.org> MIME-Version: 1.0 Sender: linux-iio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add API to store SKU, Cros board information in EC flash memory. Add API to store security data in EC. Acked-by: Enric Balletbo i Serra Signed-off-by: Gwendal Grignou --- include/linux/mfd/cros_ec_commands.h | 107 +++++++++++++++++++++++++++ 1 file changed, 107 insertions(+) diff --git a/include/linux/mfd/cros_ec_commands.h b/include/linux/mfd/cros_ec_commands.h index 3d3a37b11002..860a76274334 100644 --- a/include/linux/mfd/cros_ec_commands.h +++ b/include/linux/mfd/cros_ec_commands.h @@ -1292,6 +1292,17 @@ struct ec_response_get_features { uint32_t flags[2]; } __ec_align4; +/*****************************************************************************/ +/* Get the board's SKU ID from EC */ +#define EC_CMD_GET_SKU_ID 0x000E + +/* Set SKU ID from AP */ +#define EC_CMD_SET_SKU_ID 0x000F + +struct ec_sku_id_info { + uint32_t sku_id; +} __ec_align4; + /*****************************************************************************/ /* Flash commands */ @@ -2902,6 +2913,49 @@ struct ec_response_port80_last_boot { uint16_t code; } __ec_align2; +/*****************************************************************************/ +/* Temporary secure storage for host verified boot use */ + +/* Number of bytes in a vstore slot */ +#define EC_VSTORE_SLOT_SIZE 64 + +/* Maximum number of vstore slots */ +#define EC_VSTORE_SLOT_MAX 32 + +/* Get persistent storage info */ +#define EC_CMD_VSTORE_INFO 0x0049 +struct ec_response_vstore_info { + /* Indicates which slots are locked */ + uint32_t slot_locked; + /* Total number of slots available */ + uint8_t slot_count; +} __ec_align_size1; + +/* + * Read temporary secure storage + * + * Response is EC_VSTORE_SLOT_SIZE bytes of data. + */ +#define EC_CMD_VSTORE_READ 0x004A + +struct ec_params_vstore_read { + uint8_t slot; /* Slot to read from */ +} __ec_align1; + +struct ec_response_vstore_read { + uint8_t data[EC_VSTORE_SLOT_SIZE]; +} __ec_align1; + +/* + * Write temporary secure storage and lock it. + */ +#define EC_CMD_VSTORE_WRITE 0x004B + +struct ec_params_vstore_write { + uint8_t slot; /* Slot to write to */ + uint8_t data[EC_VSTORE_SLOT_SIZE]; +} __ec_align1; + /*****************************************************************************/ /* Thermal engine commands. Note that there are two implementations. We'll * reuse the command number, but the data and behavior is incompatible. @@ -5069,6 +5123,59 @@ struct ec_params_efs_verify { uint8_t region; /* enum ec_flash_region */ } __ec_align1; +/* + * Retrieve info from Cros Board Info store. Response is based on the data + * type. Integers return a uint32. Strings return a string, using the response + * size to determine how big it is. + */ +#define EC_CMD_GET_CROS_BOARD_INFO 0x011F +/* + * Write info into Cros Board Info on EEPROM. Write fails if the board has + * hardware write-protect enabled. + */ +#define EC_CMD_SET_CROS_BOARD_INFO 0x0120 + +enum cbi_data_tag { + CBI_TAG_BOARD_VERSION = 0, /* uint32_t or smaller */ + CBI_TAG_OEM_ID = 1, /* uint32_t or smaller */ + CBI_TAG_SKU_ID = 2, /* uint32_t or smaller */ + CBI_TAG_DRAM_PART_NUM = 3, /* variable length ascii, nul terminated. */ + CBI_TAG_OEM_NAME = 4, /* variable length ascii, nul terminated. */ + CBI_TAG_MODEL_ID = 5, /* uint32_t or smaller */ + CBI_TAG_COUNT, +}; + +/* + * Flags to control read operation + * + * RELOAD: Invalidate cache and read data from EEPROM. Useful to verify + * write was successful without reboot. + */ +#define CBI_GET_RELOAD BIT(0) + +struct ec_params_get_cbi { + uint32_t tag; /* enum cbi_data_tag */ + uint32_t flag; /* CBI_GET_* */ +} __ec_align4; + +/* + * Flags to control write behavior. + * + * NO_SYNC: Makes EC update data in RAM but skip writing to EEPROM. It's + * useful when writing multiple fields in a row. + * INIT: Need to be set when creating a new CBI from scratch. All fields + * will be initialized to zero first. + */ +#define CBI_SET_NO_SYNC BIT(0) +#define CBI_SET_INIT BIT(1) + +struct ec_params_set_cbi { + uint32_t tag; /* enum cbi_data_tag */ + uint32_t flag; /* CBI_SET_* */ + uint32_t size; /* Data size */ + uint8_t data[]; /* For string and raw data */ +} __ec_align1; + /*****************************************************************************/ /* Fingerprint MCU commands: range 0x0400-0x040x */ From patchwork Fri May 3 22:02:32 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gwendal Grignou X-Patchwork-Id: 10929301 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 26C481390 for ; Fri, 3 May 2019 22:03:32 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 16BE7287CE for ; Fri, 3 May 2019 22:03:32 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 0B3C5287D3; Fri, 3 May 2019 22:03:32 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8A2DD287CE for ; Fri, 3 May 2019 22:03:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726972AbfECWDb (ORCPT ); Fri, 3 May 2019 18:03:31 -0400 Received: from mail-pf1-f196.google.com ([209.85.210.196]:46508 "EHLO mail-pf1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726958AbfECWDa (ORCPT ); Fri, 3 May 2019 18:03:30 -0400 Received: by mail-pf1-f196.google.com with SMTP id j11so3516156pff.13 for ; Fri, 03 May 2019 15:03:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Bd+ZQ7IZ3uuy9Fc2tXyPCEehBuupO/JtginQNtTWjWY=; b=f3ecIfqJUA2IP6AgRzc3sH+IDMmFUN6go1LixXZ0xO+ORNZ92vkkDgzQhr2y1mi15t fT7EcbhXdl9Ax0lvsmJ4yS/cTrrri/sSWkBRvCdB8KbTiUDecueChzWP0/UWJXQB9V9F jv0svp7kazHEZwjd1UC2sNpGV6bbwCEh926o4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Bd+ZQ7IZ3uuy9Fc2tXyPCEehBuupO/JtginQNtTWjWY=; b=T0SyegqgwVOA8C58+rG2fC/ySb2RcoP39VyNg0d6XTap4kNGsFZH4tL0GABEdRV0Oa 9FtHhoyN03/7pi/TKg3Ega8L8+F9RgwFYWpPYYS0QgpmLMwTr1A21GpPjcmKBvpEgNF9 bVb0cEg5ot5hQa4yrPHdwShaJ4DKvu+yBIXRKQIqaAUGFKV+1we9qbQdvngC/Mg0eeHJ 5WE7FIqLTu5Bn/ioOWLCrPsdwZMcYbLPRgZaqsP0l3iId9v6XOWK4VtsfB7/z/WXN1CX +lBgVqUuXovv2bXVaXo4IdfEmHLOZchsE3CKYJrir7eB7x+YGYEtLy9df6+6ZoYt9Wu6 E4OQ== X-Gm-Message-State: APjAAAVAwg5KZwICDGDnKjUtG7PkypDyEvpbTd1FN2eujU7BhXOwLpVF htbDLomlbN+HzRU1HLZbXi/FKg== X-Google-Smtp-Source: APXvYqzJI6ShHssmAMsFD0CbCeh9SQGVKTrAih2oVBwCG/PBvxggwji1XuZZcqNy2QBX6bl7k1cB7w== X-Received: by 2002:a63:560d:: with SMTP id k13mr13675024pgb.124.1556921010123; Fri, 03 May 2019 15:03:30 -0700 (PDT) Received: from localhost ([2620:15c:202:1:3c8f:512b:3522:dfaf]) by smtp.gmail.com with ESMTPSA id l63sm7476008pfb.124.2019.05.03.15.03.29 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 03 May 2019 15:03:29 -0700 (PDT) From: Gwendal Grignou To: enric.balletbo@collabora.com, bleung@chromium.org, groeck@chromium.org, lee.jones@linaro.org, jic23@kernel.org, broonie@kernel.org, cychiang@chromium.org, tiwai@suse.com Cc: linux-iio@vger.kernel.org, alsa-devel@alsa-project.org, Gwendal Grignou Subject: [PATCH v2 29/30] mfd: cros_ec: Add Management API entry points Date: Fri, 3 May 2019 15:02:32 -0700 Message-Id: <20190503220233.64546-30-gwendal@chromium.org> X-Mailer: git-send-email 2.21.0.1020.gf2820cf01a-goog In-Reply-To: <20190503220233.64546-1-gwendal@chromium.org> References: <20190503220233.64546-1-gwendal@chromium.org> MIME-Version: 1.0 Sender: linux-iio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add commands for test and management. Add command space for future development. Acked-by: Enric Balletbo i Serra Signed-off-by: Gwendal Grignou --- include/linux/mfd/cros_ec_commands.h | 113 +++++++++++++++++++++++++++ 1 file changed, 113 insertions(+) diff --git a/include/linux/mfd/cros_ec_commands.h b/include/linux/mfd/cros_ec_commands.h index 860a76274334..fc8babce1576 100644 --- a/include/linux/mfd/cros_ec_commands.h +++ b/include/linux/mfd/cros_ec_commands.h @@ -5176,6 +5176,119 @@ struct ec_params_set_cbi { uint8_t data[]; /* For string and raw data */ } __ec_align1; +/* + * Information about resets of the AP by the EC and the EC's own uptime. + */ +#define EC_CMD_GET_UPTIME_INFO 0x0121 + +struct ec_response_uptime_info { + /* + * Number of milliseconds since the last EC boot. Sysjump resets + * typically do not restart the EC's time_since_boot epoch. + * + * WARNING: The EC's sense of time is much less accurate than the AP's + * sense of time, in both phase and frequency. This timebase is similar + * to CLOCK_MONOTONIC_RAW, but with 1% or more frequency error. + */ + uint32_t time_since_ec_boot_ms; + + /* + * Number of times the AP was reset by the EC since the last EC boot. + * Note that the AP may be held in reset by the EC during the initial + * boot sequence, such that the very first AP boot may count as more + * than one here. + */ + uint32_t ap_resets_since_ec_boot; + + /* + * The set of flags which describe the EC's most recent reset. See + * include/system.h RESET_FLAG_* for details. + */ + uint32_t ec_reset_flags; + + /* Empty log entries have both the cause and timestamp set to zero. */ + struct ap_reset_log_entry { + /* + * See include/chipset.h: enum chipset_{reset,shutdown}_reason + * for details. + */ + uint16_t reset_cause; + + /* Reserved for protocol growth. */ + uint16_t reserved; + + /* + * The time of the reset's assertion, in milliseconds since the + * last EC boot, in the same epoch as time_since_ec_boot_ms. + * Set to zero if the log entry is empty. + */ + uint32_t reset_time_ms; + } recent_ap_reset[4]; +} __ec_align4; + +/* + * Add entropy to the device secret (stored in the rollback region). + * + * Depending on the chip, the operation may take a long time (e.g. to erase + * flash), so the commands are asynchronous. + */ +#define EC_CMD_ADD_ENTROPY 0x0122 + +enum add_entropy_action { + /* Add entropy to the current secret. */ + ADD_ENTROPY_ASYNC = 0, + /* + * Add entropy, and also make sure that the previous secret is erased. + * (this can be implemented by adding entropy multiple times until + * all rolback blocks have been overwritten). + */ + ADD_ENTROPY_RESET_ASYNC = 1, + /* Read back result from the previous operation. */ + ADD_ENTROPY_GET_RESULT = 2, +}; + +struct ec_params_rollback_add_entropy { + uint8_t action; +} __ec_align1; + +/* + * Perform a single read of a given ADC channel. + */ +#define EC_CMD_ADC_READ 0x0123 + +struct ec_params_adc_read { + uint8_t adc_channel; +} __ec_align1; + +struct ec_response_adc_read { + int32_t adc_value; +} __ec_align4; + +/* + * Read back rollback info + */ +#define EC_CMD_ROLLBACK_INFO 0x0124 + +struct ec_response_rollback_info { + int32_t id; /* Incrementing number to indicate which region to use. */ + int32_t rollback_min_version; + int32_t rw_rollback_version; +} __ec_align4; + + +/* Issue AP reset */ +#define EC_CMD_AP_RESET 0x0125 + +/*****************************************************************************/ +/* The command range 0x200-0x2FF is reserved for Rotor. */ + +/*****************************************************************************/ +/* + * Reserve a range of host commands for the CR51 firmware. + */ +#define EC_CMD_CR51_BASE 0x0300 +#define EC_CMD_CR51_LAST 0x03FF + /*****************************************************************************/ /* Fingerprint MCU commands: range 0x0400-0x040x */ From patchwork Fri May 3 22:02:33 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gwendal Grignou X-Patchwork-Id: 10929303 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B265E1390 for ; Fri, 3 May 2019 22:03:33 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A2600287CE for ; Fri, 3 May 2019 22:03:33 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 95F56287D2; Fri, 3 May 2019 22:03:33 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 25ABA287CE for ; Fri, 3 May 2019 22:03:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726973AbfECWDc (ORCPT ); Fri, 3 May 2019 18:03:32 -0400 Received: from mail-pl1-f194.google.com ([209.85.214.194]:38976 "EHLO mail-pl1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726958AbfECWDc (ORCPT ); Fri, 3 May 2019 18:03:32 -0400 Received: by mail-pl1-f194.google.com with SMTP id e92so3316311plb.6 for ; Fri, 03 May 2019 15:03:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=KxG/c9D/NBsdphFkOGYkAYx60e4Yug/i+ObZmhuuRY8=; b=ETydW/rUCRPTh/s1yRtjS/ww9Ye62p9REMf4WtG03cMNsTX5maPCwuBhO2eER25Z3/ P4oHoAjQS/NsQVmxdCQ8B7PPSTmvE+2ouAMCw2Obcn4a8QM7roA9s4Dej034CL9gI682 Ruu2DoFhwjlFDCh7nl7nDguq0oex3EtOs+b0U= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=KxG/c9D/NBsdphFkOGYkAYx60e4Yug/i+ObZmhuuRY8=; b=iCzgxv9xpUcL34QRYExaKDWpqccPsvlycQDBo1//pjpboT3sVmtZ94hb9tHSUzz2gO EaWPfq+dICZ5hn3Ve3UFIVMOIkildch1JcU2lDCWvQKF2Xs9B7L4z8kF5HNzm40Bg65j UYN5p9FjigZhzcBWXLIBtIpDFVQdaBiuC4Z9GVPQ3SsrqmN39m8tnaBF8dXu6wwkoOaS dSMj8lvllSaAs1GXm/oRCaS0ZAYLLpJ1vO3V7Wy8j8+JQfWtmgmDU+Mwl0cL2BoUYL4o KkmH4yXdyqxJ9oMd6vA3R/GLxusECVM7zFjlimWJqJTi8W9yG4A4H9DM+LNvOaxZuO9G 0D/w== X-Gm-Message-State: APjAAAUXZqu6WSIXlV0+04WFoqpAFKFAJKW7RtXRFMwIlC6JS5CTVsJ7 GdxwAbHQugoTU2C0wTrfT4xH1A== X-Google-Smtp-Source: APXvYqwHdgpmFAKQlh4ZEvHE9aKItt4Jwss7q0Y/my1NDvARzJ6Oi1TH0GlwenQcfqE+5oaotr+Zvg== X-Received: by 2002:a17:902:8bca:: with SMTP id r10mr13950720plo.67.1556921011585; Fri, 03 May 2019 15:03:31 -0700 (PDT) Received: from localhost ([2620:15c:202:1:3c8f:512b:3522:dfaf]) by smtp.gmail.com with ESMTPSA id f87sm5704424pff.56.2019.05.03.15.03.30 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 03 May 2019 15:03:30 -0700 (PDT) From: Gwendal Grignou To: enric.balletbo@collabora.com, bleung@chromium.org, groeck@chromium.org, lee.jones@linaro.org, jic23@kernel.org, broonie@kernel.org, cychiang@chromium.org, tiwai@suse.com Cc: linux-iio@vger.kernel.org, alsa-devel@alsa-project.org, Gwendal Grignou Subject: [PATCH v2 30/30] mfd: cros_ec: Update I2S API Date: Fri, 3 May 2019 15:02:33 -0700 Message-Id: <20190503220233.64546-31-gwendal@chromium.org> X-Mailer: git-send-email 2.21.0.1020.gf2820cf01a-goog In-Reply-To: <20190503220233.64546-1-gwendal@chromium.org> References: <20190503220233.64546-1-gwendal@chromium.org> MIME-Version: 1.0 Sender: linux-iio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Improve I2S API. Rename ec_response_codec_gain into ec_codec_i2s_gain, update caller accordlingly. Acked-by: Enric Balletbo i Serra Signed-off-by: Gwendal Grignou Acked-by: Cheng-Yi Chiang --- include/linux/mfd/cros_ec_commands.h | 44 +++++++++++++--------------- sound/soc/codecs/cros_ec_codec.c | 8 ++--- 2 files changed, 24 insertions(+), 28 deletions(-) diff --git a/include/linux/mfd/cros_ec_commands.h b/include/linux/mfd/cros_ec_commands.h index fc8babce1576..fa397722f17e 100644 --- a/include/linux/mfd/cros_ec_commands.h +++ b/include/linux/mfd/cros_ec_commands.h @@ -4471,6 +4471,7 @@ enum mkbp_cec_event { /* Commands for I2S recording on audio codec. */ #define EC_CMD_CODEC_I2S 0x00BC +#define EC_WOV_I2S_SAMPLE_RATE 48000 enum ec_codec_i2s_subcmd { EC_CODEC_SET_SAMPLE_DEPTH = 0x0, @@ -4480,6 +4481,7 @@ enum ec_codec_i2s_subcmd { EC_CODEC_I2S_SET_CONFIG = 0x4, EC_CODEC_I2S_SET_TDM_CONFIG = 0x5, EC_CODEC_I2S_SET_BCLK = 0x6, + EC_CODEC_I2S_SUBCMD_COUNT = 0x7, }; enum ec_sample_depth_value { @@ -4496,6 +4498,21 @@ enum ec_i2s_config { EC_DAI_FMT_PCM_TDM = 5, }; +/* + * For subcommand EC_CODEC_GET_GAIN. + */ +struct __ec_align1 ec_codec_i2s_gain { + uint8_t left; + uint8_t right; +}; + +struct __ec_todo_unpacked ec_param_codec_i2s_tdm { + int16_t ch0_delay; /* 0 to 496 */ + int16_t ch1_delay; /* -1 to 496 */ + uint8_t adjacent_to_ch0; + uint8_t adjacent_to_ch1; +}; + struct __ec_todo_packed ec_param_codec_i2s { /* enum ec_codec_i2s_subcmd */ uint8_t cmd; @@ -4510,10 +4527,7 @@ struct __ec_todo_packed ec_param_codec_i2s { * EC_CODEC_SET_GAIN * Value should be 0~43 for both channels. */ - struct __ec_align1 ec_param_codec_i2s_set_gain { - uint8_t left; - uint8_t right; - } gain; + struct ec_codec_i2s_gain gain; /* * EC_CODEC_I2S_ENABLE @@ -4522,7 +4536,7 @@ struct __ec_todo_packed ec_param_codec_i2s { uint8_t i2s_enable; /* - * EC_CODEC_I2S_SET_COFNIG + * EC_CODEC_I2S_SET_CONFIG * Value should be one of ec_i2s_config. */ uint8_t i2s_config; @@ -4531,18 +4545,7 @@ struct __ec_todo_packed ec_param_codec_i2s { * EC_CODEC_I2S_SET_TDM_CONFIG * Value should be one of ec_i2s_config. */ - struct __ec_todo_unpacked ec_param_codec_i2s_tdm { - /* - * 0 to 496 - */ - int16_t ch0_delay; - /* - * -1 to 496 - */ - int16_t ch1_delay; - uint8_t adjacent_to_ch0; - uint8_t adjacent_to_ch1; - } tdm_param; + struct ec_param_codec_i2s_tdm tdm_param; /* * EC_CODEC_I2S_SET_BCLK @@ -4551,13 +4554,6 @@ struct __ec_todo_packed ec_param_codec_i2s { }; }; -/* - * For subcommand EC_CODEC_GET_GAIN. - */ -struct ec_response_codec_gain { - uint8_t left; - uint8_t right; -} __ec_align1; /*****************************************************************************/ /* System commands */ diff --git a/sound/soc/codecs/cros_ec_codec.c b/sound/soc/codecs/cros_ec_codec.c index 99a3af8a15ff..87830ed5ebf4 100644 --- a/sound/soc/codecs/cros_ec_codec.c +++ b/sound/soc/codecs/cros_ec_codec.c @@ -38,21 +38,21 @@ static const DECLARE_TLV_DB_SCALE(ec_mic_gain_tlv, 0, 100, 0); static int ec_command_get_gain(struct snd_soc_component *component, struct ec_param_codec_i2s *param, - struct ec_response_codec_gain *resp) + struct ec_codec_i2s_gain *resp) { struct cros_ec_codec_data *codec_data = snd_soc_component_get_drvdata(component); struct cros_ec_device *ec_device = codec_data->ec_device; u8 buffer[sizeof(struct cros_ec_command) + max(sizeof(struct ec_param_codec_i2s), - sizeof(struct ec_response_codec_gain))]; + sizeof(struct ec_codec_i2s_gain))]; struct cros_ec_command *msg = (struct cros_ec_command *)&buffer; int ret; msg->version = 0; msg->command = EC_CMD_CODEC_I2S; msg->outsize = sizeof(struct ec_param_codec_i2s); - msg->insize = sizeof(struct ec_response_codec_gain); + msg->insize = sizeof(struct ec_codec_i2s_gain); memcpy(msg->data, param, msg->outsize); @@ -226,7 +226,7 @@ static int get_ec_mic_gain(struct snd_soc_component *component, u8 *left, u8 *right) { struct ec_param_codec_i2s param; - struct ec_response_codec_gain resp; + struct ec_codec_i2s_gain resp; int ret; param.cmd = EC_CODEC_GET_GAIN;