From patchwork Mon May 6 06:53:56 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shaokun Zhang X-Patchwork-Id: 10930505 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 8BF7D912 for ; Mon, 6 May 2019 06:55:55 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 75DB828397 for ; Mon, 6 May 2019 06:55:55 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 694A92861E; Mon, 6 May 2019 06:55:55 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 0A7BD28397 for ; Mon, 6 May 2019 06:55:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:Subject:To :From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=JhH9HzHUOdioRGTV7ksyd4oNt6rvnJ07Ltc1SMvlBDE=; b=D+7Cy5o/4/F2fn P4Qab4tmQnfWbjhlH5XEE6zpfcNPOgXqCi8YppFE7GpdEEOrR84hXc2bWI41817/fXVR+2GzZRK52 f1a+nXbelS5RsmrD7HIXvVbseijlczWeWnIADBiYQ2cDbbk8y8mBGOs+0BWem1112wkLqlgK2D8kP GMGOQon8Wxn7bcN/g7TdTgXJ6zocQjhc1Z9+mwM41craet7CRWM0dBUoNcpFXqoArDQf1w8M4aul0 4V2NkueisZmW3IaBc+zflSiKce1uaD9Ffwi9mE6JOhI+K2oVP3ZtBjPhAtQDD9H1AN94Czde4GxL+ nuPsNySHYqoqQNzoiR/w==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1hNXXR-00068N-U9; Mon, 06 May 2019 06:55:49 +0000 Received: from szxga07-in.huawei.com ([45.249.212.35] helo=huawei.com) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1hNXXJ-00060M-Mm for linux-arm-kernel@lists.infradead.org; Mon, 06 May 2019 06:55:43 +0000 Received: from DGGEMS414-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id 721023DD45301D10986E; Mon, 6 May 2019 14:55:33 +0800 (CST) Received: from localhost.localdomain (10.67.212.132) by DGGEMS414-HUB.china.huawei.com (10.3.19.214) with Microsoft SMTP Server id 14.3.439.0; Mon, 6 May 2019 14:55:27 +0800 From: Shaokun Zhang To: , Subject: [PATCH v2 1/2] drivers: base: cacheinfo: Add variable to record max cache line size Date: Mon, 6 May 2019 14:53:56 +0800 Message-ID: <1557125637-9558-1-git-send-email-zhangshaokun@hisilicon.com> X-Mailer: git-send-email 2.7.4 MIME-Version: 1.0 X-Originating-IP: [10.67.212.132] X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190505_235541_968832_64BD4273 X-CRM114-Status: GOOD ( 10.90 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Sudeep Holla , Catalin Marinas , "Rafael J. Wysocki" , Greg Kroah-Hartman , john.garry@huawei.com, Will Deacon , Jeremy Linton , Shaokun Zhang , qiuzhenfa@hisilicon.com, guohanjun@huawei.com Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Add coherency_max_size variable to record the maximum cache line size for different cache levels. We will synchronize it with CTR_EL0.CWG reporting in cache_line_size() for arm64. Cc: Greg Kroah-Hartman Cc: "Rafael J. Wysocki" Cc: Sudeep Holla Cc: Catalin Marinas Cc: Jeremy Linton Cc: Will Deacon Signed-off-by: Shaokun Zhang --- ChangeLog since v1 -- Move coherency_max_size to drivers/base/cacheinfo.c -- Address Catalin's comments Link: https://www.spinics.net/lists/arm-kernel/msg723615.html drivers/base/cacheinfo.c | 5 +++++ include/linux/cacheinfo.h | 2 ++ 2 files changed, 7 insertions(+) diff --git a/drivers/base/cacheinfo.c b/drivers/base/cacheinfo.c index a7359535caf5..8827c60f51e2 100644 --- a/drivers/base/cacheinfo.c +++ b/drivers/base/cacheinfo.c @@ -213,6 +213,8 @@ int __weak cache_setup_acpi(unsigned int cpu) return -ENOTSUPP; } +unsigned int coherency_max_size; + static int cache_shared_cpu_map_setup(unsigned int cpu) { struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu); @@ -251,6 +253,9 @@ static int cache_shared_cpu_map_setup(unsigned int cpu) cpumask_set_cpu(i, &this_leaf->shared_cpu_map); } } + /* record the maximum cache line size */ + if (this_leaf->coherency_line_size > coherency_max_size) + coherency_max_size = this_leaf->coherency_line_size; } return 0; diff --git a/include/linux/cacheinfo.h b/include/linux/cacheinfo.h index 70e19bc6cc9f..46b92cd61d0c 100644 --- a/include/linux/cacheinfo.h +++ b/include/linux/cacheinfo.h @@ -17,6 +17,8 @@ enum cache_type { CACHE_TYPE_UNIFIED = BIT(2), }; +extern unsigned int coherency_max_size; + /** * struct cacheinfo - represent a cache leaf node * @id: This cache's id. It is unique among caches with the same (type, level). From patchwork Mon May 6 06:53:57 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shaokun Zhang X-Patchwork-Id: 10930503 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 77845912 for ; Mon, 6 May 2019 06:55:52 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 61FFD28397 for ; Mon, 6 May 2019 06:55:52 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 4127B2861E; Mon, 6 May 2019 06:55:52 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id F228228646 for ; Mon, 6 May 2019 06:55:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=K9LhL68j+h+aINGOD5xBw2nZPe/eiluxFqXUrOB+56I=; b=jmGTDw+6avZ7yG D8mldvivcyVfwa6APVmCye1WVua/aaX4kUyV01XgOlA67eWiRFIeTawDfoOs+ckQFJIyS2iUaLd1m hf+aolc/QLipY57MTG4fHDv4WXVsUCzuNw+uul1G4ccsMPjfrU108SCvfzLWybD68x2SgLcO4mjl+ ZtD5UOdyySeXRxYECPBZnyCNS34uaPhbaotzoD3D3P06yr4jFGLyYymwdic6lWm1cfac2TXIh3g+P AsaUqFa/ObjVOLJ0LAnrFrOAfZVHnTW16AXNglusCGjYM1CrSkSDysVFKPIfQDQlZkEBPKrQ0B6N7 ivrtpII++7QCYyE8A3og==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1hNXXM-00061p-Co; Mon, 06 May 2019 06:55:44 +0000 Received: from szxga07-in.huawei.com ([45.249.212.35] helo=huawei.com) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1hNXXI-00060L-V0 for linux-arm-kernel@lists.infradead.org; Mon, 06 May 2019 06:55:42 +0000 Received: from DGGEMS414-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id 6C6F98BBE9FC15A36768; Mon, 6 May 2019 14:55:33 +0800 (CST) Received: from localhost.localdomain (10.67.212.132) by DGGEMS414-HUB.china.huawei.com (10.3.19.214) with Microsoft SMTP Server id 14.3.439.0; Mon, 6 May 2019 14:55:27 +0800 From: Shaokun Zhang To: , Subject: [PATCH v2 2/2] arm64: cacheinfo: Update cache_line_size detected from DT or PPTT Date: Mon, 6 May 2019 14:53:57 +0800 Message-ID: <1557125637-9558-2-git-send-email-zhangshaokun@hisilicon.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1557125637-9558-1-git-send-email-zhangshaokun@hisilicon.com> References: <1557125637-9558-1-git-send-email-zhangshaokun@hisilicon.com> MIME-Version: 1.0 X-Originating-IP: [10.67.212.132] X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190505_235541_219630_D4DF4985 X-CRM114-Status: GOOD ( 13.28 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Sudeep Holla , Catalin Marinas , john.garry@huawei.com, Will Deacon , Jeremy Linton , Shaokun Zhang , qiuzhenfa@hisilicon.com, guohanjun@huawei.com Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP cache_line_size is derived from CTR_EL0.CWG field and is called mostly for I/O device drivers. For HiSilicon certain plantform, like the Kunpeng920 server SoC, cache line sizes are different between L1/2 cache and L3 cache while L1 cache line size is 64-byte and L3 is 128-byte, but CTR_EL0.CWG is misreporting using L1 cache line size. We shall correct the right value which is important for I/O performance. Let's update the cache line size if it is detected from DT or PPTT information. Cc: Catalin Marinas Cc: Will Deacon Cc: Sudeep Holla Cc: Jeremy Linton Reported-by: Zhenfa Qiu Suggested-by: Catalin Marinas Signed-off-by: Shaokun Zhang --- arch/arm64/include/asm/cache.h | 6 +----- arch/arm64/kernel/cacheinfo.c | 10 ++++++++++ 2 files changed, 11 insertions(+), 5 deletions(-) diff --git a/arch/arm64/include/asm/cache.h b/arch/arm64/include/asm/cache.h index 926434f413fa..758af6340314 100644 --- a/arch/arm64/include/asm/cache.h +++ b/arch/arm64/include/asm/cache.h @@ -91,11 +91,7 @@ static inline u32 cache_type_cwg(void) #define __read_mostly __attribute__((__section__(".data..read_mostly"))) -static inline int cache_line_size(void) -{ - u32 cwg = cache_type_cwg(); - return cwg ? 4 << cwg : ARCH_DMA_MINALIGN; -} +int cache_line_size(void); /* * Read the effective value of CTR_EL0. diff --git a/arch/arm64/kernel/cacheinfo.c b/arch/arm64/kernel/cacheinfo.c index 0bf0a835122f..6ffe908d476c 100644 --- a/arch/arm64/kernel/cacheinfo.c +++ b/arch/arm64/kernel/cacheinfo.c @@ -28,6 +28,16 @@ #define CLIDR_CTYPE(clidr, level) \ (((clidr) & CLIDR_CTYPE_MASK(level)) >> CLIDR_CTYPE_SHIFT(level)) +int cache_line_size(void) +{ + u32 cwg = cache_type_cwg(); + + if (coherency_max_size != 0) + return coherency_max_size; + + return cwg ? 4 << cwg : ARCH_DMA_MINALIGN; +} + static inline enum cache_type get_cache_type(int level) { u64 clidr;