From patchwork Thu May 9 12:06:40 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Horman X-Patchwork-Id: 10937065 X-Patchwork-Delegate: horms@verge.net.au Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 8DF8713AD for ; Thu, 9 May 2019 12:06:56 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7D372289B0 for ; Thu, 9 May 2019 12:06:56 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 71C4028A7D; Thu, 9 May 2019 12:06:56 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id F07E8289B0 for ; Thu, 9 May 2019 12:06:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726648AbfEIMGz (ORCPT ); Thu, 9 May 2019 08:06:55 -0400 Received: from kirsty.vergenet.net ([202.4.237.240]:49110 "EHLO kirsty.vergenet.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725961AbfEIMGz (ORCPT ); Thu, 9 May 2019 08:06:55 -0400 Received: from reginn.horms.nl (watermunt.horms.nl [80.127.179.77]) by kirsty.vergenet.net (Postfix) with ESMTPA id ED09725BE0A; Thu, 9 May 2019 22:06:49 +1000 (AEST) Received: by reginn.horms.nl (Postfix, from userid 7100) id D801D94023E; Thu, 9 May 2019 14:06:47 +0200 (CEST) From: Simon Horman To: linux-renesas-soc@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, Magnus Damm , Yoshihiro Kaneko Subject: [PATCH v3 1/2] arm64: dts: renesas: r8a7795: Create thermal zone to support IPA Date: Thu, 9 May 2019 14:06:40 +0200 Message-Id: <20190509120641.20001-2-horms+renesas@verge.net.au> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190509120641.20001-1-horms+renesas@verge.net.au> References: <20190509120641.20001-1-horms+renesas@verge.net.au> Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Dien Pham Setup a thermal zone driven by SoC temperature sensor. Create passive trip points and bind them to CPUFreq cooling device that supports power extension. In R-Car Gen3, IPA is supported for only one channel (on H3/M3/M3N board, it is channel THS3). Reason: Currently, IPA controls base on only CPU temperature. And only one thermal channel is assembled closest CPU cores is selected as target of IPA. If other channels are used, IPA controlling is not properly. The device supports 5 cooling states which can be categorised as follows: 0 & 1) boost (clocking up) 2) default 3 & 4) cooling (clocking down) Currently the thermal framework assumes that the default is the minimum, or in other words there is no provision for handling boost states. So this patch only describes the upper 3 states, default and cooling. A single cooling device is described for all A57 CPUs as this reflects that physically there is only one cooling device present. This patch improves on an earlier version by: * Omitting cooling-max-level and cooling-min-level properties which are no longer present in mainline as of v4.17 * Removing an unused trip-point0 node sub-property from the trips property. * Using cooling-device indexes such that maximum refers to maximum cooling rather than the inverse. The long signed-off by chain below reflects many revisions, mainly internal, that this patch has been through. Signed-off-by: Keita Kobayashi Signed-off-by: Gaku Inami Signed-off-by: Hien Dang Signed-off-by: An Huynh Signed-off-by: Takeshi Kihara Signed-off-by: Yoshihiro Kaneko Signed-off-by: Simon Horman --- v3 [Simon Horman] * Move adding dynamic-power-coefficient properties into a separate patch as these are properties of the CPU. --- arch/arm64/boot/dts/renesas/r8a7795.dtsi | 52 +++++++++----------------------- 1 file changed, 15 insertions(+), 37 deletions(-) diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi index abeac3059383..2b34a4b3e4d8 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi @@ -207,6 +207,7 @@ power-domains = <&sysc R8A7795_PD_CA53_CPU0>; next-level-cache = <&L2_CA53>; enable-method = "psci"; + #cooling-cells = <2>; clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>; operating-points-v2 = <&cluster1_opp>; capacity-dmips-mhz = <535>; @@ -3098,58 +3099,30 @@ polling-delay-passive = <250>; polling-delay = <1000>; thermal-sensors = <&tsc 0>; + sustainable-power = <6313>; trips { - sensor1_passive: sensor1-passive { - temperature = <95000>; - hysteresis = <1000>; - type = "passive"; - }; sensor1_crit: sensor1-crit { temperature = <120000>; hysteresis = <1000>; type = "critical"; }; }; - - cooling-maps { - map0 { - trip = <&sensor1_passive>; - cooling-device = <&a57_0 4 4>, - <&a57_1 4 4>, - <&a57_2 4 4>, - <&a57_3 4 4>; - }; - }; }; sensor_thermal2: sensor-thermal2 { polling-delay-passive = <250>; polling-delay = <1000>; thermal-sensors = <&tsc 1>; + sustainable-power = <6313>; trips { - sensor2_passive: sensor2-passive { - temperature = <95000>; - hysteresis = <1000>; - type = "passive"; - }; sensor2_crit: sensor2-crit { temperature = <120000>; hysteresis = <1000>; type = "critical"; }; }; - - cooling-maps { - map0 { - trip = <&sensor2_passive>; - cooling-device = <&a57_0 4 4>, - <&a57_1 4 4>, - <&a57_2 4 4>, - <&a57_3 4 4>; - }; - }; }; sensor_thermal3: sensor-thermal3 { @@ -3158,11 +3131,12 @@ thermal-sensors = <&tsc 2>; trips { - sensor3_passive: sensor3-passive { - temperature = <95000>; + target: trip-point1 { + temperature = <100000>; hysteresis = <1000>; type = "passive"; }; + sensor3_crit: sensor3-crit { temperature = <120000>; hysteresis = <1000>; @@ -3172,11 +3146,15 @@ cooling-maps { map0 { - trip = <&sensor3_passive>; - cooling-device = <&a57_0 4 4>, - <&a57_1 4 4>, - <&a57_2 4 4>, - <&a57_3 4 4>; + trip = <&target>; + cooling-device = <&a57_0 2 4>; + contribution = <1024>; + }; + + map1 { + trip = <&target>; + cooling-device = <&a53_0 0 2>; + contribution = <1024>; }; }; }; From patchwork Thu May 9 12:06:41 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Horman X-Patchwork-Id: 10937063 X-Patchwork-Delegate: horms@verge.net.au Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id DD4C513AD for ; Thu, 9 May 2019 12:06:54 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id CD957289B0 for ; Thu, 9 May 2019 12:06:54 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id C22A128A7D; Thu, 9 May 2019 12:06:54 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 4F365289B0 for ; Thu, 9 May 2019 12:06:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726571AbfEIMGx (ORCPT ); Thu, 9 May 2019 08:06:53 -0400 Received: from kirsty.vergenet.net ([202.4.237.240]:49110 "EHLO kirsty.vergenet.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725961AbfEIMGx (ORCPT ); Thu, 9 May 2019 08:06:53 -0400 Received: from reginn.horms.nl (watermunt.horms.nl [80.127.179.77]) by kirsty.vergenet.net (Postfix) with ESMTPA id EAA7A25BE08; Thu, 9 May 2019 22:06:49 +1000 (AEST) Received: by reginn.horms.nl (Postfix, from userid 7100) id E687A9403FF; Thu, 9 May 2019 14:06:47 +0200 (CEST) From: Simon Horman To: linux-renesas-soc@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, Magnus Damm , Yoshihiro Kaneko Subject: [PATCH v3 2/2] arm64: dts: renesas: r8a7795: Add dynamic power coefficient Date: Thu, 9 May 2019 14:06:41 +0200 Message-Id: <20190509120641.20001-3-horms+renesas@verge.net.au> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190509120641.20001-1-horms+renesas@verge.net.au> References: <20190509120641.20001-1-horms+renesas@verge.net.au> Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Describe the dynamic power coefficient of A57 and A53 CPUs. Based on work by Gaku Inami and others. Signed-off-by: Simon Horman --- v3 [Simon Horman] * Broken out of a larger patch --- arch/arm64/boot/dts/renesas/r8a7795.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi index 2b34a4b3e4d8..41111dcf80ae 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi @@ -155,6 +155,7 @@ power-domains = <&sysc R8A7795_PD_CA57_CPU0>; next-level-cache = <&L2_CA57>; enable-method = "psci"; + dynamic-power-coefficient = <854>; clocks = <&cpg CPG_CORE R8A7795_CLK_Z>; operating-points-v2 = <&cluster0_opp>; capacity-dmips-mhz = <1024>; @@ -208,6 +209,7 @@ next-level-cache = <&L2_CA53>; enable-method = "psci"; #cooling-cells = <2>; + dynamic-power-coefficient = <277>; clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>; operating-points-v2 = <&cluster1_opp>; capacity-dmips-mhz = <535>;