From patchwork Fri May 10 04:34:14 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 10938235 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 204C11515 for ; Fri, 10 May 2019 04:35:08 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 10EE828812 for ; Fri, 10 May 2019 04:35:08 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 052082899C; Fri, 10 May 2019 04:35:08 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8A06E28947 for ; Fri, 10 May 2019 04:35:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727037AbfEJEe2 (ORCPT ); Fri, 10 May 2019 00:34:28 -0400 Received: from mail-pg1-f194.google.com ([209.85.215.194]:42519 "EHLO mail-pg1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727038AbfEJEe1 (ORCPT ); Fri, 10 May 2019 00:34:27 -0400 Received: by mail-pg1-f194.google.com with SMTP id 145so2345398pgg.9 for ; Thu, 09 May 2019 21:34:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=jRXSqrjJ/XGneMATLlq6ef0lWRrjzOAsNMFDS9pI5co=; b=o9ITCZZxe5qNjs4HbiK+mgBzmySbP+LEYSzv3r5wNCHFzKqikvp6eKL/OEA4HKSVFf /16HzvfrrZyt2oJdVaHu6giUxmW3GPIiMUvw8N7xsasvwqftFbd0Cbso0C0PbxTYuGW3 bumqxJYT/BFhyANN9EPoDtcqco+3HONZ1BXcvF18W7usb9tzOYlgEg0pXn5EGp5JY0TN fqw1Vz4Vao3+kD7dl52tF+chAi9870zA0EUEesMdvTsh+1I2gXgqHhANo3ctoeOjL22h TIeYS7cx9aJIMovyyImXgAYlzoNLDc49GZHAcJKE4hSaW6G2vTVxiwTHnKVGnpGdKwi3 tE4w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=jRXSqrjJ/XGneMATLlq6ef0lWRrjzOAsNMFDS9pI5co=; b=VaZYr06oyiGcZctJHfSiOLbHNj3hoO8md6IgPxL+xEdo+GCONUcRLIKMmlVHaaN13D EjD29RlJcFT2slj135kl1vnD153ClRI6wKWA+ZQ0fcgMThBCWASuRgbxO07w4vhccelA rcM7AUFsV7AKY+DTGOzhZE91wBmQYg6Ke+6YGRSfye6WSr61YuGLxd5rF7/TsrI/LD51 dfXkf1u776BDfpexOzMUrLa5pR55Cw1XMIhTrPS8/H3qafkb0+Ar2d+bUAUUyqxF/P31 /q0h1hLEttZ6BrxPheI7Vk8nFFDkThWuQWiBWkIuhOILN1sqJ6jggERTZOHd4cELxAJj jNrQ== X-Gm-Message-State: APjAAAVfU1lK/Odjt8Zi0OhPpCxoDwjV8c7Owt5HvCjC6J+9OzuFLZ3n +vNb1SSHyl9GXT0KyfclrXokTQ== X-Google-Smtp-Source: APXvYqyq0T6O9AwNHGZ8exszrlMLgNwoqL0bTEBMBtlW42UzP3iY13mfX+IryzwDN2LRR7PC2Dv/bA== X-Received: by 2002:a65:408b:: with SMTP id t11mr11009686pgp.372.1557462865964; Thu, 09 May 2019 21:34:25 -0700 (PDT) Received: from localhost.localdomain (104-188-17-28.lightspeed.sndgca.sbcglobal.net. [104.188.17.28]) by smtp.gmail.com with ESMTPSA id s17sm4785317pfm.149.2019.05.09.21.34.24 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 09 May 2019 21:34:25 -0700 (PDT) From: Bjorn Andersson To: Ohad Ben-Cohen , Bjorn Andersson , Rob Herring , Mark Rutland Cc: Andy Gross , David Brown , linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 1/8] dt-bindings: remoteproc: Rename and amend Hexagon v56 binding Date: Thu, 9 May 2019 21:34:14 -0700 Message-Id: <20190510043421.31393-2-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20190510043421.31393-1-bjorn.andersson@linaro.org> References: <20190510043421.31393-1-bjorn.andersson@linaro.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The SDM845 Audio DSP peripheral image loader binding describes the properties needed to load and boot firmware on a Hexagon v56. Rename the file and add the Compute DSP (CDSP) found in QCS404 to the binding. Signed-off-by: Bjorn Andersson Reviewed-by: Rob Herring --- ...qcom,adsp-pil.txt => qcom,hexagon-v56.txt} | 35 +++++++++++++------ 1 file changed, 25 insertions(+), 10 deletions(-) rename Documentation/devicetree/bindings/remoteproc/{qcom,adsp-pil.txt => qcom,hexagon-v56.txt} (74%) diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,adsp-pil.txt b/Documentation/devicetree/bindings/remoteproc/qcom,hexagon-v56.txt similarity index 74% rename from Documentation/devicetree/bindings/remoteproc/qcom,adsp-pil.txt rename to Documentation/devicetree/bindings/remoteproc/qcom,hexagon-v56.txt index 66af2c30944f..1337a3d93d35 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,adsp-pil.txt +++ b/Documentation/devicetree/bindings/remoteproc/qcom,hexagon-v56.txt @@ -1,12 +1,13 @@ -Qualcomm Technology Inc. ADSP Peripheral Image Loader +Qualcomm Technology Inc. Hexagon v56 Peripheral Image Loader This document defines the binding for a component that loads and boots firmware -on the Qualcomm Technology Inc. ADSP Hexagon core. +on the Qualcomm Technology Inc. Hexagon v56 core. - compatible: Usage: required Value type: Definition: must be one of: + "qcom,qcs404-cdsp-pil", "qcom,sdm845-adsp-pil" - reg: @@ -28,10 +29,11 @@ on the Qualcomm Technology Inc. ADSP Hexagon core. - clocks: Usage: required Value type: - Definition: List of 8 phandle and clock specifier pairs for the adsp. + Definition: List of phandles and clock specifier pairs for the Hexagon, + per clock-names below. - clock-names: - Usage: required + Usage: required for SDM845 ADSP Value type: Definition: List of clock input name strings sorted in the same order as the clocks property. Definition must have @@ -39,6 +41,14 @@ on the Qualcomm Technology Inc. ADSP Hexagon core. "lpass_ahbm_aon_cbcr", "qdsp6ss_xo", "qdsp6ss_sleep" and "qdsp6ss_core". +- clock-names: + Usage: required for QCS404 CDSP + Value type: + Definition: List of clock input name strings sorted in the same + order as the clocks property. Definition must have + "xo", "sway", "tbu", "bimc", "ahb_aon", "q6ss_slave", + "q6ss_master", "q6_axim". + - power-domains: Usage: required Value type: @@ -47,28 +57,33 @@ on the Qualcomm Technology Inc. ADSP Hexagon core. - resets: Usage: required Value type: - Definition: reference to the list of 2 reset-controller for the adsp. + Definition: reference to the list of resets for the Hexagon. - reset-names: - Usage: required + Usage: required for SDM845 ADSP Value type: Definition: must be "pdc_sync" and "cc_lpass" +- reset-names: + Usage: required for QCS404 CDSP + Value type: + Definition: must be "restart" + - qcom,halt-regs: Usage: required Value type: Definition: a phandle reference to a syscon representing TCSR followed - by the offset within syscon for lpass halt register. + by the offset within syscon for Hexagon halt register. - memory-region: Usage: required Value type: - Definition: reference to the reserved-memory for the ADSP + Definition: reference to the reserved-memory for the firmware - qcom,smem-states: Usage: required Value type: - Definition: reference to the smem state for requesting the ADSP to + Definition: reference to the smem state for requesting the Hexagon to shut down - qcom,smem-state-names: @@ -79,7 +94,7 @@ on the Qualcomm Technology Inc. ADSP Hexagon core. = SUBNODES The adsp node may have an subnode named "glink-edge" that describes the -communication edge, channels and devices related to the ADSP. +communication edge, channels and devices related to the Hexagon. See ../soc/qcom/qcom,glink.txt for details on how to describe these. = EXAMPLE From patchwork Fri May 10 04:34:15 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 10938227 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id ADDF214DB for ; Fri, 10 May 2019 04:34:58 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9C92B287FE for ; Fri, 10 May 2019 04:34:58 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 8D3A128947; Fri, 10 May 2019 04:34:58 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6F602287FE for ; Fri, 10 May 2019 04:34:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727193AbfEJEe4 (ORCPT ); Fri, 10 May 2019 00:34:56 -0400 Received: from mail-pf1-f193.google.com ([209.85.210.193]:40484 "EHLO mail-pf1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727048AbfEJEe2 (ORCPT ); Fri, 10 May 2019 00:34:28 -0400 Received: by mail-pf1-f193.google.com with SMTP id u17so2500494pfn.7 for ; Thu, 09 May 2019 21:34:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=7D9fT9nrITboyJ+SOXix9/gHXfGWOiHJwaPk2qVUU3c=; b=YTMOEM9o3me4VlRS+ZfA4B///ON/wFOPFUMHSfZWcslGeKldYyWK8bbE6t9cha00Jv 5TMhjzu3Y4+hciowkOsucL14c+gFUxPYBx50CA+ZvCqWkYSkfpcnSGhdFx8ld8ZI0PLT rGzjFgde4ZnB2nwF9UDUYK4pZfry4RfWgHkTRVqoXWFFVpbiatqDUcpLNKCBeNchyeW9 u3kRpzwlD5al65AgnOyDxe9IiKb14Hw0vRR3mUejE+G3niYqda3Dxr3dwvJuXK3BO62w HPtHTQPseVN9tFLUNWGJ9B7kEUd4hInGRgGgPJnUlU24d5GkbVrpV8PjrHB6cmyLcoEM gnVw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=7D9fT9nrITboyJ+SOXix9/gHXfGWOiHJwaPk2qVUU3c=; b=LjlBdy97pDs8SKC5gAH3ehQFZsKyfpdpbwVjwstqQGxDIGaSKqgorK16Jv4/TXuD8y NRaMAZOVzutvZ8H06g48y1/9KFeCodBZIzJ86fn9WDh34+XzjdMRyYQ7KmKhC6Wpizht FHCblRdeVWdYEWZ6n3bjEOk6H9QQZerP3uFs4VmkNcKwb8k2xTqlrlM1Gn8RST6sOPgk qEa2b3lfxVD6cl6oQFwJi2csSLo8eqWPLvcljNUp5dwXOp/I1raJ2gg4Ih5iylJLADCQ JoGTgMJBPHKugw02lCniCtoMdYEi2wQwLzPoWhlNsNdvt4nQhsg8FbIBtj8VymL+9OGA njNg== X-Gm-Message-State: APjAAAWiaVmys+5EZwtYjqNbT0dwgEiMFLW2yA5meY4Os5h1oqh1irRi nlAqofsYlFJzSlH/rfHW3/FI1A== X-Google-Smtp-Source: APXvYqxIprToIswQFMOzfCd48VF5TpWAoqllvK2FOj2FFIKi9CnO2e1KIMoeH01AgQCujvCKMKg35w== X-Received: by 2002:a63:4621:: with SMTP id t33mr10954607pga.246.1557462867214; Thu, 09 May 2019 21:34:27 -0700 (PDT) Received: from localhost.localdomain (104-188-17-28.lightspeed.sndgca.sbcglobal.net. [104.188.17.28]) by smtp.gmail.com with ESMTPSA id s17sm4785317pfm.149.2019.05.09.21.34.26 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 09 May 2019 21:34:26 -0700 (PDT) From: Bjorn Andersson To: Ohad Ben-Cohen , Bjorn Andersson Cc: Andy Gross , David Brown , Rob Herring , Mark Rutland , linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 2/8] remoteproc: qcom: qdsp6-adsp: Add support for QCS404 CDSP Date: Thu, 9 May 2019 21:34:15 -0700 Message-Id: <20190510043421.31393-3-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20190510043421.31393-1-bjorn.andersson@linaro.org> References: <20190510043421.31393-1-bjorn.andersson@linaro.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Move the clock list to adsp_pil_data, make the pdc_reset optional and make the driver directly enable the xo, sleep and core clocks. The three clocks are previously toggled through the clock controller, but that means the same hardware block needs to be mapped in both drivers. Making the remoteproc driver enable the clocks is a nop when using the clock controller, but allow us to remove the clocks from the clock controller. Signed-off-by: Bjorn Andersson --- drivers/remoteproc/qcom_q6v5_adsp.c | 73 ++++++++++++++++++++++------- 1 file changed, 55 insertions(+), 18 deletions(-) diff --git a/drivers/remoteproc/qcom_q6v5_adsp.c b/drivers/remoteproc/qcom_q6v5_adsp.c index 1f3ef9ee493c..e953886b2eb7 100644 --- a/drivers/remoteproc/qcom_q6v5_adsp.c +++ b/drivers/remoteproc/qcom_q6v5_adsp.c @@ -46,11 +46,9 @@ #define LPASS_PWR_ON_REG 0x10 #define LPASS_HALTREQ_REG 0x0 -/* list of clocks required by ADSP PIL */ -static const char * const adsp_clk_id[] = { - "sway_cbcr", "lpass_ahbs_aon_cbcr", "lpass_ahbm_aon_cbcr", - "qdsp6ss_xo", "qdsp6ss_sleep", "qdsp6ss_core", -}; +#define QDSP6SS_XO_CBCR 0x38 +#define QDSP6SS_CORE_CBCR 0x20 +#define QDSP6SS_SLEEP_CBCR 0x3c struct adsp_pil_data { int crash_reason_smem; @@ -59,6 +57,9 @@ struct adsp_pil_data { const char *ssr_name; const char *sysmon_name; int ssctl_id; + + const char **clk_ids; + int num_clks; }; struct qcom_adsp { @@ -75,7 +76,7 @@ struct qcom_adsp { void __iomem *qdsp6ss_base; struct reset_control *pdc_sync_reset; - struct reset_control *cc_lpass_restart; + struct reset_control *restart; struct regmap *halt_map; unsigned int halt_lpass; @@ -143,7 +144,7 @@ static int qcom_adsp_shutdown(struct qcom_adsp *adsp) /* Assert the LPASS PDC Reset */ reset_control_assert(adsp->pdc_sync_reset); /* Place the LPASS processor into reset */ - reset_control_assert(adsp->cc_lpass_restart); + reset_control_assert(adsp->restart); /* wait after asserting subsystem restart from AOSS */ usleep_range(200, 300); @@ -153,7 +154,7 @@ static int qcom_adsp_shutdown(struct qcom_adsp *adsp) /* De-assert the LPASS PDC Reset */ reset_control_deassert(adsp->pdc_sync_reset); /* Remove the LPASS reset */ - reset_control_deassert(adsp->cc_lpass_restart); + reset_control_deassert(adsp->restart); /* wait after de-asserting subsystem restart from AOSS */ usleep_range(200, 300); @@ -192,6 +193,15 @@ static int adsp_start(struct rproc *rproc) goto disable_power_domain; } + /* Enable the XO clock */ + writel(1, adsp->qdsp6ss_base + QDSP6SS_XO_CBCR); + + /* Enable the QDSP6SS sleep clock */ + writel(1, adsp->qdsp6ss_base + QDSP6SS_SLEEP_CBCR); + + /* Enable the QDSP6 core clock */ + writel(1, adsp->qdsp6ss_base + QDSP6SS_CORE_CBCR); + /* Program boot address */ writel(adsp->mem_phys >> 4, adsp->qdsp6ss_base + RST_EVB_REG); @@ -280,8 +290,9 @@ static const struct rproc_ops adsp_ops = { .load = adsp_load, }; -static int adsp_init_clock(struct qcom_adsp *adsp) +static int adsp_init_clock(struct qcom_adsp *adsp, const char **clk_ids) { + int num_clks = 0; int i, ret; adsp->xo = devm_clk_get(adsp->dev, "xo"); @@ -292,32 +303,39 @@ static int adsp_init_clock(struct qcom_adsp *adsp) return ret; } - adsp->num_clks = ARRAY_SIZE(adsp_clk_id); + for (i = 0; clk_ids[i]; i++) + num_clks++; + + adsp->num_clks = num_clks; adsp->clks = devm_kcalloc(adsp->dev, adsp->num_clks, sizeof(*adsp->clks), GFP_KERNEL); if (!adsp->clks) return -ENOMEM; for (i = 0; i < adsp->num_clks; i++) - adsp->clks[i].id = adsp_clk_id[i]; + adsp->clks[i].id = clk_ids[i]; return devm_clk_bulk_get(adsp->dev, adsp->num_clks, adsp->clks); } static int adsp_init_reset(struct qcom_adsp *adsp) { - adsp->pdc_sync_reset = devm_reset_control_get_exclusive(adsp->dev, + adsp->pdc_sync_reset = devm_reset_control_get_optional_exclusive(adsp->dev, "pdc_sync"); if (IS_ERR(adsp->pdc_sync_reset)) { dev_err(adsp->dev, "failed to acquire pdc_sync reset\n"); return PTR_ERR(adsp->pdc_sync_reset); } - adsp->cc_lpass_restart = devm_reset_control_get_exclusive(adsp->dev, - "cc_lpass"); - if (IS_ERR(adsp->cc_lpass_restart)) { - dev_err(adsp->dev, "failed to acquire cc_lpass restart\n"); - return PTR_ERR(adsp->cc_lpass_restart); + adsp->restart = devm_reset_control_get_optional_exclusive(adsp->dev, "restart"); + + /* Fall back to the old "cc_lpass" if "restart" is absent */ + if (!adsp->restart) + adsp->restart = devm_reset_control_get_exclusive(adsp->dev, "cc_lpass"); + + if (IS_ERR(adsp->restart)) { + dev_err(adsp->dev, "failed to acquire restart\n"); + return PTR_ERR(adsp->restart); } return 0; @@ -415,7 +433,7 @@ static int adsp_probe(struct platform_device *pdev) if (ret) goto free_rproc; - ret = adsp_init_clock(adsp); + ret = adsp_init_clock(adsp, desc->clk_ids); if (ret) goto free_rproc; @@ -479,9 +497,28 @@ static const struct adsp_pil_data adsp_resource_init = { .ssr_name = "lpass", .sysmon_name = "adsp", .ssctl_id = 0x14, + .clk_ids = (const char*[]) { + "sway_cbcr", "lpass_ahbs_aon_cbcr", "lpass_ahbm_aon_cbcr", + "qdsp6ss_xo", "qdsp6ss_sleep", "qdsp6ss_core", NULL + }, + .num_clks = 7, +}; + +static const struct adsp_pil_data cdsp_resource_init = { + .crash_reason_smem = 601, + .firmware_name = "cdsp.mdt", + .ssr_name = "cdsp", + .sysmon_name = "cdsp", + .ssctl_id = 0x17, + .clk_ids = (const char*[]) { + "sway", "tbu", "bimc", "ahb_aon", "q6ss_slave", "q6ss_master", + "q6_axim", NULL + }, + .num_clks = 7, }; static const struct of_device_id adsp_of_match[] = { + { .compatible = "qcom,qcs404-cdsp-pil", .data = &cdsp_resource_init }, { .compatible = "qcom,sdm845-adsp-pil", .data = &adsp_resource_init }, { }, }; From patchwork Fri May 10 04:34:16 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 10938231 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 1A1791515 for ; Fri, 10 May 2019 04:35:02 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0B08128812 for ; Fri, 10 May 2019 04:35:02 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id F07802899C; Fri, 10 May 2019 04:35:01 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id AA16C28812 for ; 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[104.188.17.28]) by smtp.gmail.com with ESMTPSA id s17sm4785317pfm.149.2019.05.09.21.34.27 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 09 May 2019 21:34:27 -0700 (PDT) From: Bjorn Andersson To: Andy Gross , David Brown Cc: Ohad Ben-Cohen , Rob Herring , Mark Rutland , linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 3/8] arm64: dts: qcom: qcs404-evb: Mark CDSP clocks protected Date: Thu, 9 May 2019 21:34:16 -0700 Message-Id: <20190510043421.31393-4-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20190510043421.31393-1-bjorn.andersson@linaro.org> References: <20190510043421.31393-1-bjorn.andersson@linaro.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP With the Trustzone based CDSP remoteproc driver these clocks are controlled elsewhere and as they are not enabled by anything in Linux the clock framework will turn them off during lateinit. This results in issues either to later start the CDSP, using the Trustzone interface, or if the CDSP is already running it will crash. Signed-off-by: Bjorn Andersson --- arch/arm64/boot/dts/qcom/qcs404-evb.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi b/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi index 2c3127167e3c..dc1d7d5d21a4 100644 --- a/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi @@ -56,6 +56,13 @@ qcom,controlled-remotely; }; +&gcc { + protected-clocks = , + , + , + ; +}; + &pms405_spmi_regulators { vdd_s3-supply = <&pms405_s3>; From patchwork Fri May 10 04:34:17 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 10938207 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D21CC76 for ; Fri, 10 May 2019 04:34:31 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id C166E28A96 for ; Fri, 10 May 2019 04:34:31 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id B45FE28BC6; Fri, 10 May 2019 04:34:31 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5ADD228A96 for ; Fri, 10 May 2019 04:34:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727096AbfEJEea (ORCPT ); Fri, 10 May 2019 00:34:30 -0400 Received: from mail-pg1-f195.google.com ([209.85.215.195]:43606 "EHLO mail-pg1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727094AbfEJEea (ORCPT ); Fri, 10 May 2019 00:34:30 -0400 Received: by mail-pg1-f195.google.com with SMTP id t22so2342029pgi.10 for ; Thu, 09 May 2019 21:34:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=qrYyI34a2DrOth+hiWVN5F0vACg7lAzQS8qPwj8GUmo=; b=ZRVaUHLNPW6p1FLWaGVN/da/ZjxPgu+rw7RcTq3l/7O/33OhV8thgylQga3AuS+a6f 3z/PHJoE/5j4bkpbyXoGaGFwvgdNlIrSVfCXGQGwQDVS2O70mOh0MNv8uHTsVWYpLZLz TToRHI2AMmNh60wkrZi3rwL+vv8gh7KHoa/ElmWJbRdlxKoJIa7+6jk1+xigXYHuOKV2 BFEEz7XWHPhYdBqWqrS+c/pzM+0Wxkz1YYClOSkCB4oluGcmjVx+sQyEPWiVdkZmpyth qWZAhYR00AGSYrpjriIyJpL56prX03ls+3oV56ZVrT5YtqyeT52ZHpMXZbcA6SyGR8JJ NOHQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=qrYyI34a2DrOth+hiWVN5F0vACg7lAzQS8qPwj8GUmo=; b=PLjX10u6yxnYqJLAik+R/T0fCj9HBxIF65IGyUOCZ/j8rbmpd7TpoUDW7I9iSB8t+4 gWllbAo7jALILlOjiDNkGpDVOT7Q/TMuhZdapfoFD/ujG1pXrOrAgL1G2uEQyeS36W0y AR7A92mmjALn5TdePyxWUXUR9OxoLDGlPILjjsJvtdg7avZnjMfaGi2oHU0BvOg2Osne irK0RYEuPfFuaitNz0GwvL5s7PpykEqY3xYITSaFZ8RAjRvJ5hDvIhPvDyOi7CSy9zDO XXDmieBXPpoaRFwzycj/ewbcSbx2DGx5EN8nROb3YASIXTsqk4c9XOgsVyjNwqmKM8N5 drnw== X-Gm-Message-State: APjAAAW7ye5/0xOH6tOsQX44XQZVeCRc0gMJtnLkuxkl7/umt/3g+DWX h8JlF/DDcQtHCIpC/ZFpY924/Q== X-Google-Smtp-Source: APXvYqyjjoPe7gUUS/QT2WUtTGcp1ndcYSKOtt1syIFKigoedIyXn+ou54hhkdpEMGwDHX+LNMbfPA== X-Received: by 2002:a63:e417:: with SMTP id a23mr10743392pgi.224.1557462869465; Thu, 09 May 2019 21:34:29 -0700 (PDT) Received: from localhost.localdomain (104-188-17-28.lightspeed.sndgca.sbcglobal.net. [104.188.17.28]) by smtp.gmail.com with ESMTPSA id s17sm4785317pfm.149.2019.05.09.21.34.28 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 09 May 2019 21:34:28 -0700 (PDT) From: Bjorn Andersson To: Andy Gross , David Brown Cc: Ohad Ben-Cohen , Rob Herring , Mark Rutland , linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 4/8] arm64: dts: qcom: qcs404: Add TCSR node Date: Thu, 9 May 2019 21:34:17 -0700 Message-Id: <20190510043421.31393-5-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20190510043421.31393-1-bjorn.andersson@linaro.org> References: <20190510043421.31393-1-bjorn.andersson@linaro.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The bus halt registers in TCSR are referenced as a syscon device, add these so that we can reference them from the remoteproc nodes. Signed-off-by: Bjorn Andersson --- arch/arm64/boot/dts/qcom/qcs404.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi index f422d6e9cb3a..3eb6089c8024 100644 --- a/arch/arm64/boot/dts/qcom/qcs404.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi @@ -415,6 +415,11 @@ reg = <0x01905000 0x20000>; }; + tcsr: syscon@1937000 { + compatible = "syscon"; + reg = <0x01937000 0x25000>; + }; + spmi_bus: spmi@200f000 { compatible = "qcom,spmi-pmic-arb"; reg = <0x0200f000 0x001000>, From patchwork Fri May 10 04:34:18 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 10938225 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 28AB014DB for ; Fri, 10 May 2019 04:34:56 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 19E9628A96 for ; Fri, 10 May 2019 04:34:56 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 0D9CD28BC6; Fri, 10 May 2019 04:34:56 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id AD32C28A96 for ; Fri, 10 May 2019 04:34:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727109AbfEJEey (ORCPT ); Fri, 10 May 2019 00:34:54 -0400 Received: from mail-pg1-f194.google.com ([209.85.215.194]:38662 "EHLO mail-pg1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727099AbfEJEeb (ORCPT ); Fri, 10 May 2019 00:34:31 -0400 Received: by mail-pg1-f194.google.com with SMTP id j26so2352246pgl.5 for ; Thu, 09 May 2019 21:34:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=dq0IfhIwE0oJzF2M3hbnPUu/0PRVMLml8CA0YPhM3BQ=; b=oF4X8RnGi9iBZU3SfMGMa31yXLsb1FU8OPudWFd5Y7SgOeplISwKrM1bN+PBWwFj4V TjphKAwGQbCOgxtedE2O8zrVJcmfIomb9EFzv8vXWXC+SR9PnNgrvIH7lXER1eCSLifw n1Rnusg9gDhPVp9onVt5uwwyPcbE0m3msUpBEaMX4CjF3b2wcfXeIZNo2Zlass1tJozA Ky+1BGXx3clBBpmrMqUY7fCLf4jQWxtAf28p1EDfmod6H5CiDfek7ckDbMeis7QV/vK2 at4gwvCIs+d3uKsw7qYlt1hqv9aEJ57SFAPRSEdBrd8lo9nKC3ZDuPnRqTaWNyrjYEwm XmcQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=dq0IfhIwE0oJzF2M3hbnPUu/0PRVMLml8CA0YPhM3BQ=; b=oau1DeC1avczFAhUyoMTu5giyc9yGgo64PGdGezMJ91XFmfYvVH2u9fxp9prLHoAy4 7UC1lSXti+v0fWLSot9NzvakpUpDbqfLwgUMYMf/1zH8r7/I+WJgAKfrescXSlhqjbLC iJjAvIGKnDdumQ2VeFiYU9sNJ+wXQa5kmnOhL+ne6aAGinP1SeaSr35C5r2cYCJNIeEP eXmI6F9AMgvydmbbKV5oiLN1QlVU13wX0ZAaHAr+d//tvLFrhmYCB02jrYVk9GeJslAF YLs22ThH5SRuICBWiT1aQ1aJjGiEgEiPg0/ndIX8ubI9Qr4ysmJcjivTAnL4io5Ayj9C c0ow== X-Gm-Message-State: APjAAAXbDYP9HHGAjRo1NrV4DVs373csQDxS4B1hjMcujsCgxCX4yBT3 s1T4Hx7aNNh48CYwkzZlfFmckg== X-Google-Smtp-Source: APXvYqx8k83eUfp5LYdEv3Mnt7OktxsjQpg4XQyaqaHpUaOb1y2LuBte//YaeEQ0T5ElHTkAAvbzqw== X-Received: by 2002:a63:309:: with SMTP id 9mr11132618pgd.49.1557462870512; Thu, 09 May 2019 21:34:30 -0700 (PDT) Received: from localhost.localdomain (104-188-17-28.lightspeed.sndgca.sbcglobal.net. [104.188.17.28]) by smtp.gmail.com with ESMTPSA id s17sm4785317pfm.149.2019.05.09.21.34.29 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 09 May 2019 21:34:30 -0700 (PDT) From: Bjorn Andersson To: Andy Gross , David Brown Cc: Ohad Ben-Cohen , Rob Herring , Mark Rutland , linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 5/8] arm64: dts: qcom: qcs404: Fully describe the CDSP Date: Thu, 9 May 2019 21:34:18 -0700 Message-Id: <20190510043421.31393-6-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20190510043421.31393-1-bjorn.andersson@linaro.org> References: <20190510043421.31393-1-bjorn.andersson@linaro.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add all the properties needed to describe the CDSP for both the Trustzone and non-Trustzone based remoteproc case, allowing any child devices to be described once by just overriding the compatible to match the firmware available on the board. Signed-off-by: Bjorn Andersson --- arch/arm64/boot/dts/qcom/qcs404.dtsi | 82 +++++++++++++++++----------- 1 file changed, 51 insertions(+), 31 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi index 3eb6089c8024..896f95817f23 100644 --- a/arch/arm64/boot/dts/qcom/qcs404.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi @@ -113,37 +113,6 @@ }; }; - remoteproc_cdsp: remoteproc-cdsp { - compatible = "qcom,qcs404-cdsp-pas"; - - interrupts-extended = <&intc GIC_SPI 229 IRQ_TYPE_EDGE_RISING>, - <&cdsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, - <&cdsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>, - <&cdsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>, - <&cdsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>; - interrupt-names = "wdog", "fatal", "ready", - "handover", "stop-ack"; - - clocks = <&xo_board>; - clock-names = "xo"; - - memory-region = <&cdsp_fw_mem>; - - qcom,smem-states = <&cdsp_smp2p_out 0>; - qcom,smem-state-names = "stop"; - - status = "disabled"; - - glink-edge { - interrupts = ; - - qcom,remote-pid = <5>; - mboxes = <&apcs_glb 12>; - - label = "cdsp"; - }; - }; - remoteproc_wcss: remoteproc-wcss { compatible = "qcom,qcs404-wcss-pas"; @@ -288,6 +257,57 @@ clock-names = "core"; }; + remoteproc_cdsp: remoteproc@b00000 { + compatible = "qcom,qcs404-cdsp-pas"; + reg = <0x00b00000 0x4040>; + + interrupts-extended = <&intc GIC_SPI 229 IRQ_TYPE_EDGE_RISING>, + <&cdsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, + <&cdsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>, + <&cdsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>, + <&cdsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "wdog", "fatal", "ready", + "handover", "stop-ack"; + + clocks = <&xo_board>, + <&gcc GCC_CDSP_CFG_AHB_CLK>, + <&gcc GCC_CDSP_TBU_CLK>, + <&gcc GCC_BIMC_CDSP_CLK>, + <&turingcc TURING_WRAPPER_AON_CLK>, + <&turingcc TURING_Q6SS_AHBS_AON_CLK>, + <&turingcc TURING_Q6SS_AHBM_AON_CLK>, + <&turingcc TURING_Q6SS_Q6_AXIM_CLK>; + clock-names = "xo", + "sway", + "tbu", + "bimc", + "ahb_aon", + "q6ss_slave", + "q6ss_master", + "q6_axim"; + + resets = <&gcc GCC_CDSP_RESTART>; + reset-names = "restart"; + + qcom,halt-regs = <&tcsr 0x19004>; + + memory-region = <&cdsp_fw_mem>; + + qcom,smem-states = <&cdsp_smp2p_out 0>; + qcom,smem-state-names = "stop"; + + status = "disabled"; + + glink-edge { + interrupts = ; + + qcom,remote-pid = <5>; + mboxes = <&apcs_glb 12>; + + label = "cdsp"; + }; + }; + tlmm: pinctrl@1000000 { compatible = "qcom,qcs404-pinctrl"; reg = <0x01000000 0x200000>, From patchwork Fri May 10 04:34:19 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 10938217 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 2D97976 for ; Fri, 10 May 2019 04:34:50 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 1AC4F28A96 for ; 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[104.188.17.28]) by smtp.gmail.com with ESMTPSA id s17sm4785317pfm.149.2019.05.09.21.34.30 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 09 May 2019 21:34:31 -0700 (PDT) From: Bjorn Andersson To: Andy Gross , David Brown Cc: Ohad Ben-Cohen , Rob Herring , Mark Rutland , linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 6/8] arm64: dts: qcom: qcs404: Move lpass and q6 into soc Date: Thu, 9 May 2019 21:34:19 -0700 Message-Id: <20190510043421.31393-7-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20190510043421.31393-1-bjorn.andersson@linaro.org> References: <20190510043421.31393-1-bjorn.andersson@linaro.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Although we don't describe lpass and wcss with all the details needed to control them in a Trustzone-less environment, move them under soc in order to tidy up the structure and prepare for describing them fully. Signed-off-by: Bjorn Andersson --- arch/arm64/boot/dts/qcom/qcs404.dtsi | 126 ++++++++++++++------------- 1 file changed, 64 insertions(+), 62 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi index 896f95817f23..b213f6acad76 100644 --- a/arch/arm64/boot/dts/qcom/qcs404.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi @@ -82,68 +82,6 @@ method = "smc"; }; - remoteproc_adsp: remoteproc-adsp { - compatible = "qcom,qcs404-adsp-pas"; - - interrupts-extended = <&intc GIC_SPI 293 IRQ_TYPE_EDGE_RISING>, - <&adsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, - <&adsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>, - <&adsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>, - <&adsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>; - interrupt-names = "wdog", "fatal", "ready", - "handover", "stop-ack"; - - clocks = <&xo_board>; - clock-names = "xo"; - - memory-region = <&adsp_fw_mem>; - - qcom,smem-states = <&adsp_smp2p_out 0>; - qcom,smem-state-names = "stop"; - - status = "disabled"; - - glink-edge { - interrupts = ; - - qcom,remote-pid = <2>; - mboxes = <&apcs_glb 8>; - - label = "adsp"; - }; - }; - - remoteproc_wcss: remoteproc-wcss { - compatible = "qcom,qcs404-wcss-pas"; - - interrupts-extended = <&intc GIC_SPI 153 IRQ_TYPE_EDGE_RISING>, - <&wcss_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, - <&wcss_smp2p_in 1 IRQ_TYPE_EDGE_RISING>, - <&wcss_smp2p_in 2 IRQ_TYPE_EDGE_RISING>, - <&wcss_smp2p_in 3 IRQ_TYPE_EDGE_RISING>; - interrupt-names = "wdog", "fatal", "ready", - "handover", "stop-ack"; - - clocks = <&xo_board>; - clock-names = "xo"; - - memory-region = <&wlan_fw_mem>; - - qcom,smem-states = <&wcss_smp2p_out 0>; - qcom,smem-state-names = "stop"; - - status = "disabled"; - - glink-edge { - interrupts = ; - - qcom,remote-pid = <1>; - mboxes = <&apcs_glb 16>; - - label = "wcss"; - }; - }; - reserved-memory { #address-cells = <2>; #size-cells = <2>; @@ -458,6 +396,38 @@ #interrupt-cells = <4>; }; + remoteproc_wcss: remoteproc@7400000 { + compatible = "qcom,qcs404-wcss-pas"; + reg = <0x07400000 0x4040>; + + interrupts-extended = <&intc GIC_SPI 153 IRQ_TYPE_EDGE_RISING>, + <&wcss_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, + <&wcss_smp2p_in 1 IRQ_TYPE_EDGE_RISING>, + <&wcss_smp2p_in 2 IRQ_TYPE_EDGE_RISING>, + <&wcss_smp2p_in 3 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "wdog", "fatal", "ready", + "handover", "stop-ack"; + + clocks = <&xo_board>; + clock-names = "xo"; + + memory-region = <&wlan_fw_mem>; + + qcom,smem-states = <&wcss_smp2p_out 0>; + qcom,smem-state-names = "stop"; + + status = "disabled"; + + glink-edge { + interrupts = ; + + qcom,remote-pid = <1>; + mboxes = <&apcs_glb 16>; + + label = "wcss"; + }; + }; + sdcc1: sdcc@7804000 { compatible = "qcom,sdhci-msm-v5"; reg = <0x07804000 0x1000>, <0x7805000 0x1000>; @@ -843,6 +813,38 @@ status = "disabled"; }; }; + + remoteproc_adsp: remoteproc@c700000 { + compatible = "qcom,qcs404-adsp-pas"; + reg = <0x0c700000 0x4040>; + + interrupts-extended = <&intc GIC_SPI 293 IRQ_TYPE_EDGE_RISING>, + <&adsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, + <&adsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>, + <&adsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>, + <&adsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "wdog", "fatal", "ready", + "handover", "stop-ack"; + + clocks = <&xo_board>; + clock-names = "xo"; + + memory-region = <&adsp_fw_mem>; + + qcom,smem-states = <&adsp_smp2p_out 0>; + qcom,smem-state-names = "stop"; + + status = "disabled"; + + glink-edge { + interrupts = ; + + qcom,remote-pid = <2>; + mboxes = <&apcs_glb 8>; + + label = "adsp"; + }; + }; }; timer { From patchwork Fri May 10 04:34:20 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 10938213 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 034EC14DB for ; Fri, 10 May 2019 04:34:47 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E61E228A96 for ; Fri, 10 May 2019 04:34:46 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id D89BD28BC9; Fri, 10 May 2019 04:34:46 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7371128A96 for ; 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[104.188.17.28]) by smtp.gmail.com with ESMTPSA id s17sm4785317pfm.149.2019.05.09.21.34.31 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 09 May 2019 21:34:32 -0700 (PDT) From: Bjorn Andersson To: Andy Gross , David Brown Cc: Ohad Ben-Cohen , Rob Herring , Mark Rutland , linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 7/8] arm64: dts: qcom: qcs404: Define APPS IOMMU Date: Thu, 9 May 2019 21:34:20 -0700 Message-Id: <20190510043421.31393-8-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20190510043421.31393-1-bjorn.andersson@linaro.org> References: <20190510043421.31393-1-bjorn.andersson@linaro.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The APPS IOMMU provides contexts for FastRPC, MDP and WLAN, among other things. Define these. We use the qcom_iommu binding because the firmware restrictions in incompatible with the arm-smmu. Signed-off-by: Bjorn Andersson --- arch/arm64/boot/dts/qcom/qcs404.dtsi | 85 ++++++++++++++++++++++++++++ 1 file changed, 85 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi index b213f6acad76..fcde4f0334c2 100644 --- a/arch/arm64/boot/dts/qcom/qcs404.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi @@ -378,6 +378,91 @@ reg = <0x01937000 0x25000>; }; + apps_iommu: iommu@1e20000 { + compatible = "qcom,qcs404-iommu", "qcom,msm-iommu-v1"; + clocks = <&gcc GCC_SMMU_CFG_CLK>, + <&gcc GCC_APSS_TCU_CLK>; + clock-names = "iface", "bus"; + qcom,iommu-secure-id = <17>; + + #address-cells = <1>; + #size-cells = <1>; + #iommu-cells = <1>; + + /* Define ranges such that the first bank is at 0x1000 */ + ranges = <0 0x01e20000 0x40000>; + + /* Bank 5: CDSP compute bank 1 */ + iommu-ctx@5000 { + compatible = "qcom,msm-iommu-v1-ns"; + reg = <0x5000 0x1000>; + interrupts = ; + }; + + /* Bank 6: CDSP compute bank 2 */ + iommu-ctx@6000 { + compatible = "qcom,msm-iommu-v1-ns"; + reg = <0x6000 0x1000>; + interrupts = ; + }; + + /* Bank 7: CDSP compute bank 3 */ + iommu-ctx@7000 { + compatible = "qcom,msm-iommu-v1-ns"; + reg = <0x7000 0x1000>; + interrupts = ; + }; + + /* Bank 8: CDSP compute bank 4 */ + iommu-ctx@8000 { + compatible = "qcom,msm-iommu-v1-ns"; + reg = <0x8000 0x1000>; + interrupts = ; + }; + + /* Bank 9: CDSP compute bank 5 */ + iommu-ctx@9000 { + compatible = "qcom,msm-iommu-v1-ns"; + reg = <0x9000 0x1000>; + interrupts = ; + }; + + /* Bank 10: MDP */ + iommu-ctx@a000 { + compatible = "qcom,msm-iommu-v1-ns"; + reg = <0xa000 0x1000>; + interrupts = ; + }; + + /* Bank 21: WLAN 0 */ + iommu-ctx@15000 { + compatible = "qcom,msm-iommu-v1-ns"; + reg = <0x15000 0x1000>; + interrupts = ; + }; + + /* Bank 23: ADSP compute bank 2 */ + iommu-ctx@17000 { + compatible = "qcom,msm-iommu-v1-ns"; + reg = <0x17000 0x1000>; + interrupts = ; + }; + + /* Bank 24: ADSP compute bank 3 */ + iommu-ctx@18000 { + compatible = "qcom,msm-iommu-v1-ns"; + reg = <0x18000 0x1000>; + interrupts = ; + }; + + /* Bank 25: ADSP compute bank 4 */ + iommu-ctx@19000 { + compatible = "qcom,msm-iommu-v1-ns"; + reg = <0x19000 0x1000>; + interrupts = ; + }; + }; + spmi_bus: spmi@200f000 { compatible = "qcom,spmi-pmic-arb"; reg = <0x0200f000 0x001000>, From patchwork Fri May 10 04:34:21 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 10938209 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A70CB76 for ; Fri, 10 May 2019 04:34:40 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 91C1B28A96 for ; Fri, 10 May 2019 04:34:40 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 81EAB28BC9; Fri, 10 May 2019 04:34:40 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6EF1228A96 for ; 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[104.188.17.28]) by smtp.gmail.com with ESMTPSA id s17sm4785317pfm.149.2019.05.09.21.34.32 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 09 May 2019 21:34:33 -0700 (PDT) From: Bjorn Andersson To: Andy Gross , David Brown Cc: Ohad Ben-Cohen , Rob Herring , Mark Rutland , linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 8/8] arm64: dts: qcom: qcs404: Add fastrpc nodes Date: Thu, 9 May 2019 21:34:21 -0700 Message-Id: <20190510043421.31393-9-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20190510043421.31393-1-bjorn.andersson@linaro.org> References: <20190510043421.31393-1-bjorn.andersson@linaro.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Thierry Escande The ADSP fastrpc provides 3 context banks and are assigned to IOMMU context banks 23, 24 and 25; using SIDs 0x804, 0x805 and 0x806. The CDSP fastrpc provides 5 context banks and are assigned to IOMMU context banks 5, 6, 7, 8 and 9; using SIDs 0x1001 through 0x1005. Add these to their respective remoteproc. The lower 4 bits of the SID is used to identify the context bank when communicating with the fastrpc firmware, so this gives the reg values. Signed-off-by: Thierry Escande [bjorn: Added SMMU linkage and extend commit message] Signed-off-by: Bjorn Andersson --- arch/arm64/boot/dts/qcom/qcs404.dtsi | 66 ++++++++++++++++++++++++++++ 1 file changed, 66 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi index fcde4f0334c2..858a53160564 100644 --- a/arch/arm64/boot/dts/qcom/qcs404.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi @@ -243,6 +243,45 @@ mboxes = <&apcs_glb 12>; label = "cdsp"; + + fastrpc_cdsp: fastrpc { + compatible = "qcom,fastrpc"; + qcom,glink-channels = "fastrpcglink-apps-dsp"; + label = "cdsp"; + + #address-cells = <1>; + #size-cells = <0>; + + cb@1 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <1>; + iommus = <&apps_iommu 5>; + }; + + cb@2 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <2>; + iommus = <&apps_iommu 6>; + }; + + cb@3 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <3>; + iommus = <&apps_iommu 7>; + }; + + cb@4 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <4>; + iommus = <&apps_iommu 8>; + }; + + cb@5 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <5>; + iommus = <&apps_iommu 9>; + }; + }; }; }; @@ -928,6 +967,33 @@ mboxes = <&apcs_glb 8>; label = "adsp"; + + fastrpc_adsp: fastrpc { + compatible = "qcom,fastrpc"; + qcom,glink-channels = "fastrpcglink-apps-dsp"; + label = "adsp"; + + #address-cells = <1>; + #size-cells = <0>; + + cb@4 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <4>; + iommus = <&apps_iommu 23>; + }; + + cb@5 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <5>; + iommus = <&apps_iommu 24>; + }; + + cb@6 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <6>; + iommus = <&apps_iommu 25>; + }; + }; }; }; };