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Thu, 16 May 2019 07:31:34 -0700 Received: from ben-Latitude-E6540.analog.com (10.50.1.133) by NWD2HUBCAS7.ad.analog.com (10.64.69.107) with Microsoft SMTP Server id 14.3.408.0; Thu, 16 May 2019 10:31:33 -0400 From: Beniamin Bia To: CC: , , , , , , , , , , , , Beniamin Bia Subject: [PATCH 1/5] iio: adc: ad7606: Move oversampling and scale options to chip info Date: Thu, 16 May 2019 17:32:04 +0300 Message-ID: <20190516143208.19294-1-beniamin.bia@analog.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 X-ADIRoutedOnPrem: True X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-Forefront-Antispam-Report: CIP:137.71.25.55;IPV:NLI;CTRY:US;EFV:NLI;SFV:NSPM;SFS:(10009020)(136003)(396003)(376002)(346002)(39860400002)(2980300002)(199004)(189003)(6916009)(186003)(26005)(77096007)(478600001)(106002)(8676002)(2351001)(107886003)(53416004)(47776003)(72206003)(16586007)(2906002)(4326008)(8936002)(54906003)(246002)(316002)(50226002)(7416002)(70586007)(305945005)(426003)(5660300002)(86362001)(476003)(126002)(70206006)(2616005)(50466002)(336012)(486006)(356004)(6666004)(36756003)(7696005)(7636002)(14444005)(44832011)(48376002)(1076003)(51416003);DIR:OUT;SFP:1101;SCL:1;SRVR:CO2PR03MB2262;H:nwd2mta1.analog.com;FPR:;SPF:Pass;LANG:en;PTR:nwd2mail10.analog.com;A:1;MX:1; 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This patch allows supporting more devices by the driver. Also, it is an intermediate step of adding support for ad7616 in software mode. Signed-off-by: Beniamin Bia Acked-by: Jonathan Cameron --- drivers/iio/adc/ad7606.c | 61 +++++++++++++++++++++++++++++----------- drivers/iio/adc/ad7606.h | 15 +++++++++- 2 files changed, 58 insertions(+), 18 deletions(-) diff --git a/drivers/iio/adc/ad7606.c b/drivers/iio/adc/ad7606.c index 24c70c3cefb4..c66ff22f32d2 100644 --- a/drivers/iio/adc/ad7606.c +++ b/drivers/iio/adc/ad7606.c @@ -158,7 +158,7 @@ static int ad7606_read_raw(struct iio_dev *indio_dev, return IIO_VAL_INT; case IIO_CHAN_INFO_SCALE: *val = 0; - *val2 = st->scale_avail[st->range]; + *val2 = st->scale_avail[st->range[0]]; return IIO_VAL_INT_PLUS_MICRO; case IIO_CHAN_INFO_OVERSAMPLING_RATIO: *val = st->oversampling; @@ -194,6 +194,32 @@ static ssize_t in_voltage_scale_available_show(struct device *dev, static IIO_DEVICE_ATTR_RO(in_voltage_scale_available, 0); +static int ad7606_write_scale_hw(struct iio_dev *indio_dev, int ch, int val) +{ + struct ad7606_state *st = iio_priv(indio_dev); + + gpiod_set_value(st->gpio_range, val); + + return 0; +} + +static int ad7606_write_os_hw(struct iio_dev *indio_dev, int val) +{ + struct ad7606_state *st = iio_priv(indio_dev); + DECLARE_BITMAP(values, 3); + + values[0] = val; + + gpiod_set_array_value(ARRAY_SIZE(values), st->gpio_os->desc, + st->gpio_os->info, values); + + /* AD7616 requires a reset to update value */ + if (st->chip_info->os_req_reset) + ad7606_reset(st); + + return 0; +} + static int ad7606_write_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int val, @@ -201,15 +227,18 @@ static int ad7606_write_raw(struct iio_dev *indio_dev, long mask) { struct ad7606_state *st = iio_priv(indio_dev); - DECLARE_BITMAP(values, 3); - int i; + int i, ret, ch = 0; switch (mask) { case IIO_CHAN_INFO_SCALE: mutex_lock(&st->lock); i = find_closest(val2, st->scale_avail, st->num_scales); - gpiod_set_value(st->gpio_range, i); - st->range = i; + ret = st->write_scale(indio_dev, chan->address, i); + if (ret < 0) { + mutex_unlock(&st->lock); + return ret; + } + st->range[ch] = i; mutex_unlock(&st->lock); return 0; @@ -218,17 +247,12 @@ static int ad7606_write_raw(struct iio_dev *indio_dev, return -EINVAL; i = find_closest(val, st->oversampling_avail, st->num_os_ratios); - - values[0] = i; - mutex_lock(&st->lock); - gpiod_set_array_value(ARRAY_SIZE(values), st->gpio_os->desc, - st->gpio_os->info, values); - - /* AD7616 requires a reset to update value */ - if (st->chip_info->os_req_reset) - ad7606_reset(st); - + ret = st->write_os(indio_dev, i); + if (ret < 0) { + mutex_unlock(&st->lock); + return ret; + } st->oversampling = st->oversampling_avail[i]; mutex_unlock(&st->lock); @@ -536,7 +560,7 @@ int ad7606_probe(struct device *dev, int irq, void __iomem *base_address, st->bops = bops; st->base_address = base_address; /* tied to logic low, analog input range is +/- 5V */ - st->range = 0; + st->range[0] = 0; st->oversampling = 1; st->scale_avail = ad7606_scale_avail; st->num_scales = ARRAY_SIZE(ad7606_scale_avail); @@ -589,6 +613,9 @@ int ad7606_probe(struct device *dev, int irq, void __iomem *base_address, if (ret) dev_warn(st->dev, "failed to RESET: no RESET GPIO specified\n"); + st->write_scale = ad7606_write_scale_hw; + st->write_os = ad7606_write_os_hw; + st->trig = devm_iio_trigger_alloc(dev, "%s-dev%d", indio_dev->name, indio_dev->id); if (!st->trig) @@ -643,7 +670,7 @@ static int ad7606_resume(struct device *dev) struct ad7606_state *st = iio_priv(indio_dev); if (st->gpio_standby) { - gpiod_set_value(st->gpio_range, st->range); + gpiod_set_value(st->gpio_range, st->range[0]); gpiod_set_value(st->gpio_standby, 1); ad7606_reset(st); } diff --git a/drivers/iio/adc/ad7606.h b/drivers/iio/adc/ad7606.h index f9ef52131e74..143c30163df9 100644 --- a/drivers/iio/adc/ad7606.h +++ b/drivers/iio/adc/ad7606.h @@ -16,6 +16,12 @@ * oversampling ratios. * @oversampling_num number of elements stored in oversampling_avail array * @os_req_reset some devices require a reset to update oversampling + * @write_scale_sw pointer to the function which writes the scale via spi + in software mode + * @write_os_sw pointer to the function which writes the os via spi + in software mode + * @sw_mode_config: pointer to a function which configured the device + * for software mode */ struct ad7606_chip_info { const struct iio_chan_spec *channels; @@ -23,6 +29,9 @@ struct ad7606_chip_info { const unsigned int *oversampling_avail; unsigned int oversampling_num; bool os_req_reset; + int (*write_scale_sw)(struct iio_dev *indio_dev, int ch, int val); + int (*write_os_sw)(struct iio_dev *indio_dev, int val); + int (*sw_mode_config)(struct iio_dev *indio_dev); }; /** @@ -39,6 +48,8 @@ struct ad7606_chip_info { * @oversampling_avail pointer to the array which stores the available * oversampling ratios. * @num_os_ratios number of elements stored in oversampling_avail array + * @write_scale pointer to the function which writes the scale + * @write_os pointer to the function which writes the os * @lock protect sensor state from concurrent accesses to GPIOs * @gpio_convst GPIO descriptor for conversion start signal (CONVST) * @gpio_reset GPIO descriptor for device hard-reset @@ -57,13 +68,15 @@ struct ad7606_state { const struct ad7606_chip_info *chip_info; struct regulator *reg; const struct ad7606_bus_ops *bops; - unsigned int range; + unsigned int range[16]; unsigned int oversampling; void __iomem *base_address; const unsigned int *scale_avail; unsigned int num_scales; const unsigned int *oversampling_avail; unsigned int num_os_ratios; + int (*write_scale)(struct iio_dev *indio_dev, int ch, int val); + int (*write_os)(struct iio_dev *indio_dev, int val); struct mutex lock; /* protect sensor state */ struct gpio_desc *gpio_convst; From patchwork Thu May 16 14:32:05 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Beniamin Bia X-Patchwork-Id: 10946721 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 513526C5 for ; Thu, 16 May 2019 14:31:57 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 416A228D1B for ; Thu, 16 May 2019 14:31:57 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 3F66328CDF; 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Received-SPF: Pass (protection.outlook.com: domain of analog.com designates 137.71.25.55 as permitted sender) receiver=protection.outlook.com; client-ip=137.71.25.55; helo=nwd2mta1.analog.com; Received: from nwd2mta1.analog.com (137.71.25.55) by BL2NAM02FT017.mail.protection.outlook.com (10.152.77.174) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.20.1856.11 via Frontend Transport; Thu, 16 May 2019 14:31:45 +0000 Received: from NWD2HUBCAS7.ad.analog.com (nwd2hubcas7.ad.analog.com [10.64.69.107]) by nwd2mta1.analog.com (8.13.8/8.13.8) with ESMTP id x4GEVihC027556 (version=TLSv1/SSLv3 cipher=AES256-SHA bits=256 verify=OK); Thu, 16 May 2019 07:31:44 -0700 Received: from ben-Latitude-E6540.analog.com (10.50.1.133) by NWD2HUBCAS7.ad.analog.com (10.64.69.107) with Microsoft SMTP Server id 14.3.408.0; Thu, 16 May 2019 10:31:44 -0400 From: Beniamin Bia To: CC: , , , , , , , , , , , , Beniamin Bia Subject: [PATCH 2/5] iio: adc: ad7606: Add software configuration Date: Thu, 16 May 2019 17:32:05 +0300 Message-ID: <20190516143208.19294-2-beniamin.bia@analog.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190516143208.19294-1-beniamin.bia@analog.com> References: <20190516143208.19294-1-beniamin.bia@analog.com> MIME-Version: 1.0 X-ADIRoutedOnPrem: True X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-Forefront-Antispam-Report: CIP:137.71.25.55;IPV:NLI;CTRY:US;EFV:NLI;SFV:NSPM;SFS:(10009020)(136003)(396003)(376002)(346002)(39860400002)(2980300002)(189003)(199004)(2616005)(446003)(426003)(36756003)(476003)(126002)(7416002)(486006)(11346002)(186003)(26005)(2351001)(76176011)(7636002)(6916009)(47776003)(86362001)(336012)(2906002)(7696005)(23676004)(246002)(8936002)(478600001)(5820100001)(72206003)(50466002)(77096007)(2870700001)(44832011)(53416004)(8676002)(70206006)(106002)(6666004)(54906003)(70586007)(14444005)(356004)(107886003)(1076003)(316002)(4326008)(5660300002)(50226002)(305945005);DIR:OUT;SFP:1101;SCL:1;SRVR:BN3PR03MB2260;H:nwd2mta1.analog.com;FPR:;SPF:Pass;LANG:en;PTR:nwd2mail10.analog.com;MX:1;A:1; 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Signed-off-by: Beniamin Bia Acked-by: Jonathan Cameron --- drivers/iio/adc/ad7606.c | 40 +++++++++++++++++++++++++++++++++++++--- drivers/iio/adc/ad7606.h | 2 ++ 2 files changed, 39 insertions(+), 3 deletions(-) diff --git a/drivers/iio/adc/ad7606.c b/drivers/iio/adc/ad7606.c index c66ff22f32d2..aba0fd123a51 100644 --- a/drivers/iio/adc/ad7606.c +++ b/drivers/iio/adc/ad7606.c @@ -140,7 +140,7 @@ static int ad7606_read_raw(struct iio_dev *indio_dev, int *val2, long m) { - int ret; + int ret, ch = 0; struct ad7606_state *st = iio_priv(indio_dev); switch (m) { @@ -157,8 +157,10 @@ static int ad7606_read_raw(struct iio_dev *indio_dev, *val = (short)ret; return IIO_VAL_INT; case IIO_CHAN_INFO_SCALE: + if (st->sw_mode_en) + ch = chan->address; *val = 0; - *val2 = st->scale_avail[st->range[0]]; + *val2 = st->scale_avail[st->range[ch]]; return IIO_VAL_INT_PLUS_MICRO; case IIO_CHAN_INFO_OVERSAMPLING_RATIO: *val = st->oversampling; @@ -233,7 +235,9 @@ static int ad7606_write_raw(struct iio_dev *indio_dev, case IIO_CHAN_INFO_SCALE: mutex_lock(&st->lock); i = find_closest(val2, st->scale_avail, st->num_scales); - ret = st->write_scale(indio_dev, chan->address, i); + if (st->sw_mode_en) + ch = chan->address; + ret = st->write_scale(indio_dev, ch, i); if (ret < 0) { mutex_unlock(&st->lock); return ret; @@ -616,6 +620,36 @@ int ad7606_probe(struct device *dev, int irq, void __iomem *base_address, st->write_scale = ad7606_write_scale_hw; st->write_os = ad7606_write_os_hw; + if (st->chip_info->sw_mode_config) + st->sw_mode_en = device_property_present(st->dev, + "adi,sw-mode"); + + if (st->sw_mode_en) { + /* After reset, in software mode, ±10 V is set by default */ + memset32(st->range, 2, ARRAY_SIZE(st->range)); + indio_dev->info = &ad7606_info_os_and_range; + + /* + * In software mode, the range gpio has no longer its function. + * Instead, the scale can be configured individually for each + * channel from the range registers. + */ + if (st->chip_info->write_scale_sw) + st->write_scale = st->chip_info->write_scale_sw; + + /* + * In software mode, the oversampling is no longer configured + * with GPIO pins. Instead, the oversampling can be configured + * in configuratiion register. + */ + if (st->chip_info->write_os_sw) + st->write_os = st->chip_info->write_os_sw; + + ret = st->chip_info->sw_mode_config(indio_dev); + if (ret < 0) + return ret; + } + st->trig = devm_iio_trigger_alloc(dev, "%s-dev%d", indio_dev->name, indio_dev->id); if (!st->trig) diff --git a/drivers/iio/adc/ad7606.h b/drivers/iio/adc/ad7606.h index 143c30163df9..d8a509c2c428 100644 --- a/drivers/iio/adc/ad7606.h +++ b/drivers/iio/adc/ad7606.h @@ -43,6 +43,7 @@ struct ad7606_chip_info { * @range voltage range selection, selects which scale to apply * @oversampling oversampling selection * @base_address address from where to read data in parallel operation + * @sw_mode_en software mode enabled * @scale_avail pointer to the array which stores the available scales * @num_scales number of elements stored in the scale_avail array * @oversampling_avail pointer to the array which stores the available @@ -71,6 +72,7 @@ struct ad7606_state { unsigned int range[16]; unsigned int oversampling; void __iomem *base_address; + bool sw_mode_en; const unsigned int *scale_avail; unsigned int num_scales; const unsigned int *oversampling_avail; From patchwork Thu May 16 14:32:06 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Beniamin Bia X-Patchwork-Id: 10946725 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 79649924 for ; Thu, 16 May 2019 14:32:04 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6922828CBF for ; Thu, 16 May 2019 14:32:04 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 66E4D28CED; Thu, 16 May 2019 14:32:04 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 44B3628CF3 for ; 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Thu, 16 May 2019 07:31:50 -0700 Received: from ben-Latitude-E6540.analog.com (10.50.1.133) by NWD2HUBCAS7.ad.analog.com (10.64.69.107) with Microsoft SMTP Server id 14.3.408.0; Thu, 16 May 2019 10:31:49 -0400 From: Beniamin Bia To: CC: , , , , , , , , , , , , Beniamin Bia Subject: [PATCH 3/5] iio: adc: ad7606: Make SPI register calculation generic and add spi support Date: Thu, 16 May 2019 17:32:06 +0300 Message-ID: <20190516143208.19294-3-beniamin.bia@analog.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190516143208.19294-1-beniamin.bia@analog.com> References: <20190516143208.19294-1-beniamin.bia@analog.com> MIME-Version: 1.0 X-ADIRoutedOnPrem: True X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-Forefront-Antispam-Report: CIP:137.71.25.55;IPV:NLI;CTRY:US;EFV:NLI;SFV:NSPM;SFS:(10009020)(376002)(396003)(39860400002)(136003)(346002)(2980300002)(189003)(199004)(4326008)(356004)(36756003)(54906003)(6666004)(8936002)(126002)(51416003)(44832011)(106002)(246002)(446003)(7696005)(2616005)(486006)(5660300002)(11346002)(16586007)(77096007)(70586007)(186003)(76176011)(8676002)(476003)(26005)(70206006)(7416002)(2906002)(50226002)(336012)(426003)(7636002)(305945005)(6916009)(316002)(1076003)(48376002)(47776003)(53416004)(50466002)(478600001)(86362001)(2351001)(107886003)(14444005)(72206003)(41533002);DIR:OUT;SFP:1101;SCL:1;SRVR:BY2PR03MB554;H:nwd2mta1.analog.com;FPR:;SPF:Pass;LANG:en;PTR:nwd2mail10.analog.com;MX:1;A:1; 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The length of address and bit which specifies the read/write operation is different for every device, that is why it was made generic. Signed-off-by: Beniamin Bia --- drivers/iio/adc/ad7606.c | 60 ++++++++++++++++++++++++++++++++++++++++ drivers/iio/adc/ad7606.h | 2 ++ 2 files changed, 62 insertions(+) diff --git a/drivers/iio/adc/ad7606.c b/drivers/iio/adc/ad7606.c index aba0fd123a51..6df81117cacc 100644 --- a/drivers/iio/adc/ad7606.c +++ b/drivers/iio/adc/ad7606.c @@ -25,6 +25,8 @@ #include #include +#include + #include "ad7606.h" /* @@ -43,6 +45,11 @@ static const unsigned int ad7616_oversampling_avail[8] = { 1, 2, 4, 8, 16, 32, 64, 128, }; +static int ad7616_spi_rd_wr_cmd(int addr, char isWriteOp) +{ + return ((addr & 0x7F) << 1) | ((isWriteOp & 0x1) << 7); +} + static int ad7606_reset(struct ad7606_state *st) { if (st->gpio_reset) { @@ -55,6 +62,59 @@ static int ad7606_reset(struct ad7606_state *st) return -ENODEV; } +static int ad7606_spi_reg_read(struct ad7606_state *st, unsigned int addr) +{ + struct spi_device *spi = to_spi_device(st->dev); + struct spi_transfer t[] = { + { + .tx_buf = &st->data[0], + .len = 2, + .cs_change = 0, + }, { + .rx_buf = &st->data[1], + .len = 2, + }, + }; + int ret; + + st->data[0] = cpu_to_be16(st->chip_info->spi_rd_wr_cmd(addr, 0) << 8); + + ret = spi_sync_transfer(spi, t, ARRAY_SIZE(t)); + if (ret < 0) + return ret; + + return be16_to_cpu(st->data[1]); +} + +static int ad7606_spi_reg_write(struct ad7606_state *st, + unsigned int addr, + unsigned int val) +{ + struct spi_device *spi = to_spi_device(st->dev); + + st->data[0] = cpu_to_be16((st->chip_info->spi_rd_wr_cmd(addr, 1) << 8) | + (val & 0x1FF)); + + return spi_write(spi, &st->data[0], sizeof(st->data[0])); +} + +static int ad7606_spi_write_mask(struct ad7606_state *st, + unsigned int addr, + unsigned long mask, + unsigned int val) +{ + int readval; + + readval = ad7606_spi_reg_read(st, addr); + if (readval < 0) + return readval; + + readval &= ~mask; + readval |= val; + + return ad7606_spi_reg_write(st, addr, readval); +} + static int ad7606_read_samples(struct ad7606_state *st) { unsigned int num = st->chip_info->num_channels; diff --git a/drivers/iio/adc/ad7606.h b/drivers/iio/adc/ad7606.h index d8a509c2c428..dfc60af9b8ac 100644 --- a/drivers/iio/adc/ad7606.h +++ b/drivers/iio/adc/ad7606.h @@ -16,6 +16,7 @@ * oversampling ratios. * @oversampling_num number of elements stored in oversampling_avail array * @os_req_reset some devices require a reset to update oversampling + * @spi_rd_wr_cmd pointer to the function which calculates the spi address * @write_scale_sw pointer to the function which writes the scale via spi in software mode * @write_os_sw pointer to the function which writes the os via spi @@ -29,6 +30,7 @@ struct ad7606_chip_info { const unsigned int *oversampling_avail; unsigned int oversampling_num; bool os_req_reset; + int (*spi_rd_wr_cmd)(int addr, char isWriteOp); int (*write_scale_sw)(struct iio_dev *indio_dev, int ch, int val); int (*write_os_sw)(struct iio_dev *indio_dev, int val); int (*sw_mode_config)(struct iio_dev *indio_dev); From patchwork Thu May 16 14:32:07 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Beniamin Bia X-Patchwork-Id: 10946727 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id BA0516C5 for ; Thu, 16 May 2019 14:32:08 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A7F9928BAF for ; Thu, 16 May 2019 14:32:08 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id A60D628C19; Thu, 16 May 2019 14:32:08 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id EFA2828CD7 for ; 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Thu, 16 May 2019 07:31:58 -0700 Received: from ben-Latitude-E6540.analog.com (10.50.1.133) by NWD2HUBCAS7.ad.analog.com (10.64.69.107) with Microsoft SMTP Server id 14.3.408.0; Thu, 16 May 2019 10:31:57 -0400 From: Beniamin Bia To: CC: , , , , , , , , , , , , Beniamin Bia Subject: [PATCH 4/5] iio: adc: ad7606: Add support for software mode for ad7616 Date: Thu, 16 May 2019 17:32:07 +0300 Message-ID: <20190516143208.19294-4-beniamin.bia@analog.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190516143208.19294-1-beniamin.bia@analog.com> References: <20190516143208.19294-1-beniamin.bia@analog.com> MIME-Version: 1.0 X-ADIRoutedOnPrem: True X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-Forefront-Antispam-Report: CIP:137.71.25.55;IPV:NLI;CTRY:US;EFV:NLI;SFV:NSPM;SFS:(10009020)(376002)(39860400002)(396003)(136003)(346002)(2980300002)(199004)(189003)(5820100001)(2906002)(2870700001)(14444005)(106002)(5660300002)(26005)(76176011)(6916009)(54906003)(426003)(316002)(47776003)(446003)(476003)(336012)(1076003)(186003)(305945005)(72206003)(77096007)(2616005)(8676002)(36756003)(356004)(2351001)(86362001)(246002)(70206006)(70586007)(478600001)(53416004)(50466002)(126002)(7636002)(11346002)(107886003)(486006)(7696005)(23676004)(50226002)(8936002)(7416002)(6666004)(44832011)(4326008);DIR:OUT;SFP:1101;SCL:1;SRVR:CO2PR03MB2261;H:nwd2mta1.analog.com;FPR:;SPF:Pass;LANG:en;PTR:nwd2mail10.analog.com;A:1;MX:1; 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In order to activate the software mode, HW_RNGSEL pins must be pulled low. Oversampling and input ranges are now configured in corresponding registers. Ad7616 has multiple scale options when it is configured in software mode. Signed-off-by: Beniamin Bia --- drivers/iio/adc/ad7606.c | 111 ++++++++++++++++++++++++++++++++++++--- 1 file changed, 103 insertions(+), 8 deletions(-) diff --git a/drivers/iio/adc/ad7606.c b/drivers/iio/adc/ad7606.c index 6df81117cacc..f77df3efe43f 100644 --- a/drivers/iio/adc/ad7606.c +++ b/drivers/iio/adc/ad7606.c @@ -29,6 +29,20 @@ #include "ad7606.h" +#define AD7606_RANGE_CH_ADDR(ch) (0x03 + ((ch) >> 1)) +#define AD7606_OS_MODE 0x08 + +#define AD7616_CONFIGURATION_REGISTER 0x02 +#define AD7616_OS_MASK GENMASK(4, 2) +#define AD7616_BURST_MODE BIT(6) +#define AD7616_SEQEN_MODE BIT(5) +#define AD7616_RANGE_CH_ADDR_OFF 0x04 +#define AD7616_RANGE_CH_ADDR(ch) ((((ch) & 0x1) << 1) + ((ch) >> 3)) +#define AD7616_RANGE_CH_MSK(ch) (GENMASK(1, 0) << ((ch) & 0x6)) +#define AD7616_RANGE_CH_MODE(ch, mode) ((mode) << (ch & GENMASK(2, 1))) + +static int ad7616_sw_mode_config(struct iio_dev *indio_dev); + /* * Scales are computed as 5000/32768 and 10000/32768 respectively, * so that when applied to the raw values they provide mV values @@ -37,6 +51,11 @@ static const unsigned int ad7606_scale_avail[2] = { 152588, 305176 }; + +static const unsigned int ad7616_sw_scale_avail[3] = { + 76293, 152588, 305176 +}; + static const unsigned int ad7606_oversampling_avail[7] = { 1, 2, 4, 8, 16, 32, 64, }; @@ -282,6 +301,26 @@ static int ad7606_write_os_hw(struct iio_dev *indio_dev, int val) return 0; } +static int ad7616_write_scale_sw(struct iio_dev *indio_dev, int ch, int val) +{ + struct ad7606_state *st = iio_priv(indio_dev); + unsigned int ch_addr, mode; + + ch_addr = AD7616_RANGE_CH_ADDR_OFF + AD7616_RANGE_CH_ADDR(ch); + mode = AD7616_RANGE_CH_MODE(ch, ((val + 1) & 0x3)); + + return ad7606_spi_write_mask(st, ch_addr, AD7616_RANGE_CH_MSK(ch), + mode); +} + +static int ad7616_write_os_sw(struct iio_dev *indio_dev, int val) +{ + struct ad7606_state *st = iio_priv(indio_dev); + + return ad7606_spi_write_mask(st, AD7616_CONFIGURATION_REGISTER, + AD7616_OS_MASK, val << 2); +} + static int ad7606_write_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int val, @@ -368,14 +407,14 @@ static const struct attribute_group ad7606_attribute_group_range = { .attrs = ad7606_attributes_range, }; -#define AD760X_CHANNEL(num, mask) { \ +#define AD760X_CHANNEL(num, mask_sep, mask_type, mask_all) { \ .type = IIO_VOLTAGE, \ .indexed = 1, \ .channel = num, \ .address = num, \ - .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ - .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),\ - .info_mask_shared_by_all = mask, \ + .info_mask_separate = mask_sep, \ + .info_mask_shared_by_type = mask_type, \ + .info_mask_shared_by_all = mask_all, \ .scan_index = num, \ .scan_type = { \ .sign = 's', \ @@ -385,11 +424,18 @@ static const struct attribute_group ad7606_attribute_group_range = { }, \ } -#define AD7605_CHANNEL(num) \ - AD760X_CHANNEL(num, 0) +#define AD7605_CHANNEL(num) \ + AD760X_CHANNEL(num, BIT(IIO_CHAN_INFO_RAW), \ + BIT(IIO_CHAN_INFO_SCALE), 0) + +#define AD7606_CHANNEL(num) \ + AD760X_CHANNEL(num, BIT(IIO_CHAN_INFO_RAW), \ + BIT(IIO_CHAN_INFO_SCALE), \ + BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO)) -#define AD7606_CHANNEL(num) \ - AD760X_CHANNEL(num, BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO)) +#define AD7616_CHANNEL(num) \ + AD760X_CHANNEL(num, BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),\ + 0, BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO)) static const struct iio_chan_spec ad7605_channels[] = { IIO_CHAN_SOFT_TIMESTAMP(4), @@ -441,6 +487,26 @@ static const struct iio_chan_spec ad7616_channels[] = { AD7606_CHANNEL(15), }; +static const struct iio_chan_spec ad7616_sw_channels[] = { + IIO_CHAN_SOFT_TIMESTAMP(16), + AD7616_CHANNEL(0), + AD7616_CHANNEL(1), + AD7616_CHANNEL(2), + AD7616_CHANNEL(3), + AD7616_CHANNEL(4), + AD7616_CHANNEL(5), + AD7616_CHANNEL(6), + AD7616_CHANNEL(7), + AD7616_CHANNEL(8), + AD7616_CHANNEL(9), + AD7616_CHANNEL(10), + AD7616_CHANNEL(11), + AD7616_CHANNEL(12), + AD7616_CHANNEL(13), + AD7616_CHANNEL(14), + AD7616_CHANNEL(15), +}; + static const struct ad7606_chip_info ad7606_chip_info_tbl[] = { /* More devices added in future */ [ID_AD7605_4] = { @@ -468,9 +534,13 @@ static const struct ad7606_chip_info ad7606_chip_info_tbl[] = { [ID_AD7616] = { .channels = ad7616_channels, .num_channels = 17, + .sw_mode_config = ad7616_sw_mode_config, .oversampling_avail = ad7616_oversampling_avail, .oversampling_num = ARRAY_SIZE(ad7616_oversampling_avail), .os_req_reset = true, + .spi_rd_wr_cmd = ad7616_spi_rd_wr_cmd, + .write_scale_sw = ad7616_write_scale_sw, + .write_os_sw = ad7616_write_os_sw, }, }; @@ -604,6 +674,23 @@ static void ad7606_regulator_disable(void *data) regulator_disable(st->reg); } +static int ad7616_sw_mode_config(struct iio_dev *indio_dev) +{ + struct ad7606_state *st = iio_priv(indio_dev); + + /* + * Scale can be configured individually for each channel + * in software mode. + */ + indio_dev->channels = ad7616_sw_channels; + + /* Activate Burst mode and SEQEN MODE */ + return ad7606_spi_write_mask(st, + AD7616_CONFIGURATION_REGISTER, + AD7616_BURST_MODE | AD7616_SEQEN_MODE, + AD7616_BURST_MODE | AD7616_SEQEN_MODE); +} + int ad7606_probe(struct device *dev, int irq, void __iomem *base_address, const char *name, unsigned int id, const struct ad7606_bus_ops *bops) @@ -677,6 +764,10 @@ int ad7606_probe(struct device *dev, int irq, void __iomem *base_address, if (ret) dev_warn(st->dev, "failed to RESET: no RESET GPIO specified\n"); + /* AD7616 requires al least 15ms to reconfigure after a reset */ + if (msleep_interruptible(15)) + return -ERESTARTSYS; + st->write_scale = ad7606_write_scale_hw; st->write_os = ad7606_write_os_hw; @@ -685,6 +776,10 @@ int ad7606_probe(struct device *dev, int irq, void __iomem *base_address, "adi,sw-mode"); if (st->sw_mode_en) { + /* Scale of 0.076293 is only available in sw mode */ + st->scale_avail = ad7616_sw_scale_avail; + st->num_scales = ARRAY_SIZE(ad7616_sw_scale_avail); + /* After reset, in software mode, ±10 V is set by default */ memset32(st->range, 2, ARRAY_SIZE(st->range)); indio_dev->info = &ad7606_info_os_and_range; From patchwork Thu May 16 14:32:08 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Beniamin Bia X-Patchwork-Id: 10946729 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 534AA6C5 for ; Thu, 16 May 2019 14:32:16 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 42AD02897D for ; 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gmx.de; dkim=none (message not signed) header.d=none;gmx.de; dmarc=bestguesspass action=none header.from=analog.com; Received-SPF: Pass (protection.outlook.com: domain of analog.com designates 137.71.25.55 as permitted sender) receiver=protection.outlook.com; client-ip=137.71.25.55; helo=nwd2mta1.analog.com; Received: from nwd2mta1.analog.com (137.71.25.55) by SN1NAM02FT020.mail.protection.outlook.com (10.152.72.139) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.20.1900.16 via Frontend Transport; Thu, 16 May 2019 14:32:04 +0000 Received: from NWD2HUBCAS7.ad.analog.com (nwd2hubcas7.ad.analog.com [10.64.69.107]) by nwd2mta1.analog.com (8.13.8/8.13.8) with ESMTP id x4GEW3KM027706 (version=TLSv1/SSLv3 cipher=AES256-SHA bits=256 verify=OK); Thu, 16 May 2019 07:32:03 -0700 Received: from ben-Latitude-E6540.analog.com (10.50.1.133) by NWD2HUBCAS7.ad.analog.com (10.64.69.107) with Microsoft SMTP Server id 14.3.408.0; Thu, 16 May 2019 10:32:03 -0400 From: Beniamin Bia To: CC: , , , , , , , , , , , , Beniamin Bia Subject: [PATCH 5/5] iio: adc: ad7606: Add debug mode for ad7616 Date: Thu, 16 May 2019 17:32:08 +0300 Message-ID: <20190516143208.19294-5-beniamin.bia@analog.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190516143208.19294-1-beniamin.bia@analog.com> References: <20190516143208.19294-1-beniamin.bia@analog.com> MIME-Version: 1.0 X-ADIRoutedOnPrem: True X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-Forefront-Antispam-Report: CIP:137.71.25.55;IPV:NLI;CTRY:US;EFV:NLI;SFV:NSPM;SFS:(10009020)(396003)(39860400002)(346002)(376002)(136003)(2980300002)(189003)(199004)(77096007)(36756003)(186003)(7416002)(48376002)(26005)(50466002)(47776003)(476003)(8936002)(246002)(126002)(2616005)(2906002)(44832011)(1076003)(8676002)(486006)(7636002)(11346002)(305945005)(53416004)(6916009)(426003)(356004)(446003)(50226002)(336012)(5660300002)(2351001)(76176011)(14444005)(51416003)(7696005)(107886003)(70206006)(70586007)(316002)(4326008)(54906003)(106002)(86362001)(478600001)(16586007)(72206003);DIR:OUT;SFP:1101;SCL:1;SRVR:BL2PR03MB545;H:nwd2mta1.analog.com;FPR:;SPF:Pass;LANG:en;PTR:nwd2mail10.analog.com;MX:1;A:1; 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Signed-off-by: Beniamin Bia Acked-by: Jonathan Cameron --- drivers/iio/adc/ad7606.c | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/drivers/iio/adc/ad7606.c b/drivers/iio/adc/ad7606.c index f77df3efe43f..b03bdce4fd4e 100644 --- a/drivers/iio/adc/ad7606.c +++ b/drivers/iio/adc/ad7606.c @@ -134,6 +134,30 @@ static int ad7606_spi_write_mask(struct ad7606_state *st, return ad7606_spi_reg_write(st, addr, readval); } +static int ad7606_reg_access(struct iio_dev *indio_dev, + unsigned int reg, + unsigned int writeval, + unsigned int *readval) +{ + struct ad7606_state *st = iio_priv(indio_dev); + int ret; + + mutex_lock(&st->lock); + if (readval) { + ret = ad7606_spi_reg_read(st, reg); + if (ret < 0) + goto err_unlock; + *readval = ret; + ret = 0; + } else { + ret = ad7606_spi_reg_write(st, reg, writeval); + } +err_unlock: + mutex_unlock(&st->lock); + + return ret; +} + static int ad7606_read_samples(struct ad7606_state *st) { unsigned int num = st->chip_info->num_channels; @@ -645,6 +669,7 @@ static const struct iio_info ad7606_info_no_os_or_range = { static const struct iio_info ad7606_info_os_and_range = { .read_raw = &ad7606_read_raw, .write_raw = &ad7606_write_raw, + .debugfs_reg_access = &ad7606_reg_access, .attrs = &ad7606_attribute_group_os_and_range, .validate_trigger = &ad7606_validate_trigger, };