From patchwork Tue May 21 09:29:37 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiaxin Yu X-Patchwork-Id: 10953225 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 9B70B924 for ; Tue, 21 May 2019 09:32:38 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8B5FD28931 for ; Tue, 21 May 2019 09:32:38 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 7FC85289BE; Tue, 21 May 2019 09:32:38 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_NONE,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id E015728931 for ; Tue, 21 May 2019 09:32:37 +0000 (UTC) Received: from alsa1.perex.cz (alsa1.perex.cz [207.180.221.201]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by alsa0.perex.cz (Postfix) with ESMTPS id 0FDC91689; Tue, 21 May 2019 11:31:46 +0200 (CEST) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa0.perex.cz 0FDC91689 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=alsa-project.org; s=default; t=1558431156; bh=E7OkrXEbTwm0tM8iOAJUb+KTDminI+xRvtMT3PFaxaA=; h=From:To:Date:In-Reply-To:References:Cc:Subject:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From; b=MLEARe1LSkUjFTQEB50kDGA9Sl6Oi6FF42oFxqD/vaOKafw6MCQWAksIFsNFY0RZP ReXLbU05x9fCrO2atrFGUC62PmfKYbScBxGiK9o4rUlqmZd9Z1BLRBts9xgfDBPrJJ Reee7fRzAFdDkIM1LZXn4ZwV9SV4Hd3FM238IcWc= Received: from alsa1.perex.cz (localhost.localdomain [127.0.0.1]) by alsa1.perex.cz (Postfix) with ESMTP id 1D6C6F89670; Tue, 21 May 2019 11:30:19 +0200 (CEST) X-Original-To: alsa-devel@alsa-project.org Delivered-To: alsa-devel@alsa-project.org Received: by alsa1.perex.cz (Postfix, from userid 50401) id 7B5B6F89709; Tue, 21 May 2019 11:30:04 +0200 (CEST) Received: from mailgw01.mediatek.com (unknown [210.61.82.183]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by alsa1.perex.cz (Postfix) with ESMTPS id CCAF2F806E7 for ; Tue, 21 May 2019 11:29:58 +0200 (CEST) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa1.perex.cz CCAF2F806E7 X-UUID: a4f6417aeaf64441b928e7b8d5fad8f0-20190521 X-UUID: a4f6417aeaf64441b928e7b8d5fad8f0-20190521 Received: from mtkexhb02.mediatek.inc [(172.21.101.103)] by mailgw01.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 1696502; Tue, 21 May 2019 17:29:52 +0800 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs03n2.mediatek.inc (172.21.101.182) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Tue, 21 May 2019 17:29:44 +0800 Received: from localhost.localdomain (10.17.3.153) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Tue, 21 May 2019 17:29:43 +0800 From: Jiaxin Yu To: Date: Tue, 21 May 2019 17:29:37 +0800 Message-ID: <1558430978-2440-2-git-send-email-jiaxin.yu@mediatek.com> X-Mailer: git-send-email 1.8.1.1.dirty In-Reply-To: <1558430978-2440-1-git-send-email-jiaxin.yu@mediatek.com> References: <1558430978-2440-1-git-send-email-jiaxin.yu@mediatek.com> MIME-Version: 1.0 X-TM-SNTS-SMTP: 6041E3935DF2EB47530DCC13BC892BD73048309CBC0EE37183E313E98AE0528C2000:8 X-MTK: N Cc: alsa-devel@alsa-project.org, wsd_upstream@mediatek.com, garlic.tseng@mediatek.com, Jiaxin Yu , tzungbi@google.com, linux-mediatek@lists.infradead.org, kaichieh.chuang@mediatek.com Subject: [alsa-devel] [PATCH 1/2] ASoC: Mediatek: MT8183: fix compile error X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" X-Virus-Scanned: ClamAV using ClamSMTP mtk_regmap_update_bits() has been changed from four parameters to five parameters. Fixes: 1628fc3f4771 ("ASoC: Mediatek: MT8183: add memory interface data align") Signed-off-by: Jiaxin Yu --- Hi, This patch is based on for-5.3 branch. And tested pass on kukui board locally. --- sound/soc/mediatek/common/mtk-afe-fe-dai.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/sound/soc/mediatek/common/mtk-afe-fe-dai.c b/sound/soc/mediatek/common/mtk-afe-fe-dai.c index 19048c3..d165634 100644 --- a/sound/soc/mediatek/common/mtk-afe-fe-dai.c +++ b/sound/soc/mediatek/common/mtk-afe-fe-dai.c @@ -266,8 +266,7 @@ int mtk_afe_fe_prepare(struct snd_pcm_substream *substream, 1, hd_audio, memif->data->hd_shift); mtk_regmap_update_bits(afe->regmap, memif->data->hd_align_reg, - memif->data->hd_align_mshift, - hd_align ? memif->data->hd_align_mshift : 0); + 1, hd_align, memif->data->hd_align_mshift); return 0; } From patchwork Tue May 21 09:29:38 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiaxin Yu X-Patchwork-Id: 10953221 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 5FDBD1708 for ; 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Tue, 21 May 2019 11:29:55 +0200 (CEST) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa1.perex.cz 06F4BF89670 X-UUID: 98199c601f3d4034a56e420de8c2d9f8-20190521 X-UUID: 98199c601f3d4034a56e420de8c2d9f8-20190521 Received: from mtkcas09.mediatek.inc [(172.21.101.178)] by mailgw02.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 1389120104; Tue, 21 May 2019 17:29:47 +0800 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs06n2.mediatek.inc (172.21.101.130) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Tue, 21 May 2019 17:29:45 +0800 Received: from localhost.localdomain (10.17.3.153) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Tue, 21 May 2019 17:29:45 +0800 From: Jiaxin Yu To: Date: Tue, 21 May 2019 17:29:38 +0800 Message-ID: <1558430978-2440-3-git-send-email-jiaxin.yu@mediatek.com> X-Mailer: git-send-email 1.8.1.1.dirty In-Reply-To: <1558430978-2440-1-git-send-email-jiaxin.yu@mediatek.com> References: <1558430978-2440-1-git-send-email-jiaxin.yu@mediatek.com> MIME-Version: 1.0 X-TM-SNTS-SMTP: C76EBAEA3122E841A0369E5B7172AF726DD2C9290DC0A9F32B76B8DF20415E4B2000:8 X-MTK: N Cc: alsa-devel@alsa-project.org, wsd_upstream@mediatek.com, garlic.tseng@mediatek.com, Jiaxin Yu , tzungbi@google.com, linux-mediatek@lists.infradead.org, kaichieh.chuang@mediatek.com Subject: [alsa-devel] [PATCH 2/2] ASoC: Mediatek: MT8183: fix compile error X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" X-Virus-Scanned: ClamAV using ClamSMTP mtk_regmap_update_bits() has been changed to take a shift and warn when reg >= 0 but shift < 0.So the hd_align_mshift must not have shift. Change it from XXX_HD_ALIGN_MASK_SFT to XXX_HD_ALIGN_MASK. Fixes: cf61f5b01531 ("ASoC: Mediatek: MT8183: set data align") Signed-off-by: Jiaxin Yu --- Hi, This patch is base on for-5.3 branch. And tested pass on kukui board locally. --- sound/soc/mediatek/mt8183/mt8183-afe-pcm.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/sound/soc/mediatek/mt8183/mt8183-afe-pcm.c b/sound/soc/mediatek/mt8183/mt8183-afe-pcm.c index ab2bce1..56c3732 100644 --- a/sound/soc/mediatek/mt8183/mt8183-afe-pcm.c +++ b/sound/soc/mediatek/mt8183/mt8183-afe-pcm.c @@ -439,7 +439,7 @@ static int mt8183_irq_fs(struct snd_pcm_substream *substream, unsigned int rate) .hd_reg = AFE_MEMIF_HD_MODE, .hd_align_reg = AFE_MEMIF_HDALIGN, .hd_shift = DL1_HD_SFT, - .hd_align_mshift = DL1_HD_ALIGN_MASK_SFT, + .hd_align_mshift = DL1_HD_ALIGN_SFT, .agent_disable_reg = -1, .agent_disable_shift = -1, .msb_reg = -1, @@ -460,7 +460,7 @@ static int mt8183_irq_fs(struct snd_pcm_substream *substream, unsigned int rate) .hd_reg = AFE_MEMIF_HD_MODE, .hd_align_reg = AFE_MEMIF_HDALIGN, .hd_shift = DL2_HD_SFT, - .hd_align_mshift = DL2_HD_ALIGN_MASK_SFT, + .hd_align_mshift = DL2_HD_ALIGN_SFT, .agent_disable_reg = -1, .agent_disable_shift = -1, .msb_reg = -1, @@ -481,7 +481,7 @@ static int mt8183_irq_fs(struct snd_pcm_substream *substream, unsigned int rate) .hd_reg = AFE_MEMIF_HD_MODE, .hd_align_reg = AFE_MEMIF_HDALIGN, .hd_shift = DL3_HD_SFT, - .hd_align_mshift = DL3_HD_ALIGN_MASK_SFT, + .hd_align_mshift = DL3_HD_ALIGN_SFT, .agent_disable_reg = -1, .agent_disable_shift = -1, .msb_reg = -1, @@ -502,7 +502,7 @@ static int mt8183_irq_fs(struct snd_pcm_substream *substream, unsigned int rate) .hd_reg = AFE_MEMIF_HD_MODE, .hd_align_reg = AFE_MEMIF_HDALIGN, .hd_shift = VUL2_HD_SFT, - .hd_align_mshift = VUL2_HD_ALIGN_MASK_SFT, + .hd_align_mshift = VUL2_HD_ALIGN_SFT, .agent_disable_reg = -1, .agent_disable_shift = -1, .msb_reg = -1, @@ -523,7 +523,7 @@ static int mt8183_irq_fs(struct snd_pcm_substream *substream, unsigned int rate) .hd_reg = AFE_MEMIF_HD_MODE, .hd_align_reg = AFE_MEMIF_HDALIGN, .hd_shift = AWB_HD_SFT, - .hd_align_mshift = AWB_HD_ALIGN_MASK_SFT, + .hd_align_mshift = AWB_HD_ALIGN_SFT, .agent_disable_reg = -1, .agent_disable_shift = -1, .msb_reg = -1, @@ -544,7 +544,7 @@ static int mt8183_irq_fs(struct snd_pcm_substream *substream, unsigned int rate) .hd_reg = AFE_MEMIF_HD_MODE, .hd_align_reg = AFE_MEMIF_HDALIGN, .hd_shift = AWB2_HD_SFT, - .hd_align_mshift = AWB2_ALIGN_MASK_SFT, + .hd_align_mshift = AWB2_ALIGN_SFT, .agent_disable_reg = -1, .agent_disable_shift = -1, .msb_reg = -1, @@ -565,7 +565,7 @@ static int mt8183_irq_fs(struct snd_pcm_substream *substream, unsigned int rate) .hd_reg = AFE_MEMIF_HD_MODE, .hd_align_reg = AFE_MEMIF_HDALIGN, .hd_shift = VUL12_HD_SFT, - .hd_align_mshift = VUL12_HD_ALIGN_MASK_SFT, + .hd_align_mshift = VUL12_HD_ALIGN_SFT, .agent_disable_reg = -1, .agent_disable_shift = -1, .msb_reg = -1, @@ -586,7 +586,7 @@ static int mt8183_irq_fs(struct snd_pcm_substream *substream, unsigned int rate) .hd_reg = AFE_MEMIF_HD_MODE, .hd_align_reg = AFE_MEMIF_HDALIGN, .hd_shift = MOD_DAI_HD_SFT, - .hd_align_mshift = MOD_DAI_HD_ALIGN_MASK_SFT, + .hd_align_mshift = MOD_DAI_HD_ALIGN_SFT, .agent_disable_reg = -1, .agent_disable_shift = -1, .msb_reg = -1, @@ -607,7 +607,7 @@ static int mt8183_irq_fs(struct snd_pcm_substream *substream, unsigned int rate) .hd_reg = AFE_MEMIF_HD_MODE, .hd_align_reg = AFE_MEMIF_HDALIGN, .hd_shift = HDMI_HD_SFT, - .hd_align_mshift = HDMI_HD_ALIGN_MASK_SFT, + .hd_align_mshift = HDMI_HD_ALIGN_SFT, .agent_disable_reg = -1, .agent_disable_shift = -1, .msb_reg = -1,