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a=rsa-sha256; c=relaxed/relaxed; d=armh.onmicrosoft.com; s=selector2-armh-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=ebkvGMDpB+G8m//iJEFAwcRvCyXF58/1P3aolgwFmLc=; b=tpSYF+q4LU9y+mbm8zAlTGHniD8VYmePmWoHmsgBlfA9g7YF3dTZKR/8p7qAKdTd5gUhTgcJlfd2U4IWTGKJlo74SFZzpomIxCMf6m5SH5Q5iRQ/QoUB8iY1dewNcO8m7vApCFZ52l5ySuktrEdY4K0IoHX1sZIZSabqdaYxP/Q= X-Mailman-Original-Authentication-Results: spf=none (sender IP is ) smtp.mailfrom=Lowry.Li@arm.com; X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Ayan Halder , "Jonathan Chai \(Arm Technology China\)" , "linux-kernel@vger.kernel.org" , "dri-devel@lists.freedesktop.org" , "Julien Yin \(Arm Technology China\)" , nd Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: "Lowry Li (Arm Technology China)" - Adds rotation property to plane. - Komeda display rotation support diverges from the specific formats, so need to check the user required rotation type with the format caps and reject the commit if it can not be supported. - In the layer validate flow, sets the rotation value to the layer state. If r90 or r270, swap the width and height of the data flow for next stage. Signed-off-by: Lowry Li (Arm Technology China) Reviewed-by: James Qian Wang (Arm Technology China) --- drivers/gpu/drm/arm/display/komeda/komeda_format_caps.h | 11 +++++++++++ .../gpu/drm/arm/display/komeda/komeda_pipeline_state.c | 7 +++++++ drivers/gpu/drm/arm/display/komeda/komeda_plane.c | 16 ++++++++++++++++ 3 files changed, 34 insertions(+) diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_format_caps.h b/drivers/gpu/drm/arm/display/komeda/komeda_format_caps.h index bc3b2df36..96de22e 100644 --- a/drivers/gpu/drm/arm/display/komeda/komeda_format_caps.h +++ b/drivers/gpu/drm/arm/display/komeda/komeda_format_caps.h @@ -79,6 +79,17 @@ struct komeda_format_caps_table { extern u64 komeda_supported_modifiers[]; +static inline const char *komeda_get_format_name(u32 fourcc, u64 modifier) +{ + struct drm_format_name_buf buf; + static char name[64]; + + snprintf(name, sizeof(name), "%s with modifier: 0x%llx.", + drm_get_format_name(fourcc, &buf), modifier); + + return name; +} + const struct komeda_format_caps * komeda_get_format_caps(struct komeda_format_caps_table *table, u32 fourcc, u64 modifier); diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c b/drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c index db34ea2..34737c0 100644 --- a/drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c +++ b/drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c @@ -339,6 +339,13 @@ struct komeda_pipeline_state * /* update the data flow for the next stage */ komeda_component_set_output(&dflow->input, &layer->base, 0); + /* + * The rotation has been handled by layer, so adjusted the data flow for + * the next stage. + */ + if (drm_rotation_90_or_270(st->rot)) + swap(dflow->in_h, dflow->in_w); + return 0; } diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_plane.c b/drivers/gpu/drm/arm/display/komeda/komeda_plane.c index 9b87c25..c9f37ff 100644 --- a/drivers/gpu/drm/arm/display/komeda/komeda_plane.c +++ b/drivers/gpu/drm/arm/display/komeda/komeda_plane.c @@ -10,6 +10,7 @@ #include #include "komeda_dev.h" #include "komeda_kms.h" +#include "komeda_framebuffer.h" static int komeda_plane_init_data_flow(struct drm_plane_state *st, @@ -17,6 +18,7 @@ { struct komeda_plane_state *kplane_st = to_kplane_st(st); struct drm_framebuffer *fb = st->fb; + const struct komeda_format_caps *caps = to_kfb(fb)->format_caps; memset(dflow, 0, sizeof(*dflow)); @@ -37,6 +39,15 @@ dflow->in_w = st->src_w >> 16; dflow->in_h = st->src_h >> 16; + dflow->rot = drm_rotation_simplify(st->rotation, caps->supported_rots); + if (!has_bits(dflow->rot, caps->supported_rots)) { + DRM_DEBUG_ATOMIC("rotation(0x%x) isn't supported by %s.\n", + dflow->rot, + komeda_get_format_name(caps->fourcc, + fb->modifier)); + return -EINVAL; + } + dflow->en_img_enhancement = kplane_st->img_enhancement; komeda_complete_data_flow_cfg(dflow); @@ -303,6 +314,11 @@ static int komeda_plane_add(struct komeda_kms_dev *kms, drm_plane_helper_add(plane, &komeda_plane_helper_funcs); + err = drm_plane_create_rotation_property(plane, DRM_MODE_ROTATE_0, + layer->supported_rots); + if (err) + goto cleanup; + err = drm_plane_create_alpha_property(plane); if (err) goto cleanup; From patchwork Tue May 28 03:57:05 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Lowry Li (Arm Technology China)" X-Patchwork-Id: 10963683 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 2A2841395 for ; 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Tue, 28 May 2019 03:57:07 +0000 (UTC) Received: from DB7PR08MB3530.eurprd08.prod.outlook.com (20.177.120.80) by DB7PR08MB3580.eurprd08.prod.outlook.com (20.177.120.94) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1922.16; Tue, 28 May 2019 03:57:05 +0000 Received: from DB7PR08MB3530.eurprd08.prod.outlook.com ([fe80::e41c:9e3c:80bf:25c6]) by DB7PR08MB3530.eurprd08.prod.outlook.com ([fe80::e41c:9e3c:80bf:25c6%5]) with mapi id 15.20.1943.016; Tue, 28 May 2019 03:57:05 +0000 From: "Lowry Li (Arm Technology China)" To: Liviu Dudau , "james qian wang (Arm Technology China)" , "maarten.lankhorst@linux.intel.com" , "seanpaul@chromium.org" , "airlied@linux.ie" , Brian Starkey Subject: [PATCH v3 2/2] drm/komeda: Adds limitation check for AFBC wide block not support Rot90 Thread-Topic: [PATCH v3 2/2] drm/komeda: Adds limitation check for AFBC wide block not support Rot90 Thread-Index: AQHVFQlp8DSCdMwQwU+BK11BmdEQSw== Date: Tue, 28 May 2019 03:57:05 +0000 Message-ID: <1559015784-18998-3-git-send-email-lowry.li@arm.com> References: <1559015784-18998-1-git-send-email-lowry.li@arm.com> In-Reply-To: <1559015784-18998-1-git-send-email-lowry.li@arm.com> Accept-Language: zh-CN, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [113.29.88.7] x-clientproxiedby: HK2PR02CA0197.apcprd02.prod.outlook.com (2603:1096:201:21::33) To DB7PR08MB3530.eurprd08.prod.outlook.com (2603:10a6:10:49::16) x-ms-exchange-messagesentrepresentingtype: 1 x-mailer: git-send-email 1.9.1 x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 038a82eb-c56a-46e8-67d8-08d6e3208c12 x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0; 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a=rsa-sha256; c=relaxed/relaxed; d=armh.onmicrosoft.com; s=selector2-armh-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=rNTTpDaBV+L1WQDFqkLzktRT4PA6c+zW4ENTFpr/QHo=; b=oZlJBcFbwt+CPWEb4WHfJx4KEPNQKhuU5XhLQiVi5tm7XwFLLxHvXXdSP0sX3N8zr1soDap2cil1YfncCT/LdzIXQ/vIKygtYKyDF8mI+gJhDfhvYzT6+JOru3oh5eRJuoevzIUQpjz1AXano/Z2AwtUpvXP7XDCOWzuwJPxTeg= X-Mailman-Original-Authentication-Results: spf=none (sender IP is ) smtp.mailfrom=Lowry.Li@arm.com; X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Ayan Halder , "Jonathan Chai \(Arm Technology China\)" , "linux-kernel@vger.kernel.org" , "dri-devel@lists.freedesktop.org" , "Julien Yin \(Arm Technology China\)" , nd Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: "Lowry Li (Arm Technology China)" Komeda series hardware doesn't support Rot90 for AFBC wide block. So add limitation check to reject it if such configuration has been posted. Signed-off-by: Lowry Li (Arm Technology China) Reviewed-by: James Qian Wang (Arm Technology China) --- drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c | 15 +++++++++++++++ .../gpu/drm/arm/display/komeda/komeda_format_caps.c | 7 ++++++- .../gpu/drm/arm/display/komeda/komeda_format_caps.h | 8 +++++++- .../gpu/drm/arm/display/komeda/komeda_framebuffer.c | 18 +++++++++--------- .../gpu/drm/arm/display/komeda/komeda_framebuffer.h | 5 +++-- .../gpu/drm/arm/display/komeda/komeda_pipeline_state.c | 8 +++++++- drivers/gpu/drm/arm/display/komeda/komeda_plane.c | 2 +- 7 files changed, 48 insertions(+), 15 deletions(-) diff --git a/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c b/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c index 1c914f8..4563c2a 100644 --- a/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c +++ b/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c @@ -494,11 +494,26 @@ static int d71_enum_resources(struct komeda_dev *mdev) {__HW_ID(6, 7), 0/*DRM_FORMAT_YUV420_10BIT*/, 1, RICH, Rot_ALL_H_V, LYT_NM, AFB_TH}, }; +static bool d71_format_mod_supported(const struct komeda_format_caps *caps, + u32 layer_type, u64 modifier, u32 rot) +{ + uint64_t layout = modifier & AFBC_FORMAT_MOD_BLOCK_SIZE_MASK; + + if ((layout == AFBC_FORMAT_MOD_BLOCK_SIZE_32x8) && + drm_rotation_90_or_270(rot)) { + DRM_DEBUG_ATOMIC("D71 doesn't support ROT90 for WB-AFBC.\n"); + return false; + } + + return true; +} + static void d71_init_fmt_tbl(struct komeda_dev *mdev) { struct komeda_format_caps_table *table = &mdev->fmt_tbl; table->format_caps = d71_format_caps_table; + table->format_mod_supported = d71_format_mod_supported; table->n_formats = ARRAY_SIZE(d71_format_caps_table); } diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_format_caps.c b/drivers/gpu/drm/arm/display/komeda/komeda_format_caps.c index b219514..cd4d9f5 100644 --- a/drivers/gpu/drm/arm/display/komeda/komeda_format_caps.c +++ b/drivers/gpu/drm/arm/display/komeda/komeda_format_caps.c @@ -74,7 +74,8 @@ }; bool komeda_format_mod_supported(struct komeda_format_caps_table *table, - u32 layer_type, u32 fourcc, u64 modifier) + u32 layer_type, u32 fourcc, u64 modifier, + u32 rot) { const struct komeda_format_caps *caps; @@ -85,6 +86,10 @@ bool komeda_format_mod_supported(struct komeda_format_caps_table *table, if (!(caps->supported_layer_types & layer_type)) return false; + if (table->format_mod_supported) + return table->format_mod_supported(caps, layer_type, modifier, + rot); + return true; } diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_format_caps.h b/drivers/gpu/drm/arm/display/komeda/komeda_format_caps.h index 96de22e..381e873 100644 --- a/drivers/gpu/drm/arm/display/komeda/komeda_format_caps.h +++ b/drivers/gpu/drm/arm/display/komeda/komeda_format_caps.h @@ -71,10 +71,15 @@ struct komeda_format_caps { * * @n_formats: the size of format_caps list. * @format_caps: format_caps list. + * @format_mod_supported: Optional. Some HW may have special requirements or + * limitations which can not be described by format_caps, this func supply HW + * the ability to do the further HW specific check. */ struct komeda_format_caps_table { u32 n_formats; const struct komeda_format_caps *format_caps; + bool (*format_mod_supported)(const struct komeda_format_caps *caps, + u32 layer_type, u64 modifier, u32 rot); }; extern u64 komeda_supported_modifiers[]; @@ -100,6 +105,7 @@ u32 *komeda_get_layer_fourcc_list(struct komeda_format_caps_table *table, void komeda_put_fourcc_list(u32 *fourcc_list); bool komeda_format_mod_supported(struct komeda_format_caps_table *table, - u32 layer_type, u32 fourcc, u64 modifier); + u32 layer_type, u32 fourcc, u64 modifier, + u32 rot); #endif diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c b/drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c index d0e713a..5f63dec 100644 --- a/drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c +++ b/drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c @@ -240,20 +240,20 @@ struct drm_framebuffer * } /* if the fb can be supported by a specific layer */ -bool komeda_fb_is_layer_supported(struct komeda_fb *kfb, u32 layer_type) +bool komeda_fb_is_layer_supported(struct komeda_fb *kfb, u32 layer_type, + u32 rot) { struct drm_framebuffer *fb = &kfb->base; struct komeda_dev *mdev = fb->dev->dev_private; - const struct komeda_format_caps *caps; u32 fourcc = fb->format->format; u64 modifier = fb->modifier; + bool supported; - caps = komeda_get_format_caps(&mdev->fmt_tbl, fourcc, modifier); - if (!caps) - return false; + supported = komeda_format_mod_supported(&mdev->fmt_tbl, layer_type, + fourcc, modifier, rot); + if (!supported) + DRM_DEBUG_ATOMIC("Layer TYPE: %d doesn't support fb FMT: %s.\n", + layer_type, komeda_get_format_name(fourcc, modifier)); - if (!(caps->supported_layer_types & layer_type)) - return false; - - return true; + return supported; } diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.h b/drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.h index e3bab0d..6cbb2f6 100644 --- a/drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.h +++ b/drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.h @@ -35,9 +35,10 @@ struct komeda_fb { struct drm_framebuffer * komeda_fb_create(struct drm_device *dev, struct drm_file *file, - const struct drm_mode_fb_cmd2 *mode_cmd); + const struct drm_mode_fb_cmd2 *mode_cmd); dma_addr_t komeda_fb_get_pixel_addr(struct komeda_fb *kfb, int x, int y, int plane); -bool komeda_fb_is_layer_supported(struct komeda_fb *kfb, u32 layer_type); +bool komeda_fb_is_layer_supported(struct komeda_fb *kfb, u32 layer_type, + u32 rot); #endif diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c b/drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c index 34737c0..042d4d7 100644 --- a/drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c +++ b/drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c @@ -274,6 +274,11 @@ struct komeda_pipeline_state * struct komeda_plane_state *kplane_st, struct komeda_data_flow_cfg *dflow) { + struct komeda_fb *kfb = to_kfb(kplane_st->base.fb); + + if (!komeda_fb_is_layer_supported(kfb, layer->layer_type, dflow->rot)) + return -EINVAL; + if (!in_range(&layer->hsize_in, dflow->in_w)) { DRM_DEBUG_ATOMIC("src_w: %d is out of range.\n", dflow->in_w); return -EINVAL; @@ -359,7 +364,8 @@ struct komeda_pipeline_state * struct komeda_layer_state *st; int i; - if (!komeda_fb_is_layer_supported(kfb, wb_layer->layer_type)) + if (!komeda_fb_is_layer_supported(kfb, wb_layer->layer_type, + dflow->rot)) return -EINVAL; c_st = komeda_component_get_state_and_set_user(&wb_layer->base, diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_plane.c b/drivers/gpu/drm/arm/display/komeda/komeda_plane.c index c9f37ff..798ee24 100644 --- a/drivers/gpu/drm/arm/display/komeda/komeda_plane.c +++ b/drivers/gpu/drm/arm/display/komeda/komeda_plane.c @@ -216,7 +216,7 @@ static void komeda_plane_reset(struct drm_plane *plane) u32 layer_type = kplane->layer->layer_type; return komeda_format_mod_supported(&mdev->fmt_tbl, layer_type, - format, modifier); + format, modifier, 0); } static const struct drm_plane_funcs komeda_plane_funcs = {