From patchwork Thu Jun 6 01:02:47 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 10978161 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id EBB4114E5 for ; Thu, 6 Jun 2019 01:03:09 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id DA09220881 for ; Thu, 6 Jun 2019 01:03:09 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id CE19828714; Thu, 6 Jun 2019 01:03:09 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7802C20881 for ; Thu, 6 Jun 2019 01:03:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726757AbfFFBDJ (ORCPT ); Wed, 5 Jun 2019 21:03:09 -0400 Received: from mail-pf1-f196.google.com ([209.85.210.196]:36499 "EHLO mail-pf1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726668AbfFFBCy (ORCPT ); Wed, 5 Jun 2019 21:02:54 -0400 Received: by mail-pf1-f196.google.com with SMTP id u22so389236pfm.3 for ; Wed, 05 Jun 2019 18:02:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=CVfY2rC28TUuJiq3uH1wJEhWN7/kC8yOQdwb0MYva/0=; b=p3A3rKuHCefXZWN7fWg4nX9E9dn1cL6KkVkiCyfgemW5z+YDAhDOOzLE2Wt6m3AywB PPWMt5gnn/3cS9b7n/IXqu8mD7tivfsbbGAs0NR1j1euURvrjyAtcN4QZi7A1zWxGAiV gpW2Anv4nHlPa0Z3Ft+nrox4RKEBmzlDe/09UkdUe8lfykT+C+KtqejLv/AlZdNxkt5G V0WX9bxKce6MZXbfnI4TbzUmgHfGxEspgmrh1PHamE+fBA1nkxZZ5ZetzV4VZEQAAydg oGtS0ZFd59yPQU/2+Q3okeTDPCVMUbDg3+PSBxlm9T0qVZNZ05tfFoIikARM3Tc2NUpp zq9g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=CVfY2rC28TUuJiq3uH1wJEhWN7/kC8yOQdwb0MYva/0=; b=QaJ7ZF6SLDjbJFKk5dU6+btv/kmmHgZBpmaqpQWGP8G0S4zrlNUhj3OTUZPzzoYIVR NVIEs/pcRfwaM1mqV6iaZL0Id7PtTzoCHfCe1e87rIhZi9zL9kYNSdIm7kEkeKwHj2tp JSZzt7oN0csM1oB7L7zW5TqwKHrs2aSzlcxaF24UM2VCyO9S5+yZVPcfIj6EAogr98zU fGADXXjgJvtf7ooNwgB8mGWcWeFziTN8ofQPdP7BLovdWRfTDzHTMIQPpAMT+Vs683hD 61jsMNn8LIOZN2WsFKxRCl60X4Ew041qL/YNGETeaU2FFTbpv70R0PjNXuOR0gRcq0Zc Ij1g== X-Gm-Message-State: APjAAAU+XyYFsDOYJy02WdKS/jxhUbmHf9lyd+ljKGO3b2dfcoLQwec4 PCNYs+zkrIcKl99c0MC2XQEWLg== X-Google-Smtp-Source: APXvYqyCypg6oVvwk6Ue9xlyaT78SEVJA7D+c9VA4Krrku8TKMD49Au/WSck38jKYsQVj/zgTSIYMg== X-Received: by 2002:a62:ce07:: with SMTP id y7mr22987027pfg.12.1559782974090; Wed, 05 Jun 2019 18:02:54 -0700 (PDT) Received: from localhost.localdomain (104-188-17-28.lightspeed.sndgca.sbcglobal.net. [104.188.17.28]) by smtp.gmail.com with ESMTPSA id 144sm170856pfy.54.2019.06.05.18.02.52 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 05 Jun 2019 18:02:53 -0700 (PDT) From: Bjorn Andersson To: Linus Walleij , Rob Herring Cc: Andy Gross , Mark Rutland , Alim Akhtar , Avri Altman , Pedro Sousa , "James E.J. Bottomley" , "Martin K. Petersen" , Evan Green , linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-scsi@vger.kernel.org Subject: [PATCH v2 1/3] pinctrl: qcom: sdm845: Expose ufs_reset as gpio Date: Wed, 5 Jun 2019 18:02:47 -0700 Message-Id: <20190606010249.3538-2-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20190606010249.3538-1-bjorn.andersson@linaro.org> References: <20190606010249.3538-1-bjorn.andersson@linaro.org> Sender: linux-scsi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The ufs_reset pin is expected to be wired to the reset pin of the primary UFS memory but is pretty much just a general purpose output pinr Reorder the pins and expose it as gpio 150, so that the UFS driver can toggle it. Tested-by: John Stultz Signed-off-by: Bjorn Andersson --- Changes since v1: - None .../bindings/pinctrl/qcom,sdm845-pinctrl.txt | 2 +- drivers/pinctrl/qcom/pinctrl-sdm845.c | 12 ++++++------ 2 files changed, 7 insertions(+), 7 deletions(-) diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.txt index 321bdb9be0d2..7462e3743c68 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.txt +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.txt @@ -79,7 +79,7 @@ to specify in a pin configuration subnode: gpio0-gpio149 Supports mux, bias and drive-strength - sdc2_clk, sdc2_cmd, sdc2_data + sdc2_clk, sdc2_cmd, sdc2_data, ufs_reset Supports bias and drive-strength - function: diff --git a/drivers/pinctrl/qcom/pinctrl-sdm845.c b/drivers/pinctrl/qcom/pinctrl-sdm845.c index c97f20fca5fd..e4e5acade086 100644 --- a/drivers/pinctrl/qcom/pinctrl-sdm845.c +++ b/drivers/pinctrl/qcom/pinctrl-sdm845.c @@ -420,10 +420,10 @@ DECLARE_MSM_GPIO_PINS(147); DECLARE_MSM_GPIO_PINS(148); DECLARE_MSM_GPIO_PINS(149); -static const unsigned int sdc2_clk_pins[] = { 150 }; -static const unsigned int sdc2_cmd_pins[] = { 151 }; -static const unsigned int sdc2_data_pins[] = { 152 }; -static const unsigned int ufs_reset_pins[] = { 153 }; +static const unsigned int ufs_reset_pins[] = { 150 }; +static const unsigned int sdc2_clk_pins[] = { 151 }; +static const unsigned int sdc2_cmd_pins[] = { 152 }; +static const unsigned int sdc2_data_pins[] = { 153 }; enum sdm845_functions { msm_mux_gpio, @@ -1271,10 +1271,10 @@ static const struct msm_pingroup sdm845_groups[] = { PINGROUP(147, NORTH, _, _, _, _, _, _, _, _, _, _), PINGROUP(148, NORTH, _, _, _, _, _, _, _, _, _, _), PINGROUP(149, NORTH, _, _, _, _, _, _, _, _, _, _), + UFS_RESET(ufs_reset, 0x99f000), SDC_QDSD_PINGROUP(sdc2_clk, 0x99a000, 14, 6), SDC_QDSD_PINGROUP(sdc2_cmd, 0x99a000, 11, 3), SDC_QDSD_PINGROUP(sdc2_data, 0x99a000, 9, 0), - UFS_RESET(ufs_reset, 0x99f000), }; static const struct msm_pinctrl_soc_data sdm845_pinctrl = { @@ -1284,7 +1284,7 @@ static const struct msm_pinctrl_soc_data sdm845_pinctrl = { .nfunctions = ARRAY_SIZE(sdm845_functions), .groups = sdm845_groups, .ngroups = ARRAY_SIZE(sdm845_groups), - .ngpios = 150, + .ngpios = 151, }; static int sdm845_pinctrl_probe(struct platform_device *pdev) From patchwork Thu Jun 6 01:02:48 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 10978159 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 4F2CA76 for ; Thu, 6 Jun 2019 01:03:09 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3DFD620881 for ; Thu, 6 Jun 2019 01:03:09 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 3259528714; Thu, 6 Jun 2019 01:03:09 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3C8D420881 for ; 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[104.188.17.28]) by smtp.gmail.com with ESMTPSA id 144sm170856pfy.54.2019.06.05.18.02.54 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 05 Jun 2019 18:02:54 -0700 (PDT) From: Bjorn Andersson To: Rob Herring , Mark Rutland , Alim Akhtar , Avri Altman , Pedro Sousa , "James E.J. Bottomley" , "Martin K. Petersen" Cc: Andy Gross , Linus Walleij , Evan Green , linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-scsi@vger.kernel.org Subject: [PATCH v2 2/3] scsi: ufs: Allow resetting the UFS device Date: Wed, 5 Jun 2019 18:02:48 -0700 Message-Id: <20190606010249.3538-3-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20190606010249.3538-1-bjorn.andersson@linaro.org> References: <20190606010249.3538-1-bjorn.andersson@linaro.org> Sender: linux-scsi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Acquire the device-reset GPIO and toggle this to reset the UFS device during initialization and host reset. Based on downstream support implemented by Subhash Jadavani . Tested-by: John Stultz Signed-off-by: Bjorn Andersson Reviewed-by: Linus Walleij --- Changes since v1: - Added gpio to DT binding document - Fixed spelling of UFS .../devicetree/bindings/ufs/ufshcd-pltfrm.txt | 2 + drivers/scsi/ufs/ufshcd.c | 44 +++++++++++++++++++ drivers/scsi/ufs/ufshcd.h | 4 ++ 3 files changed, 50 insertions(+) diff --git a/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt b/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt index a74720486ee2..d562d8b4919c 100644 --- a/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt +++ b/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt @@ -54,6 +54,8 @@ Optional properties: PHY reset from the UFS controller. - resets : reset node register - reset-names : describe reset node register, the "rst" corresponds to reset the whole UFS IP. +- device-reset-gpios : A phandle and gpio specifier denoting the GPIO connected + to the RESET pin of the UFS memory device. Note: If above properties are not defined it can be assumed that the supply regulators or clocks are always on. diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c index a208589426b1..eaa384d67684 100644 --- a/drivers/scsi/ufs/ufshcd.c +++ b/drivers/scsi/ufs/ufshcd.c @@ -42,6 +42,7 @@ #include #include #include +#include #include "ufshcd.h" #include "ufs_quirks.h" #include "unipro.h" @@ -6135,6 +6136,25 @@ static int ufshcd_abort(struct scsi_cmnd *cmd) return err; } +/** + * ufshcd_device_reset() - toggle the (optional) device reset line + * @hba: per-adapter instance + * + * Toggles the (optional) reset line to reset the attached device. + */ +static void ufshcd_device_reset(struct ufs_hba *hba) +{ + /* + * The UFS device shall detect reset pulses of 1us, sleep for 10us to + * be on the safe side. + */ + gpiod_set_value_cansleep(hba->device_reset, 1); + usleep_range(10, 15); + + gpiod_set_value_cansleep(hba->device_reset, 0); + usleep_range(10, 15); +} + /** * ufshcd_host_reset_and_restore - reset and restore host controller * @hba: per-adapter instance @@ -6190,6 +6210,9 @@ static int ufshcd_reset_and_restore(struct ufs_hba *hba) int retries = MAX_HOST_RESET_RETRIES; do { + /* Reset the attached device */ + ufshcd_device_reset(hba); + err = ufshcd_host_reset_and_restore(hba); } while (err && --retries); @@ -7386,6 +7409,18 @@ static void ufshcd_variant_hba_exit(struct ufs_hba *hba) ufshcd_vops_exit(hba); } +static int ufshcd_init_device_reset(struct ufs_hba *hba) +{ + hba->device_reset = devm_gpiod_get_optional(hba->dev, "device-reset", + GPIOD_OUT_HIGH); + if (IS_ERR(hba->device_reset)) { + dev_err(hba->dev, "failed to acquire reset gpio: %ld\n", + PTR_ERR(hba->device_reset)); + } + + return PTR_ERR_OR_ZERO(hba->device_reset); +} + static int ufshcd_hba_init(struct ufs_hba *hba) { int err; @@ -7425,9 +7460,15 @@ static int ufshcd_hba_init(struct ufs_hba *hba) if (err) goto out_disable_vreg; + err = ufshcd_init_device_reset(hba); + if (err) + goto out_disable_variant; + hba->is_powered = true; goto out; +out_disable_variant: + ufshcd_vops_setup_regulators(hba, false); out_disable_vreg: ufshcd_setup_vreg(hba, false); out_disable_clks: @@ -8321,6 +8362,9 @@ int ufshcd_init(struct ufs_hba *hba, void __iomem *mmio_base, unsigned int irq) goto exit_gating; } + /* Reset the attached device */ + ufshcd_device_reset(hba); + /* Host controller enable */ err = ufshcd_hba_enable(hba); if (err) { diff --git a/drivers/scsi/ufs/ufshcd.h b/drivers/scsi/ufs/ufshcd.h index 994d73d03207..4443928ba7d2 100644 --- a/drivers/scsi/ufs/ufshcd.h +++ b/drivers/scsi/ufs/ufshcd.h @@ -72,6 +72,8 @@ #define UFSHCD "ufshcd" #define UFSHCD_DRIVER_VERSION "0.2" +struct gpio_desc; + struct ufs_hba; enum dev_cmd_type { @@ -706,6 +708,8 @@ struct ufs_hba { struct device bsg_dev; struct request_queue *bsg_queue; + + struct gpio_desc *device_reset; }; /* Returns true if clocks can be gated. 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[104.188.17.28]) by smtp.gmail.com with ESMTPSA id 144sm170856pfy.54.2019.06.05.18.02.55 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 05 Jun 2019 18:02:56 -0700 (PDT) From: Bjorn Andersson To: Andy Gross Cc: Linus Walleij , Rob Herring , Mark Rutland , Alim Akhtar , Avri Altman , Pedro Sousa , "James E.J. Bottomley" , "Martin K. Petersen" , Evan Green , linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-scsi@vger.kernel.org Subject: [PATCH v2 3/3] arm64: dts: qcom: sdm845-mtp: Specify UFS device-reset GPIO Date: Wed, 5 Jun 2019 18:02:49 -0700 Message-Id: <20190606010249.3538-4-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20190606010249.3538-1-bjorn.andersson@linaro.org> References: <20190606010249.3538-1-bjorn.andersson@linaro.org> Sender: linux-scsi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Specify the UFS device-reset gpio, so that the controller will issue a reset of the UFS device. Tested-by: John Stultz Signed-off-by: Bjorn Andersson --- Changes since v1: - None arch/arm64/boot/dts/qcom/sdm845-mtp.dts | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm845-mtp.dts b/arch/arm64/boot/dts/qcom/sdm845-mtp.dts index 2e78638eb73b..d116a0956a9c 100644 --- a/arch/arm64/boot/dts/qcom/sdm845-mtp.dts +++ b/arch/arm64/boot/dts/qcom/sdm845-mtp.dts @@ -388,6 +388,8 @@ &ufs_mem_hc { status = "okay"; + device-reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>; + vcc-supply = <&vreg_l20a_2p95>; vcc-max-microamp = <600000>; };