From patchwork Fri Jun 7 09:22:20 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Roger_Pau_Monn=C3=A9?= X-Patchwork-Id: 10981161 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id BD1B814E5 for ; Fri, 7 Jun 2019 09:24:28 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A954727D0E for ; Fri, 7 Jun 2019 09:24:28 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 98AD628B00; Fri, 7 Jun 2019 09:24:28 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id D599C27D0E for ; Fri, 7 Jun 2019 09:24:27 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1hZB5Q-0002Tr-U6; Fri, 07 Jun 2019 09:23:00 +0000 Received: from us1-rack-dfw2.inumbo.com ([104.130.134.6]) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1hZB5Q-0002Tj-6W for xen-devel@lists.xenproject.org; Fri, 07 Jun 2019 09:23:00 +0000 X-Inumbo-ID: d6ae130e-8905-11e9-8980-bc764e045a96 Received: from esa5.hc3370-68.iphmx.com (unknown [216.71.155.168]) by us1-rack-dfw2.inumbo.com (Halon) with ESMTPS id d6ae130e-8905-11e9-8980-bc764e045a96; Fri, 07 Jun 2019 09:22:58 +0000 (UTC) Authentication-Results: esa5.hc3370-68.iphmx.com; dkim=none (message not signed) header.i=none; spf=None smtp.pra=roger.pau@citrix.com; spf=SoftFail smtp.mailfrom=roger.pau@citrix.com; spf=None smtp.helo=postmaster@mail.citrix.com Received-SPF: None (esa5.hc3370-68.iphmx.com: no sender authenticity information available from domain of roger.pau@citrix.com) identity=pra; client-ip=162.221.158.21; receiver=esa5.hc3370-68.iphmx.com; envelope-from="roger.pau@citrix.com"; x-sender="roger.pau@citrix.com"; x-conformance=sidf_compatible Received-SPF: SoftFail (esa5.hc3370-68.iphmx.com: domain of roger.pau@citrix.com is inclined to not designate 162.221.158.21 as permitted sender) identity=mailfrom; client-ip=162.221.158.21; receiver=esa5.hc3370-68.iphmx.com; envelope-from="roger.pau@citrix.com"; x-sender="roger.pau@citrix.com"; x-conformance=sidf_compatible; x-record-type="v=spf1"; x-record-text="v=spf1 include:spf.citrix.com include:spf2.citrix.com include:ironport.citrix.com exists:%{i}._spf.mta.salesforce.com ~all" Received-SPF: None (esa5.hc3370-68.iphmx.com: no sender authenticity information available from domain of postmaster@mail.citrix.com) identity=helo; client-ip=162.221.158.21; receiver=esa5.hc3370-68.iphmx.com; envelope-from="roger.pau@citrix.com"; x-sender="postmaster@mail.citrix.com"; x-conformance=sidf_compatible IronPort-SDR: ll9lJCIqYM+ZVsevPBfJIS5/2lhR5QhKPOCyGTQwfO1+fY2AYpS6HemO+PVLa3gjSLZ2NaROQN QNaQyJCc6JRoF1YQ3oraDPkUytob8rkeOfv5oa2+twI2+5hRTp3HDrPgn4Yr5DfHvJjiSA+o4T hM4Vsp/rKp9oM8n6k6mDe0LmOBPJH/dDzzI8yz0/3fLsHN1e0bm/IQ14r3nFrM/N8Xdifv/2xx NwFQ1WOVdoG2KGKJFfGlxS73E9TtPAiO/GhXO4HRz1zrbIAkrfOQql1+yaAzt/EAQ9MEkmOG6w FOA= X-SBRS: -0.9 X-MesageID: 1419199 X-Ironport-Server: esa5.hc3370-68.iphmx.com X-Remote-IP: 162.221.158.21 X-Policy: $RELAYED X-IronPort-AV: E=Sophos;i="5.63,562,1557201600"; d="scan'208";a="1419199" From: Roger Pau Monne To: Date: Fri, 7 Jun 2019 11:22:20 +0200 Message-ID: <20190607092232.83179-2-roger.pau@citrix.com> X-Mailer: git-send-email 2.20.1 (Apple Git-117) In-Reply-To: <20190607092232.83179-1-roger.pau@citrix.com> References: <20190607092232.83179-1-roger.pau@citrix.com> MIME-Version: 1.0 Subject: [Xen-devel] [PATCH v3 01/13] pci: rename func field to fn X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Stefano Stabellini , Wei Liu , Konrad Rzeszutek Wilk , George Dunlap , Andrew Cooper , Ian Jackson , Tim Deegan , Julien Grall , Paul Durrant , Jan Beulich , Roger Pau Monne Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP In preparation for adding a devfn field. This makes the naming more consistent, as the devfn field encloses both the dev and the fn fields. No functional change intended. Requested-by: Paul Durrant Signed-off-by: Roger Pau Monné Reviewed-by: Paul Durrant Acked-by: Jan Beulich --- Cc: Jan Beulich Cc: Andrew Cooper Cc: George Dunlap Cc: Ian Jackson Cc: Julien Grall Cc: Konrad Rzeszutek Wilk Cc: Stefano Stabellini Cc: Tim Deegan Cc: Wei Liu --- Changes since v2: - New in this version. --- xen/drivers/passthrough/pci.c | 18 +++++++++--------- xen/drivers/vpci/vpci.c | 28 ++++++++++++++-------------- xen/include/xen/pci.h | 2 +- 3 files changed, 24 insertions(+), 24 deletions(-) diff --git a/xen/drivers/passthrough/pci.c b/xen/drivers/passthrough/pci.c index 20bfa971a9..535c7e511b 100644 --- a/xen/drivers/passthrough/pci.c +++ b/xen/drivers/passthrough/pci.c @@ -644,7 +644,7 @@ unsigned int pci_size_mem_bar(pci_sbdf_t sbdf, unsigned int pos, unsigned int flags) { uint32_t hi = 0, bar = pci_conf_read32(sbdf.seg, sbdf.bus, sbdf.dev, - sbdf.func, pos); + sbdf.fn, pos); uint64_t size; bool is64bits = !(flags & PCI_BAR_ROM) && (bar & PCI_BASE_ADDRESS_MEM_TYPE_MASK) == PCI_BASE_ADDRESS_MEM_TYPE_64; @@ -654,7 +654,7 @@ unsigned int pci_size_mem_bar(pci_sbdf_t sbdf, unsigned int pos, ASSERT(!((flags & PCI_BAR_VF) && (flags & PCI_BAR_ROM))); ASSERT((flags & PCI_BAR_ROM) || (bar & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_MEMORY); - pci_conf_write32(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.func, pos, ~0); + pci_conf_write32(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.fn, pos, ~0); if ( is64bits ) { if ( flags & PCI_BAR_LAST ) @@ -662,24 +662,24 @@ unsigned int pci_size_mem_bar(pci_sbdf_t sbdf, unsigned int pos, printk(XENLOG_WARNING "%sdevice %04x:%02x:%02x.%u with 64-bit %sBAR in last slot\n", (flags & PCI_BAR_VF) ? "SR-IOV " : "", sbdf.seg, sbdf.bus, - sbdf.dev, sbdf.func, (flags & PCI_BAR_VF) ? "vf " : ""); + sbdf.dev, sbdf.fn, (flags & PCI_BAR_VF) ? "vf " : ""); *psize = 0; return 1; } - hi = pci_conf_read32(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.func, pos + 4); - pci_conf_write32(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.func, pos + 4, ~0); + hi = pci_conf_read32(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.fn, pos + 4); + pci_conf_write32(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.fn, pos + 4, ~0); } - size = pci_conf_read32(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.func, + size = pci_conf_read32(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.fn, pos) & mask; if ( is64bits ) { size |= (uint64_t)pci_conf_read32(sbdf.seg, sbdf.bus, sbdf.dev, - sbdf.func, pos + 4) << 32; - pci_conf_write32(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.func, pos + 4, hi); + sbdf.fn, pos + 4) << 32; + pci_conf_write32(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.fn, pos + 4, hi); } else if ( size ) size |= (uint64_t)~0 << 32; - pci_conf_write32(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.func, pos, bar); + pci_conf_write32(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.fn, pos, bar); size = -size; if ( paddr ) diff --git a/xen/drivers/vpci/vpci.c b/xen/drivers/vpci/vpci.c index 82607bdb9a..b03232fe30 100644 --- a/xen/drivers/vpci/vpci.c +++ b/xen/drivers/vpci/vpci.c @@ -212,7 +212,7 @@ static uint32_t vpci_read_hw(pci_sbdf_t sbdf, unsigned int reg, switch ( size ) { case 4: - data = pci_conf_read32(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.func, reg); + data = pci_conf_read32(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.fn, reg); break; case 3: @@ -222,26 +222,26 @@ static uint32_t vpci_read_hw(pci_sbdf_t sbdf, unsigned int reg, */ if ( reg & 1 ) { - data = pci_conf_read8(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.func, + data = pci_conf_read8(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.fn, reg); - data |= pci_conf_read16(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.func, + data |= pci_conf_read16(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.fn, reg + 1) << 8; } else { - data = pci_conf_read16(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.func, + data = pci_conf_read16(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.fn, reg); - data |= pci_conf_read8(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.func, + data |= pci_conf_read8(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.fn, reg + 2) << 16; } break; case 2: - data = pci_conf_read16(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.func, reg); + data = pci_conf_read16(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.fn, reg); break; case 1: - data = pci_conf_read8(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.func, reg); + data = pci_conf_read8(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.fn, reg); break; default: @@ -259,7 +259,7 @@ static void vpci_write_hw(pci_sbdf_t sbdf, unsigned int reg, unsigned int size, switch ( size ) { case 4: - pci_conf_write32(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.func, reg, data); + pci_conf_write32(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.fn, reg, data); break; case 3: @@ -269,26 +269,26 @@ static void vpci_write_hw(pci_sbdf_t sbdf, unsigned int reg, unsigned int size, */ if ( reg & 1 ) { - pci_conf_write8(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.func, reg, + pci_conf_write8(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.fn, reg, data); - pci_conf_write16(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.func, reg + 1, + pci_conf_write16(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.fn, reg + 1, data >> 8); } else { - pci_conf_write16(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.func, reg, + pci_conf_write16(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.fn, reg, data); - pci_conf_write8(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.func, reg + 2, + pci_conf_write8(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.fn, reg + 2, data >> 16); } break; case 2: - pci_conf_write16(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.func, reg, data); + pci_conf_write16(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.fn, reg, data); break; case 1: - pci_conf_write8(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.func, reg, data); + pci_conf_write8(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.fn, reg, data); break; default: diff --git a/xen/include/xen/pci.h b/xen/include/xen/pci.h index 53f50d89e7..dab1a86dd4 100644 --- a/xen/include/xen/pci.h +++ b/xen/include/xen/pci.h @@ -46,7 +46,7 @@ typedef union { struct { union { struct { - uint8_t func : 3, + uint8_t fn : 3, dev : 5; }; uint8_t extfunc; From patchwork Fri Jun 7 09:22:21 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Roger_Pau_Monn=C3=A9?= X-Patchwork-Id: 10981169 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id DEFEB1515 for ; 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d="scan'208";a="1440968" From: Roger Pau Monne To: Date: Fri, 7 Jun 2019 11:22:21 +0200 Message-ID: <20190607092232.83179-3-roger.pau@citrix.com> X-Mailer: git-send-email 2.20.1 (Apple Git-117) In-Reply-To: <20190607092232.83179-1-roger.pau@citrix.com> References: <20190607092232.83179-1-roger.pau@citrix.com> MIME-Version: 1.0 Subject: [Xen-devel] [PATCH v3 02/13] pci: introduce a devfn field to pci_sbdf_t X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Stefano Stabellini , Wei Liu , Konrad Rzeszutek Wilk , George Dunlap , Andrew Cooper , Ian Jackson , Tim Deegan , Julien Grall , Jan Beulich , Roger Pau Monne Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP This is equivalent to the current extfunc field in term of contents. Switch the two current users of extfunc to use devfn instead for correctness. No functional change. Requested-by: Jan Beulich Signed-off-by: Roger Pau Monné Reviewed-by: Paul Durrant Acked-by: Jan Beulich --- Cc: Andrew Cooper Cc: George Dunlap Cc: Ian Jackson Cc: Jan Beulich Cc: Julien Grall Cc: Konrad Rzeszutek Wilk Cc: Stefano Stabellini Cc: Tim Deegan Cc: Wei Liu --- Changes since v2: - Switch declaration order of the devfn and extfunc fields. Changes since v1: - New in this version. --- xen/drivers/vpci/vpci.c | 4 ++-- xen/include/xen/pci.h | 3 ++- 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/xen/drivers/vpci/vpci.c b/xen/drivers/vpci/vpci.c index b03232fe30..ca598675ea 100644 --- a/xen/drivers/vpci/vpci.c +++ b/xen/drivers/vpci/vpci.c @@ -327,7 +327,7 @@ uint32_t vpci_read(pci_sbdf_t sbdf, unsigned int reg, unsigned int size) } /* Find the PCI dev matching the address. */ - pdev = pci_get_pdev_by_domain(d, sbdf.seg, sbdf.bus, sbdf.extfunc); + pdev = pci_get_pdev_by_domain(d, sbdf.seg, sbdf.bus, sbdf.devfn); if ( !pdev ) return vpci_read_hw(sbdf, reg, size); @@ -432,7 +432,7 @@ void vpci_write(pci_sbdf_t sbdf, unsigned int reg, unsigned int size, * Find the PCI dev matching the address. * Passthrough everything that's not trapped. */ - pdev = pci_get_pdev_by_domain(d, sbdf.seg, sbdf.bus, sbdf.extfunc); + pdev = pci_get_pdev_by_domain(d, sbdf.seg, sbdf.bus, sbdf.devfn); if ( !pdev ) { vpci_write_hw(sbdf, reg, size, data); diff --git a/xen/include/xen/pci.h b/xen/include/xen/pci.h index dab1a86dd4..c61fd7e262 100644 --- a/xen/include/xen/pci.h +++ b/xen/include/xen/pci.h @@ -49,7 +49,8 @@ typedef union { uint8_t fn : 3, dev : 5; }; - uint8_t extfunc; + uint8_t devfn, + extfunc; }; uint8_t bus; }; From patchwork Fri Jun 7 09:22:22 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Roger_Pau_Monn=C3=A9?= X-Patchwork-Id: 10981163 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 1E9F714E5 for ; Fri, 7 Jun 2019 09:24:34 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0C36C27D0E for ; Fri, 7 Jun 2019 09:24:34 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id F2C3428B00; Fri, 7 Jun 2019 09:24:33 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 8CA7127D0E for ; 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client-ip=162.221.158.21; receiver=esa2.hc3370-68.iphmx.com; envelope-from="roger.pau@citrix.com"; x-sender="roger.pau@citrix.com"; x-conformance=sidf_compatible Received-SPF: SoftFail (esa2.hc3370-68.iphmx.com: domain of roger.pau@citrix.com is inclined to not designate 162.221.158.21 as permitted sender) identity=mailfrom; client-ip=162.221.158.21; receiver=esa2.hc3370-68.iphmx.com; envelope-from="roger.pau@citrix.com"; x-sender="roger.pau@citrix.com"; x-conformance=sidf_compatible; x-record-type="v=spf1"; x-record-text="v=spf1 include:spf.citrix.com include:spf2.citrix.com include:ironport.citrix.com exists:%{i}._spf.mta.salesforce.com ~all" Received-SPF: None (esa2.hc3370-68.iphmx.com: no sender authenticity information available from domain of postmaster@mail.citrix.com) identity=helo; client-ip=162.221.158.21; receiver=esa2.hc3370-68.iphmx.com; envelope-from="roger.pau@citrix.com"; x-sender="postmaster@mail.citrix.com"; x-conformance=sidf_compatible IronPort-SDR: 57GmUDpFdwVTLah8OcNAhYP46KoPEK4x0g5OnmAxMn3PgJG+wif4XLunWLt42veJa+c1OZutxF nzlrwhYM0fBV17Fae3V4jtzIWSwBzT+xvF4YmsoLCSD5PIxqVSm2jFR0fzqhMUl9obxMhGChqK 7zLtGMTCyg+7emLvYe5FtzKS/hscu36d5d1LAMYBxF+O8+7jYqx7gOQJkFQcz9Ckl9D+OjQ5k7 BaQ0tiCGR+weFYtGPP3nyU3OPiRiGAvtZpTMg8Z00Nxjt/My8BHeGHd2wjOdaUWSbdoh5kMZxz aw4= X-SBRS: -0.9 X-MesageID: 1438394 X-Ironport-Server: esa2.hc3370-68.iphmx.com X-Remote-IP: 162.221.158.21 X-Policy: $RELAYED X-IronPort-AV: E=Sophos;i="5.63,562,1557201600"; d="scan'208";a="1438394" From: Roger Pau Monne To: Date: Fri, 7 Jun 2019 11:22:22 +0200 Message-ID: <20190607092232.83179-4-roger.pau@citrix.com> X-Mailer: git-send-email 2.20.1 (Apple Git-117) In-Reply-To: <20190607092232.83179-1-roger.pau@citrix.com> References: <20190607092232.83179-1-roger.pau@citrix.com> MIME-Version: 1.0 Subject: [Xen-devel] [PATCH v3 03/13] pci: introduce a pci_sbdf_t field to pci_dev X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Stefano Stabellini , Wei Liu , Konrad Rzeszutek Wilk , George Dunlap , Andrew Cooper , Ian Jackson , Tim Deegan , Julien Grall , Paul Durrant , Jan Beulich , Roger Pau Monne Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP And use an union with the current seg, bus and devfn fields to make fields point to the same underlying data. No functional change. Suggested-by: Jan Beulich Signed-off-by: Roger Pau Monné Reviewed-by: Paul Durrant Acked-by: Jan Beulich --- Changes since v2: - Constify the union instead of each individual field. --- Cc: Andrew Cooper Cc: George Dunlap Cc: Ian Jackson Cc: Jan Beulich Cc: Julien Grall Cc: Konrad Rzeszutek Wilk Cc: Stefano Stabellini Cc: Tim Deegan Cc: Wei Liu --- xen/drivers/vpci/header.c | 7 ++----- xen/include/xen/pci.h | 12 +++++++++--- 2 files changed, 11 insertions(+), 8 deletions(-) diff --git a/xen/drivers/vpci/header.c b/xen/drivers/vpci/header.c index 94094f5579..258b91deed 100644 --- a/xen/drivers/vpci/header.c +++ b/xen/drivers/vpci/header.c @@ -461,9 +461,6 @@ static int init_bars(struct pci_dev *pdev) unsigned int i, num_bars, rom_reg; struct vpci_header *header = &pdev->vpci->header; struct vpci_bar *bars = header->bars; - pci_sbdf_t sbdf = { - .sbdf = PCI_SBDF3(pdev->seg, pdev->bus, pdev->devfn), - }; int rc; switch ( pci_conf_read8(pdev->seg, pdev->bus, slot, func, PCI_HEADER_TYPE) @@ -530,7 +527,7 @@ static int init_bars(struct pci_dev *pdev) else bars[i].type = VPCI_BAR_MEM32; - rc = pci_size_mem_bar(sbdf, reg, &addr, &size, + rc = pci_size_mem_bar(pdev->sbdf, reg, &addr, &size, (i == num_bars - 1) ? PCI_BAR_LAST : 0); if ( rc < 0 ) { @@ -560,7 +557,7 @@ static int init_bars(struct pci_dev *pdev) } /* Check expansion ROM. */ - rc = pci_size_mem_bar(sbdf, rom_reg, &addr, &size, PCI_BAR_ROM); + rc = pci_size_mem_bar(pdev->sbdf, rom_reg, &addr, &size, PCI_BAR_ROM); if ( rc > 0 && size ) { struct vpci_bar *rom = &header->bars[num_bars]; diff --git a/xen/include/xen/pci.h b/xen/include/xen/pci.h index c61fd7e262..b03927cd28 100644 --- a/xen/include/xen/pci.h +++ b/xen/include/xen/pci.h @@ -81,9 +81,15 @@ struct pci_dev { struct arch_msix *msix; struct domain *domain; - const u16 seg; - const u8 bus; - const u8 devfn; + + const union { + struct { + uint8_t devfn; + uint8_t bus; + uint16_t seg; + }; + pci_sbdf_t sbdf; + }; u8 phantom_stride; From patchwork Fri Jun 7 09:22:23 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Roger_Pau_Monn=C3=A9?= X-Patchwork-Id: 10981177 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 399E5924 for ; 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receiver=esa6.hc3370-68.iphmx.com; envelope-from="roger.pau@citrix.com"; x-sender="roger.pau@citrix.com"; x-conformance=sidf_compatible; x-record-type="v=spf1"; x-record-text="v=spf1 include:spf.citrix.com include:spf2.citrix.com include:ironport.citrix.com exists:%{i}._spf.mta.salesforce.com ~all" Received-SPF: None (esa6.hc3370-68.iphmx.com: no sender authenticity information available from domain of postmaster@mail.citrix.com) identity=helo; client-ip=162.221.158.21; receiver=esa6.hc3370-68.iphmx.com; envelope-from="roger.pau@citrix.com"; x-sender="postmaster@mail.citrix.com"; x-conformance=sidf_compatible IronPort-SDR: 2oFTU/XWjGqFffuw67bLTka8YA5pAEe1vLiNBnsgA1RQlKto7p0Q+rKxeolkt7GMglzBMZP9rj Z4aPKVOjCeQ9Cczm4z5vtAMQUVXscL+/SjmsV9LxZTduSgpwo5DkxEecEc0PIv8c0TSTjoJh+i pe/iwQe/PvDh/GPr+TYJ1AuTBTwzMBeeNanOANvW2mDOqGCWf/JlBgz8sAeGN2x/YZBXDzbQx0 Kpql7oZtj0sj71QDwzubJDQfTLNiLEnQ8FcAY3SJ/PuEwjp6RfAYniz3m1jobc6jUkTM+56SB5 PSs= X-SBRS: -0.9 X-MesageID: 1419347 X-Ironport-Server: esa6.hc3370-68.iphmx.com X-Remote-IP: 162.221.158.21 X-Policy: $RELAYED X-IronPort-AV: E=Sophos;i="5.63,562,1557201600"; d="scan'208";a="1419347" From: Roger Pau Monne To: Date: Fri, 7 Jun 2019 11:22:23 +0200 Message-ID: <20190607092232.83179-5-roger.pau@citrix.com> X-Mailer: git-send-email 2.20.1 (Apple Git-117) In-Reply-To: <20190607092232.83179-1-roger.pau@citrix.com> References: <20190607092232.83179-1-roger.pau@citrix.com> MIME-Version: 1.0 Subject: [Xen-devel] [PATCH v3 04/13] pci: make PCI_SBDF return a pci_sbdf_t X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Kevin Tian , Stefano Stabellini , Wei Liu , Konrad Rzeszutek Wilk , George Dunlap , Andrew Cooper , Ian Jackson , Tim Deegan , Julien Grall , Paul Durrant , Jan Beulich , Roger Pau Monne Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP And fix it's only caller. Signed-off-by: Roger Pau Monné Reviewed-by: Paul Durrant Acked-by: Jan Beulich Reviewed-by: Kevin Tian --- Cc: Kevin Tian Cc: Andrew Cooper Cc: George Dunlap Cc: Ian Jackson Cc: Jan Beulich Cc: Julien Grall Cc: Konrad Rzeszutek Wilk Cc: Stefano Stabellini Cc: Tim Deegan Cc: Wei Liu --- Changes since v1: - New in this version. --- xen/drivers/passthrough/vtd/dmar.c | 3 ++- xen/include/xen/pci.h | 3 ++- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/xen/drivers/passthrough/vtd/dmar.c b/xen/drivers/passthrough/vtd/dmar.c index 9cc8623e53..59a46cd1c6 100644 --- a/xen/drivers/passthrough/vtd/dmar.c +++ b/xen/drivers/passthrough/vtd/dmar.c @@ -1115,7 +1115,8 @@ static int __init parse_rmrr_param(const char *str) /* Keep sbdf's even if they differ and later report an error. */ dev_count = user_rmrrs[nr_rmrr].dev_count; - user_rmrrs[nr_rmrr].sbdf[dev_count] = PCI_SBDF(seg, bus, dev, func); + user_rmrrs[nr_rmrr].sbdf[dev_count] = + PCI_SBDF(seg, bus, dev, func).sbdf; user_rmrrs[nr_rmrr].dev_count++; s = stmp; diff --git a/xen/include/xen/pci.h b/xen/include/xen/pci.h index b03927cd28..12f1cea19b 100644 --- a/xen/include/xen/pci.h +++ b/xen/include/xen/pci.h @@ -34,7 +34,8 @@ #define PCI_DEVFN2(bdf) ((bdf) & 0xff) #define PCI_BDF(b,d,f) ((((b) & 0xff) << 8) | PCI_DEVFN(d,f)) #define PCI_BDF2(b,df) ((((b) & 0xff) << 8) | ((df) & 0xff)) -#define PCI_SBDF(s,b,d,f) ((((s) & 0xffff) << 16) | PCI_BDF(b,d,f)) +#define PCI_SBDF(s,b,d,f) \ + ((pci_sbdf_t) { .sbdf = (((s) & 0xffff) << 16) | PCI_BDF(b,d,f) }) #define PCI_SBDF2(s,bdf) ((((s) & 0xffff) << 16) | ((bdf) & 0xffff)) #define PCI_SBDF3(s,b,df) ((((s) & 0xffff) << 16) | PCI_BDF2(b, df)) From patchwork Fri Jun 7 09:22:24 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Roger_Pau_Monn=C3=A9?= X-Patchwork-Id: 10981165 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A9530924 for ; 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receiver=esa4.hc3370-68.iphmx.com; envelope-from="roger.pau@citrix.com"; x-sender="roger.pau@citrix.com"; x-conformance=sidf_compatible; x-record-type="v=spf1"; x-record-text="v=spf1 include:spf.citrix.com include:spf2.citrix.com include:ironport.citrix.com exists:%{i}._spf.mta.salesforce.com ~all" Received-SPF: None (esa4.hc3370-68.iphmx.com: no sender authenticity information available from domain of postmaster@mail.citrix.com) identity=helo; client-ip=162.221.158.21; receiver=esa4.hc3370-68.iphmx.com; envelope-from="roger.pau@citrix.com"; x-sender="postmaster@mail.citrix.com"; x-conformance=sidf_compatible IronPort-SDR: 9blH9lWRr7+8M1lN2IPT/NGUj0/WoKek/pAt+obDCXf2LyR8RDns+EkKStIcKIDG5YyPILeJQg lrpgIrRnsPTN562d38dW3+qrnnkjLFKo3FwWotini4L4sUVMYP55YG2WOd7ONcTZbWNJ0n2OPc TgaCAJDb8wtrNm5Vm6W53cfWLiIcTnVKqLg8gM39Yeq85KDYfSuibgU1RSMxS4KC0JCXYQmXJ1 lFbmRQN6VCh/8JGNrCJj3gBc9Pv/Mmh4DuAS2W4d+bElilrHAImlzK5LB+g2srEdGVqrxC8//w ho0= X-SBRS: -0.9 X-MesageID: 1440980 X-Ironport-Server: esa4.hc3370-68.iphmx.com X-Remote-IP: 162.221.158.21 X-Policy: $RELAYED X-IronPort-AV: E=Sophos;i="5.63,562,1557201600"; d="scan'208";a="1440980" From: Roger Pau Monne To: Date: Fri, 7 Jun 2019 11:22:24 +0200 Message-ID: <20190607092232.83179-6-roger.pau@citrix.com> X-Mailer: git-send-email 2.20.1 (Apple Git-117) In-Reply-To: <20190607092232.83179-1-roger.pau@citrix.com> References: <20190607092232.83179-1-roger.pau@citrix.com> MIME-Version: 1.0 Subject: [Xen-devel] [PATCH v3 05/13] pci: make PCI_SBDF2 return a pci_sbdf_t X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Kevin Tian , Stefano Stabellini , Wei Liu , Konrad Rzeszutek Wilk , George Dunlap , Andrew Cooper , Ian Jackson , Tim Deegan , Julien Grall , Jan Beulich , Roger Pau Monne Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP And fix it's only caller. Signed-off-by: Roger Pau Monné Reviewed-by: Paul Durrant Acked-by: Jan Beulich Reviewed-by: Kevin Tian --- Cc: Kevin Tian Cc: Andrew Cooper Cc: George Dunlap Cc: Ian Jackson Cc: Jan Beulich Cc: Julien Grall Cc: Konrad Rzeszutek Wilk Cc: Stefano Stabellini Cc: Tim Deegan Cc: Wei Liu --- xen/drivers/passthrough/vtd/dmar.c | 2 +- xen/include/xen/pci.h | 3 ++- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/xen/drivers/passthrough/vtd/dmar.c b/xen/drivers/passthrough/vtd/dmar.c index 59a46cd1c6..b858fe7c80 100644 --- a/xen/drivers/passthrough/vtd/dmar.c +++ b/xen/drivers/passthrough/vtd/dmar.c @@ -1047,7 +1047,7 @@ int intel_iommu_get_reserved_device_memory(iommu_grdm_t *func, void *ctxt) rc = func(PFN_DOWN(rmrr->base_address), PFN_UP(rmrr->end_address) - PFN_DOWN(rmrr->base_address), - PCI_SBDF2(rmrr->segment, bdf), ctxt); + PCI_SBDF2(rmrr->segment, bdf).sbdf, ctxt); if ( unlikely(rc < 0) ) return rc; diff --git a/xen/include/xen/pci.h b/xen/include/xen/pci.h index 12f1cea19b..53d786da66 100644 --- a/xen/include/xen/pci.h +++ b/xen/include/xen/pci.h @@ -36,7 +36,8 @@ #define PCI_BDF2(b,df) ((((b) & 0xff) << 8) | ((df) & 0xff)) #define PCI_SBDF(s,b,d,f) \ ((pci_sbdf_t) { .sbdf = (((s) & 0xffff) << 16) | PCI_BDF(b,d,f) }) -#define PCI_SBDF2(s,bdf) ((((s) & 0xffff) << 16) | ((bdf) & 0xffff)) +#define PCI_SBDF2(s,bdf) \ + ((pci_sbdf_t) { .sbdf = (((s) & 0xffff) << 16) | ((bdf) & 0xffff) }) #define PCI_SBDF3(s,b,df) ((((s) & 0xffff) << 16) | PCI_BDF2(b, df)) typedef union { From patchwork Fri Jun 7 09:22:25 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Roger_Pau_Monn=C3=A9?= X-Patchwork-Id: 10981173 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 25C0D924 for ; Fri, 7 Jun 2019 09:25:00 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 12AE428B2D for ; Fri, 7 Jun 2019 09:25:00 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 06F4128B36; Fri, 7 Jun 2019 09:25:00 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 8CAE328B2B for ; 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client-ip=162.221.158.21; receiver=esa2.hc3370-68.iphmx.com; envelope-from="roger.pau@citrix.com"; x-sender="roger.pau@citrix.com"; x-conformance=sidf_compatible Received-SPF: SoftFail (esa2.hc3370-68.iphmx.com: domain of roger.pau@citrix.com is inclined to not designate 162.221.158.21 as permitted sender) identity=mailfrom; client-ip=162.221.158.21; receiver=esa2.hc3370-68.iphmx.com; envelope-from="roger.pau@citrix.com"; x-sender="roger.pau@citrix.com"; x-conformance=sidf_compatible; x-record-type="v=spf1"; x-record-text="v=spf1 include:spf.citrix.com include:spf2.citrix.com include:ironport.citrix.com exists:%{i}._spf.mta.salesforce.com ~all" Received-SPF: None (esa2.hc3370-68.iphmx.com: no sender authenticity information available from domain of postmaster@mail.citrix.com) identity=helo; client-ip=162.221.158.21; receiver=esa2.hc3370-68.iphmx.com; envelope-from="roger.pau@citrix.com"; x-sender="postmaster@mail.citrix.com"; x-conformance=sidf_compatible IronPort-SDR: fX+4LGZ+RwwDHXJC1AvP3KvU5cdgDKV5fDd04KS7N3HfMTJjiRxLI4R9FxCeMliAYHcpxS59hP uc4R268fUtaKpty71THUZ78PHLGFhPLO45vDqCS5s/mOhxEkG1ShJ5hfkW4rMeZPGfG97kbDpD ICjdd4jbMye/Hdc87S9Kr6ptnP7ixKqQlUrt8P9F9iIC7Jp8yYc/rQqSaVsRCF5HAIYmWPRvaC ysp3OxVdMQUvufGOMhct09Um3Qq0uhKYb9bVJjR2yoafqbGK8z3hhTq0CRZE+nqPYpxAELaRvn pQE= X-SBRS: -0.9 X-MesageID: 1438396 X-Ironport-Server: esa2.hc3370-68.iphmx.com X-Remote-IP: 162.221.158.21 X-Policy: $RELAYED X-IronPort-AV: E=Sophos;i="5.63,562,1557201600"; d="scan'208";a="1438396" From: Roger Pau Monne To: Date: Fri, 7 Jun 2019 11:22:25 +0200 Message-ID: <20190607092232.83179-7-roger.pau@citrix.com> X-Mailer: git-send-email 2.20.1 (Apple Git-117) In-Reply-To: <20190607092232.83179-1-roger.pau@citrix.com> References: <20190607092232.83179-1-roger.pau@citrix.com> MIME-Version: 1.0 Subject: [Xen-devel] [PATCH v3 06/13] pci: make PCI_SBDF3 return a pci_sbdf_t X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Stefano Stabellini , Wei Liu , Konrad Rzeszutek Wilk , George Dunlap , Andrew Cooper , Ian Jackson , Tim Deegan , Julien Grall , Jan Beulich , Roger Pau Monne Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP And fix it's callers. Signed-off-by: Roger Pau Monné Acked-by: Jan Beulich --- Cc: Andrew Cooper Cc: George Dunlap Cc: Ian Jackson Cc: Jan Beulich Cc: Julien Grall Cc: Konrad Rzeszutek Wilk Cc: Stefano Stabellini Cc: Tim Deegan Cc: Wei Liu --- xen/common/compat/memory.c | 4 ++-- xen/common/memory.c | 4 ++-- xen/drivers/passthrough/pci.c | 4 +--- xen/include/xen/pci.h | 3 ++- 4 files changed, 7 insertions(+), 8 deletions(-) diff --git a/xen/common/compat/memory.c b/xen/common/compat/memory.c index 13fd64ddf5..2eb79efa65 100644 --- a/xen/common/compat/memory.c +++ b/xen/common/compat/memory.c @@ -27,8 +27,8 @@ static int get_reserved_device_memory(xen_pfn_t start, xen_ulong_t nr, u32 id, void *ctxt) { struct get_reserved_device_memory *grdm = ctxt; - u32 sbdf = PCI_SBDF3(grdm->map.dev.pci.seg, grdm->map.dev.pci.bus, - grdm->map.dev.pci.devfn); + uint32_t sbdf = PCI_SBDF3(grdm->map.dev.pci.seg, grdm->map.dev.pci.bus, + grdm->map.dev.pci.devfn).sbdf; if ( !(grdm->map.flags & XENMEM_RDM_ALL) && (sbdf != id) ) return 0; diff --git a/xen/common/memory.c b/xen/common/memory.c index b8be19a890..03db7bfa9e 100644 --- a/xen/common/memory.c +++ b/xen/common/memory.c @@ -968,8 +968,8 @@ static int get_reserved_device_memory(xen_pfn_t start, xen_ulong_t nr, u32 id, void *ctxt) { struct get_reserved_device_memory *grdm = ctxt; - u32 sbdf = PCI_SBDF3(grdm->map.dev.pci.seg, grdm->map.dev.pci.bus, - grdm->map.dev.pci.devfn); + uint32_t sbdf = PCI_SBDF3(grdm->map.dev.pci.seg, grdm->map.dev.pci.bus, + grdm->map.dev.pci.devfn).sbdf; if ( !(grdm->map.flags & XENMEM_RDM_ALL) && (sbdf != id) ) return 0; diff --git a/xen/drivers/passthrough/pci.c b/xen/drivers/passthrough/pci.c index 535c7e511b..e88689425d 100644 --- a/xen/drivers/passthrough/pci.c +++ b/xen/drivers/passthrough/pci.c @@ -762,9 +762,7 @@ int pci_add_device(u16 seg, u8 bus, u8 devfn, { unsigned int idx = pos + PCI_SRIOV_BAR + i * 4; u32 bar = pci_conf_read32(seg, bus, slot, func, idx); - pci_sbdf_t sbdf = { - .sbdf = PCI_SBDF3(seg, bus, devfn), - }; + pci_sbdf_t sbdf = PCI_SBDF3(seg, bus, devfn); if ( (bar & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_IO ) diff --git a/xen/include/xen/pci.h b/xen/include/xen/pci.h index 53d786da66..05ee115715 100644 --- a/xen/include/xen/pci.h +++ b/xen/include/xen/pci.h @@ -38,7 +38,8 @@ ((pci_sbdf_t) { .sbdf = (((s) & 0xffff) << 16) | PCI_BDF(b,d,f) }) #define PCI_SBDF2(s,bdf) \ ((pci_sbdf_t) { .sbdf = (((s) & 0xffff) << 16) | ((bdf) & 0xffff) }) -#define PCI_SBDF3(s,b,df) ((((s) & 0xffff) << 16) | PCI_BDF2(b, df)) +#define PCI_SBDF3(s,b,df) \ + ((pci_sbdf_t) { .sbdf = (((s) & 0xffff) << 16) | PCI_BDF2(b, df) }) typedef union { uint32_t sbdf; From patchwork Fri Jun 7 09:22:26 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Roger_Pau_Monn=C3=A9?= X-Patchwork-Id: 10981171 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 5388A924 for ; Fri, 7 Jun 2019 09:24:53 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 4161527D0E for ; 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Fri, 07 Jun 2019 09:23:24 +0000 X-Inumbo-ID: e4e7a3be-8905-11e9-8980-bc764e045a96 Received: from esa5.hc3370-68.iphmx.com (unknown [216.71.155.168]) by us1-rack-dfw2.inumbo.com (Halon) with ESMTPS id e4e7a3be-8905-11e9-8980-bc764e045a96; Fri, 07 Jun 2019 09:23:22 +0000 (UTC) Authentication-Results: esa5.hc3370-68.iphmx.com; dkim=none (message not signed) header.i=none; spf=None smtp.pra=roger.pau@citrix.com; spf=SoftFail smtp.mailfrom=roger.pau@citrix.com; spf=None smtp.helo=postmaster@mail.citrix.com Received-SPF: None (esa5.hc3370-68.iphmx.com: no sender authenticity information available from domain of roger.pau@citrix.com) identity=pra; client-ip=162.221.158.21; receiver=esa5.hc3370-68.iphmx.com; envelope-from="roger.pau@citrix.com"; x-sender="roger.pau@citrix.com"; x-conformance=sidf_compatible Received-SPF: SoftFail (esa5.hc3370-68.iphmx.com: domain of roger.pau@citrix.com is inclined to not designate 162.221.158.21 as permitted sender) identity=mailfrom; client-ip=162.221.158.21; receiver=esa5.hc3370-68.iphmx.com; envelope-from="roger.pau@citrix.com"; x-sender="roger.pau@citrix.com"; x-conformance=sidf_compatible; x-record-type="v=spf1"; x-record-text="v=spf1 include:spf.citrix.com include:spf2.citrix.com include:ironport.citrix.com exists:%{i}._spf.mta.salesforce.com ~all" Received-SPF: None (esa5.hc3370-68.iphmx.com: no sender authenticity information available from domain of postmaster@mail.citrix.com) identity=helo; client-ip=162.221.158.21; receiver=esa5.hc3370-68.iphmx.com; envelope-from="roger.pau@citrix.com"; x-sender="postmaster@mail.citrix.com"; x-conformance=sidf_compatible IronPort-SDR: pOAGGZsVx+pce0cSx8hb3Q9BJZ1MrsWA4JOJKgq1yTwkrroSmZ3pkYifXNhaZJFkmzVSRoaxoY m2Kv3uV5S7bGdYsGdeEhHzvYCi6U6SU50JTj/lVvyu4XYyyImiMW2mifOsdFFTraXEPd4bs1u+ aimoNRX6xrs4q2PPYB4pv7nZ0GWvaxP1XMwhRqhwGlPsrvX68B7KpivISFRKpr1G4FB1iebkeW 3BLL18ePypJ4KlVUlX4dAtW1e5/lT44J34ftbdBLxGHBZJbgxNlS2srDMwNj0CQWB/K113esFy b3U= X-SBRS: -0.9 X-MesageID: 1419211 X-Ironport-Server: esa5.hc3370-68.iphmx.com X-Remote-IP: 162.221.158.21 X-Policy: $RELAYED X-IronPort-AV: E=Sophos;i="5.63,562,1557201600"; d="scan'208";a="1419211" From: Roger Pau Monne To: Date: Fri, 7 Jun 2019 11:22:26 +0200 Message-ID: <20190607092232.83179-8-roger.pau@citrix.com> X-Mailer: git-send-email 2.20.1 (Apple Git-117) In-Reply-To: <20190607092232.83179-1-roger.pau@citrix.com> References: <20190607092232.83179-1-roger.pau@citrix.com> MIME-Version: 1.0 Subject: [Xen-devel] [PATCH v3 07/13] pci: switch pci_conf_read8 to use pci_sbdf_t X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Kevin Tian , Stefano Stabellini , Suravee Suthikulpanit , Wei Liu , Konrad Rzeszutek Wilk , George Dunlap , Andrew Cooper , Ian Jackson , Tim Deegan , Julien Grall , Jan Beulich , Brian Woods , Roger Pau Monne Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP This reduces the number of parameters of the function to two, and simplifies some of the calling sites. Signed-off-by: Roger Pau Monné Reviewed-by: Jan Beulich Acked-by: Brian Woods Reviewed-by: Kevin Tian --- Cc: Jan Beulich Cc: Andrew Cooper Cc: Wei Liu Cc: George Dunlap Cc: Ian Jackson Cc: Julien Grall Cc: Konrad Rzeszutek Wilk Cc: Stefano Stabellini Cc: Tim Deegan Cc: Suravee Suthikulpanit Cc: Brian Woods Cc: Kevin Tian --- xen/arch/x86/cpu/amd.c | 4 ++-- xen/arch/x86/msi.c | 2 +- xen/arch/x86/x86_64/pci.c | 25 ++++++++++++------------ xen/drivers/char/ehci-dbgp.c | 5 +++-- xen/drivers/char/ns16550.c | 6 ++++-- xen/drivers/passthrough/amd/iommu_init.c | 2 +- xen/drivers/passthrough/pci.c | 21 ++++++++------------ xen/drivers/passthrough/vtd/dmar.c | 6 +++--- xen/drivers/passthrough/vtd/quirks.c | 6 +++--- xen/drivers/pci/pci.c | 9 ++++----- xen/drivers/video/vga.c | 3 +-- xen/drivers/vpci/header.c | 3 +-- xen/drivers/vpci/vpci.c | 8 +++----- xen/include/xen/pci.h | 4 +--- 14 files changed, 47 insertions(+), 57 deletions(-) diff --git a/xen/arch/x86/cpu/amd.c b/xen/arch/x86/cpu/amd.c index 8404cf290f..3c069391f4 100644 --- a/xen/arch/x86/cpu/amd.c +++ b/xen/arch/x86/cpu/amd.c @@ -420,12 +420,12 @@ static void disable_c1_ramping(void) nr_nodes = ((pci_conf_read32(0, 0, 0x18, 0x0, 0x60)>>4)&0x07)+1; for (node = 0; node < nr_nodes; node++) { /* PMM7: bus=0, dev=0x18+node, function=0x3, register=0x87. */ - pmm7 = pci_conf_read8(0, 0, 0x18+node, 0x3, 0x87); + pmm7 = pci_conf_read8(PCI_SBDF(0, 0, 0x18 + node, 3), 0x87); /* Invalid read means we've updated every Northbridge. */ if (pmm7 == 0xFF) break; pmm7 &= 0xFC; /* clear pmm7[1:0] */ - pci_conf_write8(0, 0, 0x18+node, 0x3, 0x87, pmm7); + pci_conf_write8(0, 0, 0x18 + node, 0x3, 0x87, pmm7); printk ("AMD: Disabling C1 Clock Ramping Node #%x\n", node); } } diff --git a/xen/arch/x86/msi.c b/xen/arch/x86/msi.c index babc4147c4..67339edc68 100644 --- a/xen/arch/x86/msi.c +++ b/xen/arch/x86/msi.c @@ -800,7 +800,7 @@ static u64 read_pci_mem_bar(u16 seg, u8 bus, u8 slot, u8 func, u8 bir, int vf) disp = vf * pdev->vf_rlen[bir]; limit = PCI_SRIOV_NUM_BARS; } - else switch ( pci_conf_read8(seg, bus, slot, func, + else switch ( pci_conf_read8(PCI_SBDF(seg, bus, slot, func), PCI_HEADER_TYPE) & 0x7f ) { case PCI_HEADER_TYPE_NORMAL: diff --git a/xen/arch/x86/x86_64/pci.c b/xen/arch/x86/x86_64/pci.c index 6e3f5cf203..b70383fb03 100644 --- a/xen/arch/x86/x86_64/pci.c +++ b/xen/arch/x86/x86_64/pci.c @@ -8,27 +8,26 @@ #include #include -#define PCI_CONF_ADDRESS(bus, dev, func, reg) \ - (0x80000000 | (bus << 16) | (dev << 11) | (func << 8) | (reg & ~3)) +#define PCI_CONF_ADDRESS(sbdf, reg) \ + (0x80000000 | ((sbdf).bdf << 8) | ((reg) & ~3)) -uint8_t pci_conf_read8( - unsigned int seg, unsigned int bus, unsigned int dev, unsigned int func, - unsigned int reg) +uint8_t pci_conf_read8(pci_sbdf_t sbdf, unsigned int reg) { - u32 value; + uint32_t value; - if ( seg || reg > 255 ) + if ( sbdf.seg || reg > 255 ) { - pci_mmcfg_read(seg, bus, PCI_DEVFN(dev, func), reg, 1, &value); + pci_mmcfg_read(sbdf.seg, sbdf.bus, sbdf.devfn, reg, 1, &value); return value; } - else - { - BUG_ON((bus > 255) || (dev > 31) || (func > 7)); - return pci_conf_read(PCI_CONF_ADDRESS(bus, dev, func, reg), reg & 3, 1); - } + + return pci_conf_read(PCI_CONF_ADDRESS(sbdf, reg), reg & 3, 1); } +#undef PCI_CONF_ADDRESS +#define PCI_CONF_ADDRESS(bus, dev, func, reg) \ + (0x80000000 | (bus << 16) | (dev << 11) | (func << 8) | (reg & ~3)) + uint16_t pci_conf_read16( unsigned int seg, unsigned int bus, unsigned int dev, unsigned int func, unsigned int reg) diff --git a/xen/drivers/char/ehci-dbgp.c b/xen/drivers/char/ehci-dbgp.c index 475dc41767..71f0aaa6ac 100644 --- a/xen/drivers/char/ehci-dbgp.c +++ b/xen/drivers/char/ehci-dbgp.c @@ -713,7 +713,7 @@ static unsigned int __init find_dbgp(struct ehci_dbgp *dbgp, cap = __find_dbgp(bus, slot, func); if ( !cap || ehci_num-- ) { - if ( !func && !(pci_conf_read8(0, bus, slot, func, + if ( !func && !(pci_conf_read8(PCI_SBDF(0, bus, slot, func), PCI_HEADER_TYPE) & 0x80) ) break; continue; @@ -1312,7 +1312,8 @@ static void __init ehci_dbgp_init_preirq(struct serial_port *port) offset = (debug_port >> 16) & 0xfff; /* double check if the mem space is enabled */ - dbgp->pci_cr = pci_conf_read8(0, dbgp->bus, dbgp->slot, dbgp->func, + dbgp->pci_cr = pci_conf_read8(PCI_SBDF(0, dbgp->bus, dbgp->slot, + dbgp->func), PCI_COMMAND); if ( !(dbgp->pci_cr & PCI_COMMAND_MEMORY) ) { diff --git a/xen/drivers/char/ns16550.c b/xen/drivers/char/ns16550.c index 189e121b7e..547270d0e1 100644 --- a/xen/drivers/char/ns16550.c +++ b/xen/drivers/char/ns16550.c @@ -1188,8 +1188,10 @@ pci_uart_config(struct ns16550 *uart, bool_t skip_amt, unsigned int idx) uart->bar64 = bar_64; uart->io_size = max(8U << param->reg_shift, param->uart_offset); - uart->irq = pci_conf_read8(0, b, d, f, PCI_INTERRUPT_PIN) ? - pci_conf_read8(0, b, d, f, PCI_INTERRUPT_LINE) : 0; + uart->irq = pci_conf_read8(PCI_SBDF(0, b, d, f), + PCI_INTERRUPT_PIN) ? + pci_conf_read8(PCI_SBDF(0, b, d, f), + PCI_INTERRUPT_LINE) : 0; return 0; } diff --git a/xen/drivers/passthrough/amd/iommu_init.c b/xen/drivers/passthrough/amd/iommu_init.c index 72ea8824b0..30de684f6d 100644 --- a/xen/drivers/passthrough/amd/iommu_init.c +++ b/xen/drivers/passthrough/amd/iommu_init.c @@ -1241,7 +1241,7 @@ static bool_t __init amd_sp5100_erratum28(void) if (vendor_id != 0x1002 || dev_id != 0x4385) continue; - byte = pci_conf_read8(0, bus, 0x14, 0, 0xad); + byte = pci_conf_read8(PCI_SBDF(0, bus, 0x14, 0), 0xad); if ( (byte >> 3) & 1 ) { printk(XENLOG_WARNING "AMD-Vi: SP5100 erratum 28 detected, disabling IOMMU.\n" diff --git a/xen/drivers/passthrough/pci.c b/xen/drivers/passthrough/pci.c index e88689425d..340e957954 100644 --- a/xen/drivers/passthrough/pci.c +++ b/xen/drivers/passthrough/pci.c @@ -260,7 +260,7 @@ static void check_pdev(const struct pci_dev *pdev) } } - switch ( pci_conf_read8(seg, bus, dev, func, PCI_HEADER_TYPE) & 0x7f ) + switch ( pci_conf_read8(pdev->sbdf, PCI_HEADER_TYPE) & 0x7f ) { case PCI_HEADER_TYPE_BRIDGE: if ( !bridge_ctl_mask ) @@ -370,10 +370,8 @@ static struct pci_dev *alloc_pdev(struct pci_seg *pseg, u8 bus, u8 devfn) case DEV_TYPE_PCIe2PCI_BRIDGE: case DEV_TYPE_LEGACY_PCI_BRIDGE: - sec_bus = pci_conf_read8(pseg->nr, bus, PCI_SLOT(devfn), - PCI_FUNC(devfn), PCI_SECONDARY_BUS); - sub_bus = pci_conf_read8(pseg->nr, bus, PCI_SLOT(devfn), - PCI_FUNC(devfn), PCI_SUBORDINATE_BUS); + sec_bus = pci_conf_read8(pdev->sbdf, PCI_SECONDARY_BUS); + sub_bus = pci_conf_read8(pdev->sbdf, PCI_SUBORDINATE_BUS); spin_lock(&pseg->bus2bridge_lock); for ( ; sec_bus <= sub_bus; sec_bus++ ) @@ -436,16 +434,12 @@ static void free_pdev(struct pci_seg *pseg, struct pci_dev *pdev) /* update bus2bridge */ switch ( pdev->type ) { - u8 dev, func, sec_bus, sub_bus; + uint8_t sec_bus, sub_bus; case DEV_TYPE_PCIe2PCI_BRIDGE: case DEV_TYPE_LEGACY_PCI_BRIDGE: - dev = PCI_SLOT(pdev->devfn); - func = PCI_FUNC(pdev->devfn); - sec_bus = pci_conf_read8(pseg->nr, pdev->bus, dev, func, - PCI_SECONDARY_BUS); - sub_bus = pci_conf_read8(pseg->nr, pdev->bus, dev, func, - PCI_SUBORDINATE_BUS); + sec_bus = pci_conf_read8(pdev->sbdf, PCI_SECONDARY_BUS); + sub_bus = pci_conf_read8(pdev->sbdf, PCI_SUBORDINATE_BUS); spin_lock(&pseg->bus2bridge_lock); for ( ; sec_bus <= sub_bus; sec_bus++ ) @@ -1082,7 +1076,8 @@ static int __init _scan_pci_devices(struct pci_seg *pseg, void *arg) return -ENOMEM; } - if ( !func && !(pci_conf_read8(pseg->nr, bus, dev, func, + if ( !func && !(pci_conf_read8(PCI_SBDF(pseg->nr, bus, dev, + func), PCI_HEADER_TYPE) & 0x80) ) break; } diff --git a/xen/drivers/passthrough/vtd/dmar.c b/xen/drivers/passthrough/vtd/dmar.c index b858fe7c80..9c94deac0b 100644 --- a/xen/drivers/passthrough/vtd/dmar.c +++ b/xen/drivers/passthrough/vtd/dmar.c @@ -348,7 +348,7 @@ static int __init acpi_parse_dev_scope( while ( --depth > 0 ) { - bus = pci_conf_read8(seg, bus, path->dev, path->fn, + bus = pci_conf_read8(PCI_SBDF(seg, bus, path->dev, path->fn), PCI_SECONDARY_BUS); path++; } @@ -356,9 +356,9 @@ static int __init acpi_parse_dev_scope( switch ( acpi_scope->entry_type ) { case ACPI_DMAR_SCOPE_TYPE_BRIDGE: - sec_bus = pci_conf_read8(seg, bus, path->dev, path->fn, + sec_bus = pci_conf_read8(PCI_SBDF(seg, bus, path->dev, path->fn), PCI_SECONDARY_BUS); - sub_bus = pci_conf_read8(seg, bus, path->dev, path->fn, + sub_bus = pci_conf_read8(PCI_SBDF(seg, bus, path->dev, path->fn), PCI_SUBORDINATE_BUS); if ( iommu_verbose ) printk(VTDPREFIX diff --git a/xen/drivers/passthrough/vtd/quirks.c b/xen/drivers/passthrough/vtd/quirks.c index d6db862678..ff73b0e7f4 100644 --- a/xen/drivers/passthrough/vtd/quirks.c +++ b/xen/drivers/passthrough/vtd/quirks.c @@ -92,8 +92,8 @@ static void __init cantiga_b3_errata_init(void) if ( vid != 0x8086 ) return; - did_hi = pci_conf_read8(0, 0, IGD_DEV, 0, 3); - rid = pci_conf_read8(0, 0, IGD_DEV, 0, 8); + did_hi = pci_conf_read8(PCI_SBDF(0, 0, IGD_DEV, 0), 3); + rid = pci_conf_read8(PCI_SBDF(0, 0, IGD_DEV, 0), 8); if ( (did_hi == 0x2A) && (rid == 0x7) ) is_cantiga_b3 = 1; @@ -281,7 +281,7 @@ static void __init tylersburg_intremap_quirk(void) { /* Match on System Management Registers on Device 20 Function 0 */ device = pci_conf_read32(0, bus, 20, 0, PCI_VENDOR_ID); - rev = pci_conf_read8(0, bus, 20, 0, PCI_REVISION_ID); + rev = pci_conf_read8(PCI_SBDF(0, bus, 20, 0), PCI_REVISION_ID); if ( rev == 0x13 && device == 0x342e8086 ) { diff --git a/xen/drivers/pci/pci.c b/xen/drivers/pci/pci.c index 1c808d6632..e3f883fc5c 100644 --- a/xen/drivers/pci/pci.c +++ b/xen/drivers/pci/pci.c @@ -21,12 +21,12 @@ int pci_find_cap_offset(u16 seg, u8 bus, u8 dev, u8 func, u8 cap) while ( max_cap-- ) { - pos = pci_conf_read8(seg, bus, dev, func, pos); + pos = pci_conf_read8(PCI_SBDF(seg, bus, dev, func), pos); if ( pos < 0x40 ) break; pos &= ~3; - id = pci_conf_read8(seg, bus, dev, func, pos + PCI_CAP_LIST_ID); + id = pci_conf_read8(PCI_SBDF(seg, bus, dev, func), pos + PCI_CAP_LIST_ID); if ( id == 0xff ) break; @@ -46,13 +46,12 @@ int pci_find_next_cap(u16 seg, u8 bus, unsigned int devfn, u8 pos, int cap) while ( ttl-- ) { - pos = pci_conf_read8(seg, bus, PCI_SLOT(devfn), PCI_FUNC(devfn), pos); + pos = pci_conf_read8(PCI_SBDF3(seg, bus, devfn), pos); if ( pos < 0x40 ) break; pos &= ~3; - id = pci_conf_read8(seg, bus, PCI_SLOT(devfn), PCI_FUNC(devfn), - pos + PCI_CAP_LIST_ID); + id = pci_conf_read8(PCI_SBDF3(seg, bus, devfn), pos + PCI_CAP_LIST_ID); if ( id == 0xff ) break; diff --git a/xen/drivers/video/vga.c b/xen/drivers/video/vga.c index 6a64fd9013..78533ad0b1 100644 --- a/xen/drivers/video/vga.c +++ b/xen/drivers/video/vga.c @@ -136,8 +136,7 @@ void __init video_endboot(void) b = 0; break; case 1: - switch ( pci_conf_read8(0, b, PCI_SLOT(df), - PCI_FUNC(df), + switch ( pci_conf_read8(PCI_SBDF3(0, b, df), PCI_HEADER_TYPE) ) { case PCI_HEADER_TYPE_BRIDGE: diff --git a/xen/drivers/vpci/header.c b/xen/drivers/vpci/header.c index 258b91deed..564c7b6a7d 100644 --- a/xen/drivers/vpci/header.c +++ b/xen/drivers/vpci/header.c @@ -463,8 +463,7 @@ static int init_bars(struct pci_dev *pdev) struct vpci_bar *bars = header->bars; int rc; - switch ( pci_conf_read8(pdev->seg, pdev->bus, slot, func, PCI_HEADER_TYPE) - & 0x7f ) + switch ( pci_conf_read8(pdev->sbdf, PCI_HEADER_TYPE) & 0x7f ) { case PCI_HEADER_TYPE_NORMAL: num_bars = PCI_HEADER_NORMAL_NR_BARS; diff --git a/xen/drivers/vpci/vpci.c b/xen/drivers/vpci/vpci.c index ca598675ea..c4030333a5 100644 --- a/xen/drivers/vpci/vpci.c +++ b/xen/drivers/vpci/vpci.c @@ -222,8 +222,7 @@ static uint32_t vpci_read_hw(pci_sbdf_t sbdf, unsigned int reg, */ if ( reg & 1 ) { - data = pci_conf_read8(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.fn, - reg); + data = pci_conf_read8(sbdf, reg); data |= pci_conf_read16(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.fn, reg + 1) << 8; } @@ -231,8 +230,7 @@ static uint32_t vpci_read_hw(pci_sbdf_t sbdf, unsigned int reg, { data = pci_conf_read16(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.fn, reg); - data |= pci_conf_read8(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.fn, - reg + 2) << 16; + data |= pci_conf_read8(sbdf, reg + 2) << 16; } break; @@ -241,7 +239,7 @@ static uint32_t vpci_read_hw(pci_sbdf_t sbdf, unsigned int reg, break; case 1: - data = pci_conf_read8(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.fn, reg); + data = pci_conf_read8(sbdf, reg); break; default: diff --git a/xen/include/xen/pci.h b/xen/include/xen/pci.h index 05ee115715..b2a62cb366 100644 --- a/xen/include/xen/pci.h +++ b/xen/include/xen/pci.h @@ -172,9 +172,7 @@ struct pci_dev *pci_get_pdev_by_domain(const struct domain *, int seg, int bus, int devfn); void pci_check_disable_device(u16 seg, u8 bus, u8 devfn); -uint8_t pci_conf_read8( - unsigned int seg, unsigned int bus, unsigned int dev, unsigned int func, - unsigned int reg); +uint8_t pci_conf_read8(pci_sbdf_t sbdf, unsigned int reg); uint16_t pci_conf_read16( unsigned int seg, unsigned int bus, unsigned int dev, unsigned int func, unsigned int reg); From patchwork Fri Jun 7 09:22:27 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Roger_Pau_Monn=C3=A9?= X-Patchwork-Id: 10981183 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id CF55E924 for ; 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d="scan'208";a="1419216" From: Roger Pau Monne To: Date: Fri, 7 Jun 2019 11:22:27 +0200 Message-ID: <20190607092232.83179-9-roger.pau@citrix.com> X-Mailer: git-send-email 2.20.1 (Apple Git-117) In-Reply-To: <20190607092232.83179-1-roger.pau@citrix.com> References: <20190607092232.83179-1-roger.pau@citrix.com> MIME-Version: 1.0 Subject: [Xen-devel] [PATCH v3 08/13] pci: switch pci_conf_read16 to use pci_sbdf_t X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Kevin Tian , Stefano Stabellini , Suravee Suthikulpanit , Wei Liu , Konrad Rzeszutek Wilk , George Dunlap , Andrew Cooper , Ian Jackson , Tim Deegan , Julien Grall , Jan Beulich , Brian Woods , Roger Pau Monne Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP This reduces the number of parameters of the function to two, and simplifies some of the calling sites. Signed-off-by: Roger Pau Monné Reviewed-by: Jan Beulich Acked-by: Brian Woods --- Cc: Jan Beulich Cc: Andrew Cooper Cc: Wei Liu Cc: George Dunlap Cc: Ian Jackson Cc: Julien Grall Cc: Konrad Rzeszutek Wilk Cc: Stefano Stabellini Cc: Tim Deegan Cc: Suravee Suthikulpanit Cc: Brian Woods Cc: Kevin Tian --- xen/arch/x86/dmi_scan.c | 6 +- xen/arch/x86/msi.c | 73 ++++++++++-------------- xen/arch/x86/x86_64/mmconfig-shared.c | 2 +- xen/arch/x86/x86_64/pci.c | 27 ++++----- xen/drivers/char/ehci-dbgp.c | 5 +- xen/drivers/char/ns16550.c | 16 ++++-- xen/drivers/passthrough/amd/iommu_init.c | 3 +- xen/drivers/passthrough/ats.h | 4 +- xen/drivers/passthrough/pci.c | 40 +++++-------- xen/drivers/passthrough/vtd/quirks.c | 9 ++- xen/drivers/passthrough/x86/ats.c | 9 +-- xen/drivers/pci/pci.c | 4 +- xen/drivers/video/vga.c | 8 +-- xen/drivers/vpci/header.c | 11 ++-- xen/drivers/vpci/msi.c | 3 +- xen/drivers/vpci/msix.c | 3 +- xen/drivers/vpci/vpci.c | 11 ++-- xen/include/xen/pci.h | 4 +- 18 files changed, 99 insertions(+), 139 deletions(-) diff --git a/xen/arch/x86/dmi_scan.c b/xen/arch/x86/dmi_scan.c index fcdf2d3952..31caad133e 100644 --- a/xen/arch/x86/dmi_scan.c +++ b/xen/arch/x86/dmi_scan.c @@ -469,15 +469,15 @@ static int __init ich10_bios_quirk(struct dmi_system_id *d) { u32 port, smictl; - if ( pci_conf_read16(0, 0, 0x1f, 0, PCI_VENDOR_ID) != 0x8086 ) + if ( pci_conf_read16(PCI_SBDF(0, 0, 0x1f, 0), PCI_VENDOR_ID) != 0x8086 ) return 0; - switch ( pci_conf_read16(0, 0, 0x1f, 0, PCI_DEVICE_ID) ) { + switch ( pci_conf_read16(PCI_SBDF(0, 0, 0x1f, 0), PCI_DEVICE_ID) ) { case 0x3a14: case 0x3a16: case 0x3a18: case 0x3a1a: - port = (pci_conf_read16(0, 0, 0x1f, 0, 0x40) & 0xff80) + 0x30; + port = (pci_conf_read16(PCI_SBDF(0, 0, 0x1f, 0), 0x40) & 0xff80) + 0x30; smictl = inl(port); /* turn off LEGACY_USB{,2}_EN if enabled */ if ( smictl & 0x20008 ) diff --git a/xen/arch/x86/msi.c b/xen/arch/x86/msi.c index 67339edc68..ed986261c3 100644 --- a/xen/arch/x86/msi.c +++ b/xen/arch/x86/msi.c @@ -124,29 +124,20 @@ static void msix_put_fixmap(struct arch_msix *msix, int idx) static bool memory_decoded(const struct pci_dev *dev) { - u8 bus, slot, func; + pci_sbdf_t sbdf = dev->sbdf; - if ( !dev->info.is_virtfn ) - { - bus = dev->bus; - slot = PCI_SLOT(dev->devfn); - func = PCI_FUNC(dev->devfn); - } - else + if ( dev->info.is_virtfn ) { - bus = dev->info.physfn.bus; - slot = PCI_SLOT(dev->info.physfn.devfn); - func = PCI_FUNC(dev->info.physfn.devfn); + sbdf.bus = dev->info.physfn.bus; + sbdf.devfn = dev->info.physfn.devfn; } - return !!(pci_conf_read16(dev->seg, bus, slot, func, PCI_COMMAND) & - PCI_COMMAND_MEMORY); + return pci_conf_read16(sbdf, PCI_COMMAND) & PCI_COMMAND_MEMORY; } static bool msix_memory_decoded(const struct pci_dev *dev, unsigned int pos) { - u16 control = pci_conf_read16(dev->seg, dev->bus, PCI_SLOT(dev->devfn), - PCI_FUNC(dev->devfn), msix_control_reg(pos)); + uint16_t control = pci_conf_read16(dev->sbdf, msix_control_reg(pos)); if ( !(control & PCI_MSIX_FLAGS_ENABLE) ) return false; @@ -211,14 +202,12 @@ static bool read_msi_msg(struct msi_desc *entry, struct msi_msg *msg) { msg->address_hi = pci_conf_read32(seg, bus, slot, func, msi_upper_address_reg(pos)); - data = pci_conf_read16(seg, bus, slot, func, - msi_data_reg(pos, 1)); + data = pci_conf_read16(dev->sbdf, msi_data_reg(pos, 1)); } else { msg->address_hi = 0; - data = pci_conf_read16(seg, bus, slot, func, - msi_data_reg(pos, 0)); + data = pci_conf_read16(dev->sbdf, msi_data_reg(pos, 0)); } msg->data = data; break; @@ -337,7 +326,8 @@ void set_msi_affinity(struct irq_desc *desc, const cpumask_t *mask) void __msi_set_enable(u16 seg, u8 bus, u8 slot, u8 func, int pos, int enable) { - u16 control = pci_conf_read16(seg, bus, slot, func, pos + PCI_MSI_FLAGS); + uint16_t control = pci_conf_read16(PCI_SBDF(seg, bus, slot, func), + pos + PCI_MSI_FLAGS); control &= ~PCI_MSI_FLAGS_ENABLE; if ( enable ) @@ -369,7 +359,7 @@ static void msix_set_enable(struct pci_dev *dev, int enable) pos = pci_find_cap_offset(seg, bus, slot, func, PCI_CAP_ID_MSIX); if ( pos ) { - control = pci_conf_read16(seg, bus, slot, func, msix_control_reg(pos)); + control = pci_conf_read16(dev->sbdf, msix_control_reg(pos)); control &= ~PCI_MSIX_FLAGS_ENABLE; if ( enable ) control |= PCI_MSIX_FLAGS_ENABLE; @@ -414,7 +404,7 @@ static bool msi_set_mask_bit(struct irq_desc *desc, bool host, bool guest) break; case PCI_CAP_ID_MSIX: maskall = pdev->msix->host_maskall; - control = pci_conf_read16(seg, bus, slot, func, + control = pci_conf_read16(pdev->sbdf, msix_control_reg(entry->msi_attrib.pos)); if ( unlikely(!(control & PCI_MSIX_FLAGS_ENABLE)) ) { @@ -594,8 +584,7 @@ int setup_msi_irq(struct irq_desc *desc, struct msi_desc *msidesc) if ( msidesc->msi_attrib.type == PCI_CAP_ID_MSIX ) { - control = pci_conf_read16(pdev->seg, pdev->bus, PCI_SLOT(pdev->devfn), - PCI_FUNC(pdev->devfn), cpos); + control = pci_conf_read16(pdev->sbdf, cpos); if ( !(control & PCI_MSIX_FLAGS_ENABLE) ) pci_conf_write16(pdev->seg, pdev->bus, PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn), cpos, @@ -698,7 +687,7 @@ static int msi_capability_init(struct pci_dev *dev, pos = pci_find_cap_offset(seg, bus, slot, func, PCI_CAP_ID_MSI); if ( !pos ) return -ENODEV; - control = pci_conf_read16(seg, bus, slot, func, msi_control_reg(pos)); + control = pci_conf_read16(dev->sbdf, msi_control_reg(pos)); maxvec = multi_msi_capable(control); if ( nvec > maxvec ) return maxvec; @@ -769,13 +758,14 @@ static u64 read_pci_mem_bar(u16 seg, u8 bus, u8 slot, u8 func, u8 bir, int vf) unsigned int pos = pci_find_ext_capability(seg, bus, PCI_DEVFN(slot, func), PCI_EXT_CAP_ID_SRIOV); - u16 ctrl = pci_conf_read16(seg, bus, slot, func, pos + PCI_SRIOV_CTRL); - u16 num_vf = pci_conf_read16(seg, bus, slot, func, - pos + PCI_SRIOV_NUM_VF); - u16 offset = pci_conf_read16(seg, bus, slot, func, - pos + PCI_SRIOV_VF_OFFSET); - u16 stride = pci_conf_read16(seg, bus, slot, func, - pos + PCI_SRIOV_VF_STRIDE); + uint16_t ctrl = pci_conf_read16(PCI_SBDF(seg, bus, slot, func), + pos + PCI_SRIOV_CTRL); + uint16_t num_vf = pci_conf_read16(PCI_SBDF(seg, bus, slot, func), + pos + PCI_SRIOV_NUM_VF); + uint16_t offset = pci_conf_read16(PCI_SBDF(seg, bus, slot, func), + pos + PCI_SRIOV_VF_OFFSET); + uint16_t stride = pci_conf_read16(PCI_SBDF(seg, bus, slot, func), + pos + PCI_SRIOV_VF_STRIDE); if ( !pdev || !pos || !(ctrl & PCI_SRIOV_CTRL_VFE) || @@ -864,7 +854,7 @@ static int msix_capability_init(struct pci_dev *dev, ASSERT(pcidevs_locked()); - control = pci_conf_read16(seg, bus, slot, func, msix_control_reg(pos)); + control = pci_conf_read16(dev->sbdf, msix_control_reg(pos)); /* * Ensure MSI-X interrupts are masked during setup. Some devices require * MSI-X to be enabled before we can touch the MSI-X registers. We need @@ -1131,8 +1121,7 @@ static int __pci_enable_msix(struct msi_info *msi, struct msi_desc **desc) if ( !pdev || !pos ) return -ENODEV; - control = pci_conf_read16(msi->seg, msi->bus, slot, func, - msix_control_reg(pos)); + control = pci_conf_read16(pdev->sbdf, msix_control_reg(pos)); nr_entries = multi_msix_capable(control); if ( msi->entry_nr >= nr_entries ) return -EINVAL; @@ -1178,7 +1167,7 @@ static void __pci_disable_msix(struct msi_desc *entry) u8 func = PCI_FUNC(dev->devfn); unsigned int pos = pci_find_cap_offset(seg, bus, slot, func, PCI_CAP_ID_MSIX); - u16 control = pci_conf_read16(seg, bus, slot, func, + u16 control = pci_conf_read16(dev->sbdf, msix_control_reg(entry->msi_attrib.pos)); bool maskall = dev->msix->host_maskall; @@ -1236,8 +1225,8 @@ int pci_prepare_msix(u16 seg, u8 bus, u8 devfn, bool off) } else { - u16 control = pci_conf_read16(seg, bus, slot, func, - msix_control_reg(pos)); + uint16_t control = pci_conf_read16(PCI_SBDF3(seg, bus, devfn), + msix_control_reg(pos)); rc = msix_capability_init(pdev, pos, NULL, NULL, multi_msix_capable(control)); @@ -1338,7 +1327,7 @@ int pci_msi_conf_write_intercept(struct pci_dev *pdev, unsigned int reg, if ( reg < entry->msi.mpos || reg >= entry->msi.mpos + 4 || size != 4 ) return -EACCES; - cntl = pci_conf_read16(seg, bus, slot, func, msi_control_reg(pos)); + cntl = pci_conf_read16(pdev->sbdf, msi_control_reg(pos)); unused = ~(uint32_t)0 >> (32 - multi_msi_capable(cntl)); for ( pos = 0; pos < entry->msi.nvec; ++pos, ++entry ) { @@ -1414,8 +1403,7 @@ int pci_restore_msi_state(struct pci_dev *pdev) } else if ( !type && entry->msi_attrib.type == PCI_CAP_ID_MSIX ) { - control = pci_conf_read16(pdev->seg, pdev->bus, slot, func, - msix_control_reg(pos)); + control = pci_conf_read16(pdev->sbdf, msix_control_reg(pos)); pci_conf_write16(pdev->seg, pdev->bus, slot, func, msix_control_reg(pos), control | (PCI_MSIX_FLAGS_ENABLE | @@ -1457,8 +1445,7 @@ int pci_restore_msi_state(struct pci_dev *pdev) { unsigned int cpos = msi_control_reg(pos); - control = pci_conf_read16(pdev->seg, pdev->bus, slot, func, cpos) & - ~PCI_MSI_FLAGS_QSIZE; + control = pci_conf_read16(pdev->sbdf, cpos) & ~PCI_MSI_FLAGS_QSIZE; multi_msi_enable(control, entry->msi.nvec); pci_conf_write16(pdev->seg, pdev->bus, slot, func, cpos, control); diff --git a/xen/arch/x86/x86_64/mmconfig-shared.c b/xen/arch/x86/x86_64/mmconfig-shared.c index 9e1c81dcd2..9d1db590d9 100644 --- a/xen/arch/x86/x86_64/mmconfig-shared.c +++ b/xen/arch/x86/x86_64/mmconfig-shared.c @@ -64,7 +64,7 @@ custom_param("mmcfg", parse_mmcfg); static const char __init *pci_mmcfg_e7520(void) { u32 win; - win = pci_conf_read16(0, 0, 0, 0, 0xce); + win = pci_conf_read16(PCI_SBDF(0, 0, 0, 0), 0xce); win = win & 0xf000; if(win == 0x0000 || win == 0xf000) diff --git a/xen/arch/x86/x86_64/pci.c b/xen/arch/x86/x86_64/pci.c index b70383fb03..fe36b60c50 100644 --- a/xen/arch/x86/x86_64/pci.c +++ b/xen/arch/x86/x86_64/pci.c @@ -24,28 +24,23 @@ uint8_t pci_conf_read8(pci_sbdf_t sbdf, unsigned int reg) return pci_conf_read(PCI_CONF_ADDRESS(sbdf, reg), reg & 3, 1); } -#undef PCI_CONF_ADDRESS -#define PCI_CONF_ADDRESS(bus, dev, func, reg) \ - (0x80000000 | (bus << 16) | (dev << 11) | (func << 8) | (reg & ~3)) - -uint16_t pci_conf_read16( - unsigned int seg, unsigned int bus, unsigned int dev, unsigned int func, - unsigned int reg) +uint16_t pci_conf_read16(pci_sbdf_t sbdf, unsigned int reg) { - u32 value; - - if ( seg || reg > 255 ) + if ( sbdf.seg || reg > 255 ) { - pci_mmcfg_read(seg, bus, PCI_DEVFN(dev, func), reg, 2, &value); + uint32_t value; + + pci_mmcfg_read(sbdf.seg, sbdf.bus, sbdf.devfn, reg, 2, &value); return value; } - else - { - BUG_ON((bus > 255) || (dev > 31) || (func > 7)); - return pci_conf_read(PCI_CONF_ADDRESS(bus, dev, func, reg), reg & 2, 2); - } + + return pci_conf_read(PCI_CONF_ADDRESS(sbdf, reg), reg & 2, 2); } +#undef PCI_CONF_ADDRESS +#define PCI_CONF_ADDRESS(bus, dev, func, reg) \ + (0x80000000 | (bus << 16) | (dev << 11) | (func << 8) | (reg & ~3)) + uint32_t pci_conf_read32( unsigned int seg, unsigned int bus, unsigned int dev, unsigned int func, unsigned int reg) diff --git a/xen/drivers/char/ehci-dbgp.c b/xen/drivers/char/ehci-dbgp.c index 71f0aaa6ac..64258da2dc 100644 --- a/xen/drivers/char/ehci-dbgp.c +++ b/xen/drivers/char/ehci-dbgp.c @@ -1016,7 +1016,7 @@ static void nvidia_set_debug_port(struct ehci_dbgp *dbgp, unsigned int port) static void __init detect_set_debug_port(struct ehci_dbgp *dbgp) { - if ( pci_conf_read16(0, dbgp->bus, dbgp->slot, dbgp->func, + if ( pci_conf_read16(PCI_SBDF(0, dbgp->bus, dbgp->slot, dbgp->func), PCI_VENDOR_ID) == 0x10de ) { dbgp_printk("using nvidia set_debug_port\n"); @@ -1416,7 +1416,8 @@ static void ehci_dbgp_suspend(struct serial_port *port) stop_timer(&dbgp->timer); dbgp->timer.expires = 0; - dbgp->pci_cr = pci_conf_read16(0, dbgp->bus, dbgp->slot, dbgp->func, + dbgp->pci_cr = pci_conf_read16(PCI_SBDF(0, dbgp->bus, dbgp->slot, + dbgp->func), PCI_COMMAND); dbgp->state = dbgp_unsafe; diff --git a/xen/drivers/char/ns16550.c b/xen/drivers/char/ns16550.c index 547270d0e1..99c1254cac 100644 --- a/xen/drivers/char/ns16550.c +++ b/xen/drivers/char/ns16550.c @@ -846,8 +846,8 @@ static void ns16550_suspend(struct serial_port *port) #ifdef CONFIG_HAS_PCI if ( uart->bar ) - uart->cr = pci_conf_read16(0, uart->ps_bdf[0], uart->ps_bdf[1], - uart->ps_bdf[2], PCI_COMMAND); + uart->cr = pci_conf_read16(PCI_SBDF(0, uart->ps_bdf[0], uart->ps_bdf[1], + uart->ps_bdf[2]), PCI_COMMAND); #endif } @@ -1064,10 +1064,12 @@ pci_uart_config(struct ns16550 *uart, bool_t skip_amt, unsigned int idx) u64 size = 0; const struct ns16550_config_param *param = uart_param; - nextf = (f || (pci_conf_read16(0, b, d, f, PCI_HEADER_TYPE) & + nextf = (f || (pci_conf_read16(PCI_SBDF(0, b, d, f), + PCI_HEADER_TYPE) & 0x80)) ? f + 1 : 8; - switch ( pci_conf_read16(0, b, d, f, PCI_CLASS_DEVICE) ) + switch ( pci_conf_read16(PCI_SBDF(0, b, d, f), + PCI_CLASS_DEVICE) ) { case 0x0700: /* single port serial */ case 0x0702: /* multi port serial */ @@ -1084,8 +1086,10 @@ pci_uart_config(struct ns16550 *uart, bool_t skip_amt, unsigned int idx) /* Check for params in uart_config lookup table */ for ( i = 0; i < ARRAY_SIZE(uart_config); i++ ) { - u16 vendor = pci_conf_read16(0, b, d, f, PCI_VENDOR_ID); - u16 device = pci_conf_read16(0, b, d, f, PCI_DEVICE_ID); + u16 vendor = pci_conf_read16(PCI_SBDF(0, b, d, f), + PCI_VENDOR_ID); + u16 device = pci_conf_read16(PCI_SBDF(0, b, d, f), + PCI_DEVICE_ID); if ( uart_config[i].vendor_id == vendor && uart_config[i].dev_id == device ) diff --git a/xen/drivers/passthrough/amd/iommu_init.c b/xen/drivers/passthrough/amd/iommu_init.c index 30de684f6d..1b3e7de10d 100644 --- a/xen/drivers/passthrough/amd/iommu_init.c +++ b/xen/drivers/passthrough/amd/iommu_init.c @@ -798,8 +798,7 @@ static bool_t __init set_iommu_interrupt_handler(struct amd_iommu *iommu) PCI_SLOT(iommu->bdf), PCI_FUNC(iommu->bdf)); return 0; } - control = pci_conf_read16(iommu->seg, PCI_BUS(iommu->bdf), - PCI_SLOT(iommu->bdf), PCI_FUNC(iommu->bdf), + control = pci_conf_read16(PCI_SBDF2(iommu->seg, iommu->bdf), iommu->msi.msi_attrib.pos + PCI_MSI_FLAGS); iommu->msi.msi.nvec = 1; if ( is_mask_bit_support(control) ) diff --git a/xen/drivers/passthrough/ats.h b/xen/drivers/passthrough/ats.h index bee13911c0..22ae209b37 100644 --- a/xen/drivers/passthrough/ats.h +++ b/xen/drivers/passthrough/ats.h @@ -35,8 +35,8 @@ static inline int pci_ats_enabled(int seg, int bus, int devfn) pos = pci_find_ext_capability(seg, bus, devfn, PCI_EXT_CAP_ID_ATS); BUG_ON(!pos); - value = pci_conf_read16(seg, bus, PCI_SLOT(devfn), PCI_FUNC(devfn), - pos + ATS_REG_CTL); + value = pci_conf_read16(PCI_SBDF3(seg, bus, devfn), pos + ATS_REG_CTL); + return value & ATS_ENABLE; } diff --git a/xen/drivers/passthrough/pci.c b/xen/drivers/passthrough/pci.c index 340e957954..703056f7b9 100644 --- a/xen/drivers/passthrough/pci.c +++ b/xen/drivers/passthrough/pci.c @@ -246,11 +246,11 @@ static void check_pdev(const struct pci_dev *pdev) if ( command_mask ) { - val = pci_conf_read16(seg, bus, dev, func, PCI_COMMAND); + val = pci_conf_read16(pdev->sbdf, PCI_COMMAND); if ( val & command_mask ) pci_conf_write16(seg, bus, dev, func, PCI_COMMAND, val & ~command_mask); - val = pci_conf_read16(seg, bus, dev, func, PCI_STATUS); + val = pci_conf_read16(pdev->sbdf, PCI_STATUS); if ( val & PCI_STATUS_CHECK ) { printk(XENLOG_INFO "%04x:%02x:%02x.%u status %04x -> %04x\n", @@ -265,11 +265,11 @@ static void check_pdev(const struct pci_dev *pdev) case PCI_HEADER_TYPE_BRIDGE: if ( !bridge_ctl_mask ) break; - val = pci_conf_read16(seg, bus, dev, func, PCI_BRIDGE_CONTROL); + val = pci_conf_read16(pdev->sbdf, PCI_BRIDGE_CONTROL); if ( val & bridge_ctl_mask ) pci_conf_write16(seg, bus, dev, func, PCI_BRIDGE_CONTROL, val & ~bridge_ctl_mask); - val = pci_conf_read16(seg, bus, dev, func, PCI_SEC_STATUS); + val = pci_conf_read16(pdev->sbdf, PCI_SEC_STATUS); if ( val & PCI_STATUS_CHECK ) { printk(XENLOG_INFO @@ -289,12 +289,8 @@ static void check_pdev(const struct pci_dev *pdev) static void apply_quirks(struct pci_dev *pdev) { - uint16_t vendor = pci_conf_read16(pdev->seg, pdev->bus, - PCI_SLOT(pdev->devfn), - PCI_FUNC(pdev->devfn), PCI_VENDOR_ID); - uint16_t device = pci_conf_read16(pdev->seg, pdev->bus, - PCI_SLOT(pdev->devfn), - PCI_FUNC(pdev->devfn), PCI_DEVICE_ID); + uint16_t vendor = pci_conf_read16(pdev->sbdf, PCI_VENDOR_ID); + uint16_t device = pci_conf_read16(pdev->sbdf, PCI_DEVICE_ID); static const struct { uint16_t vendor, device; } ignore_bars[] = { @@ -387,8 +383,7 @@ static struct pci_dev *alloc_pdev(struct pci_seg *pseg, u8 bus, u8 devfn) pos = pci_find_cap_offset(pseg->nr, bus, PCI_SLOT(devfn), PCI_FUNC(devfn), PCI_CAP_ID_EXP); BUG_ON(!pos); - cap = pci_conf_read16(pseg->nr, bus, PCI_SLOT(devfn), - PCI_FUNC(devfn), pos + PCI_EXP_DEVCAP); + cap = pci_conf_read16(pdev->sbdf, pos + PCI_EXP_DEVCAP); if ( cap & PCI_EXP_DEVCAP_PHANTOM ) { pdev->phantom_stride = 8 >> MASK_EXTR(cap, @@ -611,8 +606,8 @@ static void pci_enable_acs(struct pci_dev *pdev) if (!pos) return; - cap = pci_conf_read16(seg, bus, dev, func, pos + PCI_ACS_CAP); - ctrl = pci_conf_read16(seg, bus, dev, func, pos + PCI_ACS_CTRL); + cap = pci_conf_read16(pdev->sbdf, pos + PCI_ACS_CAP); + ctrl = pci_conf_read16(pdev->sbdf, pos + PCI_ACS_CTRL); /* Source Validation */ ctrl |= (cap & PCI_ACS_SV); @@ -743,7 +738,7 @@ int pci_add_device(u16 seg, u8 bus, u8 devfn, { unsigned int pos = pci_find_ext_capability(seg, bus, devfn, PCI_EXT_CAP_ID_SRIOV); - u16 ctrl = pci_conf_read16(seg, bus, slot, func, pos + PCI_SRIOV_CTRL); + u16 ctrl = pci_conf_read16(pdev->sbdf, pos + PCI_SRIOV_CTRL); if ( !pos ) /* Nothing */; @@ -937,13 +932,13 @@ enum pdev_type pdev_type(u16 seg, u8 bus, u8 devfn) u8 d = PCI_SLOT(devfn), f = PCI_FUNC(devfn); int pos = pci_find_cap_offset(seg, bus, d, f, PCI_CAP_ID_EXP); - class_device = pci_conf_read16(seg, bus, d, f, PCI_CLASS_DEVICE); + class_device = pci_conf_read16(PCI_SBDF(seg, bus, d, f), PCI_CLASS_DEVICE); switch ( class_device ) { case PCI_CLASS_BRIDGE_PCI: if ( !pos ) return DEV_TYPE_LEGACY_PCI_BRIDGE; - creg = pci_conf_read16(seg, bus, d, f, pos + PCI_EXP_FLAGS); + creg = pci_conf_read16(PCI_SBDF(seg, bus, d, f), pos + PCI_EXP_FLAGS); switch ( (creg & PCI_EXP_FLAGS_TYPE) >> 4 ) { case PCI_EXP_TYPE_PCI_BRIDGE: @@ -1040,8 +1035,7 @@ void pci_check_disable_device(u16 seg, u8 bus, u8 devfn) /* Tell the device to stop DMAing; we can't rely on the guest to * control it for us. */ devfn = pdev->devfn; - cword = pci_conf_read16(seg, bus, PCI_SLOT(devfn), PCI_FUNC(devfn), - PCI_COMMAND); + cword = pci_conf_read16(pdev->sbdf, PCI_COMMAND); pci_conf_write16(seg, bus, PCI_SLOT(devfn), PCI_FUNC(devfn), PCI_COMMAND, cword & ~PCI_COMMAND_MASTER); } @@ -1209,10 +1203,7 @@ static bool_t hest_match_type(const struct acpi_hest_header *hest_hdr, PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn), PCI_CAP_ID_EXP); - u8 pcie = MASK_EXTR(pci_conf_read16(pdev->seg, pdev->bus, - PCI_SLOT(pdev->devfn), - PCI_FUNC(pdev->devfn), - pos + PCI_EXP_FLAGS), + u8 pcie = MASK_EXTR(pci_conf_read16(pdev->sbdf, pos + PCI_EXP_FLAGS), PCI_EXP_FLAGS_TYPE); switch ( hest_hdr->type ) @@ -1222,8 +1213,7 @@ static bool_t hest_match_type(const struct acpi_hest_header *hest_hdr, case ACPI_HEST_TYPE_AER_ENDPOINT: return pcie == PCI_EXP_TYPE_ENDPOINT; case ACPI_HEST_TYPE_AER_BRIDGE: - return pci_conf_read16(pdev->seg, pdev->bus, PCI_SLOT(pdev->devfn), - PCI_FUNC(pdev->devfn), PCI_CLASS_DEVICE) == + return pci_conf_read16(pdev->sbdf, PCI_CLASS_DEVICE) == PCI_CLASS_BRIDGE_PCI; } diff --git a/xen/drivers/passthrough/vtd/quirks.c b/xen/drivers/passthrough/vtd/quirks.c index ff73b0e7f4..47597c9600 100644 --- a/xen/drivers/passthrough/vtd/quirks.c +++ b/xen/drivers/passthrough/vtd/quirks.c @@ -74,7 +74,7 @@ int is_igd_vt_enabled_quirk(void) return 1; /* integrated graphics on Intel platforms is located at 0:2.0 */ - ggc = pci_conf_read16(0, 0, IGD_DEV, 0, GGC); + ggc = pci_conf_read16(PCI_SBDF(0, 0, IGD_DEV, 0), GGC); return ( ggc & GGC_MEMORY_VT_ENABLED ? 1 : 0 ); } @@ -88,7 +88,7 @@ static void __init cantiga_b3_errata_init(void) u16 vid; u8 did_hi, rid; - vid = pci_conf_read16(0, 0, IGD_DEV, 0, 0); + vid = pci_conf_read16(PCI_SBDF(0, 0, IGD_DEV, 0), 0); if ( vid != 0x8086 ) return; @@ -424,11 +424,10 @@ void pci_vtd_quirk(const struct pci_dev *pdev) paddr_t pa; const char *action; - if ( pci_conf_read16(seg, bus, dev, func, PCI_VENDOR_ID) != - PCI_VENDOR_ID_INTEL ) + if ( pci_conf_read16(pdev->sbdf, PCI_VENDOR_ID) != PCI_VENDOR_ID_INTEL ) return; - switch ( pci_conf_read16(seg, bus, dev, func, PCI_DEVICE_ID) ) + switch ( pci_conf_read16(pdev->sbdf, PCI_DEVICE_ID) ) { /* * Mask reporting Intel VT-d faults to IOH core logic: diff --git a/xen/drivers/passthrough/x86/ats.c b/xen/drivers/passthrough/x86/ats.c index 59c163459a..cb022c598a 100644 --- a/xen/drivers/passthrough/x86/ats.c +++ b/xen/drivers/passthrough/x86/ats.c @@ -34,8 +34,7 @@ int enable_ats_device(struct pci_dev *pdev, struct list_head *ats_list) dprintk(XENLOG_INFO, "%04x:%02x:%02x.%u: ATS capability found\n", seg, bus, PCI_SLOT(devfn), PCI_FUNC(devfn)); - value = pci_conf_read16(seg, bus, PCI_SLOT(devfn), - PCI_FUNC(devfn), pos + ATS_REG_CTL); + value = pci_conf_read16(pdev->sbdf, pos + ATS_REG_CTL); if ( value & ATS_ENABLE ) { struct pci_dev *other; @@ -58,8 +57,7 @@ int enable_ats_device(struct pci_dev *pdev, struct list_head *ats_list) if ( pos ) { pdev->ats.cap_pos = pos; - value = pci_conf_read16(seg, bus, PCI_SLOT(devfn), - PCI_FUNC(devfn), pos + ATS_REG_CAP); + value = pci_conf_read16(pdev->sbdf, pos + ATS_REG_CAP); pdev->ats.queue_depth = value & ATS_QUEUE_DEPTH_MASK ?: ATS_QUEUE_DEPTH_MASK + 1; list_add(&pdev->ats.list, ats_list); @@ -81,8 +79,7 @@ void disable_ats_device(struct pci_dev *pdev) BUG_ON(!pdev->ats.cap_pos); - value = pci_conf_read16(seg, bus, PCI_SLOT(devfn), PCI_FUNC(devfn), - pdev->ats.cap_pos + ATS_REG_CTL); + value = pci_conf_read16(pdev->sbdf, pdev->ats.cap_pos + ATS_REG_CTL); value &= ~ATS_ENABLE; pci_conf_write16(seg, bus, PCI_SLOT(devfn), PCI_FUNC(devfn), pdev->ats.cap_pos + ATS_REG_CTL, value); diff --git a/xen/drivers/pci/pci.c b/xen/drivers/pci/pci.c index e3f883fc5c..5e5e0f0538 100644 --- a/xen/drivers/pci/pci.c +++ b/xen/drivers/pci/pci.c @@ -15,7 +15,7 @@ int pci_find_cap_offset(u16 seg, u8 bus, u8 dev, u8 func, u8 cap) u8 pos = PCI_CAPABILITY_LIST; u16 status; - status = pci_conf_read16(seg, bus, dev, func, PCI_STATUS); + status = pci_conf_read16(PCI_SBDF(seg, bus, dev, func), PCI_STATUS); if ( (status & PCI_STATUS_CAP_LIST) == 0 ) return 0; @@ -120,7 +120,7 @@ void pci_intx(const struct pci_dev *pdev, bool enable) uint8_t bus = pdev->bus; uint8_t slot = PCI_SLOT(pdev->devfn); uint8_t func = PCI_FUNC(pdev->devfn); - uint16_t cmd = pci_conf_read16(seg, bus, slot, func, PCI_COMMAND); + uint16_t cmd = pci_conf_read16(pdev->sbdf, PCI_COMMAND); if ( enable ) cmd &= ~PCI_COMMAND_INTX_DISABLE; diff --git a/xen/drivers/video/vga.c b/xen/drivers/video/vga.c index 78533ad0b1..454457ade8 100644 --- a/xen/drivers/video/vga.c +++ b/xen/drivers/video/vga.c @@ -121,10 +121,9 @@ void __init video_endboot(void) pcidevs_unlock(); if ( !pdev || - pci_conf_read16(0, bus, PCI_SLOT(devfn), PCI_FUNC(devfn), + pci_conf_read16(PCI_SBDF3(0, bus, devfn), PCI_CLASS_DEVICE) != 0x0300 || - !(pci_conf_read16(0, bus, PCI_SLOT(devfn), - PCI_FUNC(devfn), PCI_COMMAND) & + !(pci_conf_read16(PCI_SBDF3(0, bus, devfn), PCI_COMMAND) & (PCI_COMMAND_IO | PCI_COMMAND_MEMORY)) ) continue; @@ -141,8 +140,7 @@ void __init video_endboot(void) { case PCI_HEADER_TYPE_BRIDGE: case PCI_HEADER_TYPE_CARDBUS: - if ( pci_conf_read16(0, b, PCI_SLOT(df), - PCI_FUNC(df), + if ( pci_conf_read16(PCI_SBDF3(0, b, df), PCI_BRIDGE_CONTROL) & PCI_BRIDGE_CTL_VGA ) continue; diff --git a/xen/drivers/vpci/header.c b/xen/drivers/vpci/header.c index 564c7b6a7d..0b176b490a 100644 --- a/xen/drivers/vpci/header.c +++ b/xen/drivers/vpci/header.c @@ -336,8 +336,7 @@ static void cmd_write(const struct pci_dev *pdev, unsigned int reg, uint32_t cmd, void *data) { uint8_t slot = PCI_SLOT(pdev->devfn), func = PCI_FUNC(pdev->devfn); - uint16_t current_cmd = pci_conf_read16(pdev->seg, pdev->bus, slot, func, - reg); + uint16_t current_cmd = pci_conf_read16(pdev->sbdf, reg); /* * Let Dom0 play with all the bits directly except for the memory @@ -371,8 +370,7 @@ static void bar_write(const struct pci_dev *pdev, unsigned int reg, else val &= PCI_BASE_ADDRESS_MEM_MASK; - if ( pci_conf_read16(pdev->seg, pdev->bus, slot, func, PCI_COMMAND) & - PCI_COMMAND_MEMORY ) + if ( pci_conf_read16(pdev->sbdf, PCI_COMMAND) & PCI_COMMAND_MEMORY ) { /* If the value written is the current one avoid printing a warning. */ if ( val != (uint32_t)(bar->addr >> (hi ? 32 : 0)) ) @@ -409,8 +407,7 @@ static void rom_write(const struct pci_dev *pdev, unsigned int reg, struct vpci_header *header = &pdev->vpci->header; struct vpci_bar *rom = data; uint8_t slot = PCI_SLOT(pdev->devfn), func = PCI_FUNC(pdev->devfn); - uint16_t cmd = pci_conf_read16(pdev->seg, pdev->bus, slot, func, - PCI_COMMAND); + uint16_t cmd = pci_conf_read16(pdev->sbdf, PCI_COMMAND); bool new_enabled = val & PCI_ROM_ADDRESS_ENABLE; if ( (cmd & PCI_COMMAND_MEMORY) && header->rom_enabled && new_enabled ) @@ -489,7 +486,7 @@ static int init_bars(struct pci_dev *pdev) return 0; /* Disable memory decoding before sizing. */ - cmd = pci_conf_read16(pdev->seg, pdev->bus, slot, func, PCI_COMMAND); + cmd = pci_conf_read16(pdev->sbdf, PCI_COMMAND); if ( cmd & PCI_COMMAND_MEMORY ) pci_conf_write16(pdev->seg, pdev->bus, slot, func, PCI_COMMAND, cmd & ~PCI_COMMAND_MEMORY); diff --git a/xen/drivers/vpci/msi.c b/xen/drivers/vpci/msi.c index c4e1d2a411..8fe89fc912 100644 --- a/xen/drivers/vpci/msi.c +++ b/xen/drivers/vpci/msi.c @@ -211,8 +211,7 @@ static int init_msi(struct pci_dev *pdev) return ret; /* Get the maximum number of vectors the device supports. */ - control = pci_conf_read16(pdev->seg, pdev->bus, slot, func, - msi_control_reg(pos)); + control = pci_conf_read16(pdev->sbdf, msi_control_reg(pos)); /* * FIXME: I've only been able to test this code with devices using a single diff --git a/xen/drivers/vpci/msix.c b/xen/drivers/vpci/msix.c index af3ffa087d..8e6cd070d0 100644 --- a/xen/drivers/vpci/msix.c +++ b/xen/drivers/vpci/msix.c @@ -457,8 +457,7 @@ static int init_msix(struct pci_dev *pdev) if ( !msix_offset ) return 0; - control = pci_conf_read16(pdev->seg, pdev->bus, slot, func, - msix_control_reg(msix_offset)); + control = pci_conf_read16(pdev->sbdf, msix_control_reg(msix_offset)); max_entries = msix_table_size(control); diff --git a/xen/drivers/vpci/vpci.c b/xen/drivers/vpci/vpci.c index c4030333a5..1a4c2ee4f1 100644 --- a/xen/drivers/vpci/vpci.c +++ b/xen/drivers/vpci/vpci.c @@ -114,8 +114,7 @@ static void vpci_ignored_write(const struct pci_dev *pdev, unsigned int reg, uint32_t vpci_hw_read16(const struct pci_dev *pdev, unsigned int reg, void *data) { - return pci_conf_read16(pdev->seg, pdev->bus, PCI_SLOT(pdev->devfn), - PCI_FUNC(pdev->devfn), reg); + return pci_conf_read16(pdev->sbdf, reg); } uint32_t vpci_hw_read32(const struct pci_dev *pdev, unsigned int reg, @@ -223,19 +222,17 @@ static uint32_t vpci_read_hw(pci_sbdf_t sbdf, unsigned int reg, if ( reg & 1 ) { data = pci_conf_read8(sbdf, reg); - data |= pci_conf_read16(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.fn, - reg + 1) << 8; + data |= pci_conf_read16(sbdf, reg + 1) << 8; } else { - data = pci_conf_read16(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.fn, - reg); + data = pci_conf_read16(sbdf, reg); data |= pci_conf_read8(sbdf, reg + 2) << 16; } break; case 2: - data = pci_conf_read16(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.fn, reg); + data = pci_conf_read16(sbdf, reg); break; case 1: diff --git a/xen/include/xen/pci.h b/xen/include/xen/pci.h index b2a62cb366..cf4c223f7c 100644 --- a/xen/include/xen/pci.h +++ b/xen/include/xen/pci.h @@ -173,9 +173,7 @@ struct pci_dev *pci_get_pdev_by_domain(const struct domain *, int seg, void pci_check_disable_device(u16 seg, u8 bus, u8 devfn); uint8_t pci_conf_read8(pci_sbdf_t sbdf, unsigned int reg); -uint16_t pci_conf_read16( - unsigned int seg, unsigned int bus, unsigned int dev, unsigned int func, - unsigned int reg); +uint16_t pci_conf_read16(pci_sbdf_t sbdf, unsigned int reg); uint32_t pci_conf_read32( unsigned int seg, unsigned int bus, unsigned int dev, unsigned int func, unsigned int reg); From patchwork Fri Jun 7 09:22:28 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Roger_Pau_Monn=C3=A9?= X-Patchwork-Id: 10981179 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 47AA6924 for ; Fri, 7 Jun 2019 09:25:09 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 33CB828B27 for ; Fri, 7 Jun 2019 09:25:09 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 281C428B30; Fri, 7 Jun 2019 09:25:09 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 3640728B27 for ; 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d="scan'208";a="1451672" From: Roger Pau Monne To: Date: Fri, 7 Jun 2019 11:22:28 +0200 Message-ID: <20190607092232.83179-10-roger.pau@citrix.com> X-Mailer: git-send-email 2.20.1 (Apple Git-117) In-Reply-To: <20190607092232.83179-1-roger.pau@citrix.com> References: <20190607092232.83179-1-roger.pau@citrix.com> MIME-Version: 1.0 Subject: [Xen-devel] [PATCH v3 09/13] pci: switch pci_conf_read32 to use pci_sbdf_t X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Kevin Tian , Stefano Stabellini , Suravee Suthikulpanit , Wei Liu , Konrad Rzeszutek Wilk , George Dunlap , Andrew Cooper , Ian Jackson , Tim Deegan , Julien Grall , Jan Beulich , Brian Woods , Roger Pau Monne Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP This reduces the number of parameters of the function to two, and simplifies some of the calling sites. Signed-off-by: Roger Pau Monné Acked-by: Brian Woods --- Cc: Jan Beulich Cc: Andrew Cooper Cc: Wei Liu Cc: George Dunlap Cc: Ian Jackson Cc: Julien Grall Cc: Konrad Rzeszutek Wilk Cc: Stefano Stabellini Cc: Tim Deegan Cc: Suravee Suthikulpanit Cc: Brian Woods Cc: Kevin Tian --- xen/arch/x86/cpu/amd.c | 7 +++-- xen/arch/x86/mm.c | 2 +- xen/arch/x86/msi.c | 28 ++++++----------- xen/arch/x86/oprofile/op_model_athlon.c | 6 ++-- xen/arch/x86/x86_64/mmconf-fam10h.c | 8 +++-- xen/arch/x86/x86_64/mmconfig-shared.c | 12 ++++---- xen/arch/x86/x86_64/pci.c | 27 +++++++--------- xen/drivers/char/ehci-dbgp.c | 20 +++++++----- xen/drivers/char/ns16550.c | 18 ++++++----- xen/drivers/passthrough/amd/iommu_detect.c | 2 +- xen/drivers/passthrough/amd/iommu_init.c | 4 +-- xen/drivers/passthrough/pci.c | 15 ++++----- xen/drivers/passthrough/vtd/quirks.c | 36 ++++++++++++---------- xen/drivers/pci/pci.c | 4 +-- xen/drivers/vpci/header.c | 6 ++-- xen/drivers/vpci/msix.c | 6 ++-- xen/drivers/vpci/vpci.c | 5 ++- xen/include/xen/pci.h | 4 +-- 18 files changed, 101 insertions(+), 109 deletions(-) diff --git a/xen/arch/x86/cpu/amd.c b/xen/arch/x86/cpu/amd.c index 3c069391f4..37f60c0862 100644 --- a/xen/arch/x86/cpu/amd.c +++ b/xen/arch/x86/cpu/amd.c @@ -417,7 +417,8 @@ static void disable_c1_ramping(void) int node, nr_nodes; /* Read the number of nodes from the first Northbridge. */ - nr_nodes = ((pci_conf_read32(0, 0, 0x18, 0x0, 0x60)>>4)&0x07)+1; + nr_nodes = ((pci_conf_read32(PCI_SBDF(0, 0, 0x18, 0), 0x60) >> 4) & + 0x07) + 1; for (node = 0; node < nr_nodes; node++) { /* PMM7: bus=0, dev=0x18+node, function=0x3, register=0x87. */ pmm7 = pci_conf_read8(PCI_SBDF(0, 0, 0x18 + node, 3), 0x87); @@ -696,8 +697,8 @@ static void init_amd(struct cpuinfo_x86 *c) if (c->x86 == 0x16 && c->x86_model <= 0xf) { if (c == &boot_cpu_data) { - l = pci_conf_read32(0, 0, 0x18, 0x3, 0x58); - h = pci_conf_read32(0, 0, 0x18, 0x3, 0x5c); + l = pci_conf_read32(PCI_SBDF(0, 0, 0x18, 3), 0x58); + h = pci_conf_read32(PCI_SBDF(0, 0, 0x18, 3), 0x5c); if ((l & 0x1f) | (h & 0x1)) printk(KERN_WARNING "Applying workaround for erratum 792: %s%s%s\n", diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c index df2c0130f1..e67119dbe6 100644 --- a/xen/arch/x86/mm.c +++ b/xen/arch/x86/mm.c @@ -5949,7 +5949,7 @@ const struct platform_bad_page *__init get_platform_badpages(unsigned int *array } *array_size = ARRAY_SIZE(snb_bad_pages); - igd_id = pci_conf_read32(0, 0, 2, 0, 0); + igd_id = pci_conf_read32(PCI_SBDF(0, 0, 2, 0), 0); if ( IS_SNB_GFX(igd_id) ) return snb_bad_pages; diff --git a/xen/arch/x86/msi.c b/xen/arch/x86/msi.c index ed986261c3..392cbecfe4 100644 --- a/xen/arch/x86/msi.c +++ b/xen/arch/x86/msi.c @@ -191,16 +191,13 @@ static bool read_msi_msg(struct msi_desc *entry, struct msi_msg *msg) { struct pci_dev *dev = entry->dev; int pos = entry->msi_attrib.pos; - u16 data, seg = dev->seg; - u8 bus = dev->bus; - u8 slot = PCI_SLOT(dev->devfn); - u8 func = PCI_FUNC(dev->devfn); + uint16_t data; - msg->address_lo = pci_conf_read32(seg, bus, slot, func, + msg->address_lo = pci_conf_read32(dev->sbdf, msi_lower_address_reg(pos)); if ( entry->msi_attrib.is_64 ) { - msg->address_hi = pci_conf_read32(seg, bus, slot, func, + msg->address_hi = pci_conf_read32(dev->sbdf, msi_upper_address_reg(pos)); data = pci_conf_read16(dev->sbdf, msi_data_reg(pos, 1)); } @@ -396,7 +393,7 @@ static bool msi_set_mask_bit(struct irq_desc *desc, bool host, bool guest) { u32 mask_bits; - mask_bits = pci_conf_read32(seg, bus, slot, func, entry->msi.mpos); + mask_bits = pci_conf_read32(pdev->sbdf, entry->msi.mpos); mask_bits &= ~((u32)1 << entry->msi_attrib.entry_nr); mask_bits |= (u32)flag << entry->msi_attrib.entry_nr; pci_conf_write32(seg, bus, slot, func, entry->msi.mpos, mask_bits); @@ -465,10 +462,7 @@ static int msi_get_mask_bit(const struct msi_desc *entry) case PCI_CAP_ID_MSI: if ( !entry->msi_attrib.maskbit ) break; - return (pci_conf_read32(entry->dev->seg, entry->dev->bus, - PCI_SLOT(entry->dev->devfn), - PCI_FUNC(entry->dev->devfn), - entry->msi.mpos) >> + return (pci_conf_read32(entry->dev->sbdf, entry->msi.mpos) >> entry->msi_attrib.entry_nr) & 1; case PCI_CAP_ID_MSIX: if ( unlikely(!msix_memory_decoded(entry->dev, @@ -723,7 +717,7 @@ static int msi_capability_init(struct pci_dev *dev, u32 maskbits; /* All MSIs are unmasked by default, Mask them all */ - maskbits = pci_conf_read32(seg, bus, slot, func, mpos); + maskbits = pci_conf_read32(dev->sbdf, mpos); maskbits |= ~(u32)0 >> (32 - maxvec); pci_conf_write32(seg, bus, slot, func, mpos, maskbits); } @@ -808,7 +802,7 @@ static u64 read_pci_mem_bar(u16 seg, u8 bus, u8 slot, u8 func, u8 bir, int vf) if ( bir >= limit ) return 0; - addr = pci_conf_read32(seg, bus, slot, func, base + bir * 4); + addr = pci_conf_read32(PCI_SBDF(seg, bus, slot, func), base + bir * 4); if ( (addr & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_IO ) return 0; if ( (addr & PCI_BASE_ADDRESS_MEM_TYPE_MASK) == PCI_BASE_ADDRESS_MEM_TYPE_64 ) @@ -817,7 +811,7 @@ static u64 read_pci_mem_bar(u16 seg, u8 bus, u8 slot, u8 func, u8 bir, int vf) if ( ++bir >= limit ) return 0; return addr + disp + - ((u64)pci_conf_read32(seg, bus, slot, func, + ((u64)pci_conf_read32(PCI_SBDF(seg, bus, slot, func), base + bir * 4) << 32); } return (addr & PCI_BASE_ADDRESS_MEM_MASK) + disp; @@ -886,8 +880,7 @@ static int msix_capability_init(struct pci_dev *dev, } /* Locate MSI-X table region */ - table_offset = pci_conf_read32(seg, bus, slot, func, - msix_table_offset_reg(pos)); + table_offset = pci_conf_read32(dev->sbdf, msix_table_offset_reg(pos)); bir = (u8)(table_offset & PCI_MSIX_BIRMASK); table_offset &= ~PCI_MSIX_BIRMASK; @@ -933,8 +926,7 @@ static int msix_capability_init(struct pci_dev *dev, WARN_ON(rangeset_overlaps_range(mmio_ro_ranges, msix->table.first, msix->table.last)); - pba_offset = pci_conf_read32(seg, bus, slot, func, - msix_pba_offset_reg(pos)); + pba_offset = pci_conf_read32(dev->sbdf, msix_pba_offset_reg(pos)); bir = (u8)(pba_offset & PCI_MSIX_BIRMASK); pba_paddr = read_pci_mem_bar(seg, pbus, pslot, pfunc, bir, vf); WARN_ON(!pba_paddr); diff --git a/xen/arch/x86/oprofile/op_model_athlon.c b/xen/arch/x86/oprofile/op_model_athlon.c index 3d6e26f636..3bf0b0214d 100644 --- a/xen/arch/x86/oprofile/op_model_athlon.c +++ b/xen/arch/x86/oprofile/op_model_athlon.c @@ -463,7 +463,8 @@ static int __init init_ibs_nmi(void) for (bus = 0; bus < 256; bus++) { for (dev = 0; dev < 32; dev++) { for (func = 0; func < 8; func++) { - id = pci_conf_read32(0, bus, dev, func, PCI_VENDOR_ID); + id = pci_conf_read32(PCI_SBDF(0, bus, dev, func), + PCI_VENDOR_ID); vendor_id = id & 0xffff; dev_id = (id >> 16) & 0xffff; @@ -474,7 +475,8 @@ static int __init init_ibs_nmi(void) pci_conf_write32(0, bus, dev, func, IBSCTL, IBSCTL_LVTOFFSETVAL | APIC_EILVT_LVTOFF_IBS); - value = pci_conf_read32(0, bus, dev, func, IBSCTL); + value = pci_conf_read32(PCI_SBDF(0, bus, dev, func), + IBSCTL); if (value != (IBSCTL_LVTOFFSETVAL | APIC_EILVT_LVTOFF_IBS)) { diff --git a/xen/arch/x86/x86_64/mmconf-fam10h.c b/xen/arch/x86/x86_64/mmconf-fam10h.c index ed0acb9968..f997688ad4 100644 --- a/xen/arch/x86/x86_64/mmconf-fam10h.c +++ b/xen/arch/x86/x86_64/mmconf-fam10h.c @@ -52,7 +52,7 @@ static void __init get_fam10h_pci_mmconf_base(void) bus = pci_probes[i].bus; slot = pci_probes[i].slot; - id = pci_conf_read32(0, bus, slot, 0, PCI_VENDOR_ID); + id = pci_conf_read32(PCI_SBDF(0, bus, slot, 0), PCI_VENDOR_ID); vendor = id & 0xffff; device = (id>>16) & 0xffff; @@ -83,12 +83,14 @@ static void __init get_fam10h_pci_mmconf_base(void) * above 4G */ for (hi_mmio_num = i = 0; i < 8; i++) { - val = pci_conf_read32(0, bus, slot, 1, 0x80 + (i << 3)); + val = pci_conf_read32(PCI_SBDF(0, bus, slot, 1), + 0x80 + (i << 3)); if (!(val & 3)) continue; start = (val & 0xffffff00) << 8; /* 39:16 on 31:8*/ - val = pci_conf_read32(0, bus, slot, 1, 0x84 + (i << 3)); + val = pci_conf_read32(PCI_SBDF(0, bus, slot, 1), + 0x84 + (i << 3)); end = ((val & 0xffffff00) << 8) | 0xffff; /* 39:16 on 31:8*/ if (end < tom2) diff --git a/xen/arch/x86/x86_64/mmconfig-shared.c b/xen/arch/x86/x86_64/mmconfig-shared.c index 9d1db590d9..cc08b52a35 100644 --- a/xen/arch/x86/x86_64/mmconfig-shared.c +++ b/xen/arch/x86/x86_64/mmconfig-shared.c @@ -89,7 +89,7 @@ static const char __init *pci_mmcfg_intel_945(void) pci_mmcfg_config_num = 1; - pciexbar = pci_conf_read32(0, 0, 0, 0, 0x48); + pciexbar = pci_conf_read32(PCI_SBDF(0, 0, 0, 0), 0x48); /* Enable bit */ if (!(pciexbar & 1)) @@ -213,14 +213,14 @@ static const char __init *pci_mmcfg_nvidia_mcp55(void) u32 l, extcfg; u16 vendor, device; - l = pci_conf_read32(0, bus, 0, 0, 0); + l = pci_conf_read32(PCI_SBDF(0, bus, 0, 0), 0); vendor = l & 0xffff; device = (l >> 16) & 0xffff; if (PCI_VENDOR_ID_NVIDIA != vendor || 0x0369 != device) continue; - extcfg = pci_conf_read32(0, bus, 0, 0, extcfg_regnum); + extcfg = pci_conf_read32(PCI_SBDF(0, bus, 0, 0), extcfg_regnum); if (extcfg & extcfg_enable_mask) i++; @@ -239,14 +239,14 @@ static const char __init *pci_mmcfg_nvidia_mcp55(void) u16 vendor, device; int size_index; - l = pci_conf_read32(0, bus, 0, 0, 0); + l = pci_conf_read32(PCI_SBDF(0, bus, 0, 0), 0); vendor = l & 0xffff; device = (l >> 16) & 0xffff; if (PCI_VENDOR_ID_NVIDIA != vendor || 0x0369 != device) continue; - extcfg = pci_conf_read32(0, bus, 0, 0, extcfg_regnum); + extcfg = pci_conf_read32(PCI_SBDF(0, bus, 0, 0), extcfg_regnum); if (!(extcfg & extcfg_enable_mask)) continue; @@ -312,7 +312,7 @@ static int __init pci_mmcfg_check_hostbridge(void) for (i = 0; !name && i < ARRAY_SIZE(pci_mmcfg_probes); i++) { bus = pci_mmcfg_probes[i].bus; devfn = pci_mmcfg_probes[i].devfn; - l = pci_conf_read32(0, bus, PCI_SLOT(devfn), PCI_FUNC(devfn), 0); + l = pci_conf_read32(PCI_SBDF3(0, bus, devfn), 0); vendor = l & 0xffff; device = (l >> 16) & 0xffff; diff --git a/xen/arch/x86/x86_64/pci.c b/xen/arch/x86/x86_64/pci.c index fe36b60c50..b8b82a6fe7 100644 --- a/xen/arch/x86/x86_64/pci.c +++ b/xen/arch/x86/x86_64/pci.c @@ -37,28 +37,23 @@ uint16_t pci_conf_read16(pci_sbdf_t sbdf, unsigned int reg) return pci_conf_read(PCI_CONF_ADDRESS(sbdf, reg), reg & 2, 2); } -#undef PCI_CONF_ADDRESS -#define PCI_CONF_ADDRESS(bus, dev, func, reg) \ - (0x80000000 | (bus << 16) | (dev << 11) | (func << 8) | (reg & ~3)) - -uint32_t pci_conf_read32( - unsigned int seg, unsigned int bus, unsigned int dev, unsigned int func, - unsigned int reg) +uint32_t pci_conf_read32(pci_sbdf_t sbdf, unsigned int reg) { - u32 value; - - if ( seg || reg > 255 ) + if ( sbdf.seg || reg > 255 ) { - pci_mmcfg_read(seg, bus, PCI_DEVFN(dev, func), reg, 4, &value); + uint32_t value; + + pci_mmcfg_read(sbdf.seg, sbdf.bus, sbdf.devfn, reg, 4, &value); return value; } - else - { - BUG_ON((bus > 255) || (dev > 31) || (func > 7)); - return pci_conf_read(PCI_CONF_ADDRESS(bus, dev, func, reg), 0, 4); - } + + return pci_conf_read(PCI_CONF_ADDRESS(sbdf, reg), 0, 4); } +#undef PCI_CONF_ADDRESS +#define PCI_CONF_ADDRESS(bus, dev, func, reg) \ + (0x80000000 | (bus << 16) | (dev << 11) | (func << 8) | (reg & ~3)) + void pci_conf_write8( unsigned int seg, unsigned int bus, unsigned int dev, unsigned int func, unsigned int reg, uint8_t data) diff --git a/xen/drivers/char/ehci-dbgp.c b/xen/drivers/char/ehci-dbgp.c index 64258da2dc..9b9025fb33 100644 --- a/xen/drivers/char/ehci-dbgp.c +++ b/xen/drivers/char/ehci-dbgp.c @@ -682,7 +682,8 @@ static int dbgp_control_msg(struct ehci_dbgp *dbgp, unsigned int devnum, static unsigned int __init __find_dbgp(u8 bus, u8 slot, u8 func) { - u32 class = pci_conf_read32(0, bus, slot, func, PCI_CLASS_REVISION); + uint32_t class = pci_conf_read32(PCI_SBDF(0, bus, slot, func), + PCI_CLASS_REVISION); if ( (class >> 8) != PCI_CLASS_SERIAL_USB_EHCI ) return 0; @@ -1006,7 +1007,8 @@ static set_debug_port_t __read_mostly set_debug_port = default_set_debug_port; static void nvidia_set_debug_port(struct ehci_dbgp *dbgp, unsigned int port) { - u32 dword = pci_conf_read32(0, dbgp->bus, dbgp->slot, dbgp->func, 0x74); + uint32_t dword = pci_conf_read32(PCI_SBDF(0, dbgp->bus, dbgp->slot, + dbgp->func), 0x74); dword &= ~(0x0f << 12); dword |= (port & 0x0f) << 12; @@ -1039,7 +1041,8 @@ static void ehci_dbgp_bios_handoff(struct ehci_dbgp *dbgp, u32 hcc_params) if ( !offset ) return; - cap = pci_conf_read32(0, dbgp->bus, dbgp->slot, dbgp->func, offset); + cap = pci_conf_read32(PCI_SBDF(0, dbgp->bus, dbgp->slot, dbgp->func), + offset); dbgp_printk("dbgp: EHCI BIOS state %08x\n", cap); if ( (cap & 0xff) == 1 && (cap & EHCI_USBLEGSUP_BIOS) ) @@ -1054,7 +1057,8 @@ static void ehci_dbgp_bios_handoff(struct ehci_dbgp *dbgp, u32 hcc_params) { mdelay(10); msec -= 10; - cap = pci_conf_read32(0, dbgp->bus, dbgp->slot, dbgp->func, offset); + cap = pci_conf_read32(PCI_SBDF(0, dbgp->bus, dbgp->slot, dbgp->func), + offset); } if ( cap & EHCI_USBLEGSUP_BIOS ) @@ -1307,7 +1311,7 @@ static void __init ehci_dbgp_init_preirq(struct serial_port *port) u32 debug_port, offset; void __iomem *ehci_bar; - debug_port = pci_conf_read32(0, dbgp->bus, dbgp->slot, dbgp->func, + debug_port = pci_conf_read32(PCI_SBDF(0, dbgp->bus, dbgp->slot, dbgp->func), dbgp->cap); offset = (debug_port >> 16) & 0xfff; @@ -1504,7 +1508,7 @@ void __init ehci_dbgp_init(void) else return; - debug_port = pci_conf_read32(0, dbgp->bus, dbgp->slot, dbgp->func, + debug_port = pci_conf_read32(PCI_SBDF(0, dbgp->bus, dbgp->slot, dbgp->func), dbgp->cap); dbgp->bar = (debug_port >> 29) & 0x7; dbgp->bar = ((dbgp->bar - 1) * 4) + PCI_BASE_ADDRESS_0; @@ -1516,8 +1520,8 @@ void __init ehci_dbgp_init(void) return; } - dbgp->bar_val = bar_val = pci_conf_read32(0, dbgp->bus, dbgp->slot, - dbgp->func, dbgp->bar); + dbgp->bar_val = bar_val = pci_conf_read32(PCI_SBDF(0, dbgp->bus, dbgp->slot, + dbgp->func), dbgp->bar); dbgp_printk("bar_val: %08x\n", bar_val); if ( bar_val & ~PCI_BASE_ADDRESS_MEM_MASK ) { diff --git a/xen/drivers/char/ns16550.c b/xen/drivers/char/ns16550.c index 99c1254cac..fe71406cc1 100644 --- a/xen/drivers/char/ns16550.c +++ b/xen/drivers/char/ns16550.c @@ -1112,27 +1112,28 @@ pci_uart_config(struct ns16550 *uart, bool_t skip_amt, unsigned int idx) } uart->io_base = 0; - bar = pci_conf_read32(0, b, d, f, - PCI_BASE_ADDRESS_0 + bar_idx*4); + bar = pci_conf_read32(PCI_SBDF(0, b, d, f), + PCI_BASE_ADDRESS_0 + bar_idx * 4); /* MMIO based */ if ( param->mmio && !(bar & PCI_BASE_ADDRESS_SPACE_IO) ) { pci_conf_write32(0, b, d, f, PCI_BASE_ADDRESS_0 + bar_idx*4, ~0u); - len = pci_conf_read32(0, b, d, f, PCI_BASE_ADDRESS_0 + bar_idx*4); + len = pci_conf_read32(PCI_SBDF(0, b, d, f), + PCI_BASE_ADDRESS_0 + bar_idx * 4); pci_conf_write32(0, b, d, f, PCI_BASE_ADDRESS_0 + bar_idx*4, bar); /* Handle 64 bit BAR if found */ if ( bar & PCI_BASE_ADDRESS_MEM_TYPE_64 ) { - bar_64 = pci_conf_read32(0, b, d, f, - PCI_BASE_ADDRESS_0 + (bar_idx+1)*4); + bar_64 = pci_conf_read32(PCI_SBDF(0, b, d, f), + PCI_BASE_ADDRESS_0 + (bar_idx + 1) * 4); pci_conf_write32(0, b, d, f, PCI_BASE_ADDRESS_0 + (bar_idx+1)*4, ~0u); - len_64 = pci_conf_read32(0, b, d, f, - PCI_BASE_ADDRESS_0 + (bar_idx+1)*4); + len_64 = pci_conf_read32(PCI_SBDF(0, b, d, f), + PCI_BASE_ADDRESS_0 + (bar_idx + 1) * 4); pci_conf_write32(0, b, d, f, PCI_BASE_ADDRESS_0 + (bar_idx+1)*4, bar_64); size = ((u64)~0 << 32) | PCI_BASE_ADDRESS_MEM_MASK; @@ -1149,7 +1150,8 @@ pci_uart_config(struct ns16550 *uart, bool_t skip_amt, unsigned int idx) { pci_conf_write32(0, b, d, f, PCI_BASE_ADDRESS_0 + bar_idx*4, ~0u); - len = pci_conf_read32(0, b, d, f, PCI_BASE_ADDRESS_0); + len = pci_conf_read32(PCI_SBDF(0, b, d, f), + PCI_BASE_ADDRESS_0); pci_conf_write32(0, b, d, f, PCI_BASE_ADDRESS_0 + bar_idx*4, bar); size = len & PCI_BASE_ADDRESS_IO_MASK; diff --git a/xen/drivers/passthrough/amd/iommu_detect.c b/xen/drivers/passthrough/amd/iommu_detect.c index 3c5d4de1a3..069df156de 100644 --- a/xen/drivers/passthrough/amd/iommu_detect.c +++ b/xen/drivers/passthrough/amd/iommu_detect.c @@ -48,7 +48,7 @@ static int __init get_iommu_capabilities( { u8 type; - iommu->cap.header = pci_conf_read32(seg, bus, dev, func, cap_ptr); + iommu->cap.header = pci_conf_read32(PCI_SBDF(seg, bus, dev, func), cap_ptr); type = get_field_from_reg_u32(iommu->cap.header, PCI_CAP_TYPE_MASK, PCI_CAP_TYPE_SHIFT); diff --git a/xen/drivers/passthrough/amd/iommu_init.c b/xen/drivers/passthrough/amd/iommu_init.c index 1b3e7de10d..6083d51b91 100644 --- a/xen/drivers/passthrough/amd/iommu_init.c +++ b/xen/drivers/passthrough/amd/iommu_init.c @@ -844,7 +844,7 @@ static void amd_iommu_erratum_746_workaround(struct amd_iommu *iommu) return; pci_conf_write32(iommu->seg, bus, dev, func, 0xf0, 0x90); - value = pci_conf_read32(iommu->seg, bus, dev, func, 0xf4); + value = pci_conf_read32(PCI_SBDF2(iommu->seg, iommu->bdf), 0xf4); if ( value & (1 << 2) ) return; @@ -1231,7 +1231,7 @@ static bool_t __init amd_sp5100_erratum28(void) for (bus = 0; bus < 256; bus++) { - id = pci_conf_read32(0, bus, 0x14, 0, PCI_VENDOR_ID); + id = pci_conf_read32(PCI_SBDF(0, bus, 0x14, 0), PCI_VENDOR_ID); vendor_id = id & 0xffff; dev_id = (id >> 16) & 0xffff; diff --git a/xen/drivers/passthrough/pci.c b/xen/drivers/passthrough/pci.c index 703056f7b9..80887af66c 100644 --- a/xen/drivers/passthrough/pci.c +++ b/xen/drivers/passthrough/pci.c @@ -632,8 +632,7 @@ unsigned int pci_size_mem_bar(pci_sbdf_t sbdf, unsigned int pos, uint64_t *paddr, uint64_t *psize, unsigned int flags) { - uint32_t hi = 0, bar = pci_conf_read32(sbdf.seg, sbdf.bus, sbdf.dev, - sbdf.fn, pos); + uint32_t hi = 0, bar = pci_conf_read32(sbdf, pos); uint64_t size; bool is64bits = !(flags & PCI_BAR_ROM) && (bar & PCI_BASE_ADDRESS_MEM_TYPE_MASK) == PCI_BASE_ADDRESS_MEM_TYPE_64; @@ -655,15 +654,13 @@ unsigned int pci_size_mem_bar(pci_sbdf_t sbdf, unsigned int pos, *psize = 0; return 1; } - hi = pci_conf_read32(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.fn, pos + 4); + hi = pci_conf_read32(sbdf, pos + 4); pci_conf_write32(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.fn, pos + 4, ~0); } - size = pci_conf_read32(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.fn, - pos) & mask; + size = pci_conf_read32(sbdf, pos) & mask; if ( is64bits ) { - size |= (uint64_t)pci_conf_read32(sbdf.seg, sbdf.bus, sbdf.dev, - sbdf.fn, pos + 4) << 32; + size |= (uint64_t)pci_conf_read32(sbdf, pos + 4) << 32; pci_conf_write32(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.fn, pos + 4, hi); } else if ( size ) @@ -750,7 +747,7 @@ int pci_add_device(u16 seg, u8 bus, u8 devfn, for ( i = 0; i < PCI_SRIOV_NUM_BARS; ) { unsigned int idx = pos + PCI_SRIOV_BAR + i * 4; - u32 bar = pci_conf_read32(seg, bus, slot, func, idx); + u32 bar = pci_conf_read32(pdev->sbdf, idx); pci_sbdf_t sbdf = PCI_SBDF3(seg, bus, devfn); if ( (bar & PCI_BASE_ADDRESS_SPACE) == @@ -1002,7 +999,7 @@ bool_t __init pci_device_detect(u16 seg, u8 bus, u8 dev, u8 func) { u32 vendor; - vendor = pci_conf_read32(seg, bus, dev, func, PCI_VENDOR_ID); + vendor = pci_conf_read32(PCI_SBDF(seg, bus, dev, func), PCI_VENDOR_ID); /* some broken boards return 0 or ~0 if a slot is empty: */ if ( (vendor == 0xffffffff) || (vendor == 0x00000000) || (vendor == 0x0000ffff) || (vendor == 0xffff0000) ) diff --git a/xen/drivers/passthrough/vtd/quirks.c b/xen/drivers/passthrough/vtd/quirks.c index 47597c9600..28e9597014 100644 --- a/xen/drivers/passthrough/vtd/quirks.c +++ b/xen/drivers/passthrough/vtd/quirks.c @@ -128,9 +128,11 @@ static void __init map_igd_reg(void) if ( igd_reg_va ) return; - igd_mmio = pci_conf_read32(0, 0, IGD_DEV, 0, PCI_BASE_ADDRESS_1); + igd_mmio = pci_conf_read32(PCI_SBDF(0, 0, IGD_DEV, 0), + PCI_BASE_ADDRESS_1); igd_mmio <<= 32; - igd_mmio += pci_conf_read32(0, 0, IGD_DEV, 0, PCI_BASE_ADDRESS_0); + igd_mmio += pci_conf_read32(PCI_SBDF(0, 0, IGD_DEV, 0), + PCI_BASE_ADDRESS_0); igd_reg_va = ioremap(igd_mmio & IGD_BAR_MASK, 0x3000); } @@ -280,7 +282,7 @@ static void __init tylersburg_intremap_quirk(void) for ( bus = 0; bus < 0x100; bus++ ) { /* Match on System Management Registers on Device 20 Function 0 */ - device = pci_conf_read32(0, bus, 20, 0, PCI_VENDOR_ID); + device = pci_conf_read32(PCI_SBDF(0, bus, 20, 0), PCI_VENDOR_ID); rev = pci_conf_read8(PCI_SBDF(0, bus, 20, 0), PCI_REVISION_ID); if ( rev == 0x13 && device == 0x342e8086 ) @@ -296,8 +298,8 @@ static void __init tylersburg_intremap_quirk(void) /* initialize platform identification flags */ void __init platform_quirks_init(void) { - ioh_id = pci_conf_read32(0, 0, IOH_DEV, 0, 0); - igd_id = pci_conf_read32(0, 0, IGD_DEV, 0, 0); + ioh_id = pci_conf_read32(PCI_SBDF(0, 0, IOH_DEV, 0), 0); + igd_id = pci_conf_read32(PCI_SBDF(0, 0, IGD_DEV, 0), 0); /* Mobile 4 Series Chipset neglects to set RWBF capability. */ if ( ioh_id == 0x2a408086 ) @@ -356,15 +358,15 @@ int me_wifi_quirk(struct domain *domain, u8 bus, u8 devfn, int map) u32 id; int rc = 0; - id = pci_conf_read32(0, 0, 0, 0, 0); + id = pci_conf_read32(PCI_SBDF(0, 0, 0, 0), 0); if ( IS_CTG(id) ) { /* quit if ME does not exist */ - if ( pci_conf_read32(0, 0, 3, 0, 0) == 0xffffffff ) + if ( pci_conf_read32(PCI_SBDF(0, 0, 3, 0), 0) == 0xffffffff ) return 0; /* if device is WLAN device, map ME phantom device 0:3.7 */ - id = pci_conf_read32(0, bus, PCI_SLOT(devfn), PCI_FUNC(devfn), 0); + id = pci_conf_read32(PCI_SBDF3(0, bus, devfn), 0); switch (id) { case 0x42328086: @@ -384,11 +386,11 @@ int me_wifi_quirk(struct domain *domain, u8 bus, u8 devfn, int map) else if ( IS_ILK(id) || IS_CPT(id) ) { /* quit if ME does not exist */ - if ( pci_conf_read32(0, 0, 22, 0, 0) == 0xffffffff ) + if ( pci_conf_read32(PCI_SBDF(0, 0, 22, 0), 0) == 0xffffffff ) return 0; /* if device is WLAN device, map ME phantom device 0:22.7 */ - id = pci_conf_read32(0, bus, PCI_SLOT(devfn), PCI_FUNC(devfn), 0); + id = pci_conf_read32(PCI_SBDF3(0, bus, devfn), 0); switch (id) { case 0x00878086: /* Kilmer Peak */ @@ -438,7 +440,7 @@ void pci_vtd_quirk(const struct pci_dev *pdev) case 0x342e: /* Tylersburg chipset (Nehalem / Westmere systems) */ case 0x3728: /* Xeon C5500/C3500 (JasperForest) */ case 0x3c28: /* Sandybridge */ - val = pci_conf_read32(seg, bus, dev, func, 0x1AC); + val = pci_conf_read32(pdev->sbdf, 0x1AC); pci_conf_write32(seg, bus, dev, func, 0x1AC, val | (1 << 31)); printk(XENLOG_INFO "Masked VT-d error signaling on %04x:%02x:%02x.%u\n", seg, bus, dev, func); @@ -461,7 +463,7 @@ void pci_vtd_quirk(const struct pci_dev *pdev) PCI_EXT_CAP_ID_VNDR); while ( pos ) { - val = pci_conf_read32(seg, bus, dev, func, pos + PCI_VNDR_HEADER); + val = pci_conf_read32(pdev->sbdf, pos + PCI_VNDR_HEADER); if ( PCI_VNDR_HEADER_ID(val) == 4 && PCI_VNDR_HEADER_REV(val) == 1 ) { pos += PCI_VNDR_HEADER; @@ -481,8 +483,8 @@ void pci_vtd_quirk(const struct pci_dev *pdev) break; } - val = pci_conf_read32(seg, bus, dev, func, pos + PCI_ERR_UNCOR_MASK); - val2 = pci_conf_read32(seg, bus, dev, func, pos + PCI_ERR_COR_MASK); + val = pci_conf_read32(pdev->sbdf, pos + PCI_ERR_UNCOR_MASK); + val2 = pci_conf_read32(pdev->sbdf, pos + PCI_ERR_COR_MASK); if ( (val & PCI_ERR_UNC_UNSUP) && (val2 & PCI_ERR_COR_ADV_NFAT) ) action = "Found masked"; else if ( !ff ) @@ -497,7 +499,7 @@ void pci_vtd_quirk(const struct pci_dev *pdev) action = "Must not mask"; /* XPUNCERRMSK Send Completion with Unsupported Request */ - val = pci_conf_read32(seg, bus, dev, func, 0x20c); + val = pci_conf_read32(pdev->sbdf, 0x20c); pci_conf_write32(seg, bus, dev, func, 0x20c, val | (1 << 4)); printk(XENLOG_INFO "%s UR signaling on %04x:%02x:%02x.%u\n", @@ -514,8 +516,8 @@ void pci_vtd_quirk(const struct pci_dev *pdev) case 0x1610: case 0x1614: case 0x1618: /* Broadwell */ case 0x1900: case 0x1904: case 0x1908: case 0x190c: case 0x190f: /* Skylake */ case 0x1910: case 0x1918: case 0x191f: /* Skylake */ - bar = pci_conf_read32(seg, bus, dev, func, 0x6c); - bar = (bar << 32) | pci_conf_read32(seg, bus, dev, func, 0x68); + bar = pci_conf_read32(pdev->sbdf, 0x6c); + bar = (bar << 32) | pci_conf_read32(pdev->sbdf, 0x68); pa = bar & 0x7ffffff000UL; /* bits 12...38 */ if ( (bar & 1) && pa && page_is_ram_type(paddr_to_pfn(pa), RAM_TYPE_RESERVED) ) diff --git a/xen/drivers/pci/pci.c b/xen/drivers/pci/pci.c index 5e5e0f0538..b24702e0c3 100644 --- a/xen/drivers/pci/pci.c +++ b/xen/drivers/pci/pci.c @@ -93,7 +93,7 @@ int pci_find_next_ext_capability(int seg, int bus, int devfn, int start, int cap int ttl = 480; /* 3840 bytes, minimum 8 bytes per capability */ int pos = max(start, 0x100); - header = pci_conf_read32(seg, bus, PCI_SLOT(devfn), PCI_FUNC(devfn), pos); + header = pci_conf_read32(PCI_SBDF3(seg, bus, devfn), pos); /* * If we have no capabilities, this is indicated by cap ID, @@ -109,7 +109,7 @@ int pci_find_next_ext_capability(int seg, int bus, int devfn, int start, int cap pos = PCI_EXT_CAP_NEXT(header); if ( pos < 0x100 ) break; - header = pci_conf_read32(seg, bus, PCI_SLOT(devfn), PCI_FUNC(devfn), pos); + header = pci_conf_read32(PCI_SBDF3(seg, bus, devfn), pos); } return 0; } diff --git a/xen/drivers/vpci/header.c b/xen/drivers/vpci/header.c index 0b176b490a..7476634982 100644 --- a/xen/drivers/vpci/header.c +++ b/xen/drivers/vpci/header.c @@ -511,7 +511,7 @@ static int init_bars(struct pci_dev *pdev) continue; } - val = pci_conf_read32(pdev->seg, pdev->bus, slot, func, reg); + val = pci_conf_read32(pdev->sbdf, reg); if ( (val & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_IO ) { bars[i].type = VPCI_BAR_IO; @@ -561,8 +561,8 @@ static int init_bars(struct pci_dev *pdev) rom->type = VPCI_BAR_ROM; rom->size = size; rom->addr = addr; - header->rom_enabled = pci_conf_read32(pdev->seg, pdev->bus, slot, func, - rom_reg) & PCI_ROM_ADDRESS_ENABLE; + header->rom_enabled = pci_conf_read32(pdev->sbdf, rom_reg) & + PCI_ROM_ADDRESS_ENABLE; rc = vpci_add_register(pdev->vpci, vpci_hw_read32, rom_write, rom_reg, 4, rom); diff --git a/xen/drivers/vpci/msix.c b/xen/drivers/vpci/msix.c index 8e6cd070d0..c60cba0137 100644 --- a/xen/drivers/vpci/msix.c +++ b/xen/drivers/vpci/msix.c @@ -469,11 +469,9 @@ static int init_msix(struct pci_dev *pdev) pdev->vpci->msix->pdev = pdev; pdev->vpci->msix->tables[VPCI_MSIX_TABLE] = - pci_conf_read32(pdev->seg, pdev->bus, slot, func, - msix_table_offset_reg(msix_offset)); + pci_conf_read32(pdev->sbdf, msix_table_offset_reg(msix_offset)); pdev->vpci->msix->tables[VPCI_MSIX_PBA] = - pci_conf_read32(pdev->seg, pdev->bus, slot, func, - msix_pba_offset_reg(msix_offset)); + pci_conf_read32(pdev->sbdf, msix_pba_offset_reg(msix_offset)); for ( i = 0; i < pdev->vpci->msix->max_entries; i++) { diff --git a/xen/drivers/vpci/vpci.c b/xen/drivers/vpci/vpci.c index 1a4c2ee4f1..2106255863 100644 --- a/xen/drivers/vpci/vpci.c +++ b/xen/drivers/vpci/vpci.c @@ -120,8 +120,7 @@ uint32_t vpci_hw_read16(const struct pci_dev *pdev, unsigned int reg, uint32_t vpci_hw_read32(const struct pci_dev *pdev, unsigned int reg, void *data) { - return pci_conf_read32(pdev->seg, pdev->bus, PCI_SLOT(pdev->devfn), - PCI_FUNC(pdev->devfn), reg); + return pci_conf_read32(pdev->sbdf, reg); } int vpci_add_register(struct vpci *vpci, vpci_read_t *read_handler, @@ -211,7 +210,7 @@ static uint32_t vpci_read_hw(pci_sbdf_t sbdf, unsigned int reg, switch ( size ) { case 4: - data = pci_conf_read32(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.fn, reg); + data = pci_conf_read32(sbdf, reg); break; case 3: diff --git a/xen/include/xen/pci.h b/xen/include/xen/pci.h index cf4c223f7c..2a5705560e 100644 --- a/xen/include/xen/pci.h +++ b/xen/include/xen/pci.h @@ -174,9 +174,7 @@ void pci_check_disable_device(u16 seg, u8 bus, u8 devfn); uint8_t pci_conf_read8(pci_sbdf_t sbdf, unsigned int reg); uint16_t pci_conf_read16(pci_sbdf_t sbdf, unsigned int reg); -uint32_t pci_conf_read32( - unsigned int seg, unsigned int bus, unsigned int dev, unsigned int func, - unsigned int reg); +uint32_t pci_conf_read32(pci_sbdf_t sbdf, unsigned int reg); void pci_conf_write8( unsigned int seg, unsigned int bus, unsigned int dev, unsigned int func, unsigned int reg, uint8_t data); From patchwork Fri Jun 7 09:22:29 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Roger_Pau_Monn=C3=A9?= X-Patchwork-Id: 10981181 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 1A7A014E5 for ; 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d="scan'208";a="1419358" From: Roger Pau Monne To: Date: Fri, 7 Jun 2019 11:22:29 +0200 Message-ID: <20190607092232.83179-11-roger.pau@citrix.com> X-Mailer: git-send-email 2.20.1 (Apple Git-117) In-Reply-To: <20190607092232.83179-1-roger.pau@citrix.com> References: <20190607092232.83179-1-roger.pau@citrix.com> MIME-Version: 1.0 Subject: [Xen-devel] [PATCH v3 10/13] pci: switch pci_conf_write8 to use pci_sbdf_t X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Stefano Stabellini , Wei Liu , Konrad Rzeszutek Wilk , George Dunlap , Andrew Cooper , Ian Jackson , Tim Deegan , Julien Grall , Jan Beulich , Roger Pau Monne Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP This reduces the number of parameters of the function to two, and simplifies some of the calling sites. Signed-off-by: Roger Pau Monné --- Cc: Jan Beulich Cc: Andrew Cooper Cc: Wei Liu Cc: "Roger Pau Monné" Cc: George Dunlap Cc: Ian Jackson Cc: Julien Grall Cc: Konrad Rzeszutek Wilk Cc: Stefano Stabellini Cc: Tim Deegan --- xen/arch/x86/cpu/amd.c | 2 +- xen/arch/x86/x86_64/pci.c | 21 ++++++++------------- xen/drivers/acpi/reboot.c | 6 +++--- xen/drivers/char/ehci-dbgp.c | 8 +++++--- xen/drivers/vpci/vpci.c | 9 ++++----- xen/include/xen/pci.h | 4 +--- 6 files changed, 22 insertions(+), 28 deletions(-) diff --git a/xen/arch/x86/cpu/amd.c b/xen/arch/x86/cpu/amd.c index 37f60c0862..489d45fd25 100644 --- a/xen/arch/x86/cpu/amd.c +++ b/xen/arch/x86/cpu/amd.c @@ -426,7 +426,7 @@ static void disable_c1_ramping(void) if (pmm7 == 0xFF) break; pmm7 &= 0xFC; /* clear pmm7[1:0] */ - pci_conf_write8(0, 0, 0x18 + node, 0x3, 0x87, pmm7); + pci_conf_write8(PCI_SBDF(0, 0, 0x18 + node, 3), 0x87, pmm7); printk ("AMD: Disabling C1 Clock Ramping Node #%x\n", node); } } diff --git a/xen/arch/x86/x86_64/pci.c b/xen/arch/x86/x86_64/pci.c index b8b82a6fe7..eaa67b04f2 100644 --- a/xen/arch/x86/x86_64/pci.c +++ b/xen/arch/x86/x86_64/pci.c @@ -50,23 +50,18 @@ uint32_t pci_conf_read32(pci_sbdf_t sbdf, unsigned int reg) return pci_conf_read(PCI_CONF_ADDRESS(sbdf, reg), 0, 4); } -#undef PCI_CONF_ADDRESS -#define PCI_CONF_ADDRESS(bus, dev, func, reg) \ - (0x80000000 | (bus << 16) | (dev << 11) | (func << 8) | (reg & ~3)) - -void pci_conf_write8( - unsigned int seg, unsigned int bus, unsigned int dev, unsigned int func, - unsigned int reg, uint8_t data) +void pci_conf_write8(pci_sbdf_t sbdf, unsigned int reg, uint8_t data) { - if ( seg || reg > 255 ) - pci_mmcfg_write(seg, bus, PCI_DEVFN(dev, func), reg, 1, data); + if ( sbdf.seg || reg > 255 ) + pci_mmcfg_write(sbdf.seg, sbdf.bus, sbdf.devfn, reg, 1, data); else - { - BUG_ON((bus > 255) || (dev > 31) || (func > 7)); - pci_conf_write(PCI_CONF_ADDRESS(bus, dev, func, reg), reg & 3, 1, data); - } + pci_conf_write(PCI_CONF_ADDRESS(sbdf, reg), reg & 3, 1, data); } +#undef PCI_CONF_ADDRESS +#define PCI_CONF_ADDRESS(bus, dev, func, reg) \ + (0x80000000 | (bus << 16) | (dev << 11) | (func << 8) | (reg & ~3)) + void pci_conf_write16( unsigned int seg, unsigned int bus, unsigned int dev, unsigned int func, unsigned int reg, uint16_t data) diff --git a/xen/drivers/acpi/reboot.c b/xen/drivers/acpi/reboot.c index 72d06fd8e5..04dac4fe7d 100644 --- a/xen/drivers/acpi/reboot.c +++ b/xen/drivers/acpi/reboot.c @@ -23,9 +23,9 @@ void acpi_reboot(void) case ACPI_ADR_SPACE_PCI_CONFIG: printk("Resetting with ACPI PCI RESET_REG.\n"); /* Write the value that resets us. */ - pci_conf_write8(0, 0, - (rr->address >> 32) & 31, - (rr->address >> 16) & 7, + pci_conf_write8(PCI_SBDF(0, 0, + (rr->address >> 32) & 31, + (rr->address >> 16) & 7), (rr->address & 255), reset_value); break; diff --git a/xen/drivers/char/ehci-dbgp.c b/xen/drivers/char/ehci-dbgp.c index 9b9025fb33..010fc3c5bc 100644 --- a/xen/drivers/char/ehci-dbgp.c +++ b/xen/drivers/char/ehci-dbgp.c @@ -1048,7 +1048,8 @@ static void ehci_dbgp_bios_handoff(struct ehci_dbgp *dbgp, u32 hcc_params) if ( (cap & 0xff) == 1 && (cap & EHCI_USBLEGSUP_BIOS) ) { dbgp_printk("dbgp: BIOS handoff\n"); - pci_conf_write8(0, dbgp->bus, dbgp->slot, dbgp->func, offset + 3, 1); + pci_conf_write8(PCI_SBDF(0, dbgp->bus, dbgp->slot, dbgp->func), + offset + 3, 1); } /* if boot firmware now owns EHCI, spin till it hands it over. */ @@ -1066,11 +1067,12 @@ static void ehci_dbgp_bios_handoff(struct ehci_dbgp *dbgp, u32 hcc_params) /* well, possibly buggy BIOS... try to shut it down, * and hope nothing goes too wrong */ dbgp_printk("dbgp: BIOS handoff failed: %08x\n", cap); - pci_conf_write8(0, dbgp->bus, dbgp->slot, dbgp->func, offset + 2, 0); + pci_conf_write8(PCI_SBDF(0, dbgp->bus, dbgp->slot, dbgp->func), + offset + 2, 0); } /* just in case, always disable EHCI SMIs */ - pci_conf_write8(0, dbgp->bus, dbgp->slot, dbgp->func, + pci_conf_write8(PCI_SBDF(0, dbgp->bus, dbgp->slot, dbgp->func), offset + EHCI_USBLEGCTLSTS, 0); } diff --git a/xen/drivers/vpci/vpci.c b/xen/drivers/vpci/vpci.c index 2106255863..53c5821c20 100644 --- a/xen/drivers/vpci/vpci.c +++ b/xen/drivers/vpci/vpci.c @@ -263,8 +263,8 @@ static void vpci_write_hw(pci_sbdf_t sbdf, unsigned int reg, unsigned int size, */ if ( reg & 1 ) { - pci_conf_write8(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.fn, reg, - data); + + pci_conf_write8(sbdf, reg, data); pci_conf_write16(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.fn, reg + 1, data >> 8); } @@ -272,8 +272,7 @@ static void vpci_write_hw(pci_sbdf_t sbdf, unsigned int reg, unsigned int size, { pci_conf_write16(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.fn, reg, data); - pci_conf_write8(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.fn, reg + 2, - data >> 16); + pci_conf_write8(sbdf, reg + 2, data >> 16); } break; @@ -282,7 +281,7 @@ static void vpci_write_hw(pci_sbdf_t sbdf, unsigned int reg, unsigned int size, break; case 1: - pci_conf_write8(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.fn, reg, data); + pci_conf_write8(sbdf, reg, data); break; default: diff --git a/xen/include/xen/pci.h b/xen/include/xen/pci.h index 2a5705560e..3faa2a22d3 100644 --- a/xen/include/xen/pci.h +++ b/xen/include/xen/pci.h @@ -175,9 +175,7 @@ void pci_check_disable_device(u16 seg, u8 bus, u8 devfn); uint8_t pci_conf_read8(pci_sbdf_t sbdf, unsigned int reg); uint16_t pci_conf_read16(pci_sbdf_t sbdf, unsigned int reg); uint32_t pci_conf_read32(pci_sbdf_t sbdf, unsigned int reg); -void pci_conf_write8( - unsigned int seg, unsigned int bus, unsigned int dev, unsigned int func, - unsigned int reg, uint8_t data); +void pci_conf_write8(pci_sbdf_t sbdf, unsigned int reg, uint8_t data); void pci_conf_write16( unsigned int seg, unsigned int bus, unsigned int dev, unsigned int func, unsigned int reg, uint16_t data); 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d="scan'208";a="1438405" From: Roger Pau Monne To: Date: Fri, 7 Jun 2019 11:22:30 +0200 Message-ID: <20190607092232.83179-12-roger.pau@citrix.com> X-Mailer: git-send-email 2.20.1 (Apple Git-117) In-Reply-To: <20190607092232.83179-1-roger.pau@citrix.com> References: <20190607092232.83179-1-roger.pau@citrix.com> MIME-Version: 1.0 Subject: [Xen-devel] [PATCH v3 11/13] pci: switch pci_conf_write16 to use pci_sbdf_t X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Stefano Stabellini , Wei Liu , Konrad Rzeszutek Wilk , George Dunlap , Andrew Cooper , Ian Jackson , Tim Deegan , Julien Grall , Jan Beulich , Roger Pau Monne Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP This reduces the number of parameters of the function to two, and simplifies some of the calling sites. Signed-off-by: Roger Pau Monné Reviewed-by: Jan Beulich --- Cc: Jan Beulich Cc: Andrew Cooper Cc: Wei Liu Cc: George Dunlap Cc: Ian Jackson Cc: Julien Grall Cc: Konrad Rzeszutek Wilk Cc: Stefano Stabellini Cc: Tim Deegan --- xen/arch/x86/cpu/amd.c | 4 +-- xen/arch/x86/msi.c | 53 ++++++++++++++----------------- xen/arch/x86/x86_64/pci.c | 21 +++++------- xen/drivers/char/ehci-dbgp.c | 6 ++-- xen/drivers/char/ns16550.c | 9 ++++-- xen/drivers/passthrough/pci.c | 18 ++++------- xen/drivers/passthrough/x86/ats.c | 6 ++-- xen/drivers/pci/pci.c | 6 +--- xen/drivers/vpci/header.c | 22 ++++--------- xen/drivers/vpci/msi.c | 4 +-- xen/drivers/vpci/msix.c | 2 +- xen/drivers/vpci/vpci.c | 8 ++--- xen/include/xen/pci.h | 4 +-- 13 files changed, 64 insertions(+), 99 deletions(-) diff --git a/xen/arch/x86/cpu/amd.c b/xen/arch/x86/cpu/amd.c index 489d45fd25..2e6529fba3 100644 --- a/xen/arch/x86/cpu/amd.c +++ b/xen/arch/x86/cpu/amd.c @@ -707,11 +707,11 @@ static void init_amd(struct cpuinfo_x86 *c) (h & 0x1) ? "clearing D18F3x5C[0]" : ""); if (l & 0x1f) - pci_conf_write32(0, 0, 0x18, 0x3, 0x58, + pci_conf_write32(0, 0, 0x18, 3, 0x58, l & ~0x1f); if (h & 0x1) - pci_conf_write32(0, 0, 0x18, 0x3, 0x5c, + pci_conf_write32(0, 0, 0x18, 3, 0x5c, h & ~0x1); } diff --git a/xen/arch/x86/msi.c b/xen/arch/x86/msi.c index 392cbecfe4..cbc1e3b3f0 100644 --- a/xen/arch/x86/msi.c +++ b/xen/arch/x86/msi.c @@ -267,12 +267,10 @@ static int write_msi_msg(struct msi_desc *entry, struct msi_msg *msg) { pci_conf_write32(seg, bus, slot, func, msi_upper_address_reg(pos), msg->address_hi); - pci_conf_write16(seg, bus, slot, func, msi_data_reg(pos, 1), - msg->data); + pci_conf_write16(dev->sbdf, msi_data_reg(pos, 1), msg->data); } else - pci_conf_write16(seg, bus, slot, func, msi_data_reg(pos, 0), - msg->data); + pci_conf_write16(dev->sbdf, msi_data_reg(pos, 0), msg->data); break; } case PCI_CAP_ID_MSIX: @@ -329,7 +327,8 @@ void __msi_set_enable(u16 seg, u8 bus, u8 slot, u8 func, int pos, int enable) control &= ~PCI_MSI_FLAGS_ENABLE; if ( enable ) control |= PCI_MSI_FLAGS_ENABLE; - pci_conf_write16(seg, bus, slot, func, pos + PCI_MSI_FLAGS, control); + pci_conf_write16(PCI_SBDF(seg, bus, slot, func), + pos + PCI_MSI_FLAGS, control); } static void msi_set_enable(struct pci_dev *dev, int enable) @@ -360,7 +359,7 @@ static void msix_set_enable(struct pci_dev *dev, int enable) control &= ~PCI_MSIX_FLAGS_ENABLE; if ( enable ) control |= PCI_MSIX_FLAGS_ENABLE; - pci_conf_write16(seg, bus, slot, func, msix_control_reg(pos), control); + pci_conf_write16(dev->sbdf, msix_control_reg(pos), control); } } @@ -406,7 +405,7 @@ static bool msi_set_mask_bit(struct irq_desc *desc, bool host, bool guest) if ( unlikely(!(control & PCI_MSIX_FLAGS_ENABLE)) ) { pdev->msix->host_maskall = 1; - pci_conf_write16(seg, bus, slot, func, + pci_conf_write16(pdev->sbdf, msix_control_reg(entry->msi_attrib.pos), control | (PCI_MSIX_FLAGS_ENABLE | PCI_MSIX_FLAGS_MASKALL)); @@ -440,7 +439,7 @@ static bool msi_set_mask_bit(struct irq_desc *desc, bool host, bool guest) pdev->msix->host_maskall = maskall; if ( maskall || pdev->msix->guest_maskall ) control |= PCI_MSIX_FLAGS_MASKALL; - pci_conf_write16(seg, bus, slot, func, + pci_conf_write16(pdev->sbdf, msix_control_reg(entry->msi_attrib.pos), control); return flag; default: @@ -580,8 +579,7 @@ int setup_msi_irq(struct irq_desc *desc, struct msi_desc *msidesc) { control = pci_conf_read16(pdev->sbdf, cpos); if ( !(control & PCI_MSIX_FLAGS_ENABLE) ) - pci_conf_write16(pdev->seg, pdev->bus, PCI_SLOT(pdev->devfn), - PCI_FUNC(pdev->devfn), cpos, + pci_conf_write16(pdev->sbdf, cpos, control | (PCI_MSIX_FLAGS_ENABLE | PCI_MSIX_FLAGS_MASKALL)); } @@ -591,8 +589,7 @@ int setup_msi_irq(struct irq_desc *desc, struct msi_desc *msidesc) : &pci_msi_nonmaskable); if ( !(control & PCI_MSIX_FLAGS_ENABLE) ) - pci_conf_write16(pdev->seg, pdev->bus, PCI_SLOT(pdev->devfn), - PCI_FUNC(pdev->devfn), cpos, control); + pci_conf_write16(pdev->sbdf, cpos, control); return rc; } @@ -735,7 +732,7 @@ static int msi_capability_init(struct pci_dev *dev, pci_intx(dev, false); control |= PCI_MSI_FLAGS_ENABLE; } - pci_conf_write16(seg, bus, slot, func, msi_control_reg(pos), control); + pci_conf_write16(dev->sbdf, msi_control_reg(pos), control); return 0; } @@ -856,13 +853,13 @@ static int msix_capability_init(struct pci_dev *dev, * fully set up. */ msix->host_maskall = 1; - pci_conf_write16(seg, bus, slot, func, msix_control_reg(pos), + pci_conf_write16(dev->sbdf, msix_control_reg(pos), control | (PCI_MSIX_FLAGS_ENABLE | PCI_MSIX_FLAGS_MASKALL)); if ( unlikely(!memory_decoded(dev)) ) { - pci_conf_write16(seg, bus, slot, func, msix_control_reg(pos), + pci_conf_write16(dev->sbdf, msix_control_reg(pos), control & ~PCI_MSIX_FLAGS_ENABLE); return -ENXIO; } @@ -872,7 +869,7 @@ static int msix_capability_init(struct pci_dev *dev, entry = alloc_msi_entry(1); if ( !entry ) { - pci_conf_write16(seg, bus, slot, func, msix_control_reg(pos), + pci_conf_write16(dev->sbdf, msix_control_reg(pos), control & ~PCI_MSIX_FLAGS_ENABLE); return -ENOMEM; } @@ -905,7 +902,7 @@ static int msix_capability_init(struct pci_dev *dev, { if ( !msi || !msi->table_base ) { - pci_conf_write16(seg, bus, slot, func, msix_control_reg(pos), + pci_conf_write16(dev->sbdf, msix_control_reg(pos), control & ~PCI_MSIX_FLAGS_ENABLE); xfree(entry); return -ENXIO; @@ -948,7 +945,7 @@ static int msix_capability_init(struct pci_dev *dev, if ( idx < 0 ) { - pci_conf_write16(seg, bus, slot, func, msix_control_reg(pos), + pci_conf_write16(dev->sbdf, msix_control_reg(pos), control & ~PCI_MSIX_FLAGS_ENABLE); xfree(entry); return idx; @@ -1024,7 +1021,7 @@ static int msix_capability_init(struct pci_dev *dev, maskall = 0; } msix->host_maskall = maskall; - pci_conf_write16(seg, bus, slot, func, msix_control_reg(pos), control); + pci_conf_write16(dev->sbdf, msix_control_reg(pos), control); return 0; } @@ -1166,7 +1163,7 @@ static void __pci_disable_msix(struct msi_desc *entry) if ( unlikely(!(control & PCI_MSIX_FLAGS_ENABLE)) ) { dev->msix->host_maskall = 1; - pci_conf_write16(seg, bus, slot, func, msix_control_reg(pos), + pci_conf_write16(dev->sbdf, msix_control_reg(pos), control | (PCI_MSIX_FLAGS_ENABLE | PCI_MSIX_FLAGS_MASKALL)); } @@ -1185,7 +1182,7 @@ static void __pci_disable_msix(struct msi_desc *entry) dev->msix->host_maskall = maskall; if ( maskall || dev->msix->guest_maskall ) control |= PCI_MSIX_FLAGS_MASKALL; - pci_conf_write16(seg, bus, slot, func, msix_control_reg(pos), control); + pci_conf_write16(dev->sbdf, msix_control_reg(pos), control); _pci_cleanup_msix(dev->msix); } @@ -1380,8 +1377,7 @@ int pci_restore_msi_state(struct pci_dev *pdev) pdev->seg, pdev->bus, slot, func, i); spin_unlock_irqrestore(&desc->lock, flags); if ( type == PCI_CAP_ID_MSIX ) - pci_conf_write16(pdev->seg, pdev->bus, slot, func, - msix_control_reg(pos), + pci_conf_write16(pdev->sbdf, msix_control_reg(pos), control & ~PCI_MSIX_FLAGS_ENABLE); return -EINVAL; } @@ -1396,15 +1392,13 @@ int pci_restore_msi_state(struct pci_dev *pdev) else if ( !type && entry->msi_attrib.type == PCI_CAP_ID_MSIX ) { control = pci_conf_read16(pdev->sbdf, msix_control_reg(pos)); - pci_conf_write16(pdev->seg, pdev->bus, slot, func, - msix_control_reg(pos), + pci_conf_write16(pdev->sbdf, msix_control_reg(pos), control | (PCI_MSIX_FLAGS_ENABLE | PCI_MSIX_FLAGS_MASKALL)); if ( unlikely(!memory_decoded(pdev)) ) { spin_unlock_irqrestore(&desc->lock, flags); - pci_conf_write16(pdev->seg, pdev->bus, slot, func, - msix_control_reg(pos), + pci_conf_write16(pdev->sbdf, msix_control_reg(pos), control & ~PCI_MSIX_FLAGS_ENABLE); return -ENXIO; } @@ -1439,15 +1433,14 @@ int pci_restore_msi_state(struct pci_dev *pdev) control = pci_conf_read16(pdev->sbdf, cpos) & ~PCI_MSI_FLAGS_QSIZE; multi_msi_enable(control, entry->msi.nvec); - pci_conf_write16(pdev->seg, pdev->bus, slot, func, cpos, control); + pci_conf_write16(pdev->sbdf, cpos, control); msi_set_enable(pdev, 1); } } if ( type == PCI_CAP_ID_MSIX ) - pci_conf_write16(pdev->seg, pdev->bus, slot, func, - msix_control_reg(pos), + pci_conf_write16(pdev->sbdf, msix_control_reg(pos), control | PCI_MSIX_FLAGS_ENABLE); return 0; diff --git a/xen/arch/x86/x86_64/pci.c b/xen/arch/x86/x86_64/pci.c index eaa67b04f2..f014fe0fc5 100644 --- a/xen/arch/x86/x86_64/pci.c +++ b/xen/arch/x86/x86_64/pci.c @@ -58,23 +58,18 @@ void pci_conf_write8(pci_sbdf_t sbdf, unsigned int reg, uint8_t data) pci_conf_write(PCI_CONF_ADDRESS(sbdf, reg), reg & 3, 1, data); } -#undef PCI_CONF_ADDRESS -#define PCI_CONF_ADDRESS(bus, dev, func, reg) \ - (0x80000000 | (bus << 16) | (dev << 11) | (func << 8) | (reg & ~3)) - -void pci_conf_write16( - unsigned int seg, unsigned int bus, unsigned int dev, unsigned int func, - unsigned int reg, uint16_t data) +void pci_conf_write16(pci_sbdf_t sbdf, unsigned int reg, uint16_t data) { - if ( seg || reg > 255 ) - pci_mmcfg_write(seg, bus, PCI_DEVFN(dev, func), reg, 2, data); + if ( sbdf.seg || reg > 255 ) + pci_mmcfg_write(sbdf.seg, sbdf.bus, sbdf.devfn, reg, 2, data); else - { - BUG_ON((bus > 255) || (dev > 31) || (func > 7)); - pci_conf_write(PCI_CONF_ADDRESS(bus, dev, func, reg), reg & 2, 2, data); - } + pci_conf_write(PCI_CONF_ADDRESS(sbdf, reg), reg & 2, 2, data); } +#undef PCI_CONF_ADDRESS +#define PCI_CONF_ADDRESS(bus, dev, func, reg) \ + (0x80000000 | (bus << 16) | (dev << 11) | (func << 8) | (reg & ~3)) + void pci_conf_write32( unsigned int seg, unsigned int bus, unsigned int dev, unsigned int func, unsigned int reg, uint32_t data) diff --git a/xen/drivers/char/ehci-dbgp.c b/xen/drivers/char/ehci-dbgp.c index 010fc3c5bc..b780334953 100644 --- a/xen/drivers/char/ehci-dbgp.c +++ b/xen/drivers/char/ehci-dbgp.c @@ -1324,8 +1324,8 @@ static void __init ehci_dbgp_init_preirq(struct serial_port *port) if ( !(dbgp->pci_cr & PCI_COMMAND_MEMORY) ) { dbgp->pci_cr |= PCI_COMMAND_MEMORY; - pci_conf_write16(0, dbgp->bus, dbgp->slot, dbgp->func, PCI_COMMAND, - dbgp->pci_cr); + pci_conf_write16(PCI_SBDF(0, dbgp->bus, dbgp->slot, dbgp->func), + PCI_COMMAND, dbgp->pci_cr); dbgp_printk("MMIO for EHCI enabled\n"); } @@ -1438,7 +1438,7 @@ static void ehci_dbgp_resume(struct serial_port *port) pci_conf_write32(0, dbgp->bus, dbgp->slot, dbgp->func, dbgp->bar, dbgp->bar_val); - pci_conf_write16(0, dbgp->bus, dbgp->slot, dbgp->func, + pci_conf_write16(PCI_SBDF(0, dbgp->bus, dbgp->slot, dbgp->func), PCI_COMMAND, dbgp->pci_cr); ehci_dbgp_setup_preirq(dbgp); diff --git a/xen/drivers/char/ns16550.c b/xen/drivers/char/ns16550.c index fe71406cc1..20eaecee59 100644 --- a/xen/drivers/char/ns16550.c +++ b/xen/drivers/char/ns16550.c @@ -624,7 +624,8 @@ static void pci_serial_early_init(struct ns16550 *uart) return; if ( uart->pb_bdf_enable ) - pci_conf_write16(0, uart->pb_bdf[0], uart->pb_bdf[1], uart->pb_bdf[2], + pci_conf_write16(PCI_SBDF(0, uart->pb_bdf[0], uart->pb_bdf[1], + uart->pb_bdf[2]), PCI_IO_BASE, (uart->io_base & 0xF000) | ((uart->io_base & 0xF000) >> 8)); @@ -632,7 +633,8 @@ static void pci_serial_early_init(struct ns16550 *uart) pci_conf_write32(0, uart->ps_bdf[0], uart->ps_bdf[1], uart->ps_bdf[2], PCI_BASE_ADDRESS_0, uart->io_base | PCI_BASE_ADDRESS_SPACE_IO); - pci_conf_write16(0, uart->ps_bdf[0], uart->ps_bdf[1], uart->ps_bdf[2], + pci_conf_write16(PCI_SBDF(0, uart->ps_bdf[0], uart->ps_bdf[1], + uart->ps_bdf[2]), PCI_COMMAND, PCI_COMMAND_IO); #endif } @@ -867,7 +869,8 @@ static void _ns16550_resume(struct serial_port *port) uart->ps_bdf[1], uart->ps_bdf[2], PCI_BASE_ADDRESS_0 + (uart->bar_idx+1)*4, uart->bar64); - pci_conf_write16(0, uart->ps_bdf[0], uart->ps_bdf[1], uart->ps_bdf[2], + pci_conf_write16(PCI_SBDF(0, uart->ps_bdf[0], uart->ps_bdf[1], + uart->ps_bdf[2]), PCI_COMMAND, uart->cr); } #endif diff --git a/xen/drivers/passthrough/pci.c b/xen/drivers/passthrough/pci.c index 80887af66c..ff400e9a31 100644 --- a/xen/drivers/passthrough/pci.c +++ b/xen/drivers/passthrough/pci.c @@ -248,15 +248,13 @@ static void check_pdev(const struct pci_dev *pdev) { val = pci_conf_read16(pdev->sbdf, PCI_COMMAND); if ( val & command_mask ) - pci_conf_write16(seg, bus, dev, func, PCI_COMMAND, - val & ~command_mask); + pci_conf_write16(pdev->sbdf, PCI_COMMAND, val & ~command_mask); val = pci_conf_read16(pdev->sbdf, PCI_STATUS); if ( val & PCI_STATUS_CHECK ) { printk(XENLOG_INFO "%04x:%02x:%02x.%u status %04x -> %04x\n", seg, bus, dev, func, val, val & ~PCI_STATUS_CHECK); - pci_conf_write16(seg, bus, dev, func, PCI_STATUS, - val & PCI_STATUS_CHECK); + pci_conf_write16(pdev->sbdf, PCI_STATUS, val & PCI_STATUS_CHECK); } } @@ -267,7 +265,7 @@ static void check_pdev(const struct pci_dev *pdev) break; val = pci_conf_read16(pdev->sbdf, PCI_BRIDGE_CONTROL); if ( val & bridge_ctl_mask ) - pci_conf_write16(seg, bus, dev, func, PCI_BRIDGE_CONTROL, + pci_conf_write16(pdev->sbdf, PCI_BRIDGE_CONTROL, val & ~bridge_ctl_mask); val = pci_conf_read16(pdev->sbdf, PCI_SEC_STATUS); if ( val & PCI_STATUS_CHECK ) @@ -275,7 +273,7 @@ static void check_pdev(const struct pci_dev *pdev) printk(XENLOG_INFO "%04x:%02x:%02x.%u secondary status %04x -> %04x\n", seg, bus, dev, func, val, val & ~PCI_STATUS_CHECK); - pci_conf_write16(seg, bus, dev, func, PCI_SEC_STATUS, + pci_conf_write16(pdev->sbdf, PCI_SEC_STATUS, val & PCI_STATUS_CHECK); } break; @@ -596,8 +594,6 @@ static void pci_enable_acs(struct pci_dev *pdev) int pos; u16 cap, ctrl, seg = pdev->seg; u8 bus = pdev->bus; - u8 dev = PCI_SLOT(pdev->devfn); - u8 func = PCI_FUNC(pdev->devfn); if ( !iommu_enabled ) return; @@ -621,7 +617,7 @@ static void pci_enable_acs(struct pci_dev *pdev) /* Upstream Forwarding */ ctrl |= (cap & PCI_ACS_UF); - pci_conf_write16(seg, bus, dev, func, pos + PCI_ACS_CTRL, ctrl); + pci_conf_write16(pdev->sbdf, pos + PCI_ACS_CTRL, ctrl); } static int iommu_add_device(struct pci_dev *pdev); @@ -1031,10 +1027,8 @@ void pci_check_disable_device(u16 seg, u8 bus, u8 devfn) /* Tell the device to stop DMAing; we can't rely on the guest to * control it for us. */ - devfn = pdev->devfn; cword = pci_conf_read16(pdev->sbdf, PCI_COMMAND); - pci_conf_write16(seg, bus, PCI_SLOT(devfn), PCI_FUNC(devfn), - PCI_COMMAND, cword & ~PCI_COMMAND_MASTER); + pci_conf_write16(pdev->sbdf, PCI_COMMAND, cword & ~PCI_COMMAND_MASTER); } /* diff --git a/xen/drivers/passthrough/x86/ats.c b/xen/drivers/passthrough/x86/ats.c index cb022c598a..3eea7f89fc 100644 --- a/xen/drivers/passthrough/x86/ats.c +++ b/xen/drivers/passthrough/x86/ats.c @@ -50,8 +50,7 @@ int enable_ats_device(struct pci_dev *pdev, struct list_head *ats_list) if ( !(value & ATS_ENABLE) ) { value |= ATS_ENABLE; - pci_conf_write16(seg, bus, PCI_SLOT(devfn), PCI_FUNC(devfn), - pos + ATS_REG_CTL, value); + pci_conf_write16(pdev->sbdf, pos + ATS_REG_CTL, value); } if ( pos ) @@ -81,8 +80,7 @@ void disable_ats_device(struct pci_dev *pdev) value = pci_conf_read16(pdev->sbdf, pdev->ats.cap_pos + ATS_REG_CTL); value &= ~ATS_ENABLE; - pci_conf_write16(seg, bus, PCI_SLOT(devfn), PCI_FUNC(devfn), - pdev->ats.cap_pos + ATS_REG_CTL, value); + pci_conf_write16(pdev->sbdf, pdev->ats.cap_pos + ATS_REG_CTL, value); list_del(&pdev->ats.list); diff --git a/xen/drivers/pci/pci.c b/xen/drivers/pci/pci.c index b24702e0c3..4de5fdf679 100644 --- a/xen/drivers/pci/pci.c +++ b/xen/drivers/pci/pci.c @@ -116,17 +116,13 @@ int pci_find_next_ext_capability(int seg, int bus, int devfn, int start, int cap void pci_intx(const struct pci_dev *pdev, bool enable) { - uint16_t seg = pdev->seg; - uint8_t bus = pdev->bus; - uint8_t slot = PCI_SLOT(pdev->devfn); - uint8_t func = PCI_FUNC(pdev->devfn); uint16_t cmd = pci_conf_read16(pdev->sbdf, PCI_COMMAND); if ( enable ) cmd &= ~PCI_COMMAND_INTX_DISABLE; else cmd |= PCI_COMMAND_INTX_DISABLE; - pci_conf_write16(seg, bus, slot, func, PCI_COMMAND, cmd); + pci_conf_write16(pdev->sbdf, PCI_COMMAND, cmd); } const char *__init parse_pci(const char *s, unsigned int *seg_p, diff --git a/xen/drivers/vpci/header.c b/xen/drivers/vpci/header.c index 7476634982..f377e6abdf 100644 --- a/xen/drivers/vpci/header.c +++ b/xen/drivers/vpci/header.c @@ -123,8 +123,7 @@ static void modify_decoding(const struct pci_dev *pdev, uint16_t cmd, } if ( !rom_only ) - pci_conf_write16(pdev->seg, pdev->bus, slot, func, PCI_COMMAND, - cmd); + pci_conf_write16(pdev->sbdf, PCI_COMMAND, cmd); else ASSERT_UNREACHABLE(); } @@ -335,7 +334,6 @@ static int modify_bars(const struct pci_dev *pdev, uint16_t cmd, bool rom_only) static void cmd_write(const struct pci_dev *pdev, unsigned int reg, uint32_t cmd, void *data) { - uint8_t slot = PCI_SLOT(pdev->devfn), func = PCI_FUNC(pdev->devfn); uint16_t current_cmd = pci_conf_read16(pdev->sbdf, reg); /* @@ -351,7 +349,7 @@ static void cmd_write(const struct pci_dev *pdev, unsigned int reg, */ modify_bars(pdev, cmd, false); else - pci_conf_write16(pdev->seg, pdev->bus, slot, func, reg, cmd); + pci_conf_write16(pdev->sbdf, reg, cmd); } static void bar_write(const struct pci_dev *pdev, unsigned int reg, @@ -397,8 +395,7 @@ static void bar_write(const struct pci_dev *pdev, unsigned int reg, val |= bar->prefetchable ? PCI_BASE_ADDRESS_MEM_PREFETCH : 0; } - pci_conf_write32(pdev->seg, pdev->bus, PCI_SLOT(pdev->devfn), - PCI_FUNC(pdev->devfn), reg, val); + pci_conf_write32(pdev->seg, pdev->bus, slot, func, reg, val); } static void rom_write(const struct pci_dev *pdev, unsigned int reg, @@ -452,7 +449,6 @@ static void rom_write(const struct pci_dev *pdev, unsigned int reg, static int init_bars(struct pci_dev *pdev) { - uint8_t slot = PCI_SLOT(pdev->devfn), func = PCI_FUNC(pdev->devfn); uint16_t cmd; uint64_t addr, size; unsigned int i, num_bars, rom_reg; @@ -488,8 +484,7 @@ static int init_bars(struct pci_dev *pdev) /* Disable memory decoding before sizing. */ cmd = pci_conf_read16(pdev->sbdf, PCI_COMMAND); if ( cmd & PCI_COMMAND_MEMORY ) - pci_conf_write16(pdev->seg, pdev->bus, slot, func, PCI_COMMAND, - cmd & ~PCI_COMMAND_MEMORY); + pci_conf_write16(pdev->sbdf, PCI_COMMAND, cmd & ~PCI_COMMAND_MEMORY); for ( i = 0; i < num_bars; i++ ) { @@ -503,8 +498,7 @@ static int init_bars(struct pci_dev *pdev) 4, &bars[i]); if ( rc ) { - pci_conf_write16(pdev->seg, pdev->bus, slot, func, - PCI_COMMAND, cmd); + pci_conf_write16(pdev->sbdf, PCI_COMMAND, cmd); return rc; } @@ -527,8 +521,7 @@ static int init_bars(struct pci_dev *pdev) (i == num_bars - 1) ? PCI_BAR_LAST : 0); if ( rc < 0 ) { - pci_conf_write16(pdev->seg, pdev->bus, slot, func, PCI_COMMAND, - cmd); + pci_conf_write16(pdev->sbdf, PCI_COMMAND, cmd); return rc; } @@ -546,8 +539,7 @@ static int init_bars(struct pci_dev *pdev) &bars[i]); if ( rc ) { - pci_conf_write16(pdev->seg, pdev->bus, slot, func, PCI_COMMAND, - cmd); + pci_conf_write16(pdev->sbdf, PCI_COMMAND, cmd); return rc; } } diff --git a/xen/drivers/vpci/msi.c b/xen/drivers/vpci/msi.c index 8fe89fc912..5b6602f3c2 100644 --- a/xen/drivers/vpci/msi.c +++ b/xen/drivers/vpci/msi.c @@ -77,9 +77,7 @@ static void control_write(const struct pci_dev *pdev, unsigned int reg, msi->vectors = vectors; msi->enabled = new_enabled; - pci_conf_write16(pdev->seg, pdev->bus, PCI_SLOT(pdev->devfn), - PCI_FUNC(pdev->devfn), reg, - control_read(pdev, reg, data)); + pci_conf_write16(pdev->sbdf, reg, control_read(pdev, reg, data)); } static void update_msi(const struct pci_dev *pdev, struct vpci_msi *msi) diff --git a/xen/drivers/vpci/msix.c b/xen/drivers/vpci/msix.c index c60cba0137..38c1e7e5dd 100644 --- a/xen/drivers/vpci/msix.c +++ b/xen/drivers/vpci/msix.c @@ -146,7 +146,7 @@ static void control_write(const struct pci_dev *pdev, unsigned int reg, val = control_read(pdev, reg, data); if ( pci_msi_conf_write_intercept(msix->pdev, reg, 2, &val) >= 0 ) - pci_conf_write16(pdev->seg, pdev->bus, slot, func, reg, val); + pci_conf_write16(pdev->sbdf, reg, val); } static struct vpci_msix *msix_find(const struct domain *d, unsigned long addr) diff --git a/xen/drivers/vpci/vpci.c b/xen/drivers/vpci/vpci.c index 53c5821c20..b61672f295 100644 --- a/xen/drivers/vpci/vpci.c +++ b/xen/drivers/vpci/vpci.c @@ -265,19 +265,17 @@ static void vpci_write_hw(pci_sbdf_t sbdf, unsigned int reg, unsigned int size, { pci_conf_write8(sbdf, reg, data); - pci_conf_write16(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.fn, reg + 1, - data >> 8); + pci_conf_write16(sbdf, reg + 1, data >> 8); } else { - pci_conf_write16(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.fn, reg, - data); + pci_conf_write16(sbdf, reg, data); pci_conf_write8(sbdf, reg + 2, data >> 16); } break; case 2: - pci_conf_write16(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.fn, reg, data); + pci_conf_write16(sbdf, reg, data); break; case 1: diff --git a/xen/include/xen/pci.h b/xen/include/xen/pci.h index 3faa2a22d3..cb90d2f785 100644 --- a/xen/include/xen/pci.h +++ b/xen/include/xen/pci.h @@ -176,9 +176,7 @@ uint8_t pci_conf_read8(pci_sbdf_t sbdf, unsigned int reg); uint16_t pci_conf_read16(pci_sbdf_t sbdf, unsigned int reg); uint32_t pci_conf_read32(pci_sbdf_t sbdf, unsigned int reg); void pci_conf_write8(pci_sbdf_t sbdf, unsigned int reg, uint8_t data); -void pci_conf_write16( - unsigned int seg, unsigned int bus, unsigned int dev, unsigned int func, - unsigned int reg, uint16_t data); +void pci_conf_write16(pci_sbdf_t sbdf, unsigned int reg, uint16_t data); void pci_conf_write32( unsigned int seg, unsigned int bus, unsigned int dev, unsigned int func, unsigned int reg, uint32_t data); From patchwork Fri Jun 7 09:22:31 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Roger_Pau_Monn=C3=A9?= X-Patchwork-Id: 10981185 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 99EAE924 for ; Fri, 7 Jun 2019 09:25:29 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 87A2928B26 for ; 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d="scan'208";a="1438409" From: Roger Pau Monne To: Date: Fri, 7 Jun 2019 11:22:31 +0200 Message-ID: <20190607092232.83179-13-roger.pau@citrix.com> X-Mailer: git-send-email 2.20.1 (Apple Git-117) In-Reply-To: <20190607092232.83179-1-roger.pau@citrix.com> References: <20190607092232.83179-1-roger.pau@citrix.com> MIME-Version: 1.0 Subject: [Xen-devel] [PATCH v3 12/13] pci: switch pci_conf_write32 to use pci_sbdf_t X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Kevin Tian , Stefano Stabellini , Suravee Suthikulpanit , Wei Liu , Konrad Rzeszutek Wilk , George Dunlap , Andrew Cooper , Ian Jackson , Tim Deegan , Julien Grall , Jan Beulich , Brian Woods , Roger Pau Monne Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP This reduces the number of parameters of the function to two, and simplifies some of the calling sites. Signed-off-by: Roger Pau Monné Reviewed-by: Jan Beulich Acked-by: Brian Woods Cc: Andrew Cooper Cc: Wei Liu Cc: George Dunlap Cc: Ian Jackson Cc: Julien Grall Cc: Konrad Rzeszutek Wilk Cc: Stefano Stabellini Cc: Tim Deegan Cc: Suravee Suthikulpanit Cc: Brian Woods Cc: Kevin Tian --- xen/arch/x86/cpu/amd.c | 4 ++-- xen/arch/x86/msi.c | 12 ++++-------- xen/arch/x86/oprofile/op_model_athlon.c | 4 +++- xen/arch/x86/x86_64/pci.c | 17 ++++------------- xen/drivers/char/ehci-dbgp.c | 5 +++-- xen/drivers/char/ns16550.c | 22 ++++++++++++---------- xen/drivers/passthrough/amd/iommu_init.c | 8 ++++---- xen/drivers/passthrough/pci.c | 8 ++++---- xen/drivers/passthrough/vtd/quirks.c | 8 ++++---- xen/drivers/vpci/header.c | 7 +++---- xen/drivers/vpci/vpci.c | 2 +- xen/include/xen/pci.h | 4 +--- 12 files changed, 45 insertions(+), 56 deletions(-) diff --git a/xen/arch/x86/cpu/amd.c b/xen/arch/x86/cpu/amd.c index 2e6529fba3..86273b6a07 100644 --- a/xen/arch/x86/cpu/amd.c +++ b/xen/arch/x86/cpu/amd.c @@ -707,11 +707,11 @@ static void init_amd(struct cpuinfo_x86 *c) (h & 0x1) ? "clearing D18F3x5C[0]" : ""); if (l & 0x1f) - pci_conf_write32(0, 0, 0x18, 3, 0x58, + pci_conf_write32(PCI_SBDF(0, 0, 0x18, 3), 0x58, l & ~0x1f); if (h & 0x1) - pci_conf_write32(0, 0, 0x18, 3, 0x5c, + pci_conf_write32(PCI_SBDF(0, 0, 0x18, 3), 0x5c, h & ~0x1); } diff --git a/xen/arch/x86/msi.c b/xen/arch/x86/msi.c index cbc1e3b3f0..9a1ce33b42 100644 --- a/xen/arch/x86/msi.c +++ b/xen/arch/x86/msi.c @@ -251,21 +251,17 @@ static int write_msi_msg(struct msi_desc *entry, struct msi_msg *msg) { struct pci_dev *dev = entry->dev; int pos = entry->msi_attrib.pos; - u16 seg = dev->seg; - u8 bus = dev->bus; - u8 slot = PCI_SLOT(dev->devfn); - u8 func = PCI_FUNC(dev->devfn); int nr = entry->msi_attrib.entry_nr; ASSERT((msg->data & (entry[-nr].msi.nvec - 1)) == nr); if ( nr ) return 0; - pci_conf_write32(seg, bus, slot, func, msi_lower_address_reg(pos), + pci_conf_write32(dev->sbdf, msi_lower_address_reg(pos), msg->address_lo); if ( entry->msi_attrib.is_64 ) { - pci_conf_write32(seg, bus, slot, func, msi_upper_address_reg(pos), + pci_conf_write32(dev->sbdf, msi_upper_address_reg(pos), msg->address_hi); pci_conf_write16(dev->sbdf, msi_data_reg(pos, 1), msg->data); } @@ -395,7 +391,7 @@ static bool msi_set_mask_bit(struct irq_desc *desc, bool host, bool guest) mask_bits = pci_conf_read32(pdev->sbdf, entry->msi.mpos); mask_bits &= ~((u32)1 << entry->msi_attrib.entry_nr); mask_bits |= (u32)flag << entry->msi_attrib.entry_nr; - pci_conf_write32(seg, bus, slot, func, entry->msi.mpos, mask_bits); + pci_conf_write32(pdev->sbdf, entry->msi.mpos, mask_bits); } break; case PCI_CAP_ID_MSIX: @@ -716,7 +712,7 @@ static int msi_capability_init(struct pci_dev *dev, /* All MSIs are unmasked by default, Mask them all */ maskbits = pci_conf_read32(dev->sbdf, mpos); maskbits |= ~(u32)0 >> (32 - maxvec); - pci_conf_write32(seg, bus, slot, func, mpos, maskbits); + pci_conf_write32(dev->sbdf, mpos, maskbits); } list_add_tail(&entry->list, &dev->msi_list); diff --git a/xen/arch/x86/oprofile/op_model_athlon.c b/xen/arch/x86/oprofile/op_model_athlon.c index 3bf0b0214d..5c48f868ae 100644 --- a/xen/arch/x86/oprofile/op_model_athlon.c +++ b/xen/arch/x86/oprofile/op_model_athlon.c @@ -472,7 +472,9 @@ static int __init init_ibs_nmi(void) if ((vendor_id == PCI_VENDOR_ID_AMD) && (dev_id == PCI_DEVICE_ID_AMD_10H_NB_MISC)) { - pci_conf_write32(0, bus, dev, func, IBSCTL, + pci_conf_write32( + PCI_SBDF(0, bus, dev, func), + IBSCTL, IBSCTL_LVTOFFSETVAL | APIC_EILVT_LVTOFF_IBS); value = pci_conf_read32(PCI_SBDF(0, bus, dev, func), diff --git a/xen/arch/x86/x86_64/pci.c b/xen/arch/x86/x86_64/pci.c index f014fe0fc5..aad1c3f7cf 100644 --- a/xen/arch/x86/x86_64/pci.c +++ b/xen/arch/x86/x86_64/pci.c @@ -66,19 +66,10 @@ void pci_conf_write16(pci_sbdf_t sbdf, unsigned int reg, uint16_t data) pci_conf_write(PCI_CONF_ADDRESS(sbdf, reg), reg & 2, 2, data); } -#undef PCI_CONF_ADDRESS -#define PCI_CONF_ADDRESS(bus, dev, func, reg) \ - (0x80000000 | (bus << 16) | (dev << 11) | (func << 8) | (reg & ~3)) - -void pci_conf_write32( - unsigned int seg, unsigned int bus, unsigned int dev, unsigned int func, - unsigned int reg, uint32_t data) +void pci_conf_write32(pci_sbdf_t sbdf, unsigned int reg, uint32_t data) { - if ( seg || reg > 255 ) - pci_mmcfg_write(seg, bus, PCI_DEVFN(dev, func), reg, 4, data); + if ( sbdf.seg || reg > 255 ) + pci_mmcfg_write(sbdf.seg, sbdf.bus, sbdf.devfn, reg, 4, data); else - { - BUG_ON((bus > 255) || (dev > 31) || (func > 7)); - pci_conf_write(PCI_CONF_ADDRESS(bus, dev, func, reg), 0, 4, data); - } + pci_conf_write(PCI_CONF_ADDRESS(sbdf, reg), 0, 4, data); } diff --git a/xen/drivers/char/ehci-dbgp.c b/xen/drivers/char/ehci-dbgp.c index b780334953..b6e155d17b 100644 --- a/xen/drivers/char/ehci-dbgp.c +++ b/xen/drivers/char/ehci-dbgp.c @@ -1012,7 +1012,8 @@ static void nvidia_set_debug_port(struct ehci_dbgp *dbgp, unsigned int port) dword &= ~(0x0f << 12); dword |= (port & 0x0f) << 12; - pci_conf_write32(0, dbgp->bus, dbgp->slot, dbgp->func, 0x74, dword); + pci_conf_write32(PCI_SBDF(0, dbgp->bus, dbgp->slot, dbgp->func), 0x74, + dword); dbgp_printk("set debug port to %u\n", port); } @@ -1436,7 +1437,7 @@ static void ehci_dbgp_resume(struct serial_port *port) if ( !dbgp->ehci_debug ) return; - pci_conf_write32(0, dbgp->bus, dbgp->slot, dbgp->func, dbgp->bar, + pci_conf_write32(PCI_SBDF(0, dbgp->bus, dbgp->slot, dbgp->func), dbgp->bar, dbgp->bar_val); pci_conf_write16(PCI_SBDF(0, dbgp->bus, dbgp->slot, dbgp->func), PCI_COMMAND, dbgp->pci_cr); diff --git a/xen/drivers/char/ns16550.c b/xen/drivers/char/ns16550.c index 20eaecee59..e518f2d790 100644 --- a/xen/drivers/char/ns16550.c +++ b/xen/drivers/char/ns16550.c @@ -630,7 +630,8 @@ static void pci_serial_early_init(struct ns16550 *uart) (uart->io_base & 0xF000) | ((uart->io_base & 0xF000) >> 8)); - pci_conf_write32(0, uart->ps_bdf[0], uart->ps_bdf[1], uart->ps_bdf[2], + pci_conf_write32(PCI_SBDF(0, uart->ps_bdf[0], uart->ps_bdf[1], + uart->ps_bdf[2]), PCI_BASE_ADDRESS_0, uart->io_base | PCI_BASE_ADDRESS_SPACE_IO); pci_conf_write16(PCI_SBDF(0, uart->ps_bdf[0], uart->ps_bdf[1], @@ -860,13 +861,14 @@ static void _ns16550_resume(struct serial_port *port) if ( uart->bar ) { - pci_conf_write32(0, uart->ps_bdf[0], uart->ps_bdf[1], uart->ps_bdf[2], + pci_conf_write32(PCI_SBDF(0, uart->ps_bdf[0], uart->ps_bdf[1], + uart->ps_bdf[2]), PCI_BASE_ADDRESS_0 + uart->bar_idx*4, uart->bar); /* If 64 bit BAR, write higher 32 bits to BAR+4 */ if ( uart->bar & PCI_BASE_ADDRESS_MEM_TYPE_64 ) - pci_conf_write32(0, uart->ps_bdf[0], - uart->ps_bdf[1], uart->ps_bdf[2], + pci_conf_write32(PCI_SBDF(0, uart->ps_bdf[0], uart->ps_bdf[1], + uart->ps_bdf[2]), PCI_BASE_ADDRESS_0 + (uart->bar_idx+1)*4, uart->bar64); pci_conf_write16(PCI_SBDF(0, uart->ps_bdf[0], uart->ps_bdf[1], @@ -1121,11 +1123,11 @@ pci_uart_config(struct ns16550 *uart, bool_t skip_amt, unsigned int idx) /* MMIO based */ if ( param->mmio && !(bar & PCI_BASE_ADDRESS_SPACE_IO) ) { - pci_conf_write32(0, b, d, f, + pci_conf_write32(PCI_SBDF(0, b, d, f), PCI_BASE_ADDRESS_0 + bar_idx*4, ~0u); len = pci_conf_read32(PCI_SBDF(0, b, d, f), PCI_BASE_ADDRESS_0 + bar_idx * 4); - pci_conf_write32(0, b, d, f, + pci_conf_write32(PCI_SBDF(0, b, d, f), PCI_BASE_ADDRESS_0 + bar_idx*4, bar); /* Handle 64 bit BAR if found */ @@ -1133,11 +1135,11 @@ pci_uart_config(struct ns16550 *uart, bool_t skip_amt, unsigned int idx) { bar_64 = pci_conf_read32(PCI_SBDF(0, b, d, f), PCI_BASE_ADDRESS_0 + (bar_idx + 1) * 4); - pci_conf_write32(0, b, d, f, + pci_conf_write32(PCI_SBDF(0, b, d, f), PCI_BASE_ADDRESS_0 + (bar_idx+1)*4, ~0u); len_64 = pci_conf_read32(PCI_SBDF(0, b, d, f), PCI_BASE_ADDRESS_0 + (bar_idx + 1) * 4); - pci_conf_write32(0, b, d, f, + pci_conf_write32(PCI_SBDF(0, b, d, f), PCI_BASE_ADDRESS_0 + (bar_idx+1)*4, bar_64); size = ((u64)~0 << 32) | PCI_BASE_ADDRESS_MEM_MASK; size &= ((u64)len_64 << 32) | len; @@ -1151,11 +1153,11 @@ pci_uart_config(struct ns16550 *uart, bool_t skip_amt, unsigned int idx) /* IO based */ else if ( !param->mmio && (bar & PCI_BASE_ADDRESS_SPACE_IO) ) { - pci_conf_write32(0, b, d, f, + pci_conf_write32(PCI_SBDF(0, b, d, f), PCI_BASE_ADDRESS_0 + bar_idx*4, ~0u); len = pci_conf_read32(PCI_SBDF(0, b, d, f), PCI_BASE_ADDRESS_0); - pci_conf_write32(0, b, d, f, + pci_conf_write32(PCI_SBDF(0, b, d, f), PCI_BASE_ADDRESS_0 + bar_idx*4, bar); size = len & PCI_BASE_ADDRESS_IO_MASK; diff --git a/xen/drivers/passthrough/amd/iommu_init.c b/xen/drivers/passthrough/amd/iommu_init.c index 6083d51b91..d19531493b 100644 --- a/xen/drivers/passthrough/amd/iommu_init.c +++ b/xen/drivers/passthrough/amd/iommu_init.c @@ -843,22 +843,22 @@ static void amd_iommu_erratum_746_workaround(struct amd_iommu *iommu) (boot_cpu_data.x86_model > 0x1f) ) return; - pci_conf_write32(iommu->seg, bus, dev, func, 0xf0, 0x90); + pci_conf_write32(PCI_SBDF2(iommu->seg, iommu->bdf), 0xf0, 0x90); value = pci_conf_read32(PCI_SBDF2(iommu->seg, iommu->bdf), 0xf4); if ( value & (1 << 2) ) return; /* Select NB indirect register 0x90 and enable writing */ - pci_conf_write32(iommu->seg, bus, dev, func, 0xf0, 0x90 | (1 << 8)); + pci_conf_write32(PCI_SBDF2(iommu->seg, iommu->bdf), 0xf0, 0x90 | (1 << 8)); - pci_conf_write32(iommu->seg, bus, dev, func, 0xf4, value | (1 << 2)); + pci_conf_write32(PCI_SBDF2(iommu->seg, iommu->bdf), 0xf4, value | (1 << 2)); printk(XENLOG_INFO "AMD-Vi: Applying erratum 746 workaround for IOMMU at %04x:%02x:%02x.%u\n", iommu->seg, bus, dev, func); /* Clear the enable writing bit */ - pci_conf_write32(iommu->seg, bus, dev, func, 0xf0, 0x90); + pci_conf_write32(PCI_SBDF2(iommu->seg, iommu->bdf), 0xf0, 0x90); } static void enable_iommu(struct amd_iommu *iommu) diff --git a/xen/drivers/passthrough/pci.c b/xen/drivers/passthrough/pci.c index ff400e9a31..5271f8d69c 100644 --- a/xen/drivers/passthrough/pci.c +++ b/xen/drivers/passthrough/pci.c @@ -638,7 +638,7 @@ unsigned int pci_size_mem_bar(pci_sbdf_t sbdf, unsigned int pos, ASSERT(!((flags & PCI_BAR_VF) && (flags & PCI_BAR_ROM))); ASSERT((flags & PCI_BAR_ROM) || (bar & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_MEMORY); - pci_conf_write32(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.fn, pos, ~0); + pci_conf_write32(sbdf, pos, ~0); if ( is64bits ) { if ( flags & PCI_BAR_LAST ) @@ -651,17 +651,17 @@ unsigned int pci_size_mem_bar(pci_sbdf_t sbdf, unsigned int pos, return 1; } hi = pci_conf_read32(sbdf, pos + 4); - pci_conf_write32(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.fn, pos + 4, ~0); + pci_conf_write32(sbdf, pos + 4, ~0); } size = pci_conf_read32(sbdf, pos) & mask; if ( is64bits ) { size |= (uint64_t)pci_conf_read32(sbdf, pos + 4) << 32; - pci_conf_write32(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.fn, pos + 4, hi); + pci_conf_write32(sbdf, pos + 4, hi); } else if ( size ) size |= (uint64_t)~0 << 32; - pci_conf_write32(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.fn, pos, bar); + pci_conf_write32(sbdf, pos, bar); size = -size; if ( paddr ) diff --git a/xen/drivers/passthrough/vtd/quirks.c b/xen/drivers/passthrough/vtd/quirks.c index 28e9597014..b6e2d313f0 100644 --- a/xen/drivers/passthrough/vtd/quirks.c +++ b/xen/drivers/passthrough/vtd/quirks.c @@ -441,7 +441,7 @@ void pci_vtd_quirk(const struct pci_dev *pdev) case 0x3728: /* Xeon C5500/C3500 (JasperForest) */ case 0x3c28: /* Sandybridge */ val = pci_conf_read32(pdev->sbdf, 0x1AC); - pci_conf_write32(seg, bus, dev, func, 0x1AC, val | (1 << 31)); + pci_conf_write32(pdev->sbdf, 0x1AC, val | (1 << 31)); printk(XENLOG_INFO "Masked VT-d error signaling on %04x:%02x:%02x.%u\n", seg, bus, dev, func); break; @@ -489,9 +489,9 @@ void pci_vtd_quirk(const struct pci_dev *pdev) action = "Found masked"; else if ( !ff ) { - pci_conf_write32(seg, bus, dev, func, pos + PCI_ERR_UNCOR_MASK, + pci_conf_write32(pdev->sbdf, pos + PCI_ERR_UNCOR_MASK, val | PCI_ERR_UNC_UNSUP); - pci_conf_write32(seg, bus, dev, func, pos + PCI_ERR_COR_MASK, + pci_conf_write32(pdev->sbdf, pos + PCI_ERR_COR_MASK, val2 | PCI_ERR_COR_ADV_NFAT); action = "Masked"; } @@ -500,7 +500,7 @@ void pci_vtd_quirk(const struct pci_dev *pdev) /* XPUNCERRMSK Send Completion with Unsupported Request */ val = pci_conf_read32(pdev->sbdf, 0x20c); - pci_conf_write32(seg, bus, dev, func, 0x20c, val | (1 << 4)); + pci_conf_write32(pdev->sbdf, 0x20c, val | (1 << 4)); printk(XENLOG_INFO "%s UR signaling on %04x:%02x:%02x.%u\n", action, seg, bus, dev, func); diff --git a/xen/drivers/vpci/header.c b/xen/drivers/vpci/header.c index f377e6abdf..3c794f486d 100644 --- a/xen/drivers/vpci/header.c +++ b/xen/drivers/vpci/header.c @@ -85,7 +85,6 @@ static void modify_decoding(const struct pci_dev *pdev, uint16_t cmd, bool rom_only) { struct vpci_header *header = &pdev->vpci->header; - uint8_t slot = PCI_SLOT(pdev->devfn), func = PCI_FUNC(pdev->devfn); bool map = cmd & PCI_COMMAND_MEMORY; unsigned int i; @@ -113,7 +112,7 @@ static void modify_decoding(const struct pci_dev *pdev, uint16_t cmd, (map ? PCI_ROM_ADDRESS_ENABLE : 0); header->bars[i].enabled = header->rom_enabled = map; - pci_conf_write32(pdev->seg, pdev->bus, slot, func, rom_pos, val); + pci_conf_write32(pdev->sbdf, rom_pos, val); return; } @@ -395,7 +394,7 @@ static void bar_write(const struct pci_dev *pdev, unsigned int reg, val |= bar->prefetchable ? PCI_BASE_ADDRESS_MEM_PREFETCH : 0; } - pci_conf_write32(pdev->seg, pdev->bus, slot, func, reg, val); + pci_conf_write32(pdev->sbdf, reg, val); } static void rom_write(const struct pci_dev *pdev, unsigned int reg, @@ -426,7 +425,7 @@ static void rom_write(const struct pci_dev *pdev, unsigned int reg, { /* Just update the ROM BAR field. */ header->rom_enabled = new_enabled; - pci_conf_write32(pdev->seg, pdev->bus, slot, func, reg, val); + pci_conf_write32(pdev->sbdf, reg, val); } /* * Pass PCI_COMMAND_MEMORY or 0 to signal a map/unmap request, note that diff --git a/xen/drivers/vpci/vpci.c b/xen/drivers/vpci/vpci.c index b61672f295..ddbfa56489 100644 --- a/xen/drivers/vpci/vpci.c +++ b/xen/drivers/vpci/vpci.c @@ -253,7 +253,7 @@ static void vpci_write_hw(pci_sbdf_t sbdf, unsigned int reg, unsigned int size, switch ( size ) { case 4: - pci_conf_write32(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.fn, reg, data); + pci_conf_write32(sbdf, reg, data); break; case 3: diff --git a/xen/include/xen/pci.h b/xen/include/xen/pci.h index cb90d2f785..e6af45cfe7 100644 --- a/xen/include/xen/pci.h +++ b/xen/include/xen/pci.h @@ -177,9 +177,7 @@ uint16_t pci_conf_read16(pci_sbdf_t sbdf, unsigned int reg); uint32_t pci_conf_read32(pci_sbdf_t sbdf, unsigned int reg); void pci_conf_write8(pci_sbdf_t sbdf, unsigned int reg, uint8_t data); void pci_conf_write16(pci_sbdf_t sbdf, unsigned int reg, uint16_t data); -void pci_conf_write32( - unsigned int seg, unsigned int bus, unsigned int dev, unsigned int func, - unsigned int reg, uint32_t data); +void pci_conf_write32(pci_sbdf_t sbdf, unsigned int reg, uint32_t data); uint32_t pci_conf_read(uint32_t cf8, uint8_t offset, uint8_t bytes); void pci_conf_write(uint32_t cf8, uint8_t offset, uint8_t bytes, uint32_t data); int pci_mmcfg_read(unsigned int seg, unsigned int bus, From patchwork Fri Jun 7 09:22:32 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Roger_Pau_Monn=C3=A9?= X-Patchwork-Id: 10981191 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 04CE1924 for ; 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d="scan'208";a="1419228" From: Roger Pau Monne To: Date: Fri, 7 Jun 2019 11:22:32 +0200 Message-ID: <20190607092232.83179-14-roger.pau@citrix.com> X-Mailer: git-send-email 2.20.1 (Apple Git-117) In-Reply-To: <20190607092232.83179-1-roger.pau@citrix.com> References: <20190607092232.83179-1-roger.pau@citrix.com> MIME-Version: 1.0 Subject: [Xen-devel] [PATCH v3 13/13] print: introduce a format specifier for pci_sbdf_t X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Kevin Tian , Stefano Stabellini , Suravee Suthikulpanit , Wei Liu , Konrad Rzeszutek Wilk , George Dunlap , Andrew Cooper , Ian Jackson , Tim Deegan , Julien Grall , Jan Beulich , Brian Woods , Roger Pau Monne Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP The new format specifier is '%pp', and prints a pci_sbdf_t using the seg:bus:dev.func format. Replace all SBDFs printed using '%04x:%02x:%02x.%u' to use the new format specifier. No functional change intended. Signed-off-by: Roger Pau Monné Acked-by: Brian Woods Cc: George Dunlap Cc: Ian Jackson Cc: Jan Beulich Cc: Julien Grall Cc: Konrad Rzeszutek Wilk Cc: Stefano Stabellini Cc: Tim Deegan Cc: Wei Liu Cc: Suravee Suthikulpanit Cc: Brian Woods Cc: Kevin Tian --- Changes since v1: - Use base 8 to print the function number. - Sort the addition in the pointer function alphabetically. --- docs/misc/printk-formats.txt | 5 + xen/arch/x86/hvm/vmsi.c | 10 +- xen/arch/x86/msi.c | 35 +++--- xen/common/vsprintf.c | 18 ++++ xen/drivers/passthrough/amd/iommu_acpi.c | 17 ++- xen/drivers/passthrough/amd/iommu_cmd.c | 5 +- xen/drivers/passthrough/amd/iommu_detect.c | 5 +- xen/drivers/passthrough/amd/iommu_init.c | 12 +-- xen/drivers/passthrough/amd/iommu_intr.c | 8 +- xen/drivers/passthrough/amd/pci_amd_iommu.c | 25 ++--- xen/drivers/passthrough/pci.c | 114 ++++++++------------ xen/drivers/passthrough/vtd/dmar.c | 25 +++-- xen/drivers/passthrough/vtd/intremap.c | 11 +- xen/drivers/passthrough/vtd/iommu.c | 80 ++++++-------- xen/drivers/passthrough/vtd/quirks.c | 22 ++-- xen/drivers/passthrough/vtd/utils.c | 6 +- xen/drivers/passthrough/x86/ats.c | 13 +-- xen/drivers/vpci/header.c | 11 +- xen/drivers/vpci/msi.c | 6 +- xen/drivers/vpci/msix.c | 24 ++--- 20 files changed, 190 insertions(+), 262 deletions(-) diff --git a/docs/misc/printk-formats.txt b/docs/misc/printk-formats.txt index 080f498f65..8f666f696a 100644 --- a/docs/misc/printk-formats.txt +++ b/docs/misc/printk-formats.txt @@ -48,3 +48,8 @@ Domain and vCPU information: The domain part as above, with the vcpu_id printed in decimal. e.g. d0v1 d[IDLE]v0 + +PCI: + + %pp PCI device address in S:B:D.F format from a pci_sbdf_t. + e.g. 0004:02:00.0 diff --git a/xen/arch/x86/hvm/vmsi.c b/xen/arch/x86/hvm/vmsi.c index aeb5a70104..7290bd553d 100644 --- a/xen/arch/x86/hvm/vmsi.c +++ b/xen/arch/x86/hvm/vmsi.c @@ -686,10 +686,8 @@ static int vpci_msi_update(const struct pci_dev *pdev, uint32_t data, if ( rc ) { - gdprintk(XENLOG_ERR, - "%04x:%02x:%02x.%u: failed to bind PIRQ %u: %d\n", - pdev->seg, pdev->bus, PCI_SLOT(pdev->devfn), - PCI_FUNC(pdev->devfn), pirq + i, rc); + gdprintk(XENLOG_ERR, "%pp: failed to bind PIRQ %u: %d\n", + &pdev->sbdf, pirq + i, rc); while ( bind.machine_irq-- > pirq ) pt_irq_destroy_bind(pdev->domain, &bind); return rc; @@ -743,9 +741,7 @@ static int vpci_msi_enable(const struct pci_dev *pdev, uint32_t data, &msi_info); if ( rc ) { - gdprintk(XENLOG_ERR, "%04x:%02x:%02x.%u: failed to map PIRQ: %d\n", - pdev->seg, pdev->bus, PCI_SLOT(pdev->devfn), - PCI_FUNC(pdev->devfn), rc); + gdprintk(XENLOG_ERR, "%pp: failed to map PIRQ: %d\n", &pdev->sbdf, rc); return rc; } diff --git a/xen/arch/x86/msi.c b/xen/arch/x86/msi.c index 9a1ce33b42..3726394f02 100644 --- a/xen/arch/x86/msi.c +++ b/xen/arch/x86/msi.c @@ -428,8 +428,8 @@ static bool msi_set_mask_bit(struct irq_desc *desc, bool host, bool guest) { pdev->msix->warned = domid; printk(XENLOG_G_WARNING - "cannot mask IRQ %d: masking MSI-X on Dom%d's %04x:%02x:%02x.%u\n", - desc->irq, domid, seg, bus, slot, func); + "cannot mask IRQ %d: masking MSI-X on Dom%d's %pp\n", + desc->irq, domid, &pdev->sbdf); } } pdev->msix->host_maskall = maskall; @@ -987,11 +987,11 @@ static int msix_capability_init(struct pci_dev *dev, struct domain *d = dev->domain ?: currd; if ( !is_hardware_domain(currd) || d != currd ) - printk("%s use of MSI-X on %04x:%02x:%02x.%u by Dom%d\n", + printk("%s use of MSI-X on %pp by %pd\n", is_hardware_domain(currd) ? XENLOG_WARNING "Potentially insecure" : XENLOG_ERR "Insecure", - seg, bus, slot, func, d->domain_id); + &dev->sbdf, d); if ( !is_hardware_domain(d) && /* Assume a domain without memory has no mappings yet. */ (!is_hardware_domain(currd) || d->tot_pages) ) @@ -1046,18 +1046,15 @@ static int __pci_enable_msi(struct msi_info *msi, struct msi_desc **desc) old_desc = find_msi_entry(pdev, msi->irq, PCI_CAP_ID_MSI); if ( old_desc ) { - printk(XENLOG_ERR "irq %d already mapped to MSI on %04x:%02x:%02x.%u\n", - msi->irq, msi->seg, msi->bus, - PCI_SLOT(msi->devfn), PCI_FUNC(msi->devfn)); + printk(XENLOG_ERR "irq %d already mapped to MSI on %pp\n", + msi->irq, &pdev->sbdf); return -EEXIST; } old_desc = find_msi_entry(pdev, -1, PCI_CAP_ID_MSIX); if ( old_desc ) { - printk(XENLOG_WARNING "MSI-X already in use on %04x:%02x:%02x.%u\n", - msi->seg, msi->bus, - PCI_SLOT(msi->devfn), PCI_FUNC(msi->devfn)); + printk(XENLOG_WARNING "MSI-X already in use on %pp\n", &pdev->sbdf); __pci_disable_msix(old_desc); } @@ -1114,16 +1111,15 @@ static int __pci_enable_msix(struct msi_info *msi, struct msi_desc **desc) old_desc = find_msi_entry(pdev, msi->irq, PCI_CAP_ID_MSIX); if ( old_desc ) { - printk(XENLOG_ERR "irq %d already mapped to MSI-X on %04x:%02x:%02x.%u\n", - msi->irq, msi->seg, msi->bus, slot, func); + printk(XENLOG_ERR "irq %d already mapped to MSI-X on %pp\n", + msi->irq, &pdev->sbdf); return -EEXIST; } old_desc = find_msi_entry(pdev, -1, PCI_CAP_ID_MSI); if ( old_desc ) { - printk(XENLOG_WARNING "MSI already in use on %04x:%02x:%02x.%u\n", - msi->seg, msi->bus, slot, func); + printk(XENLOG_WARNING "MSI already in use on %pp\n", &pdev->sbdf); __pci_disable_msi(old_desc); } @@ -1170,9 +1166,8 @@ static void __pci_disable_msix(struct msi_desc *entry) writel(1, entry->mask_base + PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET); else if ( !(control & PCI_MSIX_FLAGS_MASKALL) ) { - printk(XENLOG_WARNING - "cannot disable IRQ %d: masking MSI-X on %04x:%02x:%02x.%u\n", - entry->irq, seg, bus, slot, func); + printk(XENLOG_WARNING "cannot disable IRQ %d: masking MSI-X on %pp\n", + entry->irq, &dev->sbdf); maskall = true; } dev->msix->host_maskall = maskall; @@ -1339,7 +1334,6 @@ int pci_restore_msi_state(struct pci_dev *pdev) struct msi_desc *entry, *tmp; struct irq_desc *desc; struct msi_msg msg; - u8 slot = PCI_SLOT(pdev->devfn), func = PCI_FUNC(pdev->devfn); unsigned int type = 0, pos = 0; u16 control = 0; @@ -1368,9 +1362,8 @@ int pci_restore_msi_state(struct pci_dev *pdev) if (desc->msi_desc != entry) { bogus: - dprintk(XENLOG_ERR, - "Restore MSI for %04x:%02x:%02x:%u entry %u not set?\n", - pdev->seg, pdev->bus, slot, func, i); + dprintk(XENLOG_ERR, "Restore MSI for %pp entry %u not set?\n", + &pdev->sbdf, i); spin_unlock_irqrestore(&desc->lock, flags); if ( type == PCI_CAP_ID_MSIX ) pci_conf_write16(pdev->sbdf, msix_control_reg(pos), diff --git a/xen/common/vsprintf.c b/xen/common/vsprintf.c index 183d3ed4bb..185a4bd561 100644 --- a/xen/common/vsprintf.c +++ b/xen/common/vsprintf.c @@ -394,6 +394,20 @@ static char *print_vcpu(char *str, const char *end, const struct vcpu *v) return number(str + 1, end, v->vcpu_id, 10, -1, -1, 0); } +static char *print_pci_addr(char *str, const char *end, const pci_sbdf_t *sbdf) +{ + str = number(str, end, sbdf->seg, 16, 4, -1, ZEROPAD); + if ( str < end ) + *str = ':'; + str = number(str + 1, end, sbdf->bus, 16, 2, -1, ZEROPAD); + if ( str < end ) + *str = ':'; + str = number(str + 1, end, sbdf->dev, 16, 2, -1, ZEROPAD); + if ( str < end ) + *str = '.'; + return number(str + 1, end, sbdf->fn, 8, -1, -1, 0); +} + static char *pointer(char *str, const char *end, const char **fmt_ptr, const void *arg, int field_width, int precision, int flags) @@ -476,6 +490,10 @@ static char *pointer(char *str, const char *end, const char **fmt_ptr, } } + case 'p': /* PCI SBDF. */ + ++*fmt_ptr; + return print_pci_addr(str, end, arg); + case 's': /* Symbol name with offset and size (iff offset != 0) */ case 'S': /* Symbol name unconditionally with offset and size */ { diff --git a/xen/drivers/passthrough/amd/iommu_acpi.c b/xen/drivers/passthrough/amd/iommu_acpi.c index 64d10481d7..5de2bfa7f3 100644 --- a/xen/drivers/passthrough/amd/iommu_acpi.c +++ b/xen/drivers/passthrough/amd/iommu_acpi.c @@ -717,9 +717,8 @@ static u16 __init parse_ivhd_device_special( return 0; } - AMD_IOMMU_DEBUG("IVHD Special: %04x:%02x:%02x.%u variety %#x handle %#x\n", - seg, PCI_BUS(bdf), PCI_SLOT(bdf), PCI_FUNC(bdf), - special->variety, special->handle); + AMD_IOMMU_DEBUG("IVHD Special: %pp variety %#x handle %#x\n", + &PCI_SBDF2(seg, bdf), special->variety, special->handle); add_ivrs_mapping_entry(bdf, bdf, special->header.data_setting, iommu); switch ( special->variety ) @@ -742,9 +741,9 @@ static u16 __init parse_ivhd_device_special( if ( idx < nr_ioapic_sbdf ) { AMD_IOMMU_DEBUG("IVHD: Command line override present for IO-APIC %#x" - "(IVRS: %#x devID %04x:%02x:%02x.%u)\n", - ioapic_sbdf[idx].id, special->handle, seg, - PCI_BUS(bdf), PCI_SLOT(bdf), PCI_FUNC(bdf)); + "(IVRS: %#x devID %pp)\n", + ioapic_sbdf[idx].id, special->handle, + &PCI_SBDF2(seg, bdf)); break; } @@ -814,9 +813,9 @@ static u16 __init parse_ivhd_device_special( break; case HPET_CMDL: AMD_IOMMU_DEBUG("IVHD: Command line override present for HPET %#x " - "(IVRS: %#x devID %04x:%02x:%02x.%u)\n", - hpet_sbdf.id, special->handle, seg, PCI_BUS(bdf), - PCI_SLOT(bdf), PCI_FUNC(bdf)); + "(IVRS: %#x devID %pp)\n", + hpet_sbdf.id, special->handle, + &PCI_SBDF2(seg, bdf)); break; case HPET_NONE: /* set device id of hpet */ diff --git a/xen/drivers/passthrough/amd/iommu_cmd.c b/xen/drivers/passthrough/amd/iommu_cmd.c index af3a1fb865..3eeb214ba3 100644 --- a/xen/drivers/passthrough/amd/iommu_cmd.c +++ b/xen/drivers/passthrough/amd/iommu_cmd.c @@ -296,9 +296,8 @@ void amd_iommu_flush_iotlb(u8 devfn, const struct pci_dev *pdev, if ( !iommu ) { - AMD_IOMMU_DEBUG("%s: Can't find iommu for %04x:%02x:%02x.%u\n", - __func__, pdev->seg, pdev->bus, - PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn)); + AMD_IOMMU_DEBUG("%s: Can't find iommu for %pp\n", + __func__, &pdev->sbdf); return; } diff --git a/xen/drivers/passthrough/amd/iommu_detect.c b/xen/drivers/passthrough/amd/iommu_detect.c index 069df156de..8bbd0edd22 100644 --- a/xen/drivers/passthrough/amd/iommu_detect.c +++ b/xen/drivers/passthrough/amd/iommu_detect.c @@ -152,9 +152,8 @@ int __init amd_iommu_detect_one_acpi( rt = pci_ro_device(iommu->seg, bus, PCI_DEVFN(dev, func)); if ( rt ) - printk(XENLOG_ERR - "Could not mark config space of %04x:%02x:%02x.%u read-only (%d)\n", - iommu->seg, bus, dev, func, rt); + printk(XENLOG_ERR "Could not mark config space of %pp read-only (%d)\n", + &PCI_SBDF2(iommu->seg, iommu->bdf), rt); list_add_tail(&iommu->list, &amd_iommu_head); rt = 0; diff --git a/xen/drivers/passthrough/amd/iommu_init.c b/xen/drivers/passthrough/amd/iommu_init.c index d19531493b..fa797cf997 100644 --- a/xen/drivers/passthrough/amd/iommu_init.c +++ b/xen/drivers/passthrough/amd/iommu_init.c @@ -793,9 +793,8 @@ static bool_t __init set_iommu_interrupt_handler(struct amd_iommu *iommu) pcidevs_unlock(); if ( !iommu->msi.dev ) { - AMD_IOMMU_DEBUG("IOMMU: no pdev for %04x:%02x:%02x.%u\n", - iommu->seg, PCI_BUS(iommu->bdf), - PCI_SLOT(iommu->bdf), PCI_FUNC(iommu->bdf)); + AMD_IOMMU_DEBUG("IOMMU: no pdev for %pp\n", + &PCI_SBDF2(iommu->seg, iommu->bdf)); return 0; } control = pci_conf_read16(PCI_SBDF2(iommu->seg, iommu->bdf), @@ -834,9 +833,6 @@ static bool_t __init set_iommu_interrupt_handler(struct amd_iommu *iommu) static void amd_iommu_erratum_746_workaround(struct amd_iommu *iommu) { u32 value; - u8 bus = PCI_BUS(iommu->bdf); - u8 dev = PCI_SLOT(iommu->bdf); - u8 func = PCI_FUNC(iommu->bdf); if ( (boot_cpu_data.x86 != 0x15) || (boot_cpu_data.x86_model < 0x10) || @@ -854,8 +850,8 @@ static void amd_iommu_erratum_746_workaround(struct amd_iommu *iommu) pci_conf_write32(PCI_SBDF2(iommu->seg, iommu->bdf), 0xf4, value | (1 << 2)); printk(XENLOG_INFO - "AMD-Vi: Applying erratum 746 workaround for IOMMU at %04x:%02x:%02x.%u\n", - iommu->seg, bus, dev, func); + "AMD-Vi: Applying erratum 746 workaround for IOMMU at %pp\n", + &PCI_SBDF2(iommu->seg, iommu->bdf)); /* Clear the enable writing bit */ pci_conf_write32(PCI_SBDF2(iommu->seg, iommu->bdf), 0xf0, 0x90); diff --git a/xen/drivers/passthrough/amd/iommu_intr.c b/xen/drivers/passthrough/amd/iommu_intr.c index da3c3c1a44..4d63d3fad5 100644 --- a/xen/drivers/passthrough/amd/iommu_intr.c +++ b/xen/drivers/passthrough/amd/iommu_intr.c @@ -511,8 +511,7 @@ static struct amd_iommu *_find_iommu_for_device(int seg, int bdf) if ( iommu ) return iommu; - AMD_IOMMU_DEBUG("No IOMMU for MSI dev = %04x:%02x:%02x.%u\n", - seg, PCI_BUS(bdf), PCI_SLOT(bdf), PCI_FUNC(bdf)); + AMD_IOMMU_DEBUG("No IOMMU for MSI dev = %pp\n", &PCI_SBDF2(seg, bdf)); return ERR_PTR(-EINVAL); } @@ -687,10 +686,7 @@ static int dump_intremap_mapping(u16 seg, struct ivrs_mappings *ivrs_mapping) if ( !ivrs_mapping ) return 0; - printk(" %04x:%02x:%02x:%u:\n", seg, - PCI_BUS(ivrs_mapping->dte_requestor_id), - PCI_SLOT(ivrs_mapping->dte_requestor_id), - PCI_FUNC(ivrs_mapping->dte_requestor_id)); + printk(" %pp:\n", &PCI_SBDF2(seg, ivrs_mapping->dte_requestor_id)); spin_lock_irqsave(&(ivrs_mapping->intremap_lock), flags); dump_intremap_table(ivrs_mapping->intremap_table); diff --git a/xen/drivers/passthrough/amd/pci_amd_iommu.c b/xen/drivers/passthrough/amd/pci_amd_iommu.c index dc51d66769..f7831262f8 100644 --- a/xen/drivers/passthrough/amd/pci_amd_iommu.c +++ b/xen/drivers/passthrough/amd/pci_amd_iommu.c @@ -52,9 +52,8 @@ struct amd_iommu *find_iommu_for_device(int seg, int bdf) tmp.dte_requestor_id = bdf; ivrs_mappings[bdf] = tmp; - printk(XENLOG_WARNING "%04x:%02x:%02x.%u not found in ACPI tables;" - " using same IOMMU as function 0\n", - seg, PCI_BUS(bdf), PCI_SLOT(bdf), PCI_FUNC(bdf)); + printk(XENLOG_WARNING "%pp not found in ACPI tables;" + " using same IOMMU as function 0\n", &PCI_SBDF2(seg, bdf)); /* write iommu field last */ ivrs_mappings[bdf].iommu = ivrs_mappings[bd0].iommu; @@ -324,9 +323,8 @@ static int reassign_device(struct domain *source, struct domain *target, return rc; amd_iommu_setup_domain_device(target, iommu, devfn, pdev); - AMD_IOMMU_DEBUG("Re-assign %04x:%02x:%02x.%u from dom%d to dom%d\n", - pdev->seg, pdev->bus, PCI_SLOT(devfn), PCI_FUNC(devfn), - source->domain_id, target->domain_id); + AMD_IOMMU_DEBUG("Re-assign %pp from dom%d to dom%d\n", + &pdev->sbdf, source->domain_id, target->domain_id); return 0; } @@ -431,15 +429,12 @@ static int amd_iommu_add_device(u8 devfn, struct pci_dev *pdev) if ( pdev->type == DEV_TYPE_PCI_HOST_BRIDGE && is_hardware_domain(pdev->domain) ) { - AMD_IOMMU_DEBUG("Skipping host bridge %04x:%02x:%02x.%u\n", - pdev->seg, pdev->bus, PCI_SLOT(devfn), - PCI_FUNC(devfn)); + AMD_IOMMU_DEBUG("Skipping host bridge %pp\n", &pdev->sbdf); return 0; } - AMD_IOMMU_DEBUG("No iommu for %04x:%02x:%02x.%u; cannot be handed to d%d\n", - pdev->seg, pdev->bus, PCI_SLOT(devfn), PCI_FUNC(devfn), - pdev->domain->domain_id); + AMD_IOMMU_DEBUG("No iommu for %pp; cannot be handed to d%d\n", + &pdev->sbdf, pdev->domain->domain_id); return -ENODEV; } @@ -458,10 +453,8 @@ static int amd_iommu_remove_device(u8 devfn, struct pci_dev *pdev) iommu = find_iommu_for_device(pdev->seg, bdf); if ( !iommu ) { - AMD_IOMMU_DEBUG("Fail to find iommu." - " %04x:%02x:%02x.%u cannot be removed from dom%d\n", - pdev->seg, pdev->bus, PCI_SLOT(devfn), PCI_FUNC(devfn), - pdev->domain->domain_id); + AMD_IOMMU_DEBUG("Fail to find iommu. %pp cannot be removed from %pd\n", + &pdev->sbdf, pdev->domain); return -ENODEV; } diff --git a/xen/drivers/passthrough/pci.c b/xen/drivers/passthrough/pci.c index 5271f8d69c..3f80097f53 100644 --- a/xen/drivers/passthrough/pci.c +++ b/xen/drivers/passthrough/pci.c @@ -238,11 +238,7 @@ static void check_pdev(const struct pci_dev *pdev) (PCI_STATUS_PARITY | PCI_STATUS_SIG_TARGET_ABORT | \ PCI_STATUS_REC_TARGET_ABORT | PCI_STATUS_REC_MASTER_ABORT | \ PCI_STATUS_SIG_SYSTEM_ERROR | PCI_STATUS_DETECTED_PARITY) - u16 seg = pdev->seg; - u8 bus = pdev->bus; - u8 dev = PCI_SLOT(pdev->devfn); - u8 func = PCI_FUNC(pdev->devfn); - u16 val; + u16 val; if ( command_mask ) { @@ -252,8 +248,8 @@ static void check_pdev(const struct pci_dev *pdev) val = pci_conf_read16(pdev->sbdf, PCI_STATUS); if ( val & PCI_STATUS_CHECK ) { - printk(XENLOG_INFO "%04x:%02x:%02x.%u status %04x -> %04x\n", - seg, bus, dev, func, val, val & ~PCI_STATUS_CHECK); + printk(XENLOG_INFO "%pp status %04x -> %04x\n", + &pdev->sbdf, val, val & ~PCI_STATUS_CHECK); pci_conf_write16(pdev->sbdf, PCI_STATUS, val & PCI_STATUS_CHECK); } } @@ -270,9 +266,8 @@ static void check_pdev(const struct pci_dev *pdev) val = pci_conf_read16(pdev->sbdf, PCI_SEC_STATUS); if ( val & PCI_STATUS_CHECK ) { - printk(XENLOG_INFO - "%04x:%02x:%02x.%u secondary status %04x -> %04x\n", - seg, bus, dev, func, val, val & ~PCI_STATUS_CHECK); + printk(XENLOG_INFO "%pp secondary status %04x -> %04x\n", + &pdev->sbdf, val, val & ~PCI_STATUS_CHECK); pci_conf_write16(pdev->sbdf, PCI_SEC_STATUS, val & PCI_STATUS_CHECK); } @@ -411,8 +406,8 @@ static struct pci_dev *alloc_pdev(struct pci_seg *pseg, u8 bus, u8 devfn) break; default: - printk(XENLOG_WARNING "%04x:%02x:%02x.%u: unknown type %d\n", - pseg->nr, bus, PCI_SLOT(devfn), PCI_FUNC(devfn), pdev->type); + printk(XENLOG_WARNING "%pp: unknown type %d\n", + &pdev->sbdf, pdev->type); break; } @@ -644,9 +639,9 @@ unsigned int pci_size_mem_bar(pci_sbdf_t sbdf, unsigned int pos, if ( flags & PCI_BAR_LAST ) { printk(XENLOG_WARNING - "%sdevice %04x:%02x:%02x.%u with 64-bit %sBAR in last slot\n", - (flags & PCI_BAR_VF) ? "SR-IOV " : "", sbdf.seg, sbdf.bus, - sbdf.dev, sbdf.fn, (flags & PCI_BAR_VF) ? "vf " : ""); + "%sdevice %pp with 64-bit %sBAR in last slot\n", + (flags & PCI_BAR_VF) ? "SR-IOV " : "", &sbdf, + (flags & PCI_BAR_VF) ? "vf " : ""); *psize = 0; return 1; } @@ -750,9 +745,8 @@ int pci_add_device(u16 seg, u8 bus, u8 devfn, PCI_BASE_ADDRESS_SPACE_IO ) { printk(XENLOG_WARNING - "SR-IOV device %04x:%02x:%02x.%u with vf BAR%u" - " in IO space\n", - seg, bus, slot, func, i); + "SR-IOV device %pp with vf BAR%u in IO space\n", + &pdev->sbdf, i); continue; } ret = pci_size_mem_bar(sbdf, idx, NULL, &pdev->vf_rlen[i], @@ -764,10 +758,8 @@ int pci_add_device(u16 seg, u8 bus, u8 devfn, } } else - printk(XENLOG_WARNING - "SR-IOV device %04x:%02x:%02x.%u has its virtual" - " functions already enabled (%04x)\n", - seg, bus, slot, func, ctrl); + printk(XENLOG_WARNING "SR-IOV device %pp has its virtual" + " functions already enabled (%04x)\n", &pdev->sbdf, ctrl); } check_pdev(pdev); @@ -794,15 +786,14 @@ out: pcidevs_unlock(); if ( !ret ) { - printk(XENLOG_DEBUG "PCI add %s %04x:%02x:%02x.%u\n", pdev_type, - seg, bus, slot, func); + printk(XENLOG_DEBUG "PCI add %s %pp\n", pdev_type, &pdev->sbdf); while ( pdev->phantom_stride ) { func += pdev->phantom_stride; if ( PCI_SLOT(func) ) break; - printk(XENLOG_DEBUG "PCI phantom %04x:%02x:%02x.%u\n", - seg, bus, slot, func); + printk(XENLOG_DEBUG "PCI phantom %pp\n", + &PCI_SBDF(seg, bus, slot, func)); } } return ret; @@ -831,9 +822,8 @@ int pci_remove_device(u16 seg, u8 bus, u8 devfn) if ( pdev->domain ) list_del(&pdev->domain_list); pci_cleanup_msi(pdev); + printk(XENLOG_DEBUG "PCI remove device %pp\n", &pdev->sbdf); free_pdev(pseg, pdev); - printk(XENLOG_DEBUG "PCI remove device %04x:%02x:%02x.%u\n", - seg, bus, PCI_SLOT(devfn), PCI_FUNC(devfn)); break; } @@ -907,9 +897,8 @@ int pci_release_devices(struct domain *d) bus = pdev->bus; devfn = pdev->devfn; if ( deassign_device(d, pdev->seg, bus, devfn) ) - printk("domain %d: deassign device (%04x:%02x:%02x.%u) failed!\n", - d->domain_id, pdev->seg, bus, - PCI_SLOT(devfn), PCI_FUNC(devfn)); + printk("domain %d: deassign device (%pp) failed!\n", + d->domain_id, &pdev->sbdf); } pcidevs_unlock(); @@ -1056,8 +1045,8 @@ static int __init _scan_pci_devices(struct pci_seg *pseg, void *arg) pdev = alloc_pdev(pseg, bus, PCI_DEVFN(dev, func)); if ( !pdev ) { - printk(XENLOG_WARNING "%04x:%02x:%02x.%u: alloc_pdev failed\n", - pseg->nr, bus, dev, func); + printk(XENLOG_WARNING "%pp: alloc_pdev failed\n", + &PCI_SBDF(pseg->nr, bus, dev, func)); return -ENOMEM; } @@ -1098,9 +1087,8 @@ static void __hwdom_init setup_one_hwdom_device(const struct setup_hwdom *ctxt, err = ctxt->handler(devfn, pdev); if ( err ) { - printk(XENLOG_ERR "setup %04x:%02x:%02x.%u for d%d failed (%d)\n", - pdev->seg, pdev->bus, PCI_SLOT(devfn), PCI_FUNC(devfn), - ctxt->d->domain_id, err); + printk(XENLOG_ERR "setup %pp for d%d failed (%d)\n", + &pdev->sbdf, ctxt->d->domain_id, err); if ( devfn == pdev->devfn ) return; } @@ -1141,9 +1129,8 @@ static int __hwdom_init _setup_hwdom_pci_devices(struct pci_seg *pseg, void *arg pdev->domain = dom_xen; } else if ( pdev->domain != ctxt->d ) - printk(XENLOG_WARNING "Dom%d owning %04x:%02x:%02x.%u?\n", - pdev->domain->domain_id, pseg->nr, bus, - PCI_SLOT(devfn), PCI_FUNC(devfn)); + printk(XENLOG_WARNING "Dom%d owning %pp?\n", + pdev->domain->domain_id, &pdev->sbdf); if ( iommu_verbose ) { @@ -1279,10 +1266,8 @@ static int _dump_pci_devices(struct pci_seg *pseg, void *arg) list_for_each_entry ( pdev, &pseg->alldevs_list, alldevs_list ) { - printk("%04x:%02x:%02x.%u - dom %-3d - node %-3d - MSIs < ", - pseg->nr, pdev->bus, - PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn), - pdev->domain ? pdev->domain->domain_id : -1, + printk("%pp - dom %-3d - node %-3d - MSIs < ", + &pdev->sbdf, pdev->domain ? pdev->domain->domain_id : -1, (pdev->node != NUMA_NO_NODE) ? pdev->node : -1); list_for_each_entry ( msi, &pdev->msi_list, list ) printk("%d ", msi->irq); @@ -1347,8 +1332,8 @@ static int iommu_add_device(struct pci_dev *pdev) return 0; rc = hd->platform_ops->add_device(devfn, pci_to_dev(pdev)); if ( rc ) - printk(XENLOG_WARNING "IOMMU: add %04x:%02x:%02x.%u failed (%d)\n", - pdev->seg, pdev->bus, PCI_SLOT(devfn), PCI_FUNC(devfn), rc); + printk(XENLOG_WARNING "IOMMU: add %pp failed (%d)\n", + &pdev->sbdf, rc); } } @@ -1392,8 +1377,7 @@ static int iommu_remove_device(struct pci_dev *pdev) if ( !rc ) continue; - printk(XENLOG_ERR "IOMMU: remove %04x:%02x:%02x.%u failed (%d)\n", - pdev->seg, pdev->bus, PCI_SLOT(devfn), PCI_FUNC(devfn), rc); + printk(XENLOG_ERR "IOMMU: remove %pp failed (%d)\n", &pdev->sbdf, rc); return rc; } @@ -1463,9 +1447,8 @@ static int assign_device(struct domain *d, u16 seg, u8 bus, u8 devfn, u32 flag) break; rc = hd->platform_ops->assign_device(d, devfn, pci_to_dev(pdev), flag); if ( rc ) - printk(XENLOG_G_WARNING "d%d: assign %04x:%02x:%02x.%u failed (%d)\n", - d->domain_id, seg, bus, PCI_SLOT(devfn), PCI_FUNC(devfn), - rc); + printk(XENLOG_G_WARNING "d%d: assign %pp failed (%d)\n", + d->domain_id, &PCI_SBDF3(seg, bus, devfn), rc); } done: @@ -1501,8 +1484,8 @@ int deassign_device(struct domain *d, u16 seg, u8 bus, u8 devfn) if ( !ret ) continue; - printk(XENLOG_G_ERR "d%d: deassign %04x:%02x:%02x.%u failed (%d)\n", - d->domain_id, seg, bus, PCI_SLOT(devfn), PCI_FUNC(devfn), ret); + printk(XENLOG_G_ERR "d%d: deassign %pp failed (%d)\n", + d->domain_id, &PCI_SBDF3(seg, bus, devfn), ret); return ret; } @@ -1511,9 +1494,8 @@ int deassign_device(struct domain *d, u16 seg, u8 bus, u8 devfn) pci_to_dev(pdev)); if ( ret ) { - dprintk(XENLOG_G_ERR, - "d%d: deassign device (%04x:%02x:%02x.%u) failed\n", - d->domain_id, seg, bus, PCI_SLOT(devfn), PCI_FUNC(devfn)); + dprintk(XENLOG_G_ERR, "d%d: deassign device (%pp) failed\n", + d->domain_id, &pdev->sbdf); return ret; } @@ -1590,10 +1572,8 @@ void iommu_dev_iotlb_flush_timeout(struct domain *d, struct pci_dev *pdev) _pci_hide_device(pdev); if ( !d->is_shutting_down && printk_ratelimit() ) - printk(XENLOG_ERR - "dom%d: ATS device %04x:%02x:%02x.%u flush failed\n", - d->domain_id, pdev->seg, pdev->bus, PCI_SLOT(pdev->devfn), - PCI_FUNC(pdev->devfn)); + printk(XENLOG_ERR "dom%d: ATS device %pp flush failed\n", + d->domain_id, &pdev->sbdf); if ( !is_hardware_domain(d) ) domain_crash(d); @@ -1682,9 +1662,8 @@ int iommu_do_pci_domctl( { if ( ret ) { - printk(XENLOG_G_INFO - "%04x:%02x:%02x.%u already assigned, or non-existent\n", - seg, bus, PCI_SLOT(devfn), PCI_FUNC(devfn)); + printk(XENLOG_G_INFO "%pp already assigned, or non-existent\n", + &PCI_SBDF3(seg, bus, devfn)); ret = -EINVAL; } break; @@ -1696,9 +1675,8 @@ int iommu_do_pci_domctl( "h", u_domctl); else if ( ret ) printk(XENLOG_G_ERR "XEN_DOMCTL_assign_device: " - "assign %04x:%02x:%02x.%u to dom%d failed (%d)\n", - seg, bus, PCI_SLOT(devfn), PCI_FUNC(devfn), - d->domain_id, ret); + "assign %pp to dom%d failed (%d)\n", + &PCI_SBDF3(seg, bus, devfn), d->domain_id, ret); break; @@ -1732,10 +1710,8 @@ int iommu_do_pci_domctl( ret = deassign_device(d, seg, bus, devfn); pcidevs_unlock(); if ( ret ) - printk(XENLOG_G_ERR - "deassign %04x:%02x:%02x.%u from dom%d failed (%d)\n", - seg, bus, PCI_SLOT(devfn), PCI_FUNC(devfn), - d->domain_id, ret); + printk(XENLOG_G_ERR "deassign %pp from dom%d failed (%d)\n", + &PCI_SBDF3(seg, bus, devfn), d->domain_id, ret); break; diff --git a/xen/drivers/passthrough/vtd/dmar.c b/xen/drivers/passthrough/vtd/dmar.c index 9c94deac0b..4c0d2f6672 100644 --- a/xen/drivers/passthrough/vtd/dmar.c +++ b/xen/drivers/passthrough/vtd/dmar.c @@ -361,9 +361,8 @@ static int __init acpi_parse_dev_scope( sub_bus = pci_conf_read8(PCI_SBDF(seg, bus, path->dev, path->fn), PCI_SUBORDINATE_BUS); if ( iommu_verbose ) - printk(VTDPREFIX - " bridge: %04x:%02x:%02x.%u start=%x sec=%x sub=%x\n", - seg, bus, path->dev, path->fn, + printk(VTDPREFIX " bridge: %pp start=%x sec=%x sub=%x\n", + &PCI_SBDF(seg, bus, path->dev, path->fn), acpi_scope->bus, sec_bus, sub_bus); dmar_scope_add_buses(scope, sec_bus, sub_bus); @@ -371,8 +370,8 @@ static int __init acpi_parse_dev_scope( case ACPI_DMAR_SCOPE_TYPE_HPET: if ( iommu_verbose ) - printk(VTDPREFIX " MSI HPET: %04x:%02x:%02x.%u\n", - seg, bus, path->dev, path->fn); + printk(VTDPREFIX " MSI HPET: %pp\n", + &PCI_SBDF(seg, bus, path->dev, path->fn)); if ( drhd ) { @@ -393,8 +392,8 @@ static int __init acpi_parse_dev_scope( case ACPI_DMAR_SCOPE_TYPE_ENDPOINT: if ( iommu_verbose ) - printk(VTDPREFIX " endpoint: %04x:%02x:%02x.%u\n", - seg, bus, path->dev, path->fn); + printk(VTDPREFIX " endpoint: %pp\n", + &PCI_SBDF(seg, bus, path->dev, path->fn)); if ( drhd ) { @@ -407,8 +406,8 @@ static int __init acpi_parse_dev_scope( case ACPI_DMAR_SCOPE_TYPE_IOAPIC: if ( iommu_verbose ) - printk(VTDPREFIX " IOAPIC: %04x:%02x:%02x.%u\n", - seg, bus, path->dev, path->fn); + printk(VTDPREFIX " IOAPIC: %pp\n", + &PCI_SBDF(seg, bus, path->dev, path->fn)); if ( drhd ) { @@ -537,8 +536,8 @@ acpi_parse_one_drhd(struct acpi_dmar_header *header) if ( !pci_device_detect(drhd->segment, b, d, f) ) printk(XENLOG_WARNING VTDPREFIX - " Non-existent device (%04x:%02x:%02x.%u) in this DRHD's scope!\n", - drhd->segment, b, d, f); + " Non-existent device (%pp) in this DRHD's scope!\n", + &PCI_SBDF(drhd->segment, b, d, f)); } acpi_register_drhd_unit(dmaru); @@ -574,9 +573,9 @@ static int register_one_rmrr(struct acpi_rmrr_unit *rmrru) if ( pci_device_detect(rmrru->segment, b, d, f) == 0 ) { dprintk(XENLOG_WARNING VTDPREFIX, - " Non-existent device (%04x:%02x:%02x.%u) is reported" + " Non-existent device (%pp) is reported" " in RMRR (%"PRIx64", %"PRIx64")'s scope!\n", - rmrru->segment, b, d, f, + &PCI_SBDF(rmrru->segment, b, d, f), rmrru->base_address, rmrru->end_address); ignore = true; } diff --git a/xen/drivers/passthrough/vtd/intremap.c b/xen/drivers/passthrough/vtd/intremap.c index df0e8ac5cb..9b86fa8bb7 100644 --- a/xen/drivers/passthrough/vtd/intremap.c +++ b/xen/drivers/passthrough/vtd/intremap.c @@ -524,16 +524,13 @@ static void set_msi_source_id(struct pci_dev *pdev, struct iremap_entry *ire) } else dprintk(XENLOG_WARNING VTDPREFIX, - "d%d: no upstream bridge for %04x:%02x:%02x.%u\n", - pdev->domain->domain_id, - seg, bus, PCI_SLOT(devfn), PCI_FUNC(devfn)); + "d%d: no upstream bridge for %pp\n", + pdev->domain->domain_id, &pdev->sbdf); break; default: - dprintk(XENLOG_WARNING VTDPREFIX, - "d%d: unknown(%u): %04x:%02x:%02x.%u\n", - pdev->domain->domain_id, pdev->type, - seg, bus, PCI_SLOT(devfn), PCI_FUNC(devfn)); + dprintk(XENLOG_WARNING VTDPREFIX, "d%d: unknown(%u): %pp\n", + pdev->domain->domain_id, pdev->type, &pdev->sbdf); break; } } diff --git a/xen/drivers/passthrough/vtd/iommu.c b/xen/drivers/passthrough/vtd/iommu.c index 8b27d7e775..188ff437d8 100644 --- a/xen/drivers/passthrough/vtd/iommu.c +++ b/xen/drivers/passthrough/vtd/iommu.c @@ -882,27 +882,24 @@ static int iommu_page_fault_do_one(struct iommu *iommu, int type, { case DMA_REMAP: printk(XENLOG_G_WARNING VTDPREFIX - "DMAR:[%s] Request device [%04x:%02x:%02x.%u] " + "DMAR:[%s] Request device [%pp] " "fault addr %"PRIx64", iommu reg = %p\n", (type ? "DMA Read" : "DMA Write"), - seg, PCI_BUS(source_id), PCI_SLOT(source_id), - PCI_FUNC(source_id), addr, iommu->reg); + &PCI_SBDF2(seg, source_id), addr, iommu->reg); kind = "DMAR"; break; case INTR_REMAP: printk(XENLOG_G_WARNING VTDPREFIX - "INTR-REMAP: Request device [%04x:%02x:%02x.%u] " + "INTR-REMAP: Request device [%pp] " "fault index %"PRIx64", iommu reg = %p\n", - seg, PCI_BUS(source_id), PCI_SLOT(source_id), - PCI_FUNC(source_id), addr >> 48, iommu->reg); + &PCI_SBDF2(seg, source_id), addr >> 48, iommu->reg); kind = "INTR-REMAP"; break; default: printk(XENLOG_G_WARNING VTDPREFIX - "UNKNOWN: Request device [%04x:%02x:%02x.%u] " + "UNKNOWN: Request device [%pp] " "fault addr %"PRIx64", iommu reg = %p\n", - seg, PCI_BUS(source_id), PCI_SLOT(source_id), - PCI_FUNC(source_id), addr, iommu->reg); + &PCI_SBDF2(seg, source_id), addr, iommu->reg); kind = "UNKNOWN"; break; } @@ -1354,11 +1351,9 @@ int domain_context_mapping_one( { if ( pdev->domain != domain ) { - printk(XENLOG_G_INFO VTDPREFIX - "d%d: %04x:%02x:%02x.%u owned by d%d!", - domain->domain_id, - seg, bus, PCI_SLOT(devfn), PCI_FUNC(devfn), - pdev->domain ? pdev->domain->domain_id : -1); + printk(XENLOG_G_INFO VTDPREFIX "%pd: %pp owned by %pd!", + domain, &PCI_SBDF3(seg, bus, devfn), + pdev->domain ?: NULL); res = -EINVAL; } } @@ -1370,18 +1365,15 @@ int domain_context_mapping_one( if ( cdomain < 0 ) { printk(XENLOG_G_WARNING VTDPREFIX - "d%d: %04x:%02x:%02x.%u mapped, but can't find owner!\n", - domain->domain_id, - seg, bus, PCI_SLOT(devfn), PCI_FUNC(devfn)); + "%pd: %pp mapped, but can't find owner!\n", + domain, &PCI_SBDF3(seg, bus, devfn)); res = -EINVAL; } else if ( cdomain != domain->domain_id ) { printk(XENLOG_G_INFO VTDPREFIX - "d%d: %04x:%02x:%02x.%u already mapped to d%d!", - domain->domain_id, - seg, bus, PCI_SLOT(devfn), PCI_FUNC(devfn), - cdomain); + "%pd: %pp already mapped to d%d!", + domain, &PCI_SBDF3(seg, bus, devfn), cdomain); res = -EINVAL; } } @@ -1496,9 +1488,8 @@ static int domain_context_mapping(struct domain *domain, u8 devfn, { case DEV_TYPE_PCI_HOST_BRIDGE: if ( iommu_debug ) - printk(VTDPREFIX "d%d:Hostbridge: skip %04x:%02x:%02x.%u map\n", - domain->domain_id, seg, bus, - PCI_SLOT(devfn), PCI_FUNC(devfn)); + printk(VTDPREFIX "%pd:Hostbridge: skip %pp map\n", + domain, &PCI_SBDF3(seg, bus, devfn)); if ( !is_hardware_domain(domain) ) return -EPERM; break; @@ -1510,9 +1501,8 @@ static int domain_context_mapping(struct domain *domain, u8 devfn, case DEV_TYPE_PCIe_ENDPOINT: if ( iommu_debug ) - printk(VTDPREFIX "d%d:PCIe: map %04x:%02x:%02x.%u\n", - domain->domain_id, seg, bus, - PCI_SLOT(devfn), PCI_FUNC(devfn)); + printk(VTDPREFIX "%pd:PCIe: map %pp\n", + domain, &PCI_SBDF3(seg, bus, devfn)); ret = domain_context_mapping_one(domain, drhd->iommu, bus, devfn, pdev); if ( !ret && devfn == pdev->devfn && ats_device(pdev, drhd) > 0 ) @@ -1522,9 +1512,8 @@ static int domain_context_mapping(struct domain *domain, u8 devfn, case DEV_TYPE_PCI: if ( iommu_debug ) - printk(VTDPREFIX "d%d:PCI: map %04x:%02x:%02x.%u\n", - domain->domain_id, seg, bus, - PCI_SLOT(devfn), PCI_FUNC(devfn)); + printk(VTDPREFIX "%pd:PCI: map %pp\n", + domain, &PCI_SBDF3(seg, bus, devfn)); ret = domain_context_mapping_one(domain, drhd->iommu, bus, devfn, pdev); @@ -1550,9 +1539,8 @@ static int domain_context_mapping(struct domain *domain, u8 devfn, break; default: - dprintk(XENLOG_ERR VTDPREFIX, "d%d:unknown(%u): %04x:%02x:%02x.%u\n", - domain->domain_id, pdev->type, - seg, bus, PCI_SLOT(devfn), PCI_FUNC(devfn)); + dprintk(XENLOG_ERR VTDPREFIX, "%pd:unknown(%u): %pp\n", + domain, pdev->type, &PCI_SBDF3(seg, bus, devfn)); ret = -EINVAL; break; } @@ -1647,9 +1635,8 @@ static int domain_context_unmap(struct domain *domain, u8 devfn, { case DEV_TYPE_PCI_HOST_BRIDGE: if ( iommu_debug ) - printk(VTDPREFIX "d%d:Hostbridge: skip %04x:%02x:%02x.%u unmap\n", - domain->domain_id, seg, bus, - PCI_SLOT(devfn), PCI_FUNC(devfn)); + printk(VTDPREFIX "%pd:Hostbridge: skip %pp unmap\n", + domain, &PCI_SBDF3(seg, bus, devfn)); if ( !is_hardware_domain(domain) ) return -EPERM; goto out; @@ -1661,9 +1648,8 @@ static int domain_context_unmap(struct domain *domain, u8 devfn, case DEV_TYPE_PCIe_ENDPOINT: if ( iommu_debug ) - printk(VTDPREFIX "d%d:PCIe: unmap %04x:%02x:%02x.%u\n", - domain->domain_id, seg, bus, - PCI_SLOT(devfn), PCI_FUNC(devfn)); + printk(VTDPREFIX "%pd:PCIe: unmap %pp\n", + domain, &PCI_SBDF3(seg, bus, devfn)); ret = domain_context_unmap_one(domain, iommu, bus, devfn); if ( !ret && devfn == pdev->devfn && ats_device(pdev, drhd) > 0 ) disable_ats_device(pdev); @@ -1672,8 +1658,8 @@ static int domain_context_unmap(struct domain *domain, u8 devfn, case DEV_TYPE_PCI: if ( iommu_debug ) - printk(VTDPREFIX "d%d:PCI: unmap %04x:%02x:%02x.%u\n", - domain->domain_id, seg, bus, PCI_SLOT(devfn), PCI_FUNC(devfn)); + printk(VTDPREFIX "%pd:PCI: unmap %pp\n", + domain, &PCI_SBDF3(seg, bus, devfn)); ret = domain_context_unmap_one(domain, iommu, bus, devfn); if ( ret ) break; @@ -1698,9 +1684,8 @@ static int domain_context_unmap(struct domain *domain, u8 devfn, break; default: - dprintk(XENLOG_ERR VTDPREFIX, "d%d:unknown(%u): %04x:%02x:%02x.%u\n", - domain->domain_id, pdev->type, - seg, bus, PCI_SLOT(devfn), PCI_FUNC(devfn)); + dprintk(XENLOG_ERR VTDPREFIX, "%pd:unknown(%u): %pp\n", + domain, pdev->type, &PCI_SBDF3(seg, bus, devfn)); ret = -EINVAL; goto out; } @@ -2497,12 +2482,11 @@ static int intel_iommu_assign_device( bool_t relaxed = !!(flag & XEN_DOMCTL_DEV_RDM_RELAXED); printk(XENLOG_GUEST "%s" VTDPREFIX - " It's %s to assign %04x:%02x:%02x.%u" - " with shared RMRR at %"PRIx64" for Dom%d.\n", + " It's %s to assign %pp" + " with shared RMRR at %"PRIx64" for %pd.\n", relaxed ? XENLOG_WARNING : XENLOG_ERR, relaxed ? "risky" : "disallowed", - seg, bus, PCI_SLOT(devfn), PCI_FUNC(devfn), - rmrr->base_address, d->domain_id); + &PCI_SBDF3(seg, bus, devfn), rmrr->base_address, d); if ( !relaxed ) return -EPERM; } diff --git a/xen/drivers/passthrough/vtd/quirks.c b/xen/drivers/passthrough/vtd/quirks.c index b6e2d313f0..4580239aa6 100644 --- a/xen/drivers/passthrough/vtd/quirks.c +++ b/xen/drivers/passthrough/vtd/quirks.c @@ -417,8 +417,6 @@ void pci_vtd_quirk(const struct pci_dev *pdev) { int seg = pdev->seg; int bus = pdev->bus; - int dev = PCI_SLOT(pdev->devfn); - int func = PCI_FUNC(pdev->devfn); int pos; bool_t ff; u32 val, val2; @@ -442,8 +440,7 @@ void pci_vtd_quirk(const struct pci_dev *pdev) case 0x3c28: /* Sandybridge */ val = pci_conf_read32(pdev->sbdf, 0x1AC); pci_conf_write32(pdev->sbdf, 0x1AC, val | (1 << 31)); - printk(XENLOG_INFO "Masked VT-d error signaling on %04x:%02x:%02x.%u\n", - seg, bus, dev, func); + printk(XENLOG_INFO "Masked VT-d error signaling on %pp\n", &pdev->sbdf); break; /* Tylersburg (EP)/Boxboro (MP) chipsets (NHM-EP/EX, WSM-EP/EX) */ @@ -478,8 +475,7 @@ void pci_vtd_quirk(const struct pci_dev *pdev) ff = pcie_aer_get_firmware_first(pdev); if ( !pos ) { - printk(XENLOG_WARNING "%04x:%02x:%02x.%u without AER capability?\n", - seg, bus, dev, func); + printk(XENLOG_WARNING "%pp without AER capability?\n", &pdev->sbdf); break; } @@ -502,8 +498,7 @@ void pci_vtd_quirk(const struct pci_dev *pdev) val = pci_conf_read32(pdev->sbdf, 0x20c); pci_conf_write32(pdev->sbdf, 0x20c, val | (1 << 4)); - printk(XENLOG_INFO "%s UR signaling on %04x:%02x:%02x.%u\n", - action, seg, bus, dev, func); + printk(XENLOG_INFO "%s UR signaling on %pp\n", action, &pdev->sbdf); break; case 0x0040: case 0x0044: case 0x0048: /* Nehalem/Westmere */ @@ -528,16 +523,15 @@ void pci_vtd_quirk(const struct pci_dev *pdev) { __set_bit(0x1c8 * 8 + 20, va); iounmap(va); - printk(XENLOG_INFO "Masked UR signaling on %04x:%02x:%02x.%u\n", - seg, bus, dev, func); + printk(XENLOG_INFO "Masked UR signaling on %pp\n", &pdev->sbdf); } else - printk(XENLOG_ERR "Could not map %"PRIpaddr" for %04x:%02x:%02x.%u\n", - pa, seg, bus, dev, func); + printk(XENLOG_ERR "Could not map %"PRIpaddr" for %pp\n", + pa, &pdev->sbdf); } else - printk(XENLOG_WARNING "Bogus DMIBAR %#"PRIx64" on %04x:%02x:%02x.%u\n", - bar, seg, bus, dev, func); + printk(XENLOG_WARNING "Bogus DMIBAR %#"PRIx64" on %pp\n", + bar, &pdev->sbdf); break; } } diff --git a/xen/drivers/passthrough/vtd/utils.c b/xen/drivers/passthrough/vtd/utils.c index 94a6e4eec9..68304a61e8 100644 --- a/xen/drivers/passthrough/vtd/utils.c +++ b/xen/drivers/passthrough/vtd/utils.c @@ -95,9 +95,9 @@ void print_vtd_entries(struct iommu *iommu, int bus, int devfn, u64 gmfn) u64 *l, val; u32 l_index, level; - printk("print_vtd_entries: iommu #%u dev %04x:%02x:%02x.%u gmfn %"PRI_gfn"\n", - iommu->index, iommu->intel->drhd->segment, bus, - PCI_SLOT(devfn), PCI_FUNC(devfn), gmfn); + printk("print_vtd_entries: iommu #%u dev %pp gmfn %"PRI_gfn"\n", + iommu->index, &PCI_SBDF3(iommu->intel->drhd->segment, bus, devfn), + gmfn); if ( iommu->root_maddr == 0 ) { diff --git a/xen/drivers/passthrough/x86/ats.c b/xen/drivers/passthrough/x86/ats.c index 3eea7f89fc..dc0584b423 100644 --- a/xen/drivers/passthrough/x86/ats.c +++ b/xen/drivers/passthrough/x86/ats.c @@ -31,8 +31,7 @@ int enable_ats_device(struct pci_dev *pdev, struct list_head *ats_list) BUG_ON(!pos); if ( iommu_verbose ) - dprintk(XENLOG_INFO, "%04x:%02x:%02x.%u: ATS capability found\n", - seg, bus, PCI_SLOT(devfn), PCI_FUNC(devfn)); + dprintk(XENLOG_INFO, "%pp: ATS capability found\n", &pdev->sbdf); value = pci_conf_read16(pdev->sbdf, pos + ATS_REG_CTL); if ( value & ATS_ENABLE ) @@ -63,9 +62,8 @@ int enable_ats_device(struct pci_dev *pdev, struct list_head *ats_list) } if ( iommu_verbose ) - dprintk(XENLOG_INFO, "%04x:%02x:%02x.%u: ATS %s enabled\n", - seg, bus, PCI_SLOT(devfn), PCI_FUNC(devfn), - pos ? "is" : "was"); + dprintk(XENLOG_INFO, "%pp: ATS %s enabled\n", + &pdev->sbdf, pos ? "is" : "was"); return pos; } @@ -73,8 +71,6 @@ int enable_ats_device(struct pci_dev *pdev, struct list_head *ats_list) void disable_ats_device(struct pci_dev *pdev) { u32 value; - u16 seg = pdev->seg; - u8 bus = pdev->bus, devfn = pdev->devfn; BUG_ON(!pdev->ats.cap_pos); @@ -85,6 +81,5 @@ void disable_ats_device(struct pci_dev *pdev) list_del(&pdev->ats.list); if ( iommu_verbose ) - dprintk(XENLOG_INFO, "%04x:%02x:%02x.%u: ATS is disabled\n", - seg, bus, PCI_SLOT(devfn), PCI_FUNC(devfn)); + dprintk(XENLOG_INFO, "%pp: ATS is disabled\n", &pdev->sbdf); } diff --git a/xen/drivers/vpci/header.c b/xen/drivers/vpci/header.c index 3c794f486d..ba9a036202 100644 --- a/xen/drivers/vpci/header.c +++ b/xen/drivers/vpci/header.c @@ -355,7 +355,6 @@ static void bar_write(const struct pci_dev *pdev, unsigned int reg, uint32_t val, void *data) { struct vpci_bar *bar = data; - uint8_t slot = PCI_SLOT(pdev->devfn), func = PCI_FUNC(pdev->devfn); bool hi = false; if ( bar->type == VPCI_BAR_MEM64_HI ) @@ -372,9 +371,8 @@ static void bar_write(const struct pci_dev *pdev, unsigned int reg, /* If the value written is the current one avoid printing a warning. */ if ( val != (uint32_t)(bar->addr >> (hi ? 32 : 0)) ) gprintk(XENLOG_WARNING, - "%04x:%02x:%02x.%u: ignored BAR %lu write with memory decoding enabled\n", - pdev->seg, pdev->bus, slot, func, - bar - pdev->vpci->header.bars + hi); + "%pp: ignored BAR %lu write with memory decoding enabled\n", + &pdev->sbdf, bar - pdev->vpci->header.bars + hi); return; } @@ -402,15 +400,14 @@ static void rom_write(const struct pci_dev *pdev, unsigned int reg, { struct vpci_header *header = &pdev->vpci->header; struct vpci_bar *rom = data; - uint8_t slot = PCI_SLOT(pdev->devfn), func = PCI_FUNC(pdev->devfn); uint16_t cmd = pci_conf_read16(pdev->sbdf, PCI_COMMAND); bool new_enabled = val & PCI_ROM_ADDRESS_ENABLE; if ( (cmd & PCI_COMMAND_MEMORY) && header->rom_enabled && new_enabled ) { gprintk(XENLOG_WARNING, - "%04x:%02x:%02x.%u: ignored ROM BAR write with memory decoding enabled\n", - pdev->seg, pdev->bus, slot, func); + "%pp: ignored ROM BAR write with memory decoding enabled\n", + &pdev->sbdf); return; } diff --git a/xen/drivers/vpci/msi.c b/xen/drivers/vpci/msi.c index 5b6602f3c2..40e4fca132 100644 --- a/xen/drivers/vpci/msi.c +++ b/xen/drivers/vpci/msi.c @@ -290,8 +290,7 @@ void vpci_dump_msi(void) msi = pdev->vpci->msi; if ( msi && msi->enabled ) { - printk("%04x:%02x:%02x.%u MSI\n", pdev->seg, pdev->bus, - PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn)); + printk("%pp MSI\n", &pdev->sbdf); printk(" enabled: %d 64-bit: %d", msi->enabled, msi->address64); @@ -308,8 +307,7 @@ void vpci_dump_msi(void) { int rc; - printk("%04x:%02x:%02x.%u MSI-X\n", pdev->seg, pdev->bus, - PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn)); + printk("%pp MSI-X\n", &pdev->sbdf); printk(" entries: %u maskall: %d enabled: %d\n", msix->max_entries, msix->masked, msix->enabled); diff --git a/xen/drivers/vpci/msix.c b/xen/drivers/vpci/msix.c index 38c1e7e5dd..64dd0a929c 100644 --- a/xen/drivers/vpci/msix.c +++ b/xen/drivers/vpci/msix.c @@ -42,15 +42,14 @@ static uint32_t control_read(const struct pci_dev *pdev, unsigned int reg, static int update_entry(struct vpci_msix_entry *entry, const struct pci_dev *pdev, unsigned int nr) { - uint8_t slot = PCI_SLOT(pdev->devfn), func = PCI_FUNC(pdev->devfn); int rc = vpci_msix_arch_disable_entry(entry, pdev); /* Ignore ENOENT, it means the entry wasn't setup. */ if ( rc && rc != -ENOENT ) { gprintk(XENLOG_WARNING, - "%04x:%02x:%02x.%u: unable to disable entry %u for update: %d\n", - pdev->seg, pdev->bus, slot, func, nr, rc); + "%pp: unable to disable entry %u for update: %d\n", + &pdev->sbdf, nr, rc); return rc; } @@ -59,9 +58,8 @@ static int update_entry(struct vpci_msix_entry *entry, VPCI_MSIX_TABLE)); if ( rc ) { - gprintk(XENLOG_WARNING, - "%04x:%02x:%02x.%u: unable to enable entry %u: %d\n", - pdev->seg, pdev->bus, slot, func, nr, rc); + gprintk(XENLOG_WARNING, "%pp: unable to enable entry %u: %d\n", + &pdev->sbdf, nr, rc); /* Entry is likely not properly configured. */ return rc; } @@ -72,7 +70,6 @@ static int update_entry(struct vpci_msix_entry *entry, static void control_write(const struct pci_dev *pdev, unsigned int reg, uint32_t val, void *data) { - uint8_t slot = PCI_SLOT(pdev->devfn), func = PCI_FUNC(pdev->devfn); struct vpci_msix *msix = data; bool new_masked = val & PCI_MSIX_FLAGS_MASKALL; bool new_enabled = val & PCI_MSIX_FLAGS_ENABLE; @@ -133,9 +130,8 @@ static void control_write(const struct pci_dev *pdev, unsigned int reg, /* Ignore non-present entry. */ break; default: - gprintk(XENLOG_WARNING, - "%04x:%02x:%02x.%u: unable to disable entry %u: %d\n", - pdev->seg, pdev->bus, slot, func, i, rc); + gprintk(XENLOG_WARNING, "%pp: unable to disable entry %u: %d\n", + &pdev->sbdf, i, rc); return; } } @@ -180,8 +176,7 @@ static bool access_allowed(const struct pci_dev *pdev, unsigned long addr, return true; gprintk(XENLOG_WARNING, - "%04x:%02x:%02x.%u: unaligned or invalid size MSI-X table access\n", - pdev->seg, pdev->bus, PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn)); + "%pp: unaligned or invalid size MSI-X table access\n", &pdev->sbdf); return false; } @@ -431,10 +426,9 @@ int vpci_make_msix_hole(const struct pci_dev *pdev) default: put_gfn(d, start); gprintk(XENLOG_WARNING, - "%04x:%02x:%02x.%u: existing mapping (mfn: %" PRI_mfn + "%pp: existing mapping (mfn: %" PRI_mfn "type: %d) at %#lx clobbers MSIX MMIO area\n", - pdev->seg, pdev->bus, PCI_SLOT(pdev->devfn), - PCI_FUNC(pdev->devfn), mfn_x(mfn), t, start); + &pdev->sbdf, mfn_x(mfn), t, start); return -EEXIST; } put_gfn(d, start);