From patchwork Thu Jun 13 21:25:30 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jeffrey Hugo X-Patchwork-Id: 10993637 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 8AEF5924 for ; Thu, 13 Jun 2019 21:25:40 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7A75D1FE8E for ; Thu, 13 Jun 2019 21:25:40 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 6B8582022C; Thu, 13 Jun 2019 21:25:40 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FROM,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 18FC01FE8E for ; Thu, 13 Jun 2019 21:25:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727064AbfFMVZg (ORCPT ); Thu, 13 Jun 2019 17:25:36 -0400 Received: from mail-pl1-f194.google.com ([209.85.214.194]:42021 "EHLO mail-pl1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725747AbfFMVZg (ORCPT ); Thu, 13 Jun 2019 17:25:36 -0400 Received: by mail-pl1-f194.google.com with SMTP id go2so61641plb.9; Thu, 13 Jun 2019 14:25:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=vQy1k6HKb0RegwKa8MFQ1WuwACmhveaQaWhX6DCfZS4=; b=AvqhtXtMmkvBNxAYtS1J9rNxc490NsNyZO0Dy82HNp44sE8TJVD4tWLPdCjf8nMMgj 9Cx6i6Ko1u2LZmrdgW2a/xxRP6JqZKbVT+sGkFhVQCU1K5/Kfc2MJ1dGoSEi2cmhHDmg ICaCb7K6MIW7H9ZM1XUMbjG+go5LW7IqQmhP6fR2gPq3SAgDoH6k+oLVlK9R5GXhtfqW 6bva1YkEz+4Jp/XpnL8mtBNDM17DN3BE6Jiy91Wat4ld8PqN3qkhkseQqBXD/oUCi0rq wTtSctDGWsyBh35TrMrrJzQ0+1EYgHO/JG85SPlxYtjG+BOE2QauSe2YYAc5zKf6KWQG 53YQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=vQy1k6HKb0RegwKa8MFQ1WuwACmhveaQaWhX6DCfZS4=; b=GyB37Px+UiAaOhh4TmvHK2liMAey6jDwHc4qqiUHvHdIFm6V/7E2HpyAH+wz4Ft3RV 3fSnNMzkai5nSzSf238d0ywbEe+JiFIlCsO04JtETlVX388YD0nH0aKoTdTzbUyXnPEP 7MRne3Wuiqnoi98+ubFd+/GKzNoSshZ2VBzjVIWeVEIuWbS3+H7b6jlxxG6uM551R1CF lO3hojddhsj9OgprUHqn9Od7RqrJT6RT3+ESJYDXOdC7UFexmCKPS621il9Oklxd1LOW YOTkzOCohLhhK8TU5AXBnoArasQf+sGL0/4F3V9dOu3ZY/yTtVPBzPWI9Oc5kJa4Om+r xWmA== X-Gm-Message-State: APjAAAVE96+XvEh0kUD12BtwNrV33fHggfqQAlXaO4iZaOjj0XXLC304 75fesj8DJwnEk9SmQTDeUjc5LVO9 X-Google-Smtp-Source: APXvYqxKm/ZkzPu+FJJw57ToQYD433M2RDVx7eWyafwjEeJQO382l7aKcMtV5hyD0mMbqNNlmos85Q== X-Received: by 2002:a17:902:7083:: with SMTP id z3mr25270687plk.205.1560461135930; Thu, 13 Jun 2019 14:25:35 -0700 (PDT) Received: from aw-bldr-10.qualcomm.com (i-global254.qualcomm.com. [199.106.103.254]) by smtp.gmail.com with ESMTPSA id j22sm618471pfh.71.2019.06.13.14.25.34 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 13 Jun 2019 14:25:35 -0700 (PDT) From: Jeffrey Hugo To: lgirdwood@gmail.com, broonie@kernel.org Cc: agross@kernel.org, bjorn.andersson@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Jorge Ramirez-Ortiz , Jeffrey Hugo Subject: [PATCH v4 1/7] regulator: qcom_spmi: enable linear range info Date: Thu, 13 Jun 2019 14:25:30 -0700 Message-Id: <20190613212531.10452-1-jeffrey.l.hugo@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190613212436.6940-1-jeffrey.l.hugo@gmail.com> References: <20190613212436.6940-1-jeffrey.l.hugo@gmail.com> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Jorge Ramirez-Ortiz Signed-off-by: Jorge Ramirez-Ortiz Signed-off-by: Jeffrey Hugo --- drivers/regulator/qcom_spmi-regulator.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/regulator/qcom_spmi-regulator.c b/drivers/regulator/qcom_spmi-regulator.c index 53a61fb65642..42c429d50743 100644 --- a/drivers/regulator/qcom_spmi-regulator.c +++ b/drivers/regulator/qcom_spmi-regulator.c @@ -1744,6 +1744,7 @@ MODULE_DEVICE_TABLE(of, qcom_spmi_regulator_match); static int qcom_spmi_regulator_probe(struct platform_device *pdev) { const struct spmi_regulator_data *reg; + const struct spmi_voltage_range *range; const struct of_device_id *match; struct regulator_config config = { }; struct regulator_dev *rdev; @@ -1833,6 +1834,12 @@ static int qcom_spmi_regulator_probe(struct platform_device *pdev) } } + if (vreg->set_points->count == 1) { + /* since there is only one range */ + range = vreg->set_points->range; + vreg->desc.uV_step = range->step_uV; + } + config.dev = dev; config.driver_data = vreg; config.regmap = regmap; From patchwork Thu Jun 13 21:25:31 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jeffrey Hugo X-Patchwork-Id: 10993639 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C3C4B14C0 for ; Thu, 13 Jun 2019 21:25:49 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B56621FE8E for ; Thu, 13 Jun 2019 21:25:49 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id A9EF12022C; Thu, 13 Jun 2019 21:25:49 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FROM,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 56D9A1FE8E for ; Thu, 13 Jun 2019 21:25:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728476AbfFMVZp (ORCPT ); Thu, 13 Jun 2019 17:25:45 -0400 Received: from mail-pf1-f195.google.com ([209.85.210.195]:35878 "EHLO mail-pf1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725747AbfFMVZo (ORCPT ); Thu, 13 Jun 2019 17:25:44 -0400 Received: by mail-pf1-f195.google.com with SMTP id r7so59435pfl.3; Thu, 13 Jun 2019 14:25:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=5+TFtA79aZ+IjNk4lXxAZtuIhR9lTbHQLneZLDhsOTI=; b=uMIEjubqF6WKPWVjK7XNOAySKJKkv5jSfxkvZ3/roI+8lQePsCvI2lCFstJqXAdZkN S+YIT+Fi6msM8J8ypbwHiyND64I2FVfr22MAlOuAA8i9ehTBNIVJM6DQXfdvvBL/qQKL 7QCGMCbmx+hvUmJxlV80JNaG3f2CmSbdwucYCy3cVvVLQwf7CAlcR0DS+vvVNJb8ami4 YKOeqVcKi0Ur0EQine6oclQTAKAv3GLamNd0eHZonC9SAVXP+r52aCRIW2pP4Rttahe5 xDFsDI1AbWqAuuGSBKSmblnGtn3xhEX0eOHE4AY76Ayhn66J3KFwBpFAf2KflTGGxqQS Fhfg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=5+TFtA79aZ+IjNk4lXxAZtuIhR9lTbHQLneZLDhsOTI=; b=XHsQySmwm8f0mgrokBaa1zPl8q1FauOhYCkboJG/yqtFBrgOEVFlZCGBylKqVj/8Dt CQ08em/8rd3kLSyeaLboooCrHvx5GPGVEk1UTPe+k3jLJeak7ZSYrVKpVOrFPN69e1ae Dpcdx94bWh9aOpi/UoTZIbxAbhMBi8guxxCndluH6d7yIF/dzFv0JnL4NF/jBl6nZJ0f jtjWVNy0U/HxL/CqsrrA/Gmb+5+gtSfMz0jkWFQgPdJpoB19cDdWAQEUohVoMH5oEVoG se8IomCwGL2/GgZ76L5pyuTgqC/Xlo1015qSK18Fwqx3yYCdIxT+4Xy0DTos6pj0ZOOK rESw== X-Gm-Message-State: APjAAAVM3M+SDHZ8EwvKh1mue1MEGfrEQF+MpKsK8hw7CeA/BSf9is0S JFMo4Ejczdf/Pvh4odylNrd7Eskg X-Google-Smtp-Source: APXvYqx4P864mcDeRF6fv3rUBPWE/oL8fjhGlONrou+Q8YvAkWV05CsoT6qKLKpu3CFvr5A/J7/AkQ== X-Received: by 2002:a65:624f:: with SMTP id q15mr32323372pgv.436.1560461143720; Thu, 13 Jun 2019 14:25:43 -0700 (PDT) Received: from aw-bldr-10.qualcomm.com (i-global254.qualcomm.com. [199.106.103.254]) by smtp.gmail.com with ESMTPSA id j22sm618471pfh.71.2019.06.13.14.25.42 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 13 Jun 2019 14:25:43 -0700 (PDT) From: Jeffrey Hugo To: lgirdwood@gmail.com, broonie@kernel.org Cc: agross@kernel.org, bjorn.andersson@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Jeffrey Hugo Subject: [PATCH v4 2/7] regulator: qcom_spmi: Refactor get_mode/set_mode Date: Thu, 13 Jun 2019 14:25:31 -0700 Message-Id: <20190613212531.10452-2-jeffrey.l.hugo@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190613212531.10452-1-jeffrey.l.hugo@gmail.com> References: <20190613212436.6940-1-jeffrey.l.hugo@gmail.com> <20190613212531.10452-1-jeffrey.l.hugo@gmail.com> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP spmi_regulator_common_get_mode and spmi_regulator_common_set_mode use multi-level ifs which mirror a switch statement. Refactor to use a switch statement to make the code flow more clear. Signed-off-by: Jeffrey Hugo Reviewed-by: Bjorn Andersson --- drivers/regulator/qcom_spmi-regulator.c | 26 +++++++++++++++++-------- 1 file changed, 18 insertions(+), 8 deletions(-) diff --git a/drivers/regulator/qcom_spmi-regulator.c b/drivers/regulator/qcom_spmi-regulator.c index 42c429d50743..1b3383a24c9d 100644 --- a/drivers/regulator/qcom_spmi-regulator.c +++ b/drivers/regulator/qcom_spmi-regulator.c @@ -911,13 +911,16 @@ static unsigned int spmi_regulator_common_get_mode(struct regulator_dev *rdev) spmi_vreg_read(vreg, SPMI_COMMON_REG_MODE, ®, 1); - if (reg & SPMI_COMMON_MODE_HPM_MASK) - return REGULATOR_MODE_NORMAL; + reg &= SPMI_COMMON_MODE_HPM_MASK | SPMI_COMMON_MODE_AUTO_MASK; - if (reg & SPMI_COMMON_MODE_AUTO_MASK) + switch (reg) { + case SPMI_COMMON_MODE_HPM_MASK: + return REGULATOR_MODE_NORMAL; + case SPMI_COMMON_MODE_AUTO_MASK: return REGULATOR_MODE_FAST; - - return REGULATOR_MODE_IDLE; + default: + return REGULATOR_MODE_IDLE; + } } static int @@ -925,12 +928,19 @@ spmi_regulator_common_set_mode(struct regulator_dev *rdev, unsigned int mode) { struct spmi_regulator *vreg = rdev_get_drvdata(rdev); u8 mask = SPMI_COMMON_MODE_HPM_MASK | SPMI_COMMON_MODE_AUTO_MASK; - u8 val = 0; + u8 val; - if (mode == REGULATOR_MODE_NORMAL) + switch (mode) { + case REGULATOR_MODE_NORMAL: val = SPMI_COMMON_MODE_HPM_MASK; - else if (mode == REGULATOR_MODE_FAST) + break; + case REGULATOR_MODE_FAST: val = SPMI_COMMON_MODE_AUTO_MASK; + break; + default: + val = 0; + break; + } return spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_MODE, val, mask); } From patchwork Thu Jun 13 21:25:52 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jeffrey Hugo X-Patchwork-Id: 10993641 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 79B71924 for ; Thu, 13 Jun 2019 21:25:59 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 68FF1212BE for ; Thu, 13 Jun 2019 21:25:59 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 58D8E22376; Thu, 13 Jun 2019 21:25:59 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FROM,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 05995212BE for ; Thu, 13 Jun 2019 21:25:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728830AbfFMVZ6 (ORCPT ); Thu, 13 Jun 2019 17:25:58 -0400 Received: from mail-pf1-f194.google.com ([209.85.210.194]:43252 "EHLO mail-pf1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725747AbfFMVZ6 (ORCPT ); Thu, 13 Jun 2019 17:25:58 -0400 Received: by mail-pf1-f194.google.com with SMTP id i189so42570pfg.10; Thu, 13 Jun 2019 14:25:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=pNCtTqN2On7Akbg5ZQ6dO9GyNd+lckTzvjUJWbNQ7ao=; b=ltqcn802Ex3XuXSSP4rMFFKbOgxOlyY3jVxZBqAhgKuqUR+9giZwJtOAI1swqfj+Dx DAdJKQcXqRXLTQg1URn8xrM5w+6jLhdNGiTctmz39W6pkuYBe4zo9A55yanxAZRXeBz9 Jqsg21f8tNfY2qkuAQTID8OHeNWuXWOug8DN6gZzMPpVir3sdnP57ppCbJeXw9fgxwHd +W1CRWRFH4mhdeU3JUpUvAc2KVM5IXOobPNeyFbQNeZJf+Y/ntwtZNETUjLJ/hoK7xZg VmTYx+9t0whSZOra8SbrKEe40o4khLTNvrKAvcBkNjMa1kcknVB61sX+cE5denVWAx/1 ukrQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=pNCtTqN2On7Akbg5ZQ6dO9GyNd+lckTzvjUJWbNQ7ao=; b=XL3zUpGHAdntgAPXyVW2vxOrKLEL4jI6QvCEcREix7D1x/0w0A+QsdgIPGS0Hd2cAB xxLG6W0/j3vTprVa5aFBaBPX/T0fyKUOtz9Eh3KzlBNQFzTpRCLXgtQACooWD+0gwKY4 wLYMmaMb9xlGA/Gq1y5FVRV4RMxjUhyOs0bi1oGbsyFnwpQ6z1cGbdfiPmFn6WIZZIcG VxJyae0++5vMHAzz5HcTQR61wlK1wNraadqTTe1bqq9AjtAxtBTiZ41fHExo4z/Tvo7O mNXTBoUbprL3JC53JqzBK3At8Aee2Aqmrjo/JhOPyQ2pTBiT1W5ihfZPK3gjLC1tg0k/ +2kA== X-Gm-Message-State: APjAAAUFibVUhjpcEzEMqJ1lQkNsXHzQ9J2KWjLeBjqfJPCl/LkZW+8u Jbz9tCy7+TyFyZ2M2YP8Q94= X-Google-Smtp-Source: APXvYqwt9twTC6m+Pxzy3gFe8ns8PAY0zdvYz5HRUgjqtlBos3q9G4UqDjZ5YNPZ1CMTFCoe0NgC7w== X-Received: by 2002:a63:2c02:: with SMTP id s2mr4088745pgs.173.1560461157673; Thu, 13 Jun 2019 14:25:57 -0700 (PDT) Received: from aw-bldr-10.qualcomm.com (i-global254.qualcomm.com. [199.106.103.254]) by smtp.gmail.com with ESMTPSA id o13sm667887pfh.23.2019.06.13.14.25.56 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 13 Jun 2019 14:25:57 -0700 (PDT) From: Jeffrey Hugo To: lgirdwood@gmail.com, broonie@kernel.org Cc: agross@kernel.org, bjorn.andersson@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Jeffrey Hugo Subject: [PATCH v4 3/7] dt-bindings: qcom_spmi: Document PM8005 regulators Date: Thu, 13 Jun 2019 14:25:52 -0700 Message-Id: <20190613212553.10541-1-jeffrey.l.hugo@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190613212436.6940-1-jeffrey.l.hugo@gmail.com> References: <20190613212436.6940-1-jeffrey.l.hugo@gmail.com> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Document the dt bindings for the PM8005 regulators which are usually used for VDD of standalone blocks on a SoC like the GPU. Signed-off-by: Jeffrey Hugo Reviewed-by: Bjorn Andersson --- .../devicetree/bindings/regulator/qcom,spmi-regulator.txt | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/regulator/qcom,spmi-regulator.txt b/Documentation/devicetree/bindings/regulator/qcom,spmi-regulator.txt index 406f2e570c50..ba94bc2d407a 100644 --- a/Documentation/devicetree/bindings/regulator/qcom,spmi-regulator.txt +++ b/Documentation/devicetree/bindings/regulator/qcom,spmi-regulator.txt @@ -4,6 +4,7 @@ Qualcomm SPMI Regulators Usage: required Value type: Definition: must be one of: + "qcom,pm8005-regulators" "qcom,pm8841-regulators" "qcom,pm8916-regulators" "qcom,pm8941-regulators" @@ -120,6 +121,9 @@ The regulator node houses sub-nodes for each regulator within the device. Each sub-node is identified using the node's name, with valid values listed for each of the PMICs below. +pm8005: + s1, s2, s3, s4 + pm8841: s1, s2, s3, s4, s5, s6, s7, s8 From patchwork Thu Jun 13 21:25:53 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jeffrey Hugo X-Patchwork-Id: 10993643 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 5ED71924 for ; Thu, 13 Jun 2019 21:26:15 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 4FDD6212BE for ; Thu, 13 Jun 2019 21:26:15 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 4187122376; Thu, 13 Jun 2019 21:26:15 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FROM,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 70217212BE for ; Thu, 13 Jun 2019 21:26:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727217AbfFMV0N (ORCPT ); Thu, 13 Jun 2019 17:26:13 -0400 Received: from mail-pf1-f194.google.com ([209.85.210.194]:35787 "EHLO mail-pf1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725747AbfFMV0N (ORCPT ); Thu, 13 Jun 2019 17:26:13 -0400 Received: by mail-pf1-f194.google.com with SMTP id d126so61967pfd.2; Thu, 13 Jun 2019 14:26:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=88LSrjVrsnGJeSc2/3YQmEX89qjxtK6/yMoXwAVDKN8=; b=jsgpwJll+VjJifQ4sFN3OHJi79XwmKv8PGc1xoyFzdqr7rw9VSV4KtjA0ulB9PXZhZ NZelufLSOan5w0CBNUkNcYLWzuEOjsRftOnpfpzN/UKT/QLmVD2UmMX3BRW9gxilFFMF I3rUQiERNHY/XI2+dz08ruKrOs80F7fJAoxxExh8hqDsZo3OMcsSV0MyWAJ5s7cJuCgy RyjsqiR/GYq1GSQxV7bSuadTCk/P66KXH0cikv3xWMt5rUShLFTczp6VLmR+OnvEKcso HtWS/UINNIwUCwdPusjqzhGAhjcncENdTgStuXq2CQEqrDkZKSeexnMFtn7QEMKTBnHN 5jXA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=88LSrjVrsnGJeSc2/3YQmEX89qjxtK6/yMoXwAVDKN8=; b=e3iQukmug4xzQLj6czKuqzyVBjGFmQUBOtD1xTXDMLlU109xoMNLIDYjFvrctGA/wQ O3FLGCANVeuWGMIjyfLYfqT+Nk4dXy10MlTFQsB8x/UEmN+Xi4VBmLuNwGGQn3qBAy9Z 7q9ruyx4zFQEBT2Z1TDJWqNtw2VAjVQBA71t4CG9Q3+NA+cSfyujHVK56Ys8jIbAKgqN cn6E1NrapeAE9uTWUDVNSPGi4XbecUCyPwsDnZGvABskzdAWyrTjEZ92rNpdnKf6SLzB 6dbA/WT6dbTr+XhhzcKlTCrFH2gIoJe7mtjQ4S6Cl+lxQPS6aE3yVm5bwCnQps3PM2nn 2C2A== X-Gm-Message-State: APjAAAVN45z89xHaSHUKfeq2weBpKxWxhU4tMZ93nq9mwstKeU6ahZtQ x1QF0AF/pwVPElwPr4FNtgI= X-Google-Smtp-Source: APXvYqwZioVedwToea24vw+uRmRGNGsfarSuPZ7u+fJxsAUCVo/0/uXQva1hcFeDUQ/nZYX+L+C8FA== X-Received: by 2002:a65:62c4:: with SMTP id m4mr33512987pgv.308.1560461172479; Thu, 13 Jun 2019 14:26:12 -0700 (PDT) Received: from aw-bldr-10.qualcomm.com (i-global254.qualcomm.com. [199.106.103.254]) by smtp.gmail.com with ESMTPSA id o13sm667887pfh.23.2019.06.13.14.26.11 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 13 Jun 2019 14:26:12 -0700 (PDT) From: Jeffrey Hugo To: lgirdwood@gmail.com, broonie@kernel.org Cc: agross@kernel.org, bjorn.andersson@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Jeffrey Hugo Subject: [PATCH v4 4/7] regulator: qcom_spmi: Add support for PM8005 Date: Thu, 13 Jun 2019 14:25:53 -0700 Message-Id: <20190613212553.10541-2-jeffrey.l.hugo@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190613212553.10541-1-jeffrey.l.hugo@gmail.com> References: <20190613212436.6940-1-jeffrey.l.hugo@gmail.com> <20190613212553.10541-1-jeffrey.l.hugo@gmail.com> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The PM8005 is used on the msm8998 MTP. The S1 regulator is VDD_GFX, ie it needs to be on and controlled inorder to use the GPU. Add support to drive the PM8005 regulators so that we can bring up the GPU on msm8998. Signed-off-by: Jeffrey Hugo Reviewed-by: Bjorn Andersson --- drivers/regulator/qcom_spmi-regulator.c | 169 ++++++++++++++++++++++++ 1 file changed, 169 insertions(+) diff --git a/drivers/regulator/qcom_spmi-regulator.c b/drivers/regulator/qcom_spmi-regulator.c index 1b3383a24c9d..c8791b036c53 100644 --- a/drivers/regulator/qcom_spmi-regulator.c +++ b/drivers/regulator/qcom_spmi-regulator.c @@ -104,6 +104,7 @@ enum spmi_regulator_logical_type { SPMI_REGULATOR_LOGICAL_TYPE_ULT_LO_SMPS, SPMI_REGULATOR_LOGICAL_TYPE_ULT_HO_SMPS, SPMI_REGULATOR_LOGICAL_TYPE_ULT_LDO, + SPMI_REGULATOR_LOGICAL_TYPE_FTSMPS426, }; enum spmi_regulator_type { @@ -150,6 +151,7 @@ enum spmi_regulator_subtype { SPMI_REGULATOR_SUBTYPE_5V_BOOST = 0x01, SPMI_REGULATOR_SUBTYPE_FTS_CTL = 0x08, SPMI_REGULATOR_SUBTYPE_FTS2p5_CTL = 0x09, + SPMI_REGULATOR_SUBTYPE_FTS426_CTL = 0x0a, SPMI_REGULATOR_SUBTYPE_BB_2A = 0x01, SPMI_REGULATOR_SUBTYPE_ULT_HF_CTL1 = 0x0d, SPMI_REGULATOR_SUBTYPE_ULT_HF_CTL2 = 0x0e, @@ -170,6 +172,18 @@ enum spmi_common_regulator_registers { SPMI_COMMON_REG_STEP_CTRL = 0x61, }; +/* + * Second common register layout used by newer devices starting with ftsmps426 + * Note that some of the registers from the first common layout remain + * unchanged and their definition is not duplicated. + */ +enum spmi_ftsmps426_regulator_registers { + SPMI_FTSMPS426_REG_VOLTAGE_LSB = 0x40, + SPMI_FTSMPS426_REG_VOLTAGE_MSB = 0x41, + SPMI_FTSMPS426_REG_VOLTAGE_ULS_LSB = 0x68, + SPMI_FTSMPS426_REG_VOLTAGE_ULS_MSB = 0x69, +}; + enum spmi_vs_registers { SPMI_VS_REG_OCP = 0x4a, SPMI_VS_REG_SOFT_START = 0x4c, @@ -229,6 +243,14 @@ enum spmi_common_control_register_index { #define SPMI_COMMON_MODE_FOLLOW_HW_EN0_MASK 0x01 #define SPMI_COMMON_MODE_FOLLOW_ALL_MASK 0x1f +#define SPMI_FTSMPS426_MODE_BYPASS_MASK 3 +#define SPMI_FTSMPS426_MODE_RETENTION_MASK 4 +#define SPMI_FTSMPS426_MODE_LPM_MASK 5 +#define SPMI_FTSMPS426_MODE_AUTO_MASK 6 +#define SPMI_FTSMPS426_MODE_HPM_MASK 7 + +#define SPMI_FTSMPS426_MODE_MASK 0x07 + /* Common regulator pull down control register layout */ #define SPMI_COMMON_PULL_DOWN_ENABLE_MASK 0x80 @@ -274,6 +296,23 @@ enum spmi_common_control_register_index { #define SPMI_FTSMPS_STEP_MARGIN_NUM 4 #define SPMI_FTSMPS_STEP_MARGIN_DEN 5 +#define SPMI_FTSMPS426_STEP_CTRL_DELAY_MASK 0x03 +#define SPMI_FTSMPS426_STEP_CTRL_DELAY_SHIFT 0 + +/* Clock rate in kHz of the FTSMPS426 regulator reference clock. */ +#define SPMI_FTSMPS426_CLOCK_RATE 4800 + +/* Minimum voltage stepper delay for each step. */ +#define SPMI_FTSMPS426_STEP_DELAY 2 + +/* + * The ratio SPMI_FTSMPS426_STEP_MARGIN_NUM/SPMI_FTSMPS426_STEP_MARGIN_DEN is + * used to adjust the step rate in order to account for oscillator variance. + */ +#define SPMI_FTSMPS426_STEP_MARGIN_NUM 10 +#define SPMI_FTSMPS426_STEP_MARGIN_DEN 11 + + /* VSET value to decide the range of ULT SMPS */ #define ULT_SMPS_RANGE_SPLIT 0x60 @@ -447,6 +486,10 @@ static struct spmi_voltage_range ftsmps2p5_ranges[] = { SPMI_VOLTAGE_RANGE(1, 160000, 1360000, 2200000, 2200000, 10000), }; +static struct spmi_voltage_range ftsmps426_ranges[] = { + SPMI_VOLTAGE_RANGE(0, 0, 320000, 1352000, 1352000, 4000), +}; + static struct spmi_voltage_range boost_ranges[] = { SPMI_VOLTAGE_RANGE(0, 4000000, 4000000, 5550000, 5550000, 50000), }; @@ -480,6 +523,7 @@ static DEFINE_SPMI_SET_POINTS(ln_ldo); static DEFINE_SPMI_SET_POINTS(smps); static DEFINE_SPMI_SET_POINTS(ftsmps); static DEFINE_SPMI_SET_POINTS(ftsmps2p5); +static DEFINE_SPMI_SET_POINTS(ftsmps426); static DEFINE_SPMI_SET_POINTS(boost); static DEFINE_SPMI_SET_POINTS(boost_byp); static DEFINE_SPMI_SET_POINTS(ult_lo_smps); @@ -747,6 +791,23 @@ spmi_regulator_common_set_voltage(struct regulator_dev *rdev, unsigned selector) return spmi_vreg_write(vreg, SPMI_COMMON_REG_VOLTAGE_RANGE, buf, 2); } +static int spmi_regulator_common_list_voltage(struct regulator_dev *rdev, + unsigned selector); + +static int spmi_regulator_ftsmps426_set_voltage(struct regulator_dev *rdev, + unsigned selector) +{ + struct spmi_regulator *vreg = rdev_get_drvdata(rdev); + u8 buf[2]; + int mV; + + mV = spmi_regulator_common_list_voltage(rdev, selector) / 1000; + + buf[0] = mV & 0xff; + buf[1] = mV >> 8; + return spmi_vreg_write(vreg, SPMI_FTSMPS426_REG_VOLTAGE_LSB, buf, 2); +} + static int spmi_regulator_set_voltage_time_sel(struct regulator_dev *rdev, unsigned int old_selector, unsigned int new_selector) { @@ -778,6 +839,16 @@ static int spmi_regulator_common_get_voltage(struct regulator_dev *rdev) return spmi_hw_selector_to_sw(vreg, voltage_sel, range); } +static int spmi_regulator_ftsmps426_get_voltage(struct regulator_dev *rdev) +{ + struct spmi_regulator *vreg = rdev_get_drvdata(rdev); + u8 buf[2]; + + spmi_vreg_read(vreg, SPMI_FTSMPS426_REG_VOLTAGE_LSB, buf, 2); + + return (((unsigned int)buf[1] << 8) | (unsigned int)buf[0]) * 1000; +} + static int spmi_regulator_single_map_voltage(struct regulator_dev *rdev, int min_uV, int max_uV) { @@ -923,6 +994,23 @@ static unsigned int spmi_regulator_common_get_mode(struct regulator_dev *rdev) } } +static unsigned int spmi_regulator_ftsmps426_get_mode(struct regulator_dev *rdev) +{ + struct spmi_regulator *vreg = rdev_get_drvdata(rdev); + u8 reg; + + spmi_vreg_read(vreg, SPMI_COMMON_REG_MODE, ®, 1); + + switch (reg) { + case SPMI_FTSMPS426_MODE_HPM_MASK: + return REGULATOR_MODE_NORMAL; + case SPMI_FTSMPS426_MODE_AUTO_MASK: + return REGULATOR_MODE_FAST; + default: + return REGULATOR_MODE_IDLE; + } +} + static int spmi_regulator_common_set_mode(struct regulator_dev *rdev, unsigned int mode) { @@ -945,6 +1033,28 @@ spmi_regulator_common_set_mode(struct regulator_dev *rdev, unsigned int mode) return spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_MODE, val, mask); } +static int +spmi_regulator_ftsmps426_set_mode(struct regulator_dev *rdev, unsigned int mode) +{ + struct spmi_regulator *vreg = rdev_get_drvdata(rdev); + u8 mask = SPMI_FTSMPS426_MODE_MASK; + u8 val; + + switch (mode) { + case REGULATOR_MODE_NORMAL: + val = SPMI_FTSMPS426_MODE_HPM_MASK; + break; + case REGULATOR_MODE_FAST: + val = SPMI_FTSMPS426_MODE_AUTO_MASK; + break; + default: + val = SPMI_FTSMPS426_MODE_LPM_MASK; + break; + } + + return spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_MODE, val, mask); +} + static int spmi_regulator_common_set_load(struct regulator_dev *rdev, int load_uA) { @@ -1274,6 +1384,21 @@ static struct regulator_ops spmi_ult_ldo_ops = { .set_soft_start = spmi_regulator_common_set_soft_start, }; +static struct regulator_ops spmi_ftsmps426_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .set_voltage_sel = spmi_regulator_ftsmps426_set_voltage, + .set_voltage_time_sel = spmi_regulator_set_voltage_time_sel, + .get_voltage = spmi_regulator_ftsmps426_get_voltage, + .map_voltage = spmi_regulator_single_map_voltage, + .list_voltage = spmi_regulator_common_list_voltage, + .set_mode = spmi_regulator_ftsmps426_set_mode, + .get_mode = spmi_regulator_ftsmps426_get_mode, + .set_load = spmi_regulator_common_set_load, + .set_pull_down = spmi_regulator_common_set_pull_down, +}; + /* Maximum possible digital major revision value */ #define INF 0xFF @@ -1309,6 +1434,7 @@ static const struct spmi_regulator_mapping supported_regulators[] = { SPMI_VREG(BOOST, 5V_BOOST, 0, INF, BOOST, boost, boost, 0), SPMI_VREG(FTS, FTS_CTL, 0, INF, FTSMPS, ftsmps, ftsmps, 100000), SPMI_VREG(FTS, FTS2p5_CTL, 0, INF, FTSMPS, ftsmps, ftsmps2p5, 100000), + SPMI_VREG(FTS, FTS426_CTL, 0, INF, FTSMPS426, ftsmps426, ftsmps426, 100000), SPMI_VREG(BOOST_BYP, BB_2A, 0, INF, BOOST_BYP, boost, boost_byp, 0), SPMI_VREG(ULT_BUCK, ULT_HF_CTL1, 0, INF, ULT_LO_SMPS, ult_lo_smps, ult_lo_smps, 100000), @@ -1446,6 +1572,34 @@ static int spmi_regulator_init_slew_rate(struct spmi_regulator *vreg) return ret; } +static int spmi_regulator_init_slew_rate_ftsmps426(struct spmi_regulator *vreg) +{ + int ret; + u8 reg = 0; + int delay, slew_rate; + const struct spmi_voltage_range *range = &vreg->set_points->range[0]; + + ret = spmi_vreg_read(vreg, SPMI_COMMON_REG_STEP_CTRL, ®, 1); + if (ret) { + dev_err(vreg->dev, "spmi read failed, ret=%d\n", ret); + return ret; + } + + delay = reg & SPMI_FTSMPS426_STEP_CTRL_DELAY_MASK; + delay >>= SPMI_FTSMPS426_STEP_CTRL_DELAY_SHIFT; + + /* slew_rate has units of uV/us */ + slew_rate = SPMI_FTSMPS426_CLOCK_RATE * range->step_uV; + slew_rate /= 1000 * (SPMI_FTSMPS426_STEP_DELAY << delay); + slew_rate *= SPMI_FTSMPS426_STEP_MARGIN_NUM; + slew_rate /= SPMI_FTSMPS426_STEP_MARGIN_DEN; + + /* Ensure that the slew rate is greater than 0 */ + vreg->slew_rate = max(slew_rate, 1); + + return ret; +} + static int spmi_regulator_init_registers(struct spmi_regulator *vreg, const struct spmi_regulator_init_data *data) { @@ -1585,6 +1739,12 @@ static int spmi_regulator_of_parse(struct device_node *node, ret = spmi_regulator_init_slew_rate(vreg); if (ret) return ret; + break; + case SPMI_REGULATOR_LOGICAL_TYPE_FTSMPS426: + ret = spmi_regulator_init_slew_rate_ftsmps426(vreg); + if (ret) + return ret; + break; default: break; } @@ -1741,7 +1901,16 @@ static const struct spmi_regulator_data pmi8994_regulators[] = { { } }; +static const struct spmi_regulator_data pm8005_regulators[] = { + { "s1", 0x1400, "vdd_s1", }, + { "s2", 0x1700, "vdd_s2", }, + { "s3", 0x1a00, "vdd_s3", }, + { "s4", 0x1d00, "vdd_s4", }, + { } +}; + static const struct of_device_id qcom_spmi_regulator_match[] = { + { .compatible = "qcom,pm8005-regulators", .data = &pm8005_regulators }, { .compatible = "qcom,pm8841-regulators", .data = &pm8841_regulators }, { .compatible = "qcom,pm8916-regulators", .data = &pm8916_regulators }, { .compatible = "qcom,pm8941-regulators", .data = &pm8941_regulators }, From patchwork Thu Jun 13 21:26:23 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jeffrey Hugo X-Patchwork-Id: 10993645 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 0E0D514C0 for ; Thu, 13 Jun 2019 21:26:29 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id F17BC212BE for ; Thu, 13 Jun 2019 21:26:28 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id E2E8822376; Thu, 13 Jun 2019 21:26:28 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FROM,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8E5D7212BE for ; Thu, 13 Jun 2019 21:26:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727142AbfFMV02 (ORCPT ); Thu, 13 Jun 2019 17:26:28 -0400 Received: from mail-pg1-f196.google.com ([209.85.215.196]:33314 "EHLO mail-pg1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725747AbfFMV01 (ORCPT ); Thu, 13 Jun 2019 17:26:27 -0400 Received: by mail-pg1-f196.google.com with SMTP id k187so245711pga.0; Thu, 13 Jun 2019 14:26:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=ShYV+EbWvX524xQNClO0SMbhJ4ngTe/5gGFiTlAJkmg=; b=Vvgq/Mm+V/fancK7+K7UPkFQ3psdXXhwC5JkAxICspMq7kY2gLgSdrsO+vCHAfVEbZ LapcMhukDXIRIy+jcLWIiHTGLXLaI8sIPFwoR+J9TEDF2mdylpWC9VHBXQMH1j0rL9C9 JoA8REmTZ3rYc+pHIMkuZekMdCFIvJdMKN0ZMgI+eaxamgczlKLSb9RgkDlxGKhVW4pN 72nfkRV6Y4Y1yuSLgaHcbGSLyZNByvEEPbC0LmpLUpu/t6ctjVnBATChoZXzrYuZDEyJ 2lUZc0FLlW9PoyS6MlVZzmvIFgp+o6seHv7B3FNewu+GSndpT3LLXuY1QTVqkXYDTSqT g5wA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=ShYV+EbWvX524xQNClO0SMbhJ4ngTe/5gGFiTlAJkmg=; b=djGnhoOo+KSsueA486n5bDSpPAmTjkYWLA03wF6dTCEPEVhCSf1TZqXwsf5pqZAsCG YyLazTh85eaJYoSlm4BegTQe/09ypG/EN9CITXssRo+4r3q5Dw5A7ymjby6ysQjKXqnZ R06iG40n7XDNnUMGNps5qMv98SP9AHASXJF9RZY9oO4GaXQKX1ANknYy39uNhmJCiClR HZXxbZ0zM2VcpbIx/DpHyCjzOm2aXise3XZQRSWGrdcveSjniQpPihXA8zJR0gg2LrYY dRBlwCo68rYQKxiU4eokjKXe97eaV2iYENwGfdMDegw2VQBMR8oYZ5p5CUQYDso2di10 bWpA== X-Gm-Message-State: APjAAAUH2d3SN1yxzXkAOzIRGKZEeBVIUHPtcUtPTuDi6HwrV5FpegWr 7D1MTKi2kkO8S3J2q/aJPUc= X-Google-Smtp-Source: APXvYqwju4nXonXbIFupVAkLecu7qM7X3yyfH3DuXuITvGeEeI6MG10718xej5U/1+y/ezG72SeSjQ== X-Received: by 2002:a17:90a:ca11:: with SMTP id x17mr7624247pjt.107.1560461187181; Thu, 13 Jun 2019 14:26:27 -0700 (PDT) Received: from aw-bldr-10.qualcomm.com (i-global254.qualcomm.com. [199.106.103.254]) by smtp.gmail.com with ESMTPSA id t18sm758888pgm.69.2019.06.13.14.26.25 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 13 Jun 2019 14:26:26 -0700 (PDT) From: Jeffrey Hugo To: agross@kernel.org, bjorn.andersson@linaro.org Cc: lgirdwood@gmail.com, broonie@kernel.org, robh+dt@kernel.org, mark.rutland@arm.com, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Jeffrey Hugo Subject: [PATCH v4 5/7] arm64: dts: msm8998-mtp: Add pm8005_s1 regulator Date: Thu, 13 Jun 2019 14:26:23 -0700 Message-Id: <20190613212623.31434-1-jeffrey.l.hugo@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190613212436.6940-1-jeffrey.l.hugo@gmail.com> References: <20190613212436.6940-1-jeffrey.l.hugo@gmail.com> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The pm8005_s1 is VDD_GFX, and needs to be on to enable the GPU. This should be hooked up to the GPU CPR, but we don't have support for that yet, so until then, just turn on the regulator and keep it on so that we can focus on basic GPU bringup. Signed-off-by: Jeffrey Hugo Reviewed-by: Bjorn Andersson --- arch/arm64/boot/dts/qcom/msm8998-mtp.dtsi | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8998-mtp.dtsi b/arch/arm64/boot/dts/qcom/msm8998-mtp.dtsi index f09f3e03f708..108667ce4f31 100644 --- a/arch/arm64/boot/dts/qcom/msm8998-mtp.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8998-mtp.dtsi @@ -27,6 +27,23 @@ status = "okay"; }; +&pm8005_lsid1 { + pm8005-regulators { + compatible = "qcom,pm8005-regulators"; + + vdd_s1-supply = <&vph_pwr>; + + pm8005_s1: s1 { /* VDD_GFX supply */ + regulator-min-microvolt = <524000>; + regulator-max-microvolt = <1100000>; + regulator-enable-ramp-delay = <500>; + + /* hack until we rig up the gpu consumer */ + regulator-always-on; + }; + }; +}; + &qusb2phy { status = "okay"; From patchwork Thu Jun 13 21:27:06 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jeffrey Hugo X-Patchwork-Id: 10993647 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A884F924 for ; Thu, 13 Jun 2019 21:27:12 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 99147212BE for ; Thu, 13 Jun 2019 21:27:12 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 8BC1322376; Thu, 13 Jun 2019 21:27:12 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FROM,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2DA8B212BE for ; Thu, 13 Jun 2019 21:27:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727060AbfFMV1L (ORCPT ); Thu, 13 Jun 2019 17:27:11 -0400 Received: from mail-pg1-f194.google.com ([209.85.215.194]:34122 "EHLO mail-pg1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726924AbfFMV1L (ORCPT ); Thu, 13 Jun 2019 17:27:11 -0400 Received: by mail-pg1-f194.google.com with SMTP id p10so243607pgn.1; Thu, 13 Jun 2019 14:27:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=Ypy1jYMMxHq//sxPDAaM1q7oa3FUUDRh/MaSzsTk114=; b=mcGAjIHlFdfW2yt/v/AAZic/R1bDW1ylfzZagyCUMP2aLSbjhKSodk2AqosF92dqd9 rw5kNjh2LeDCizTPQh59zR6qdiyKB4s7UIKWZAlB92unImgZDiUAb35OTQBj5DHgVhZO 9BkHqtDI03bcRTq7yum19tIwFqwx5Z+LTYK1bTaboox1YiuxUtdl6tUrEhZQ5OfrCegA iUkWTAnDI8dkCNYZcmf3iYd9ZIl0IOf/7dx5FykqAUAgJOlNg3OoX3gS8LlSrb+CbIud fQrzDhFMaKKwmFSfz5Fp9iaf9UGzW0bjWuHhCw+23WX83dWke0+pQhTCQ0N/eVyHH9TS nA0A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Ypy1jYMMxHq//sxPDAaM1q7oa3FUUDRh/MaSzsTk114=; b=iiZhQpfmrwv3sO0kHgmGz+rlaR/9MjT8lEfbuwQeZLwEAGsdYyhZe4T3iWz8Cc/zod tmQlivRqW3WyD7R9vPVFbR7E5j65IytTb0MsQWyCB+2EXxZHFcDSUd5xoAQURop8gOO2 ETF8CoyVpASpsGMClWRSVnK4n1bFgkPHbkhJ9waTvMMTi2OlcPJLByUVkF8TAwxQozpN /X+fVumfCCJkO77ADR0dcYN0RWsC0RQjvWGnM6HOG/748EQEWsWJMyMzEljNaKT8n+v8 Yo8n4n92bV0B3aZ6Z6LtumpknI1Aa/1NCSLQKf4ZQ/Sctf1+PUrJMD1+swUz5etn5XSU k04A== X-Gm-Message-State: APjAAAWcVspFQNpfTmaeWV3KQpRyRbqZgbJ1hlLw81vex6b7um2db5tn 6YT5meo18Cal3gXyRVAHTu8y6a0b X-Google-Smtp-Source: APXvYqwRrULH5BSR/2MxnRkCAyubQviRNjg5taME3JeNKlzUWulDoxuzDKRtyCuTv9FSzUXmVXCHzg== X-Received: by 2002:a62:2cc2:: with SMTP id s185mr93611432pfs.106.1560461230821; Thu, 13 Jun 2019 14:27:10 -0700 (PDT) Received: from aw-bldr-10.qualcomm.com (i-global254.qualcomm.com. [199.106.103.254]) by smtp.gmail.com with ESMTPSA id j14sm613798pfn.120.2019.06.13.14.27.09 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 13 Jun 2019 14:27:10 -0700 (PDT) From: Jeffrey Hugo To: lgirdwood@gmail.com, broonie@kernel.org Cc: agross@kernel.org, bjorn.andersson@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Jorge Ramirez , Jeffrey Hugo Subject: [PATCH v4 6/7] dt-bindings: qcom_spmi: Document pms405 support Date: Thu, 13 Jun 2019 14:27:06 -0700 Message-Id: <20190613212707.5966-1-jeffrey.l.hugo@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190613212436.6940-1-jeffrey.l.hugo@gmail.com> References: <20190613212436.6940-1-jeffrey.l.hugo@gmail.com> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Jorge Ramirez The PMS405 supports 5 SMPS and 13 LDO regulators. Signed-off-by: Jorge Ramirez-Ortiz Reviewed-by: Rob Herring Signed-off-by: Jeffrey Hugo Reviewed-by: Bjorn Andersson --- .../bindings/regulator/qcom,spmi-regulator.txt | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/Documentation/devicetree/bindings/regulator/qcom,spmi-regulator.txt b/Documentation/devicetree/bindings/regulator/qcom,spmi-regulator.txt index ba94bc2d407a..430b8622bda1 100644 --- a/Documentation/devicetree/bindings/regulator/qcom,spmi-regulator.txt +++ b/Documentation/devicetree/bindings/regulator/qcom,spmi-regulator.txt @@ -10,6 +10,7 @@ Qualcomm SPMI Regulators "qcom,pm8941-regulators" "qcom,pm8994-regulators" "qcom,pmi8994-regulators" + "qcom,pms405-regulators" - interrupts: Usage: optional @@ -111,6 +112,23 @@ Qualcomm SPMI Regulators Definition: Reference to regulator supplying the input pin, as described in the data sheet. +- vdd_l1_l2-supply: +- vdd_l3_l8-supply: +- vdd_l4-supply: +- vdd_l5_l6-supply: +- vdd_l10_l11_l12_l13-supply: +- vdd_l7-supply: +- vdd_l9-supply: +- vdd_s1-supply: +- vdd_s2-supply: +- vdd_s3-supply: +- vdd_s4-supply: +- vdd_s5-supply + Usage: optional (pms405 only) + Value type: + Definition: Reference to regulator supplying the input pin, as + described in the data sheet. + - qcom,saw-reg: Usage: optional Value type: From patchwork Thu Jun 13 21:27:07 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jeffrey Hugo X-Patchwork-Id: 10993649 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 06AA8924 for ; Thu, 13 Jun 2019 21:27:35 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E96ED212BE for ; Thu, 13 Jun 2019 21:27:34 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id DDBED22376; Thu, 13 Jun 2019 21:27:34 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FROM,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id C23AE2267B for ; Thu, 13 Jun 2019 21:27:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726785AbfFMV1P (ORCPT ); Thu, 13 Jun 2019 17:27:15 -0400 Received: from mail-pl1-f196.google.com ([209.85.214.196]:44982 "EHLO mail-pl1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725747AbfFMV1P (ORCPT ); Thu, 13 Jun 2019 17:27:15 -0400 Received: by mail-pl1-f196.google.com with SMTP id t7so58575plr.11; Thu, 13 Jun 2019 14:27:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=IUjO1pR1uIH5yko1XbRBF4PHb6nz15fqs0FzmtDMeKI=; b=Lb2BMnHzhaYzABgkPrHMnYgpaFUJiBR0PnwOVdlHX4WA85/W84SdMLuzwls/tSU2Zf GH7c2szW4Tv3RmMagAb1KMYRBUNRvmKhj7vegFpMhavrnrdywi132QQrTs0gDKGB8C5j 7ey0AyrrpqYCY9rVkUUZ90JAP4x3y2Ya2QlX1Knb6vXdgXfu4aP1vtQ8BsyxnFd+MQ3s 3EgwoAEt4+HFYuOorjEIAp2X84r553TBeAqVHHqRM9NlZ1e0UMIMSNy4chijAG5G5bv4 I3TcT8st7MTKWSe1wCLQHB9aYjpqy7UhqE5qTcCtRv7IbsjCJMmvRbnFmXN2Fl4itHl2 LsyA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=IUjO1pR1uIH5yko1XbRBF4PHb6nz15fqs0FzmtDMeKI=; b=H98pnWJpyqyK0vJsUv7KVqebtB+qpfc5lZdNAOhO7ZhKg4+aD0XMr1CQrqsPmY+NK+ qfIN8i1RV0GRO7Tt6Okk+ehenN/Chko2YIyMxIPWN5sz+R/JyVTe5ZOCPlLSW1xzzk/U NpbGl/Tb0ripvbnXiku3BGtj/GlzkXXqyjyHEpAGy2vtumyYFVJkQt3NLH71KQFgQ8NY M64OoRs0FaNdfrjBlHNVhC9g++k60frhZAU//fIsfaMJij+Isq3ETMX5uh9ajT27tUag JVzfSvIpFXs3PJXlp67eZ1a41++RUTUmrmrUWCo1oJkaTEYX1xHNyQxPHNJArduoHMte dXOA== X-Gm-Message-State: APjAAAUHdQ0wqJdykd4li0kn7JopH7g7IlwXVbFOpJJfZIbPIqIkOCTI ip88ItCgiBAf2yZ6FHby7LY= X-Google-Smtp-Source: APXvYqyotze5mV/JUNyv6s4N2pL/WdH6ewvdLcZdLkgyZg1qNUkWRrI5BWMJbnObH8L+gfk1/GtWeA== X-Received: by 2002:a17:902:1e6:: with SMTP id b93mr46330936plb.295.1560461234380; Thu, 13 Jun 2019 14:27:14 -0700 (PDT) Received: from aw-bldr-10.qualcomm.com (i-global254.qualcomm.com. [199.106.103.254]) by smtp.gmail.com with ESMTPSA id j14sm613798pfn.120.2019.06.13.14.27.12 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 13 Jun 2019 14:27:13 -0700 (PDT) From: Jeffrey Hugo To: lgirdwood@gmail.com, broonie@kernel.org Cc: agross@kernel.org, bjorn.andersson@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Jorge Ramirez , Jeffrey Hugo Subject: [PATCH v4 7/7] regulator: qcom_spmi: add PMS405 SPMI regulator Date: Thu, 13 Jun 2019 14:27:07 -0700 Message-Id: <20190613212707.5966-2-jeffrey.l.hugo@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190613212707.5966-1-jeffrey.l.hugo@gmail.com> References: <20190613212436.6940-1-jeffrey.l.hugo@gmail.com> <20190613212707.5966-1-jeffrey.l.hugo@gmail.com> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Jorge Ramirez The PMS405 has 5 HFSMPS and 13 LDO regulators, This commit adds support for one of the 5 HFSMPS regulators (s3) to the spmi regulator driver. The PMIC HFSMPS 430 regulators have 8 mV step size and a voltage control scheme consisting of two 8-bit registers defining a 16-bit voltage set point in units of millivolts S3 controls the cpu voltages (s3 is a buck regulator of type HFS430); it is therefore required so we can enable voltage scaling for safely running cpufreq. Signed-off-by: Jorge Ramirez-Ortiz Signed-off-by: Jeffrey Hugo Reviewed-by: Bjorn Andersson --- drivers/regulator/qcom_spmi-regulator.c | 43 +++++++++++++++++++++++-- 1 file changed, 40 insertions(+), 3 deletions(-) diff --git a/drivers/regulator/qcom_spmi-regulator.c b/drivers/regulator/qcom_spmi-regulator.c index c8791b036c53..debe4dc74d27 100644 --- a/drivers/regulator/qcom_spmi-regulator.c +++ b/drivers/regulator/qcom_spmi-regulator.c @@ -105,6 +105,7 @@ enum spmi_regulator_logical_type { SPMI_REGULATOR_LOGICAL_TYPE_ULT_HO_SMPS, SPMI_REGULATOR_LOGICAL_TYPE_ULT_LDO, SPMI_REGULATOR_LOGICAL_TYPE_FTSMPS426, + SPMI_REGULATOR_LOGICAL_TYPE_HFS430, }; enum spmi_regulator_type { @@ -157,6 +158,7 @@ enum spmi_regulator_subtype { SPMI_REGULATOR_SUBTYPE_ULT_HF_CTL2 = 0x0e, SPMI_REGULATOR_SUBTYPE_ULT_HF_CTL3 = 0x0f, SPMI_REGULATOR_SUBTYPE_ULT_HF_CTL4 = 0x10, + SPMI_REGULATOR_SUBTYPE_HFS430 = 0x0a, }; enum spmi_common_regulator_registers { @@ -302,6 +304,8 @@ enum spmi_common_control_register_index { /* Clock rate in kHz of the FTSMPS426 regulator reference clock. */ #define SPMI_FTSMPS426_CLOCK_RATE 4800 +#define SPMI_HFS430_CLOCK_RATE 1600 + /* Minimum voltage stepper delay for each step. */ #define SPMI_FTSMPS426_STEP_DELAY 2 @@ -515,6 +519,10 @@ static struct spmi_voltage_range ult_pldo_ranges[] = { SPMI_VOLTAGE_RANGE(0, 1750000, 1750000, 3337500, 3337500, 12500), }; +static struct spmi_voltage_range hfs430_ranges[] = { + SPMI_VOLTAGE_RANGE(0, 320000, 320000, 2040000, 2040000, 8000), +}; + static DEFINE_SPMI_SET_POINTS(pldo); static DEFINE_SPMI_SET_POINTS(nldo1); static DEFINE_SPMI_SET_POINTS(nldo2); @@ -530,6 +538,7 @@ static DEFINE_SPMI_SET_POINTS(ult_lo_smps); static DEFINE_SPMI_SET_POINTS(ult_ho_smps); static DEFINE_SPMI_SET_POINTS(ult_nldo); static DEFINE_SPMI_SET_POINTS(ult_pldo); +static DEFINE_SPMI_SET_POINTS(hfs430); static inline int spmi_vreg_read(struct spmi_regulator *vreg, u16 addr, u8 *buf, int len) @@ -1399,12 +1408,26 @@ static struct regulator_ops spmi_ftsmps426_ops = { .set_pull_down = spmi_regulator_common_set_pull_down, }; +static struct regulator_ops spmi_hfs430_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .set_voltage_sel = spmi_regulator_ftsmps426_set_voltage, + .set_voltage_time_sel = spmi_regulator_set_voltage_time_sel, + .get_voltage = spmi_regulator_ftsmps426_get_voltage, + .map_voltage = spmi_regulator_single_map_voltage, + .list_voltage = spmi_regulator_common_list_voltage, + .set_mode = spmi_regulator_ftsmps426_set_mode, + .get_mode = spmi_regulator_ftsmps426_get_mode, +}; + /* Maximum possible digital major revision value */ #define INF 0xFF static const struct spmi_regulator_mapping supported_regulators[] = { /* type subtype dig_min dig_max ltype ops setpoints hpm_min */ SPMI_VREG(BUCK, GP_CTL, 0, INF, SMPS, smps, smps, 100000), + SPMI_VREG(BUCK, HFS430, 0, INF, HFS430, hfs430, hfs430, 10000), SPMI_VREG(LDO, N300, 0, INF, LDO, ldo, nldo1, 10000), SPMI_VREG(LDO, N600, 0, 0, LDO, ldo, nldo2, 10000), SPMI_VREG(LDO, N1200, 0, 0, LDO, ldo, nldo2, 10000), @@ -1572,7 +1595,8 @@ static int spmi_regulator_init_slew_rate(struct spmi_regulator *vreg) return ret; } -static int spmi_regulator_init_slew_rate_ftsmps426(struct spmi_regulator *vreg) +static int spmi_regulator_init_slew_rate_ftsmps426(struct spmi_regulator *vreg, + int clock_rate) { int ret; u8 reg = 0; @@ -1589,7 +1613,7 @@ static int spmi_regulator_init_slew_rate_ftsmps426(struct spmi_regulator *vreg) delay >>= SPMI_FTSMPS426_STEP_CTRL_DELAY_SHIFT; /* slew_rate has units of uV/us */ - slew_rate = SPMI_FTSMPS426_CLOCK_RATE * range->step_uV; + slew_rate = clock_rate * range->step_uV; slew_rate /= 1000 * (SPMI_FTSMPS426_STEP_DELAY << delay); slew_rate *= SPMI_FTSMPS426_STEP_MARGIN_NUM; slew_rate /= SPMI_FTSMPS426_STEP_MARGIN_DEN; @@ -1741,7 +1765,14 @@ static int spmi_regulator_of_parse(struct device_node *node, return ret; break; case SPMI_REGULATOR_LOGICAL_TYPE_FTSMPS426: - ret = spmi_regulator_init_slew_rate_ftsmps426(vreg); + ret = spmi_regulator_init_slew_rate_ftsmps426(vreg, + SPMI_FTSMPS426_CLOCK_RATE); + if (ret) + return ret; + break; + case SPMI_REGULATOR_LOGICAL_TYPE_HFS430: + ret = spmi_regulator_init_slew_rate_ftsmps426(vreg, + SPMI_HFS430_CLOCK_RATE); if (ret) return ret; break; @@ -1909,6 +1940,11 @@ static const struct spmi_regulator_data pm8005_regulators[] = { { } }; +static const struct spmi_regulator_data pms405_regulators[] = { + { "s3", 0x1a00, "vdd_s3"}, + { } +}; + static const struct of_device_id qcom_spmi_regulator_match[] = { { .compatible = "qcom,pm8005-regulators", .data = &pm8005_regulators }, { .compatible = "qcom,pm8841-regulators", .data = &pm8841_regulators }, @@ -1916,6 +1952,7 @@ static const struct of_device_id qcom_spmi_regulator_match[] = { { .compatible = "qcom,pm8941-regulators", .data = &pm8941_regulators }, { .compatible = "qcom,pm8994-regulators", .data = &pm8994_regulators }, { .compatible = "qcom,pmi8994-regulators", .data = &pmi8994_regulators }, + { .compatible = "qcom,pms405-regulators", .data = &pms405_regulators }, { } }; MODULE_DEVICE_TABLE(of, qcom_spmi_regulator_match);