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[98.233.237.228]) by smtp.gmail.com with ESMTPSA id k58sm10368382qtc.38.2019.06.26.06.05.00 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Wed, 26 Jun 2019 06:05:00 -0700 (PDT) From: Peter Geis To: "Leonidas P . Papadakos" , Rob Herring , Heiko Stuebner , Jose Abreu , Robin Murphy Subject: [PATCH] arm64: dts: rockchip: improve rk3328-roc-cc rgmii performance. Date: Wed, 26 Jun 2019 13:04:43 +0000 Message-Id: <20190626130443.22025-1-pgwipeout@gmail.com> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190626_060502_965546_23865EC5 X-CRM114-Status: GOOD ( 11.35 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Currently the rk3328-roc-cc ethernet is enabled using "snps,force_thresh_dma_mode". While this works, the performance leaves a lot to be desired. A previous attempt to improve performance used "snps,txpbl = <0x4>". This also allowed networking to function, but performance varied between boards. This patch takes that one step further. Set txpbl and rxpbl to 0x4. This can also be accomplished with "snps,pbl =<0x4>" which affects both. Also set "snps,aal" which forces address aligned DMA mode. Fixes: 4bc4d6013b7f (arm64: dts: rockchip: fix rk3328-roc-cc gmac2io stability issues) Signed-off-by: Peter Geis Tested-by: Leonidas P. Papadakos --- arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts b/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts index 5d499c9086fb..8bcc08de82fb 100644 --- a/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts +++ b/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts @@ -141,10 +141,12 @@ phy-mode = "rgmii"; pinctrl-names = "default"; pinctrl-0 = <&rgmiim1_pins>; - snps,force_thresh_dma_mode; snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; snps,reset-active-low; snps,reset-delays-us = <0 10000 50000>; + snps,txpbl = <0x4>; + snps,rxpbl = <0x4>; + snps,aal; tx_delay = <0x24>; rx_delay = <0x18>; status = "okay";