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Thu, 27 Jun 2019 09:44:09 +0200 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 7D2B83F; Thu, 27 Jun 2019 07:44:07 +0000 (GMT) Received: from Webmail-eu.st.com (Safex1hubcas23.st.com [10.75.90.46]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 47D1D157C; Thu, 27 Jun 2019 07:44:07 +0000 (GMT) Received: from SAFEX1HUBCAS22.st.com (10.75.90.93) by SAFEX1HUBCAS23.st.com (10.75.90.46) with Microsoft SMTP Server (TLS) id 14.3.439.0; Thu, 27 Jun 2019 09:44:07 +0200 Received: from lmecxl0923.lme.st.com (10.48.0.237) by Webmail-ga.st.com (10.75.90.48) with Microsoft SMTP Server (TLS) id 14.3.439.0; Thu, 27 Jun 2019 09:44:06 +0200 From: Ludovic Barre To: Mark Brown , Marek Vasut , Boris Brezillon , Rob Herring Subject: [PATCH] spi: stm32-qspi: remove signal sensitive on completion Date: Thu, 27 Jun 2019 09:43:59 +0200 Message-ID: <1561621439-7305-2-git-send-email-ludovic.Barre@st.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1561621439-7305-1-git-send-email-ludovic.Barre@st.com> References: <1561621439-7305-1-git-send-email-ludovic.Barre@st.com> MIME-Version: 1.0 X-Originating-IP: [10.48.0.237] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-06-27_03:, , signatures=0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190627_004416_130983_99776247 X-CRM114-Status: GOOD ( 13.61 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Alexandre Torgue , linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org, linux-mtd@lists.infradead.org, Ludovic Barre , Maxime Coquelin , linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Ludovic Barre On umount step a sigkill signal is set (without user specific action), due to sigkill signal the completion will be interrupted and the data transfer can't be finished if a sync is needed. Signed-off-by: Ludovic Barre --- drivers/spi/spi-stm32-qspi.c | 10 +++------- 1 file changed, 3 insertions(+), 7 deletions(-) diff --git a/drivers/spi/spi-stm32-qspi.c b/drivers/spi/spi-stm32-qspi.c index 5dbb6a8..655e4af 100644 --- a/drivers/spi/spi-stm32-qspi.c +++ b/drivers/spi/spi-stm32-qspi.c @@ -245,12 +245,8 @@ static int stm32_qspi_tx_dma(struct stm32_qspi *qspi, writel_relaxed(cr | CR_DMAEN, qspi->io_base + QSPI_CR); t_out = sgt.nents * STM32_COMP_TIMEOUT_MS; - if (!wait_for_completion_interruptible_timeout(&qspi->dma_completion, - msecs_to_jiffies(t_out))) - err = -ETIMEDOUT; - - if (dma_async_is_tx_complete(dma_ch, cookie, - NULL, NULL) != DMA_COMPLETE) + if (!wait_for_completion_timeout(&qspi->dma_completion, + msecs_to_jiffies(t_out))) err = -ETIMEDOUT; if (err) @@ -304,7 +300,7 @@ static int stm32_qspi_wait_cmd(struct stm32_qspi *qspi, cr = readl_relaxed(qspi->io_base + QSPI_CR); writel_relaxed(cr | CR_TCIE | CR_TEIE, qspi->io_base + QSPI_CR); - if (!wait_for_completion_interruptible_timeout(&qspi->data_completion, + if (!wait_for_completion_timeout(&qspi->data_completion, msecs_to_jiffies(STM32_COMP_TIMEOUT_MS))) { err = -ETIMEDOUT; } else {