From patchwork Mon Jul 1 06:26:18 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Manna, Animesh" X-Patchwork-Id: 11025095 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 5B086746 for ; Mon, 1 Jul 2019 06:38:40 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 4EE1C284B3 for ; Mon, 1 Jul 2019 06:38:40 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 3F29227FA9; Mon, 1 Jul 2019 06:38:40 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id F1F0D27FA9 for ; Mon, 1 Jul 2019 06:38:39 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id AA8068961E; Mon, 1 Jul 2019 06:38:38 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by gabe.freedesktop.org (Postfix) with ESMTPS id 11E5C8961E for ; Mon, 1 Jul 2019 06:38:38 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga105.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 30 Jun 2019 23:33:53 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.63,437,1557212400"; d="scan'208,223";a="153988561" Received: from amanna.iind.intel.com ([10.223.74.216]) by orsmga007.jf.intel.com with ESMTP; 30 Jun 2019 23:33:51 -0700 From: Animesh Manna To: intel-gfx@lists.freedesktop.org Date: Mon, 1 Jul 2019 11:56:18 +0530 Message-Id: <20190701062632.456-2-animesh.manna@intel.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190701062632.456-1-animesh.manna@intel.com> References: <20190701062632.456-1-animesh.manna@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 01/15] drm/i915/dsb: feature flag added for display state buffer. X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jani Nikula Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP From gen12 onwards Display State Buffer(DSB) is hardware capability added which allows driver to batch submit display HW programming. Feature flag has_dsb added to identify the driver/platform support at runtime. Cc: Jani Nikula Cc: Rodrigo Vivi Signed-off-by: Animesh Manna --- drivers/gpu/drm/i915/i915_drv.h | 2 ++ drivers/gpu/drm/i915/intel_device_info.h | 1 + 2 files changed, 3 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 7e981b03face..ca6d3e2fe7a6 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -2287,6 +2287,8 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915, #define HAS_IPC(dev_priv) (INTEL_INFO(dev_priv)->display.has_ipc) +#define HAS_DSB(dev_priv) (INTEL_INFO(dev_priv)->display.has_dsb) + /* * For now, anything with a GuC requires uCode loading, and then supports * command submission once loaded. But these are logically independent diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h index ddafc819bf30..7afe537f9335 100644 --- a/drivers/gpu/drm/i915/intel_device_info.h +++ b/drivers/gpu/drm/i915/intel_device_info.h @@ -132,6 +132,7 @@ enum intel_ppgtt_type { func(has_csr); \ func(has_ddi); \ func(has_dp_mst); \ + func(has_dsb); \ func(has_fbc); \ func(has_gmch); \ func(has_hotplug); \ From patchwork Mon Jul 1 06:26:19 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Manna, Animesh" X-Patchwork-Id: 11025093 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 1BC78746 for ; Mon, 1 Jul 2019 06:35:50 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 157F620453 for ; Mon, 1 Jul 2019 06:35:50 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 0A190205A8; Mon, 1 Jul 2019 06:35:50 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 99F9C20453 for ; Mon, 1 Jul 2019 06:35:49 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 0F55C89F53; Mon, 1 Jul 2019 06:35:49 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id 225C589F53 for ; Mon, 1 Jul 2019 06:35:45 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 30 Jun 2019 23:34:00 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.63,437,1557212400"; d="scan'208";a="153988590" Received: from amanna.iind.intel.com ([10.223.74.216]) by orsmga007.jf.intel.com with ESMTP; 30 Jun 2019 23:33:57 -0700 From: Animesh Manna To: intel-gfx@lists.freedesktop.org Date: Mon, 1 Jul 2019 11:56:19 +0530 Message-Id: <20190701062632.456-3-animesh.manna@intel.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190701062632.456-1-animesh.manna@intel.com> References: <20190701062632.456-1-animesh.manna@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 02/15] drm/i915/dsb: DSB context creation. X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Michel Thierry , Jani Nikula Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP The function will internally get the gem buffer from global GTT which is mapped in cpu domain to feed the data + opcode for DSB engine. Cc: Imre Deak Cc: Michel Thierry Cc: Jani Nikula Cc: Rodrigo Vivi Signed-off-by: Animesh Manna --- drivers/gpu/drm/i915/Makefile | 1 + drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/intel_drv.h | 4 ++ drivers/gpu/drm/i915/intel_dsb.c | 65 ++++++++++++++++++++++++++++++++ drivers/gpu/drm/i915/intel_dsb.h | 31 +++++++++++++++ 5 files changed, 102 insertions(+) create mode 100644 drivers/gpu/drm/i915/intel_dsb.c create mode 100644 drivers/gpu/drm/i915/intel_dsb.h diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile index 3bd8f0349a8a..3416ba15b949 100644 --- a/drivers/gpu/drm/i915/Makefile +++ b/drivers/gpu/drm/i915/Makefile @@ -49,6 +49,7 @@ i915-y += i915_drv.o \ i915_sysfs.o \ intel_csr.o \ intel_device_info.o \ + intel_dsb.o \ intel_pm.o \ intel_runtime_pm.o \ intel_sideband.o \ diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index ca6d3e2fe7a6..237c17427780 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -76,6 +76,7 @@ #include "gt/intel_workarounds.h" #include "intel_device_info.h" +#include "intel_dsb.h" #include "intel_runtime_pm.h" #include "intel_uc.h" #include "intel_uncore.h" diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 1d58f7ec5d84..a05a047d78af 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -988,6 +988,10 @@ struct intel_crtc { /* scalers available on this crtc */ int num_scalers; + + /* per pipe DSB related info */ + struct intel_dsb dsb[MAX_DSB_PER_PIPE]; + int dsb_in_use; }; struct intel_plane { diff --git a/drivers/gpu/drm/i915/intel_dsb.c b/drivers/gpu/drm/i915/intel_dsb.c new file mode 100644 index 000000000000..de6a8a901d88 --- /dev/null +++ b/drivers/gpu/drm/i915/intel_dsb.c @@ -0,0 +1,65 @@ +// SPDX-License-Identifier: MIT +/* + * Copyright © 2019 Intel Corporation + * + */ + +#include "i915_drv.h" + +#define DSB_BUF_SIZE (2 * PAGE_SIZE) + +struct intel_dsb * +intel_dsb_get(struct intel_crtc *crtc) +{ + struct drm_device *dev = crtc->base.dev; + struct drm_i915_private *i915 = to_i915(dev); + struct drm_i915_gem_object *obj; + struct i915_vma *vma; + struct intel_dsb *dsb; + intel_wakeref_t wakeref; + int i; + + WARN_ON(crtc->dsb_in_use >= MAX_DSB_PER_PIPE); + + for (i = 0; i < MAX_DSB_PER_PIPE; i++) { + if (!crtc->dsb[i].cmd_buf) { + dsb = &crtc->dsb[i]; + dsb->id = i; + } + } + + dsb = &crtc->dsb[crtc->dsb_in_use]; + dsb->crtc = crtc; + if (!HAS_DSB(i915)) + return dsb; + + wakeref = intel_runtime_pm_get(&i915->runtime_pm); + mutex_lock(&i915->drm.struct_mutex); + + obj = i915_gem_object_create_shmem(i915, DSB_BUF_SIZE); + if (IS_ERR(obj)) + goto err; + + vma = i915_gem_object_ggtt_pin(obj, NULL, 0, 0, PIN_MAPPABLE); + if (IS_ERR(vma)) { + DRM_DEBUG_KMS("Vma creation failed.\n"); + i915_gem_object_put(obj); + goto err; + } + + dsb->cmd_buf = i915_gem_object_pin_map(vma->obj, I915_MAP_WC); + if (IS_ERR(dsb->cmd_buf)) { + DRM_DEBUG_KMS("Command buffer creation failed.\n"); + dsb->cmd_buf = NULL; + goto err; + } + crtc->dsb_in_use++; + dsb->cmd_buf_head = (uintptr_t)i915_ggtt_offset(vma); + dsb->vma = vma; + + memset(dsb->cmd_buf, 0, DSB_BUF_SIZE); +err: + mutex_unlock(&i915->drm.struct_mutex); + intel_runtime_pm_put(&i915->runtime_pm, wakeref); + return dsb; +} diff --git a/drivers/gpu/drm/i915/intel_dsb.h b/drivers/gpu/drm/i915/intel_dsb.h new file mode 100644 index 000000000000..50a2a6590a71 --- /dev/null +++ b/drivers/gpu/drm/i915/intel_dsb.h @@ -0,0 +1,31 @@ +/* SPDX-License-Identifier: MIT + * + * Copyright © 2019 Intel Corporation + */ + +#ifndef _INTEL_DSB_H +#define _INTEL_DSB_H + +struct intel_crtc; +struct i915_vma; + +enum dsb_id { + INVALID_DSB = -1, + DSB1, + DSB2, + DSB3, + MAX_DSB_PER_PIPE +}; + +struct intel_dsb { + struct intel_crtc *crtc; + enum dsb_id id; + u32 *cmd_buf; + u32 cmd_buf_head; + struct i915_vma *vma; +}; + +struct intel_dsb * +intel_dsb_get(struct intel_crtc *crtc); + +#endif From patchwork Mon Jul 1 06:26:20 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Manna, Animesh" X-Patchwork-Id: 11025089 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7FB9F138B for ; Mon, 1 Jul 2019 06:35:47 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8192E1FFE6 for ; Mon, 1 Jul 2019 06:35:47 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 7297B20502; Mon, 1 Jul 2019 06:35:47 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 256941FFE6 for ; Mon, 1 Jul 2019 06:35:47 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 9A0A189E23; Mon, 1 Jul 2019 06:35:46 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id 4657389F5B for ; Mon, 1 Jul 2019 06:35:45 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 30 Jun 2019 23:34:03 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.63,437,1557212400"; d="scan'208";a="153988617" Received: from amanna.iind.intel.com ([10.223.74.216]) by orsmga007.jf.intel.com with ESMTP; 30 Jun 2019 23:34:01 -0700 From: Animesh Manna To: intel-gfx@lists.freedesktop.org Date: Mon, 1 Jul 2019 11:56:20 +0530 Message-Id: <20190701062632.456-4-animesh.manna@intel.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190701062632.456-1-animesh.manna@intel.com> References: <20190701062632.456-1-animesh.manna@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 03/15] drm/i915/dsb: single register write function for DSB. X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jani Nikula Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP DSB support single register write through opcode 0x1. Generic api created which accumulate all single register write in a batch buffer and once DSB is triggered, it will program all the registers at the same time. Cc: Jani Nikula Cc: Rodrigo Vivi Signed-off-by: Animesh Manna --- drivers/gpu/drm/i915/intel_dsb.c | 36 ++++++++++++++++++++++++++++++++ drivers/gpu/drm/i915/intel_dsb.h | 9 ++++++++ 2 files changed, 45 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_dsb.c b/drivers/gpu/drm/i915/intel_dsb.c index de6a8a901d88..d9f51a28f8c4 100644 --- a/drivers/gpu/drm/i915/intel_dsb.c +++ b/drivers/gpu/drm/i915/intel_dsb.c @@ -8,6 +8,20 @@ #define DSB_BUF_SIZE (2 * PAGE_SIZE) +/* DSB opcodes. */ +#define DSB_OPCODE_SHIFT 24 +#define DSB_OPCODE_NOOP 0x0 +#define DSB_OPCODE_MMIO_WRITE 0x1 +#define DSB_OPCODE_WAIT_FOR_US 0x2 +#define DSB_OPCODE_WAIT_FOR_LINES 0x3 +#define DSB_OPCODE_WAIT_FOR_VBLANK 0x4 +#define DSB_OPCODE_WAIT_FOR_SL_IN 0x5 +#define DSB_OPCODE_WAIT_FOR_SL_OUT 0x6 +#define DSB_OPCODE_GENERATE_INT 0x7 +#define DSB_OPCODE_INDEXED_WRITE 0x9 +#define DSB_OPCODE_POLL 0xA +#define DSB_BYTE_EN (0xf << 20) + struct intel_dsb * intel_dsb_get(struct intel_crtc *crtc) { @@ -63,3 +77,25 @@ intel_dsb_get(struct intel_crtc *crtc) intel_runtime_pm_put(&i915->runtime_pm, wakeref); return dsb; } + +void intel_dsb_reg_write(struct intel_dsb *dsb, i915_reg_t reg, u32 val) +{ + struct intel_crtc *crtc = dsb->crtc; + struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); + u32 *buf = dsb->cmd_buf; + + if (!buf) { + I915_WRITE(reg, val); + return; + } + + if (WARN_ON(dsb->free_pos >= DSB_BUF_SIZE)) { + DRM_DEBUG_KMS("DSB buffer overflow.\n"); + return; + } + + buf[dsb->free_pos++] = val; + buf[dsb->free_pos++] = (DSB_OPCODE_MMIO_WRITE << + DSB_OPCODE_SHIFT) | DSB_BYTE_EN | + i915_mmio_reg_offset(reg); +} diff --git a/drivers/gpu/drm/i915/intel_dsb.h b/drivers/gpu/drm/i915/intel_dsb.h index 50a2a6590a71..2015c372b0d5 100644 --- a/drivers/gpu/drm/i915/intel_dsb.h +++ b/drivers/gpu/drm/i915/intel_dsb.h @@ -6,6 +6,8 @@ #ifndef _INTEL_DSB_H #define _INTEL_DSB_H +#include "i915_reg.h" + struct intel_crtc; struct i915_vma; @@ -23,9 +25,16 @@ struct intel_dsb { u32 *cmd_buf; u32 cmd_buf_head; struct i915_vma *vma; + + /* + * free_pos will point the first free entry position + * and help in calculating cmd_buf_tail. + */ + int free_pos; }; struct intel_dsb * intel_dsb_get(struct intel_crtc *crtc); +void intel_dsb_reg_write(struct intel_dsb *dsb, i915_reg_t reg, u32 val); #endif From patchwork Mon Jul 1 06:26:21 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Manna, Animesh" X-Patchwork-Id: 11025091 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 0EA1C1580 for ; Mon, 1 Jul 2019 06:35:48 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 111781FFE6 for ; Mon, 1 Jul 2019 06:35:48 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 057CB20502; Mon, 1 Jul 2019 06:35:48 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id BF6AB1FFE6 for ; Mon, 1 Jul 2019 06:35:47 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 1C83989F5B; Mon, 1 Jul 2019 06:35:47 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id 7582589F53 for ; Mon, 1 Jul 2019 06:35:45 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 30 Jun 2019 23:34:06 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.63,437,1557212400"; d="scan'208";a="153988626" Received: from amanna.iind.intel.com ([10.223.74.216]) by orsmga007.jf.intel.com with ESMTP; 30 Jun 2019 23:34:04 -0700 From: Animesh Manna To: intel-gfx@lists.freedesktop.org Date: Mon, 1 Jul 2019 11:56:21 +0530 Message-Id: <20190701062632.456-5-animesh.manna@intel.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190701062632.456-1-animesh.manna@intel.com> References: <20190701062632.456-1-animesh.manna@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 04/15] drm/i915/dsb: Added enum for reg write capability. X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jani Nikula Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP DSB can access specific register, To identify those register which can be written through DSB, enum reg_write_cap is added to hold the capability. Cc: Jani Nikula Cc: Rodrigo Vivi Signed-off-by: Animesh Manna --- drivers/gpu/drm/i915/i915_reg.h | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 7e6009cefb18..b2e8349f3295 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -178,11 +178,22 @@ */ #define REG_FIELD_GET(__mask, __val) ((u32)FIELD_GET(__mask, __val)) +/* + * Added enum to hold the capability for those registers which can be written + * through DSB. + */ +enum reg_write_cap { + MMIO_WRITE, + DSB_WRITE, + DSB_INDEX_WRITE +}; + typedef struct { u32 reg; + enum reg_write_cap cap; } i915_reg_t; -#define _MMIO(r) ((const i915_reg_t){ .reg = (r) }) +#define _MMIO(r, ...) ((const i915_reg_t){ .reg = (r), ##__VA_ARGS__}) #define INVALID_MMIO_REG _MMIO(0) From patchwork Mon Jul 1 06:26:22 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Manna, Animesh" X-Patchwork-Id: 11025065 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 5B667138B for ; Mon, 1 Jul 2019 06:34:14 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 597FE28329 for ; Mon, 1 Jul 2019 06:34:14 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 48AF5284DA; Mon, 1 Jul 2019 06:34:14 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id D889828329 for ; Mon, 1 Jul 2019 06:34:13 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 55C5A89F5B; Mon, 1 Jul 2019 06:34:13 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by gabe.freedesktop.org (Postfix) with ESMTPS id B2EC289F5B for ; Mon, 1 Jul 2019 06:34:12 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga103.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 30 Jun 2019 23:34:12 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.63,437,1557212400"; d="scan'208";a="153988648" Received: from amanna.iind.intel.com ([10.223.74.216]) by orsmga007.jf.intel.com with ESMTP; 30 Jun 2019 23:34:07 -0700 From: Animesh Manna To: intel-gfx@lists.freedesktop.org Date: Mon, 1 Jul 2019 11:56:22 +0530 Message-Id: <20190701062632.456-6-animesh.manna@intel.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190701062632.456-1-animesh.manna@intel.com> References: <20190701062632.456-1-animesh.manna@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 05/15] drm/i915/dsb: Indexed register write function for DSB. X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jani Nikula Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP DSB can program large set of data through indexed register write (opcode 0x9) in one shot. Will be using for bulk register programming e.g. gamma lut programming, HDR meta data programming. Cc: Shashank Sharma Cc: Imre Deak Cc: Jani Nikula Cc: Rodrigo Vivi Signed-off-by: Animesh Manna --- drivers/gpu/drm/i915/intel_dsb.c | 42 ++++++++++++++++++++++++++++++++ drivers/gpu/drm/i915/intel_dsb.h | 6 +++++ 2 files changed, 48 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_dsb.c b/drivers/gpu/drm/i915/intel_dsb.c index d9f51a28f8c4..31e1093977b6 100644 --- a/drivers/gpu/drm/i915/intel_dsb.c +++ b/drivers/gpu/drm/i915/intel_dsb.c @@ -21,6 +21,7 @@ #define DSB_OPCODE_INDEXED_WRITE 0x9 #define DSB_OPCODE_POLL 0xA #define DSB_BYTE_EN (0xf << 20) +#define DSB_REG_VALUE_MASK 0xfffff struct intel_dsb * intel_dsb_get(struct intel_crtc *crtc) @@ -78,6 +79,42 @@ intel_dsb_get(struct intel_crtc *crtc) return dsb; } +static void intel_dsb_indexed_reg_write(struct intel_dsb *dsb, i915_reg_t reg, + u32 val) +{ + u32 *buf = dsb->cmd_buf; + u32 reg_val; + + reg_val = buf[dsb->ins_start_offset + 1] & DSB_REG_VALUE_MASK; + if (reg_val != i915_mmio_reg_offset(reg)) { + /* Every instruction should be 8 byte aligned. */ + if (dsb->free_pos & 0x1) + dsb->free_pos++; + + /* Update the size. */ + dsb->ins_start_offset = dsb->free_pos; + buf[dsb->free_pos++] = 1; + + /* Update the opcode and reg. */ + buf[dsb->free_pos++] = (DSB_OPCODE_INDEXED_WRITE << + DSB_OPCODE_SHIFT) | + i915_mmio_reg_offset(reg); + + /* Update the value. */ + buf[dsb->free_pos++] = val; + } else { + /* Update the new value. */ + buf[dsb->free_pos++] = val; + + /* Update the size. */ + buf[dsb->ins_start_offset]++; + } + + /* if number of data words is odd, then the last dword should be 0.*/ + if (dsb->free_pos & 0x1) + buf[dsb->free_pos] = 0; +} + void intel_dsb_reg_write(struct intel_dsb *dsb, i915_reg_t reg, u32 val) { struct intel_crtc *crtc = dsb->crtc; @@ -94,6 +131,11 @@ void intel_dsb_reg_write(struct intel_dsb *dsb, i915_reg_t reg, u32 val) return; } + if (reg.cap == DSB_INDEX_WRITE) { + intel_dsb_indexed_reg_write(dsb, reg, val); + return; + } + buf[dsb->free_pos++] = val; buf[dsb->free_pos++] = (DSB_OPCODE_MMIO_WRITE << DSB_OPCODE_SHIFT) | DSB_BYTE_EN | diff --git a/drivers/gpu/drm/i915/intel_dsb.h b/drivers/gpu/drm/i915/intel_dsb.h index 2015c372b0d5..1fa893cc8c2e 100644 --- a/drivers/gpu/drm/i915/intel_dsb.h +++ b/drivers/gpu/drm/i915/intel_dsb.h @@ -31,6 +31,12 @@ struct intel_dsb { * and help in calculating cmd_buf_tail. */ int free_pos; + + /* + * ins_start_offset will help to store start address + * of the dsb instuction of auto-increment register. + */ + u32 ins_start_offset; }; struct intel_dsb * From patchwork Mon Jul 1 06:26:23 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Manna, Animesh" X-Patchwork-Id: 11025067 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E3120746 for ; Mon, 1 Jul 2019 06:34:16 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E7C3628329 for ; Mon, 1 Jul 2019 06:34:16 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id DBC10284DA; Mon, 1 Jul 2019 06:34:16 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 916E428329 for ; Mon, 1 Jul 2019 06:34:16 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id E864589F61; Mon, 1 Jul 2019 06:34:15 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by gabe.freedesktop.org (Postfix) with ESMTPS id A8AEF89F61 for ; Mon, 1 Jul 2019 06:34:14 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga103.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 30 Jun 2019 23:34:14 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.63,437,1557212400"; d="scan'208";a="153988655" Received: from amanna.iind.intel.com ([10.223.74.216]) by orsmga007.jf.intel.com with ESMTP; 30 Jun 2019 23:34:12 -0700 From: Animesh Manna To: intel-gfx@lists.freedesktop.org Date: Mon, 1 Jul 2019 11:56:23 +0530 Message-Id: <20190701062632.456-7-animesh.manna@intel.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190701062632.456-1-animesh.manna@intel.com> References: <20190701062632.456-1-animesh.manna@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 06/15] drm/i915/dsb: Update i915_write to call dsb-write. X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jani Nikula Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP Existing mmio-reg-write need intel_uncore handle which is part of dev_priv structure and the same design is followed by adding dsb handle in dev_priv for programming registers through DSB. I915_WRITE is modified to check for register capability and call dsb-reg-write based on its capability. No changes in I915_READ definition as DSB do not have support to read any register. Cc: Ville Syrjälä Cc: Jani Nikula Cc: Rodrigo Vivi Signed-off-by: Animesh Manna --- drivers/gpu/drm/i915/i915_drv.h | 6 +++++- drivers/gpu/drm/i915/intel_dsb.c | 2 +- 2 files changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 237c17427780..cd0ebc62fa92 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -1880,6 +1880,8 @@ struct drm_i915_private { /* Mutex to protect the above hdcp component related values. */ struct mutex hdcp_comp_mutex; + struct intel_dsb *dsb; + /* * NOTE: This is the dri1/ums dungeon, don't add stuff here. Your patch * will be rejected. Instead look for a better place. @@ -2716,7 +2718,9 @@ extern void intel_display_print_error_state(struct drm_i915_error_state_buf *e, intel_uncore_##op__(&(dev_priv__)->uncore, __VA_ARGS__) #define I915_READ(reg__) __I915_REG_OP(read, dev_priv, (reg__)) -#define I915_WRITE(reg__, val__) __I915_REG_OP(write, dev_priv, (reg__), (val__)) +#define I915_WRITE(reg__, val__) \ + (reg__.cap) ? intel_dsb_reg_write(dev_priv->dsb, (reg__), (val__)) : \ + __I915_REG_OP(write, dev_priv, (reg__), (val__)) #define POSTING_READ(reg__) __I915_REG_OP(posting_read, dev_priv, (reg__)) diff --git a/drivers/gpu/drm/i915/intel_dsb.c b/drivers/gpu/drm/i915/intel_dsb.c index 31e1093977b6..aa5361c2d70e 100644 --- a/drivers/gpu/drm/i915/intel_dsb.c +++ b/drivers/gpu/drm/i915/intel_dsb.c @@ -122,7 +122,7 @@ void intel_dsb_reg_write(struct intel_dsb *dsb, i915_reg_t reg, u32 val) u32 *buf = dsb->cmd_buf; if (!buf) { - I915_WRITE(reg, val); + intel_uncore_write(&(dev_priv)->uncore, reg, val); return; } From patchwork Mon Jul 1 06:26:24 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Manna, Animesh" X-Patchwork-Id: 11025069 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B0A38746 for ; Mon, 1 Jul 2019 06:34:21 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B56D228329 for ; Mon, 1 Jul 2019 06:34:21 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id A9C9C284DA; Mon, 1 Jul 2019 06:34:21 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 68FB028329 for ; Mon, 1 Jul 2019 06:34:21 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id E8D9E8961E; Mon, 1 Jul 2019 06:34:20 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by gabe.freedesktop.org (Postfix) with ESMTPS id B091C8961E for ; Mon, 1 Jul 2019 06:34:19 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga103.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 30 Jun 2019 23:34:19 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.63,437,1557212400"; d="scan'208";a="153988667" Received: from amanna.iind.intel.com ([10.223.74.216]) by orsmga007.jf.intel.com with ESMTP; 30 Jun 2019 23:34:17 -0700 From: Animesh Manna To: intel-gfx@lists.freedesktop.org Date: Mon, 1 Jul 2019 11:56:24 +0530 Message-Id: <20190701062632.456-8-animesh.manna@intel.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190701062632.456-1-animesh.manna@intel.com> References: <20190701062632.456-1-animesh.manna@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 07/15] drm/i915/dsb: Register definition of DSB registers. X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jani Nikula Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP Added key register definitions of DSB. dsb-ctrl register is required to enable dsb-engine. head-ptr register hold the head of buffer address from where the execution will start. Programming tail-ptr register is a trigger point to start execution. Cc: Uma Shankar Cc: Jani Nikula Cc: Rodrigo Vivi Signed-off-by: Animesh Manna --- drivers/gpu/drm/i915/i915_reg.h | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index b2e8349f3295..8ef23e731cfe 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -11485,4 +11485,19 @@ enum skl_power_gate { #define PORT_TX_DFLEXDPCSSS _MMIO(FIA1_BASE + 0x00894) #define DP_PHY_MODE_STATUS_NOT_SAFE(tc_port) (1 << (tc_port)) +/* This register controls the Display State Buffer (DSB) engines. */ +#define _DSBSL_INSTANCE_BASE 0x70B00 +#define DSBSL_INSTANCE(pipe, id) (_DSBSL_INSTANCE_BASE + \ + (pipe) * 0x1000 + (id) * 100) +#define DSB_HEAD_PTR(pipe, id) _MMIO(DSBSL_INSTANCE(pipe, id) + 0x0) +#define DSB_TAIL_PTR(pipe, id) _MMIO(DSBSL_INSTANCE(pipe, id) + 0x4) +#define DSB_CTRL(pipe, id) _MMIO(DSBSL_INSTANCE(pipe, id) + 0x8) +#define DSB_ENABLE (1 << 31) +#define DSB_BUFFER_REITERATE (1 << 29) +#define DSB_WAIT_FOR_VBLANK (1 << 28) +#define DSB_WAIT_FOR_LINE_IN_RANGE (1 << 27) +#define DSB_HALT (1 << 16) +#define DSB_NON_POSTED_ENABLE (1 << 8) +#define DSB_STATUS (1 << 0) + #endif /* _I915_REG_H_ */ From patchwork Mon Jul 1 06:26:25 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Manna, Animesh" X-Patchwork-Id: 11025071 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id BFCAE746 for ; Mon, 1 Jul 2019 06:34:26 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id C450228329 for ; Mon, 1 Jul 2019 06:34:26 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id B86D9284DA; Mon, 1 Jul 2019 06:34:26 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 7831828329 for ; Mon, 1 Jul 2019 06:34:26 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id EC5F989E0E; Mon, 1 Jul 2019 06:34:25 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by gabe.freedesktop.org (Postfix) with ESMTPS id DC22789E0E for ; Mon, 1 Jul 2019 06:34:23 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga103.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 30 Jun 2019 23:34:23 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.63,437,1557212400"; d="scan'208";a="153988689" Received: from amanna.iind.intel.com ([10.223.74.216]) by orsmga007.jf.intel.com with ESMTP; 30 Jun 2019 23:34:21 -0700 From: Animesh Manna To: intel-gfx@lists.freedesktop.org Date: Mon, 1 Jul 2019 11:56:25 +0530 Message-Id: <20190701062632.456-9-animesh.manna@intel.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190701062632.456-1-animesh.manna@intel.com> References: <20190701062632.456-1-animesh.manna@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 08/15] drm/i915/dsb: Check DSB engine status. X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Michel Thierry , Jani Nikula Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP As per bspec check for DSB status before programming any of its register. Inline function added to check the dsb status. Cc: Michel Thierry Cc: Jani Nikula Cc: Rodrigo Vivi Signed-off-by: Animesh Manna --- drivers/gpu/drm/i915/intel_dsb.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_dsb.c b/drivers/gpu/drm/i915/intel_dsb.c index aa5361c2d70e..9ad4fc8b9f1e 100644 --- a/drivers/gpu/drm/i915/intel_dsb.c +++ b/drivers/gpu/drm/i915/intel_dsb.c @@ -23,6 +23,15 @@ #define DSB_BYTE_EN (0xf << 20) #define DSB_REG_VALUE_MASK 0xfffff +static inline bool is_dsb_busy(struct intel_dsb *dsb) +{ + struct intel_crtc *crtc = dsb->crtc; + struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); + enum pipe pipe = crtc->pipe; + + return DSB_STATUS & I915_READ(DSB_CTRL(pipe, dsb->id)); +} + struct intel_dsb * intel_dsb_get(struct intel_crtc *crtc) { From patchwork Mon Jul 1 06:26:26 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Manna, Animesh" X-Patchwork-Id: 11025073 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 0A148138B for ; Mon, 1 Jul 2019 06:34:29 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0E72528329 for ; Mon, 1 Jul 2019 06:34:29 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 030AA284DA; Mon, 1 Jul 2019 06:34:28 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id B3B1B28329 for ; Mon, 1 Jul 2019 06:34:28 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 365C889E23; Mon, 1 Jul 2019 06:34:28 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by gabe.freedesktop.org (Postfix) with ESMTPS id 99A3B89E19 for ; Mon, 1 Jul 2019 06:34:27 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga103.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 30 Jun 2019 23:34:27 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.63,437,1557212400"; d="scan'208";a="153988708" Received: from amanna.iind.intel.com ([10.223.74.216]) by orsmga007.jf.intel.com with ESMTP; 30 Jun 2019 23:34:25 -0700 From: Animesh Manna To: intel-gfx@lists.freedesktop.org Date: Mon, 1 Jul 2019 11:56:26 +0530 Message-Id: <20190701062632.456-10-animesh.manna@intel.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190701062632.456-1-animesh.manna@intel.com> References: <20190701062632.456-1-animesh.manna@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 09/15] drm/i915/dsb: functions to enable/disable DSB engine. X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Michel Thierry , Jani Nikula Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP DSB will be used for performance improvement for some special scenario. DSB engine will be enabled based on need and after completion of its work will be disabled. Api added for enable/disable operation by using DSB_CTRL register. Cc: Michel Thierry Cc: Jani Nikula Cc: Rodrigo Vivi Signed-off-by: Animesh Manna --- drivers/gpu/drm/i915/intel_dsb.c | 40 ++++++++++++++++++++++++++++++++ 1 file changed, 40 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_dsb.c b/drivers/gpu/drm/i915/intel_dsb.c index 9ad4fc8b9f1e..33c812019cec 100644 --- a/drivers/gpu/drm/i915/intel_dsb.c +++ b/drivers/gpu/drm/i915/intel_dsb.c @@ -32,6 +32,46 @@ static inline bool is_dsb_busy(struct intel_dsb *dsb) return DSB_STATUS & I915_READ(DSB_CTRL(pipe, dsb->id)); } +static bool intel_dsb_enable_engine(struct intel_dsb *dsb) +{ + struct intel_crtc *crtc = dsb->crtc; + struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); + enum pipe pipe = crtc->pipe; + u32 dsb_ctrl; + + dsb_ctrl = I915_READ(DSB_CTRL(pipe, dsb->id)); + + if (DSB_STATUS & dsb_ctrl) { + DRM_DEBUG_KMS("DSB engine is busy.\n"); + return false; + } + + dsb_ctrl |= DSB_ENABLE; + I915_WRITE(DSB_CTRL(pipe, dsb->id), dsb_ctrl); + + return true; +} + +static bool intel_dsb_disable_engine(struct intel_dsb *dsb) +{ + struct intel_crtc *crtc = dsb->crtc; + struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); + enum pipe pipe = crtc->pipe; + u32 dsb_ctrl; + + dsb_ctrl = I915_READ(DSB_CTRL(pipe, dsb->id)); + + if (DSB_STATUS & dsb_ctrl) { + DRM_DEBUG_KMS("DSB engine is busy.\n"); + return false; + } + + dsb_ctrl &= ~DSB_ENABLE; + I915_WRITE(DSB_CTRL(pipe, dsb->id), dsb_ctrl); + + return true; +} + struct intel_dsb * intel_dsb_get(struct intel_crtc *crtc) { From patchwork Mon Jul 1 06:26:27 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Manna, Animesh" X-Patchwork-Id: 11025075 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 73221138B for ; Mon, 1 Jul 2019 06:34:34 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 76AD628329 for ; Mon, 1 Jul 2019 06:34:34 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 6A44A284DA; Mon, 1 Jul 2019 06:34:34 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 6AD8728329 for ; Mon, 1 Jul 2019 06:34:33 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id EC1AE89F53; Mon, 1 Jul 2019 06:34:32 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by gabe.freedesktop.org (Postfix) with ESMTPS id BA37C89F53 for ; Mon, 1 Jul 2019 06:34:31 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga103.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 30 Jun 2019 23:34:31 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.63,437,1557212400"; d="scan'208";a="153988726" Received: from amanna.iind.intel.com ([10.223.74.216]) by orsmga007.jf.intel.com with ESMTP; 30 Jun 2019 23:34:29 -0700 From: Animesh Manna To: intel-gfx@lists.freedesktop.org Date: Mon, 1 Jul 2019 11:56:27 +0530 Message-Id: <20190701062632.456-11-animesh.manna@intel.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190701062632.456-1-animesh.manna@intel.com> References: <20190701062632.456-1-animesh.manna@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 10/15] drm/i915/dsb: function to trigger workload execution of DSB. X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jani Nikula Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP Batch buffer will be created through dsb-reg-write function which can have single/multiple request based on usecase and once the buffer is ready commit function will trigger the execution of the batch buffer. All the registers will be updated simultaneously. Cc: Imre Deak Cc: Jani Nikula Cc: Rodrigo Vivi Signed-off-by: Animesh Manna --- drivers/gpu/drm/i915/intel_dsb.c | 43 ++++++++++++++++++++++++++++++++ drivers/gpu/drm/i915/intel_dsb.h | 1 + 2 files changed, 44 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_dsb.c b/drivers/gpu/drm/i915/intel_dsb.c index 33c812019cec..0270f4fef600 100644 --- a/drivers/gpu/drm/i915/intel_dsb.c +++ b/drivers/gpu/drm/i915/intel_dsb.c @@ -190,3 +190,46 @@ void intel_dsb_reg_write(struct intel_dsb *dsb, i915_reg_t reg, u32 val) DSB_OPCODE_SHIFT) | DSB_BYTE_EN | i915_mmio_reg_offset(reg); } + +void intel_dsb_commit(struct intel_dsb *dsb) +{ + struct intel_crtc *crtc = dsb->crtc; + struct drm_device *dev = crtc->base.dev; + struct drm_i915_private *dev_priv = to_i915(dev); + enum pipe pipe = crtc->pipe; + u32 cmd_buf_tail, cmd_buf_size; + + if (!dsb->free_pos) + return; + + if (!intel_dsb_enable_engine(dsb)) + goto reset; + + if (is_dsb_busy(dsb)) { + DRM_DEBUG_KMS("HEAD_PTR write failed - dsb engine is busy.\n"); + goto reset; + } + I915_WRITE(DSB_HEAD_PTR(pipe, dsb->id), dsb->cmd_buf_head); + + cmd_buf_size = dsb->free_pos * 4; + cmd_buf_tail = round_up((dsb->cmd_buf_head + cmd_buf_size), + CACHELINE_BYTES); + + if (is_dsb_busy(dsb)) { + DRM_DEBUG_KMS("TAIL_PTR write failed - dsb engine is busy.\n"); + goto reset; + } + DRM_DEBUG_KMS("DSB execution started - buf-size %u, head 0x%x," + "tail 0x%x\n", cmd_buf_size, dsb->cmd_buf_head, + cmd_buf_tail); + I915_WRITE(DSB_TAIL_PTR(pipe, dsb->id), cmd_buf_tail); + if (wait_for(!is_dsb_busy(dsb), 1)) { + DRM_ERROR("Timed out waiting for DSB workload completion.\n"); + goto reset; + } + +reset: + memset(dsb->cmd_buf, 0, DSB_BUF_SIZE); + dsb->free_pos = 0; + intel_dsb_disable_engine(dsb); +} diff --git a/drivers/gpu/drm/i915/intel_dsb.h b/drivers/gpu/drm/i915/intel_dsb.h index 1fa893cc8c2e..7330add3c96f 100644 --- a/drivers/gpu/drm/i915/intel_dsb.h +++ b/drivers/gpu/drm/i915/intel_dsb.h @@ -42,5 +42,6 @@ struct intel_dsb { struct intel_dsb * intel_dsb_get(struct intel_crtc *crtc); void intel_dsb_reg_write(struct intel_dsb *dsb, i915_reg_t reg, u32 val); +void intel_dsb_commit(struct intel_dsb *dsb); #endif From patchwork Mon Jul 1 06:26:28 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Manna, Animesh" X-Patchwork-Id: 11025077 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D7446746 for ; Mon, 1 Jul 2019 06:34:38 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id DC37128329 for ; Mon, 1 Jul 2019 06:34:38 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id D0F96284DA; Mon, 1 Jul 2019 06:34:38 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 8531428329 for ; Mon, 1 Jul 2019 06:34:38 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 0D5B089F69; Mon, 1 Jul 2019 06:34:38 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by gabe.freedesktop.org (Postfix) with ESMTPS id 5E91A89F69 for ; Mon, 1 Jul 2019 06:34:36 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga103.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 30 Jun 2019 23:34:36 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.63,437,1557212400"; d="scan'208";a="153988740" Received: from amanna.iind.intel.com ([10.223.74.216]) by orsmga007.jf.intel.com with ESMTP; 30 Jun 2019 23:34:34 -0700 From: Animesh Manna To: intel-gfx@lists.freedesktop.org Date: Mon, 1 Jul 2019 11:56:28 +0530 Message-Id: <20190701062632.456-12-animesh.manna@intel.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190701062632.456-1-animesh.manna@intel.com> References: <20190701062632.456-1-animesh.manna@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 11/15] drm/i915/dsb: function to destroy DSB context. X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jani Nikula Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP Freed the gem object after completion of dsb workload. Cc: Shashank Sharma Cc: Jani Nikula Cc: Rodrigo Vivi Signed-off-by: Animesh Manna --- drivers/gpu/drm/i915/intel_dsb.c | 16 ++++++++++++++++ drivers/gpu/drm/i915/intel_dsb.h | 1 + 2 files changed, 17 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_dsb.c b/drivers/gpu/drm/i915/intel_dsb.c index 0270f4fef600..dddaae27d7b5 100644 --- a/drivers/gpu/drm/i915/intel_dsb.c +++ b/drivers/gpu/drm/i915/intel_dsb.c @@ -233,3 +233,19 @@ void intel_dsb_commit(struct intel_dsb *dsb) dsb->free_pos = 0; intel_dsb_disable_engine(dsb); } + +void intel_dsb_put(struct intel_dsb *dsb) +{ + struct intel_crtc *crtc = dsb->crtc; + struct drm_i915_private *i915 = to_i915(crtc->base.dev); + struct i915_vma *vma = dsb->vma; + + if (dsb->cmd_buf) { + mutex_lock(&i915->drm.struct_mutex); + crtc->dsb_in_use--; + i915_gem_object_unpin_map(vma->obj); + i915_vma_unpin_and_release(&vma, 0); + dsb->cmd_buf = NULL; + mutex_unlock(&i915->drm.struct_mutex); + } +} diff --git a/drivers/gpu/drm/i915/intel_dsb.h b/drivers/gpu/drm/i915/intel_dsb.h index 7330add3c96f..7b94fd9bc067 100644 --- a/drivers/gpu/drm/i915/intel_dsb.h +++ b/drivers/gpu/drm/i915/intel_dsb.h @@ -43,5 +43,6 @@ struct intel_dsb * intel_dsb_get(struct intel_crtc *crtc); void intel_dsb_reg_write(struct intel_dsb *dsb, i915_reg_t reg, u32 val); void intel_dsb_commit(struct intel_dsb *dsb); +void intel_dsb_put(struct intel_dsb *dsb); #endif From patchwork Mon Jul 1 06:26:29 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Manna, Animesh" X-Patchwork-Id: 11025079 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 1D012138B for ; Mon, 1 Jul 2019 06:34:41 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2178E28329 for ; Mon, 1 Jul 2019 06:34:41 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 16079284DA; Mon, 1 Jul 2019 06:34:41 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id BEFB928329 for ; Mon, 1 Jul 2019 06:34:40 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 443FE89F6E; Mon, 1 Jul 2019 06:34:40 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by gabe.freedesktop.org (Postfix) with ESMTPS id 6608F89F6B for ; Mon, 1 Jul 2019 06:34:39 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga103.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 30 Jun 2019 23:34:39 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.63,437,1557212400"; d="scan'208";a="153988745" Received: from amanna.iind.intel.com ([10.223.74.216]) by orsmga007.jf.intel.com with ESMTP; 30 Jun 2019 23:34:37 -0700 From: Animesh Manna To: intel-gfx@lists.freedesktop.org Date: Mon, 1 Jul 2019 11:56:29 +0530 Message-Id: <20190701062632.456-13-animesh.manna@intel.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190701062632.456-1-animesh.manna@intel.com> References: <20190701062632.456-1-animesh.manna@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 12/15] drm/i915/dsb: Early prepare of dsb context. X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jani Nikula Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP The dsb get call added part of the prepare so that we don't have things that can fail in the commit proper. The allocated dsb-context will be tracked under intel_crtc_state instead of intel_crtc per atomic-commit. Cc: Ville Syrjälä Cc: Jani Nikula Cc: Rodrigo Vivi Signed-off-by: Animesh Manna --- drivers/gpu/drm/i915/display/intel_display.c | 17 +++++++++++++++++ drivers/gpu/drm/i915/intel_drv.h | 2 ++ 2 files changed, 19 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index e55bd75528c1..6dea61689290 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -13708,6 +13708,22 @@ static void skl_update_crtcs(struct drm_atomic_state *state) icl_dbuf_slices_update(dev_priv, required_slices); } +static void intel_prepare_dsb(struct drm_atomic_state *state) +{ + struct drm_crtc_state *crtc_state; + struct drm_crtc *crtc; + struct intel_crtc_state *config; + int i; + + if (!state) + return; + + for_each_new_crtc_in_state(state, crtc, crtc_state, i) { + config = to_intel_crtc_state(crtc_state); + config->dsb = intel_dsb_get(to_intel_crtc(crtc)); + } +} + static void intel_atomic_helper_free_state(struct drm_i915_private *dev_priv) { struct intel_atomic_state *state, *next; @@ -14074,6 +14090,7 @@ static int intel_atomic_commit(struct drm_device *dev, dev_priv->wm.distrust_bios_wm = false; intel_shared_dpll_swap_state(state); intel_atomic_track_fbs(state); + intel_prepare_dsb(state); if (intel_state->modeset) { memcpy(dev_priv->min_cdclk, intel_state->min_cdclk, diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index a05a047d78af..bfea0e21de63 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -946,6 +946,8 @@ struct intel_crtc_state { /* Forward Error correction State */ bool fec_enable; + + struct intel_dsb *dsb; }; struct intel_crtc { From patchwork Mon Jul 1 06:26:30 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Manna, Animesh" X-Patchwork-Id: 11025081 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id EF4D1746 for ; Mon, 1 Jul 2019 06:34:44 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id F331128329 for ; Mon, 1 Jul 2019 06:34:44 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id E79BF284DA; Mon, 1 Jul 2019 06:34:44 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id A4E5328329 for ; Mon, 1 Jul 2019 06:34:44 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id F03B489F6B; Mon, 1 Jul 2019 06:34:43 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by gabe.freedesktop.org (Postfix) with ESMTPS id 7A00289F6F for ; Mon, 1 Jul 2019 06:34:42 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga103.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 30 Jun 2019 23:34:42 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.63,437,1557212400"; d="scan'208";a="153988757" Received: from amanna.iind.intel.com ([10.223.74.216]) by orsmga007.jf.intel.com with ESMTP; 30 Jun 2019 23:34:40 -0700 From: Animesh Manna To: intel-gfx@lists.freedesktop.org Date: Mon, 1 Jul 2019 11:56:30 +0530 Message-Id: <20190701062632.456-14-animesh.manna@intel.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190701062632.456-1-animesh.manna@intel.com> References: <20190701062632.456-1-animesh.manna@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 13/15] drm/i915/dsb: Cleanup of DSB context. X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jani Nikula Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP DSB context destroyed using intel_dsb_put() in cleanup function. Cc: Ville Syrjälä Cc: Jani Nikula Cc: Rodrigo Vivi Signed-off-by: Animesh Manna --- drivers/gpu/drm/i915/display/intel_display.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 6dea61689290..7c2dabc46d1f 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -13724,6 +13724,22 @@ static void intel_prepare_dsb(struct drm_atomic_state *state) } } +static void intel_cleanup_dsb(struct drm_atomic_state *state) +{ + struct drm_crtc_state *crtc_state; + struct drm_crtc *crtc; + struct intel_crtc_state *config; + int i; + + if (!state) + return; + + for_each_new_crtc_in_state(state, crtc, crtc_state, i) { + config = to_intel_crtc_state(crtc_state); + intel_dsb_put(config->dsb); + } +} + static void intel_atomic_helper_free_state(struct drm_i915_private *dev_priv) { struct intel_atomic_state *state, *next; @@ -13772,6 +13788,7 @@ static void intel_atomic_cleanup_work(struct work_struct *work) container_of(work, struct drm_atomic_state, commit_work); struct drm_i915_private *i915 = to_i915(state->dev); + intel_cleanup_dsb(state); drm_atomic_helper_cleanup_planes(&i915->drm, state); drm_atomic_helper_commit_cleanup_done(state); drm_atomic_state_put(state); From patchwork Mon Jul 1 06:26:31 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Manna, Animesh" X-Patchwork-Id: 11025083 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 0024B746 for ; Mon, 1 Jul 2019 06:34:49 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 04A5128329 for ; Mon, 1 Jul 2019 06:34:49 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id ED1D6284DA; Mon, 1 Jul 2019 06:34:48 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 8BB3728329 for ; Mon, 1 Jul 2019 06:34:48 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id F12AB89F75; Mon, 1 Jul 2019 06:34:47 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by gabe.freedesktop.org (Postfix) with ESMTPS id 2A01989F75 for ; Mon, 1 Jul 2019 06:34:46 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga103.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 30 Jun 2019 23:34:45 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.63,437,1557212400"; d="scan'208";a="153988767" Received: from amanna.iind.intel.com ([10.223.74.216]) by orsmga007.jf.intel.com with ESMTP; 30 Jun 2019 23:34:43 -0700 From: Animesh Manna To: intel-gfx@lists.freedesktop.org Date: Mon, 1 Jul 2019 11:56:31 +0530 Message-Id: <20190701062632.456-15-animesh.manna@intel.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190701062632.456-1-animesh.manna@intel.com> References: <20190701062632.456-1-animesh.manna@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 14/15] drm/i915/dsb: Documentation for DSB. X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jani Nikula Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP Added docbook info regarding Display State Buffer(DSB) which is added from gen12 onwards to batch submit display HW programming. Cc: Jani Nikula Cc: Rodrigo Vivi Signed-off-by: Animesh Manna --- Documentation/gpu/i915.rst | 9 ++++++ drivers/gpu/drm/i915/intel_dsb.c | 54 ++++++++++++++++++++++++++++++++ 2 files changed, 63 insertions(+) diff --git a/Documentation/gpu/i915.rst b/Documentation/gpu/i915.rst index c38ef0dda605..c5bd804eca55 100644 --- a/Documentation/gpu/i915.rst +++ b/Documentation/gpu/i915.rst @@ -249,6 +249,15 @@ Display PLLs .. kernel-doc:: drivers/gpu/drm/i915/display/intel_dpll_mgr.h :internal: +Display State Buffer +-------------------- + +.. kernel-doc:: drivers/gpu/drm/i915/intel_dsb.c + :doc: DSB + +.. kernel-doc:: drivers/gpu/drm/i915/intel_dsb.c + :internal: + Memory Management and Command Submission ======================================== diff --git a/drivers/gpu/drm/i915/intel_dsb.c b/drivers/gpu/drm/i915/intel_dsb.c index dddaae27d7b5..b74126c99a16 100644 --- a/drivers/gpu/drm/i915/intel_dsb.c +++ b/drivers/gpu/drm/i915/intel_dsb.c @@ -8,6 +8,23 @@ #define DSB_BUF_SIZE (2 * PAGE_SIZE) +/** + * DOC: DSB + * + * A DSB (Display State Buffer) is a queue of MMIO instructions in the memory + * which can be offloaded to DSB HW in Display Controller. DSB HW is a DMA + * engine that can be programmed to download the DSB from memory. + * It allows driver to batch submit display HW programming. This helps to + * reduce loading time and CPU activity, thereby making the context switch + * faster. DSB Support added from Gen12 Intel graphics based platform. + * + * DSB's can access only the pipe, plane, and transcoder Data Island Packet + * registers. + * + * DSB HW can support only register writes (both indexed and direct MMIO + * writes). There are no registers reads possible with DSB HW engine. + */ + /* DSB opcodes. */ #define DSB_OPCODE_SHIFT 24 #define DSB_OPCODE_NOOP 0x0 @@ -72,6 +89,17 @@ static bool intel_dsb_disable_engine(struct intel_dsb *dsb) return true; } +/** + * intel_dsb_get() - Allocate dsb context and return a dsb instance. + * @crtc: intel_crtc structure to get pipe info. + * + * This function will give handle of the DSB instance which + * user want to operate on. + * + * Return : address of Intel_dsb instance requested for. + * In failure case, the dsb instance will not have any command buffer. + */ + struct intel_dsb * intel_dsb_get(struct intel_crtc *crtc) { @@ -164,6 +192,18 @@ static void intel_dsb_indexed_reg_write(struct intel_dsb *dsb, i915_reg_t reg, buf[dsb->free_pos] = 0; } +/** + * intel_dsb_reg_write() -Write to the dsb context for normal + * register. + * @dsb: intel_dsb structure. + * @reg: register address. + * @val: value. + * + * This function is used for writing register-value pair in command + * buffer of DSB. During command buffer overflow, a warning + * is thrown and rest all erroneous condition register programming is done + * through mmio write. + */ void intel_dsb_reg_write(struct intel_dsb *dsb, i915_reg_t reg, u32 val) { struct intel_crtc *crtc = dsb->crtc; @@ -191,6 +231,13 @@ void intel_dsb_reg_write(struct intel_dsb *dsb, i915_reg_t reg, u32 val) i915_mmio_reg_offset(reg); } +/** + * intel_dsb_commit() - Trigger workload execution of DSB. + * @dsb: intel_dsb structure. + * + * This function is used to do actual write to hardware using DSB. + * On errors, fall back to MMIO. Also this function help to reset the context. + */ void intel_dsb_commit(struct intel_dsb *dsb) { struct intel_crtc *crtc = dsb->crtc; @@ -234,6 +281,13 @@ void intel_dsb_commit(struct intel_dsb *dsb) intel_dsb_disable_engine(dsb); } +/** + * intel_dsb_put() - To destroy DSB context. + * @dsb: intel_dsb structure. + * + * This function is used to destroy the dsb-context by doing unpin + * and release the vma object. + */ void intel_dsb_put(struct intel_dsb *dsb) { struct intel_crtc *crtc = dsb->crtc; From patchwork Mon Jul 1 06:26:32 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Manna, Animesh" X-Patchwork-Id: 11025085 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 69721746 for ; Mon, 1 Jul 2019 06:34:51 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6E64928329 for ; Mon, 1 Jul 2019 06:34:51 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 62DC5284DA; Mon, 1 Jul 2019 06:34:51 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 07E1D28329 for ; Mon, 1 Jul 2019 06:34:51 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8CB3289F89; Mon, 1 Jul 2019 06:34:50 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by gabe.freedesktop.org (Postfix) with ESMTPS id 43B1C89F89 for ; Mon, 1 Jul 2019 06:34:49 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga103.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 30 Jun 2019 23:34:48 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.63,437,1557212400"; d="scan'208";a="153988782" Received: from amanna.iind.intel.com ([10.223.74.216]) by orsmga007.jf.intel.com with ESMTP; 30 Jun 2019 23:34:46 -0700 From: Animesh Manna To: intel-gfx@lists.freedesktop.org Date: Mon, 1 Jul 2019 11:56:32 +0530 Message-Id: <20190701062632.456-16-animesh.manna@intel.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190701062632.456-1-animesh.manna@intel.com> References: <20190701062632.456-1-animesh.manna@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 15/15] drm/i915/dsb: Enable gamma lut programming using DSB. X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jani Nikula Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP Gamma lut programming can be programmed using DSB where bulk register programming can be done using indexed register write which takes number of data and the mmio offset to be written. Cc: Jani Nikula Cc: Rodrigo Vivi Signed-off-by: Animesh Manna --- drivers/gpu/drm/i915/display/intel_color.c | 4 ++++ drivers/gpu/drm/i915/i915_reg.h | 25 +++++++++++++++------- 2 files changed, 21 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c index 23a84dd7989f..8534daed05a6 100644 --- a/drivers/gpu/drm/i915/display/intel_color.c +++ b/drivers/gpu/drm/i915/display/intel_color.c @@ -882,7 +882,9 @@ static void icl_load_luts(const struct intel_crtc_state *crtc_state) { const struct drm_property_blob *gamma_lut = crtc_state->base.gamma_lut; struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); + dev_priv->dsb = crtc_state->dsb; if (crtc_state->base.degamma_lut) glk_load_degamma_lut(crtc_state); @@ -900,6 +902,8 @@ static void icl_load_luts(const struct intel_crtc_state *crtc_state) bdw_load_lut_10(crtc, gamma_lut, PAL_PREC_INDEX_VALUE(0)); ivb_load_lut_ext_max(crtc); } + + intel_dsb_commit(dev_priv->dsb); } static u32 chv_cgm_degamma_ldw(const struct drm_color_lut *color) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 8ef23e731cfe..b72c7e89739a 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -242,7 +242,7 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg) #define _PORT(port, a, b) _PICK_EVEN(port, a, b) #define _PLL(pll, a, b) _PICK_EVEN(pll, a, b) -#define _MMIO_PIPE(pipe, a, b) _MMIO(_PIPE(pipe, a, b)) +#define _MMIO_PIPE(pipe, a, b, ...) _MMIO(_PIPE(pipe, a, b), ##__VA_ARGS__) #define _MMIO_PLANE(plane, a, b) _MMIO(_PLANE(plane, a, b)) #define _MMIO_TRANS(tran, a, b) _MMIO(_TRANS(tran, a, b)) #define _MMIO_PORT(port, a, b) _MMIO(_PORT(port, a, b)) @@ -10185,11 +10185,18 @@ enum skl_power_gate { #define _PAL_PREC_EXT2_GC_MAX_B 0x4AC30 #define _PAL_PREC_EXT2_GC_MAX_C 0x4B430 -#define PREC_PAL_INDEX(pipe) _MMIO_PIPE(pipe, _PAL_PREC_INDEX_A, _PAL_PREC_INDEX_B) -#define PREC_PAL_DATA(pipe) _MMIO_PIPE(pipe, _PAL_PREC_DATA_A, _PAL_PREC_DATA_B) -#define PREC_PAL_GC_MAX(pipe, i) _MMIO(_PIPE(pipe, _PAL_PREC_GC_MAX_A, _PAL_PREC_GC_MAX_B) + (i) * 4) -#define PREC_PAL_EXT_GC_MAX(pipe, i) _MMIO(_PIPE(pipe, _PAL_PREC_EXT_GC_MAX_A, _PAL_PREC_EXT_GC_MAX_B) + (i) * 4) -#define PREC_PAL_EXT2_GC_MAX(pipe, i) _MMIO(_PIPE(pipe, _PAL_PREC_EXT2_GC_MAX_A, _PAL_PREC_EXT2_GC_MAX_B) + (i) * 4) +#define PREC_PAL_INDEX(pipe) _MMIO_PIPE(pipe, _PAL_PREC_INDEX_A, \ + _PAL_PREC_INDEX_B, \ + DSB_WRITE) +#define PREC_PAL_DATA(pipe) _MMIO_PIPE(pipe, _PAL_PREC_DATA_A, \ + _PAL_PREC_DATA_B, \ + DSB_INDEX_WRITE) +#define PREC_PAL_GC_MAX(pipe, i) _MMIO(_PIPE(pipe, _PAL_PREC_GC_MAX_A, _PAL_PREC_GC_MAX_B) + (i) * 4, \ + DSB_WRITE) +#define PREC_PAL_EXT_GC_MAX(pipe, i) _MMIO(_PIPE(pipe, _PAL_PREC_EXT_GC_MAX_A, _PAL_PREC_EXT_GC_MAX_B) + (i) * 4, \ + DSB_WRITE) +#define PREC_PAL_EXT2_GC_MAX(pipe, i) _MMIO(_PIPE(pipe, _PAL_PREC_EXT2_GC_MAX_A, _PAL_PREC_EXT2_GC_MAX_B) + (i) * 4, \ + DSB_WRITE) #define _PRE_CSC_GAMC_INDEX_A 0x4A484 #define _PRE_CSC_GAMC_INDEX_B 0x4AC84 @@ -10213,10 +10220,12 @@ enum skl_power_gate { #define PREC_PAL_MULTI_SEG_INDEX(pipe) _MMIO_PIPE(pipe, \ _PAL_PREC_MULTI_SEG_INDEX_A, \ - _PAL_PREC_MULTI_SEG_INDEX_B) + _PAL_PREC_MULTI_SEG_INDEX_B, \ + DSB_WRITE) #define PREC_PAL_MULTI_SEG_DATA(pipe) _MMIO_PIPE(pipe, \ _PAL_PREC_MULTI_SEG_DATA_A, \ - _PAL_PREC_MULTI_SEG_DATA_B) + _PAL_PREC_MULTI_SEG_DATA_B, \ + DSB_INDEX_WRITE) /* pipe CSC & degamma/gamma LUTs on CHV */ #define _CGM_PIPE_A_CSC_COEFF01 (VLV_DISPLAY_BASE + 0x67900)