From patchwork Sun Jul 22 21:20:10 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 10539419 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E3DFC1823 for ; Sun, 22 Jul 2018 21:20:47 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D17AD2843B for ; Sun, 22 Jul 2018 21:20:47 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id C520E28449; Sun, 22 Jul 2018 21:20:47 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2EE9328448 for ; Sun, 22 Jul 2018 21:20:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2387886AbeGVWSd (ORCPT ); Sun, 22 Jul 2018 18:18:33 -0400 Received: from mx2.suse.de ([195.135.220.15]:38772 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S2387732AbeGVWS0 (ORCPT ); Sun, 22 Jul 2018 18:18:26 -0400 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay1.suse.de (unknown [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id 8540BADC0; Sun, 22 Jul 2018 21:20:24 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: linux-mips@linux-mips.org Cc: Ralf Baechle , Paul Burton , James Hogan , linux-kernel@vger.kernel.org, Govindraj Raja , =?utf-8?q?Andreas_F=C3=A4rber?= , Michael Turquette , Stephen Boyd , Rob Herring , Mark Rutland , linux-clk@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH 15/15] clk: pistachio: Fix wrong SDHost card speed Date: Sun, 22 Jul 2018 23:20:10 +0200 Message-Id: <20180722212010.3979-16-afaerber@suse.de> X-Mailer: git-send-email 2.16.4 In-Reply-To: <20180722212010.3979-1-afaerber@suse.de> References: <20180722212010.3979-1-afaerber@suse.de> MIME-Version: 1.0 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Govindraj Raja The SDHost currently clocks the card 4x slower than it should do, because there is a fixed divide by 4 in the sdhost wrapper that is not present in the clock tree. To model this, add a fixed divide by 4 clock node in the SDHost clock path. This will ensure the right clock frequency is selected when the mmc driver tries to configure frequency on card insert. Signed-off-by: Govindraj Raja Signed-off-by: Andreas Färber Acked-by: Stephen Boyd --- drivers/clk/pistachio/clk-pistachio.c | 3 ++- include/dt-bindings/clock/pistachio-clk.h | 1 + 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/clk/pistachio/clk-pistachio.c b/drivers/clk/pistachio/clk-pistachio.c index c4ceb5eaf46c..1c968d9a6e17 100644 --- a/drivers/clk/pistachio/clk-pistachio.c +++ b/drivers/clk/pistachio/clk-pistachio.c @@ -44,7 +44,7 @@ static struct pistachio_gate pistachio_gates[] __initdata = { GATE(CLK_AUX_ADC_INTERNAL, "aux_adc_internal", "sys_internal_div", 0x104, 22), GATE(CLK_AUX_ADC, "aux_adc", "aux_adc_div", 0x104, 23), - GATE(CLK_SD_HOST, "sd_host", "sd_host_div", 0x104, 24), + GATE(CLK_SD_HOST, "sd_host", "sd_host_div4", 0x104, 24), GATE(CLK_BT, "bt", "bt_div", 0x104, 25), GATE(CLK_BT_DIV4, "bt_div4", "bt_div4_div", 0x104, 26), GATE(CLK_BT_DIV8, "bt_div8", "bt_div8_div", 0x104, 27), @@ -54,6 +54,7 @@ static struct pistachio_gate pistachio_gates[] __initdata = { static struct pistachio_fixed_factor pistachio_ffs[] __initdata = { FIXED_FACTOR(CLK_WIFI_DIV4, "wifi_div4", "wifi_pll", 4), FIXED_FACTOR(CLK_WIFI_DIV8, "wifi_div8", "wifi_pll", 8), + FIXED_FACTOR(CLK_SDHOST_DIV4, "sd_host_div4", "sd_host_div", 4), }; static struct pistachio_div pistachio_divs[] __initdata = { diff --git a/include/dt-bindings/clock/pistachio-clk.h b/include/dt-bindings/clock/pistachio-clk.h index 039f83facb68..77b92aed241d 100644 --- a/include/dt-bindings/clock/pistachio-clk.h +++ b/include/dt-bindings/clock/pistachio-clk.h @@ -21,6 +21,7 @@ /* Fixed-factor clocks */ #define CLK_WIFI_DIV4 16 #define CLK_WIFI_DIV8 17 +#define CLK_SDHOST_DIV4 18 /* Gate clocks */ #define CLK_MIPS 32