From patchwork Thu Jul 11 15:02:39 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gregory CLEMENT X-Patchwork-Id: 11040257 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id DFC196C5 for ; Thu, 11 Jul 2019 15:03:29 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id C6F862856D for ; Thu, 11 Jul 2019 15:03:29 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id B544D288A6; Thu, 11 Jul 2019 15:03:29 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 3A90A2856D for ; Thu, 11 Jul 2019 15:03:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=U1KkS8BvRC0mPRvQW1aal7VZvpReNbMRNrpeJDmGEEM=; b=CWLlaX/DRFuhfu d232HUx3j4Tc+Jck2liQrK2+xSxzpruhnBgEgbL9xeOYHKyGBr55cm1uNgda1Q7HqN2eNkChAlGmb KoFxUZr8LtQ9G4fgikovDy0XKT0jyfghqoJBIDDCSsGQ1oouiHCmFaVBHKOycYr/dB496JzcwMbsU lts1f5oWoxPPPRPyIIJrYUXo2/FUZIIY062Lm+yeOVkt92GYm/rJIZehiRhLyYYqKGDPlQuY3YoJt yF+yalw9D7JtHEHnluMa5CFrLphU/pr0OuV6vl8B0WK0pFHHjrXRsUnQ0tsVUCMxzvv9zH5ODh2Qa yBTxZU43dttErn52uCTg==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92 #3 (Red Hat Linux)) id 1hlabY-0003y1-Ne; Thu, 11 Jul 2019 15:03:28 +0000 Received: from relay5-d.mail.gandi.net ([217.70.183.197]) by bombadil.infradead.org with esmtps (Exim 4.92 #3 (Red Hat Linux)) id 1hlabU-0003wh-3f for linux-arm-kernel@lists.infradead.org; Thu, 11 Jul 2019 15:03:26 +0000 X-Originating-IP: 92.137.69.152 Received: from localhost (alyon-656-1-672-152.w92-137.abo.wanadoo.fr [92.137.69.152]) (Authenticated sender: gregory.clement@bootlin.com) by relay5-d.mail.gandi.net (Postfix) with ESMTPSA id 22DB71C0017; Thu, 11 Jul 2019 15:03:10 +0000 (UTC) From: Gregory CLEMENT To: Robin Murphy , Joerg Roedel , linux-kernel@vger.kernel.org, iommu@lists.linux-foundation.org Subject: [PATCH v2 1/4] iommu/arm-smmu: Introduce wrapper for writeq/readq Date: Thu, 11 Jul 2019 17:02:39 +0200 Message-Id: <20190711150242.25290-2-gregory.clement@bootlin.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190711150242.25290-1-gregory.clement@bootlin.com> References: <20190711150242.25290-1-gregory.clement@bootlin.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190711_080324_464444_12C19994 X-CRM114-Status: GOOD ( 13.20 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Jason Cooper , Andrew Lunn , Antoine Tenart , Catalin Marinas , Gregory CLEMENT , Will Deacon , Maxime Chevallier , Nadav Haklai , Rob Herring , Thomas Petazzoni , =?utf-8?q?Miqu=C3=A8l_Rayn?= =?utf-8?q?al?= , Hanna Hawa , linux-arm-kernel@lists.infradead.org, Sebastian Hesselbarth Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Hanna Hawa This patch introduces the smmu_writeq_relaxed/smmu_readq_relaxed helpers, as preparation to add specific Marvell work-around for accessing 64 bits width registers of ARM SMMU. Signed-off-by: Hanna Hawa Signed-off-by: Gregory CLEMENT --- drivers/iommu/arm-smmu.c | 36 +++++++++++++++++++++++++++--------- 1 file changed, 27 insertions(+), 9 deletions(-) diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c index 045d93884164..ac0784b5b675 100644 --- a/drivers/iommu/arm-smmu.c +++ b/drivers/iommu/arm-smmu.c @@ -91,9 +91,11 @@ * therefore this actually makes more sense than it might first appear. */ #ifdef CONFIG_64BIT -#define smmu_write_atomic_lq writeq_relaxed +#define smmu_write_atomic_lq(smmu, val, reg) \ + smmu_writeq_relaxed(smmu, val, reg) #else -#define smmu_write_atomic_lq writel_relaxed +#define smmu_write_atomic_lq(smmu, val, reg) \ + writel_relaxed(val, reg) #endif /* Translation context bank */ @@ -295,6 +297,19 @@ static struct arm_smmu_domain *to_smmu_domain(struct iommu_domain *dom) return container_of(dom, struct arm_smmu_domain, domain); } +static inline void smmu_writeq_relaxed(struct arm_smmu_device *smmu, + u64 val, + void __iomem *addr) +{ + writeq_relaxed(val, addr); +} + +static inline u64 smmu_readq_relaxed(struct arm_smmu_device *smmu, + void __iomem *addr) +{ + return readq_relaxed(addr); +} + static void parse_driver_options(struct arm_smmu_device *smmu) { int i = 0; @@ -495,6 +510,7 @@ static void arm_smmu_tlb_inv_range_nosync(unsigned long iova, size_t size, size_t granule, bool leaf, void *cookie) { struct arm_smmu_domain *smmu_domain = cookie; + struct arm_smmu_device *smmu = smmu_domain->smmu; struct arm_smmu_cfg *cfg = &smmu_domain->cfg; bool stage1 = cfg->cbar != CBAR_TYPE_S2_TRANS; void __iomem *reg = ARM_SMMU_CB(smmu_domain->smmu, cfg->cbndx); @@ -516,7 +532,7 @@ static void arm_smmu_tlb_inv_range_nosync(unsigned long iova, size_t size, iova >>= 12; iova |= (u64)cfg->asid << 48; do { - writeq_relaxed(iova, reg); + smmu_writeq_relaxed(smmu, iova, reg); iova += granule >> 12; } while (size -= granule); } @@ -525,7 +541,7 @@ static void arm_smmu_tlb_inv_range_nosync(unsigned long iova, size_t size, ARM_SMMU_CB_S2_TLBIIPAS2; iova >>= 12; do { - smmu_write_atomic_lq(iova, reg); + smmu_write_atomic_lq(smmu, iova, reg); iova += granule >> 12; } while (size -= granule); } @@ -584,7 +600,7 @@ static irqreturn_t arm_smmu_context_fault(int irq, void *dev) return IRQ_NONE; fsynr = readl_relaxed(cb_base + ARM_SMMU_CB_FSYNR0); - iova = readq_relaxed(cb_base + ARM_SMMU_CB_FAR); + iova = smmu_readq_relaxed(smmu, cb_base + ARM_SMMU_CB_FAR); dev_err_ratelimited(smmu->dev, "Unhandled context fault: fsr=0x%x, iova=0x%08lx, fsynr=0x%x, cb=%d\n", @@ -734,9 +750,11 @@ static void arm_smmu_write_context_bank(struct arm_smmu_device *smmu, int idx) writel_relaxed(cb->ttbr[0], cb_base + ARM_SMMU_CB_TTBR0); writel_relaxed(cb->ttbr[1], cb_base + ARM_SMMU_CB_TTBR1); } else { - writeq_relaxed(cb->ttbr[0], cb_base + ARM_SMMU_CB_TTBR0); + smmu_writeq_relaxed(smmu, cb->ttbr[0], + cb_base + ARM_SMMU_CB_TTBR0); if (stage1) - writeq_relaxed(cb->ttbr[1], cb_base + ARM_SMMU_CB_TTBR1); + smmu_writeq_relaxed(smmu, cb->ttbr[1], + cb_base + ARM_SMMU_CB_TTBR1); } /* MAIRs (stage-1 only) */ @@ -1367,7 +1385,7 @@ static phys_addr_t arm_smmu_iova_to_phys_hard(struct iommu_domain *domain, /* ATS1 registers can only be written atomically */ va = iova & ~0xfffUL; if (smmu->version == ARM_SMMU_V2) - smmu_write_atomic_lq(va, cb_base + ARM_SMMU_CB_ATS1PR); + smmu_write_atomic_lq(smmu, va, cb_base + ARM_SMMU_CB_ATS1PR); else /* Register is only 32-bit in v1 */ writel_relaxed(va, cb_base + ARM_SMMU_CB_ATS1PR); @@ -1380,7 +1398,7 @@ static phys_addr_t arm_smmu_iova_to_phys_hard(struct iommu_domain *domain, return ops->iova_to_phys(ops, iova); } - phys = readq_relaxed(cb_base + ARM_SMMU_CB_PAR); + phys = smmu_readq_relaxed(smmu, cb_base + ARM_SMMU_CB_PAR); spin_unlock_irqrestore(&smmu_domain->cb_lock, flags); if (phys & CB_PAR_F) { dev_err(dev, "translation fault!\n"); From patchwork Thu Jul 11 15:02:40 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gregory CLEMENT X-Patchwork-Id: 11040259 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id F029A112C for ; Thu, 11 Jul 2019 15:03:54 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id DC4752856D for ; Thu, 11 Jul 2019 15:03:54 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id CF6292886B; Thu, 11 Jul 2019 15:03:54 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 52A4A2856D for ; Thu, 11 Jul 2019 15:03:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=OqdKUpVmvVYj2MmRQ3EWmkWBJSzvPlFcoiYAw3PFGiU=; b=ava5IwKoTRr8DI Z8x1WU6kpvH/2gfxloYdEt5+m3tLJAbPVQ+T7NzWboelD6+QkTNwDlf5EVGR0/5JNvJSjZwdWLSUj TCRAc7j4ka3za1gDE8JJQwy997suozpZ4o9pYMQoUHES9cKjYPj8EmmDADyF585E4vlDnO/8qaDqu w5RwZ9VHXb+9BucGBPd5W8GFebf6trDZGS6aQTBGe51vcXZo8PnFCCZmmb5rL7JGiHz33rFdoQalW QTecKnbRZsniPkztWNjfVssVrPKAl3/vSHbT9eqXTVHDP9se1ue3KslwrjmlZGSRyhA/BaYBAZYn5 /0diy3qZ2JH6waRWl9AQ==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92 #3 (Red Hat Linux)) id 1hlabx-0004D9-P4; Thu, 11 Jul 2019 15:03:53 +0000 Received: from casper.infradead.org ([2001:8b0:10b:1236::1]) by bombadil.infradead.org with esmtps (Exim 4.92 #3 (Red Hat Linux)) id 1hlabv-0004Cs-03 for linux-arm-kernel@bombadil.infradead.org; Thu, 11 Jul 2019 15:03:51 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=Content-Transfer-Encoding:MIME-Version: References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From:Sender:Reply-To: Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help: List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=A/5sS65jRy30jSBkucydimqlGAy2bxhkdwlQTeAG+qY=; b=pnJ10Mm9bJpg13BhTNA/jWNJTJ Goo3DsWGH0Inp3bByIxCIsQG3aEryB7PAyAORC7ugFGSI2vluzJBfkOk25U31vDQDIXxhikXRAwMm 2knlMkmSQD7n5bZkPUyuFVMywS1XvYMmtXVRx8jM18zlhE6ex5SXv5uexG0loOPlTwvTtOJGSiRBM OfGPOWglU7npkztnH4MuBPm+Sc/zGpXiA3RYd1a+qlyAo93xl9UMUpV1ayKHtGmwChYNN6u9d1Whd GvsFtmH3tk1dIzZc/uzk2n4hIiZRvu/q8pXeZv0nSr3y+TqcoBkynMsSOa3MAKBcGMix50Lqq0gWl MDJo6TKQ==; Received: from relay2-d.mail.gandi.net ([217.70.183.194]) by casper.infradead.org with esmtps (Exim 4.92 #3 (Red Hat Linux)) id 1hlaby-0000g6-Rr for linux-arm-kernel@lists.infradead.org; Thu, 11 Jul 2019 15:03:57 +0000 X-Originating-IP: 92.137.69.152 Received: from localhost (alyon-656-1-672-152.w92-137.abo.wanadoo.fr [92.137.69.152]) (Authenticated sender: gregory.clement@bootlin.com) by relay2-d.mail.gandi.net (Postfix) with ESMTPSA id 516F740008; Thu, 11 Jul 2019 15:03:12 +0000 (UTC) From: Gregory CLEMENT To: Robin Murphy , Joerg Roedel , linux-kernel@vger.kernel.org, iommu@lists.linux-foundation.org Subject: [PATCH v2 2/4] iommu/arm-smmu: Workaround for Marvell Armada-AP806 SoC erratum #582743 Date: Thu, 11 Jul 2019 17:02:40 +0200 Message-Id: <20190711150242.25290-3-gregory.clement@bootlin.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190711150242.25290-1-gregory.clement@bootlin.com> References: <20190711150242.25290-1-gregory.clement@bootlin.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190711_160354_970691_7D081300 X-CRM114-Status: GOOD ( 19.58 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Jason Cooper , Andrew Lunn , Antoine Tenart , Catalin Marinas , Gregory CLEMENT , Will Deacon , Maxime Chevallier , Nadav Haklai , Rob Herring , Thomas Petazzoni , =?utf-8?q?Miqu=C3=A8l_Rayn?= =?utf-8?q?al?= , Hanna Hawa , linux-arm-kernel@lists.infradead.org, Sebastian Hesselbarth Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Hanna Hawa Due to erratum #582743, the Marvell Armada-AP806 can't access 64bit to ARM SMMUv2 registers. This patch split the writeq/readq to two accesses of writel/readl. We also mask the MMU_IDR2.PTFSv8 fields to not use AArch64 format but only AARCH32_L. Indeed with AArch64 format 32 bits acces is not supported. Note that separate writes/reads to 2 is not problem regards to atomicity, because the driver use the readq/writeq while initialize the SMMU, report for SMMU fault, and use spinlock in one case (iova_to_phys). Signed-off-by: Hanna Hawa Signed-off-by: Gregory CLEMENT --- Documentation/arm64/silicon-errata.txt | 2 ++ drivers/iommu/arm-smmu.c | 42 +++++++++++++++++++++++--- 2 files changed, 40 insertions(+), 4 deletions(-) diff --git a/Documentation/arm64/silicon-errata.txt b/Documentation/arm64/silicon-errata.txt index d1e2bb801e1b..3f78ae7a7690 100644 --- a/Documentation/arm64/silicon-errata.txt +++ b/Documentation/arm64/silicon-errata.txt @@ -72,6 +72,8 @@ stable kernels. | Cavium | ThunderX2 SMMUv3| #74 | N/A | | Cavium | ThunderX2 SMMUv3| #126 | N/A | | | | | | +| Marvell | ARM-MMU-500 | #582743 | N/A | +| | | | | | Freescale/NXP | LS2080A/LS1043A | A-008585 | FSL_ERRATUM_A008585 | | | | | | | Hisilicon | Hip0{5,6,7} | #161010101 | HISILICON_ERRATUM_161010101 | diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c index ac0784b5b675..32536ccae22d 100644 --- a/drivers/iommu/arm-smmu.c +++ b/drivers/iommu/arm-smmu.c @@ -126,6 +126,7 @@ enum arm_smmu_arch_version { enum arm_smmu_implementation { GENERIC_SMMU, ARM_MMU500, + MRVL_MMU500, CAVIUM_SMMUV2, QCOM_SMMUV2, }; @@ -301,13 +302,35 @@ static inline void smmu_writeq_relaxed(struct arm_smmu_device *smmu, u64 val, void __iomem *addr) { - writeq_relaxed(val, addr); + /* + * Marvell Armada-AP806 erratum #582743. + * Split all the writeq to double writel + */ + if (smmu->model != MRVL_MMU500) { + writeq_relaxed(val, addr); + return; + } + + writel_relaxed(upper_32_bits(val), addr + 4); + writel_relaxed(lower_32_bits(val), addr); } static inline u64 smmu_readq_relaxed(struct arm_smmu_device *smmu, void __iomem *addr) { - return readq_relaxed(addr); + u64 val; + + /* + * Marvell Armada-AP806 erratum #582743. + * Split all the readq to double readl + */ + if (smmu->model != MRVL_MMU500) + return readq_relaxed(addr); + + val = (u64)readl_relaxed(addr + 4) << 32; + val |= readl_relaxed(addr); + + return val; } static void parse_driver_options(struct arm_smmu_device *smmu) @@ -1741,7 +1764,7 @@ static void arm_smmu_device_reset(struct arm_smmu_device *smmu) for (i = 0; i < smmu->num_mapping_groups; ++i) arm_smmu_write_sme(smmu, i); - if (smmu->model == ARM_MMU500) { + if (smmu->model == ARM_MMU500 || smmu->model == MRVL_MMU500) { /* * Before clearing ARM_MMU500_ACTLR_CPRE, need to * clear CACHE_LOCK bit of ACR first. And, CACHE_LOCK @@ -1770,7 +1793,7 @@ static void arm_smmu_device_reset(struct arm_smmu_device *smmu) * Disable MMU-500's not-particularly-beneficial next-page * prefetcher for the sake of errata #841119 and #826419. */ - if (smmu->model == ARM_MMU500) { + if (smmu->model == ARM_MMU500 || smmu->model == MRVL_MMU500) { reg = readl_relaxed(cb_base + ARM_SMMU_CB_ACTLR); reg &= ~ARM_MMU500_ACTLR_CPRE; writel_relaxed(reg, cb_base + ARM_SMMU_CB_ACTLR); @@ -1987,6 +2010,15 @@ static int arm_smmu_device_cfg_probe(struct arm_smmu_device *smmu) if (id & ID2_VMID16) smmu->features |= ARM_SMMU_FEAT_VMID16; + /* + * Armada-AP806 erratum #582743. + * Hide the SMMU_IDR2.PTFSv8 fields to sidestep the AArch64 + * formats altogether and allow using 32 bits access on the + * interconnect. + */ + if (smmu->model == MRVL_MMU500) + id &= ~(ID2_PTFS_4K | ID2_PTFS_16K | ID2_PTFS_64K); + /* * What the page table walker can address actually depends on which * descriptor format is in use, but since a) we don't know that yet, @@ -2053,6 +2085,7 @@ ARM_SMMU_MATCH_DATA(smmu_generic_v1, ARM_SMMU_V1, GENERIC_SMMU); ARM_SMMU_MATCH_DATA(smmu_generic_v2, ARM_SMMU_V2, GENERIC_SMMU); ARM_SMMU_MATCH_DATA(arm_mmu401, ARM_SMMU_V1_64K, GENERIC_SMMU); ARM_SMMU_MATCH_DATA(arm_mmu500, ARM_SMMU_V2, ARM_MMU500); +ARM_SMMU_MATCH_DATA(mrvl_mmu500, ARM_SMMU_V2, MRVL_MMU500); ARM_SMMU_MATCH_DATA(cavium_smmuv2, ARM_SMMU_V2, CAVIUM_SMMUV2); ARM_SMMU_MATCH_DATA(qcom_smmuv2, ARM_SMMU_V2, QCOM_SMMUV2); @@ -2062,6 +2095,7 @@ static const struct of_device_id arm_smmu_of_match[] = { { .compatible = "arm,mmu-400", .data = &smmu_generic_v1 }, { .compatible = "arm,mmu-401", .data = &arm_mmu401 }, { .compatible = "arm,mmu-500", .data = &arm_mmu500 }, + { .compatible = "marvell,mmu-500", .data = &mrvl_mmu500 }, { .compatible = "cavium,smmu-v2", .data = &cavium_smmuv2 }, { .compatible = "qcom,smmu-v2", .data = &qcom_smmuv2 }, { }, From patchwork Thu Jul 11 15:02:41 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gregory CLEMENT X-Patchwork-Id: 11040263 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 8F8F36C5 for ; Thu, 11 Jul 2019 15:09:37 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7B16928952 for ; Thu, 11 Jul 2019 15:09:37 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 6EF5028A78; Thu, 11 Jul 2019 15:09:37 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 19A0428952 for ; Thu, 11 Jul 2019 15:09:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=LWIsO1/RrnA2GlmXacNGfipRDJf6qefa9H5WiHCGFSU=; b=ZCZZnGt1bGsMtN W52o5tXZY2RUZvGbxeWjhlKypgFJNEJLLSBnRaTU79Au0MnKVPeRRBmPJ6Ma7eZseds6FHC8L28K2 zYsfgr0Kr1fGSVp1bQnyI5JR0TQr68N7OF3aNYHwXbE6j0O+68f6N/GL7agBZXtj0jCHD9bHNtQYA 1cdf7gdysSmWRsZ4C4Y5CP5tTgDbUcuOonEox25r1Vgn9ba8OYOD3YTNJyZo2JU5t8irRGj1RasWh RViH0+2p1nbUhM3Y/PL2h2tnqlxVv1GopETgvgqpkmKMh4ePdowESkoTDecjjyFkY2hrfRLKYwoSk jOKP4wcLQ+Bguue69MvA==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92 #3 (Red Hat Linux)) id 1hlahU-0007Ip-HP; Thu, 11 Jul 2019 15:09:36 +0000 Received: from relay1-d.mail.gandi.net ([217.70.183.193]) by bombadil.infradead.org with esmtps (Exim 4.92 #3 (Red Hat Linux)) id 1hlahP-0007H4-QN for linux-arm-kernel@lists.infradead.org; Thu, 11 Jul 2019 15:09:34 +0000 X-Originating-IP: 92.137.69.152 Received: from localhost (alyon-656-1-672-152.w92-137.abo.wanadoo.fr [92.137.69.152]) (Authenticated sender: gregory.clement@bootlin.com) by relay1-d.mail.gandi.net (Postfix) with ESMTPSA id 5312C240021; Thu, 11 Jul 2019 15:03:14 +0000 (UTC) From: Gregory CLEMENT To: Robin Murphy , Joerg Roedel , linux-kernel@vger.kernel.org, iommu@lists.linux-foundation.org Subject: [PATCH v2 3/4] dt-bindings: iommu/arm, smmu: add compatible string for Marvell Date: Thu, 11 Jul 2019 17:02:41 +0200 Message-Id: <20190711150242.25290-4-gregory.clement@bootlin.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190711150242.25290-1-gregory.clement@bootlin.com> References: <20190711150242.25290-1-gregory.clement@bootlin.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190711_080932_023806_CBC261A5 X-CRM114-Status: GOOD ( 10.46 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Jason Cooper , Andrew Lunn , Antoine Tenart , Catalin Marinas , Gregory CLEMENT , Will Deacon , Maxime Chevallier , Nadav Haklai , Rob Herring , Thomas Petazzoni , =?utf-8?q?Miqu=C3=A8l_Rayn?= =?utf-8?q?al?= , Hanna Hawa , linux-arm-kernel@lists.infradead.org, Sebastian Hesselbarth Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Hanna Hawa Add specific compatible string for Marvell usage due errata of accessing 64bits registers of ARM SMMU, in AP806. AP806 SoC uses the generic ARM-MMU500, and there's no specific implementation of Marvell, this compatible is used for errata only. Signed-off-by: Hanna Hawa Signed-off-by: Gregory CLEMENT Reviewed-by: Rob Herring --- Documentation/devicetree/bindings/iommu/arm,smmu.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.txt b/Documentation/devicetree/bindings/iommu/arm,smmu.txt index 3133f3ba7567..7ed58d51846e 100644 --- a/Documentation/devicetree/bindings/iommu/arm,smmu.txt +++ b/Documentation/devicetree/bindings/iommu/arm,smmu.txt @@ -16,6 +16,7 @@ conditions. "arm,mmu-400" "arm,mmu-401" "arm,mmu-500" + "marvell,mmu-500" "cavium,smmu-v2" "qcom,smmu-v2" From patchwork Thu Jul 11 15:02:42 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gregory CLEMENT X-Patchwork-Id: 11040265 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E0D65112C for ; Thu, 11 Jul 2019 15:10:04 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id CAAAD28A4A for ; Thu, 11 Jul 2019 15:10:04 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id BC42828A7A; Thu, 11 Jul 2019 15:10:04 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 61D3728A4A for ; Thu, 11 Jul 2019 15:10:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=08SAN4M/yUYBWzDVvczhJ/r87pdC9OpZMWDA2vTXszg=; b=JSS3Itt6zREzRK uTBj7fnesW62tRzlCXErRdtDcWy15478vAyTXQKWP612eVhgUv7/kRkvr61L50OycYmtt5MbSD5im X1vTcRj6N0+HpX/HbhNdizMS4u/aCVpYX1UGR+yt3jqIipXmtzMhLlg8j0XNKYDWKd76azpI9tKrN L9IiSBy4mSnkIb9CK5pfZDUmJ8mMfOu3V4BmzoJfxqtkIiC0Gj7fbA41y35l7HSGJE4pboKzGdwJv ZkcS8gRIzKJhZcuN18IN3xhWmqVvduzr4D3wh92gFP2mTe+zl17cPlVjLiV0GnMQPuU6vZ/or1Bqg aDrzWpfhRDp/m00qS6iA==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92 #3 (Red Hat Linux)) id 1hlahv-0007XY-54; Thu, 11 Jul 2019 15:10:03 +0000 Received: from merlin.infradead.org ([2001:8b0:10b:1231::1]) by bombadil.infradead.org with esmtps (Exim 4.92 #3 (Red Hat Linux)) id 1hlahs-0007X4-D7 for linux-arm-kernel@bombadil.infradead.org; Thu, 11 Jul 2019 15:10:00 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=merlin.20170209; h=Content-Transfer-Encoding:MIME-Version: References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From:Sender:Reply-To: Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help: List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=NydRS5amDj1kp9ZJgWP85hzOmwxf1CUR6Jdpb4mr50w=; b=rTtT7HGIDHIp77xfdA2M2C4gIA YWptSUMdH1AwhpeRwcoMAS9YE3Fx06LBEXDq+41mCxnUdJKqs0o+OFmNioBoz8loAVbNTxYllhs3U BxoFnO161TfVMy8G7mMIwA3me/FLDRhp+HtnhEQaZX3b0xUmXy78iXrSod7X42UugFskT7UkPME5A nWF+lXpU5c3QN7c9583a469fgaKvPwjBFK/dTOoaQEQ7nSVfpERBbi4GfdumSyg7ktPoyAbPPZTxv rKIqgBoHtP9qhlIGZXkkKxI5ESj+iDF76WE8QnPr7v2LS05Jx4e/OVBjUVY4ILbrWdKvQAFofsaKg JFphovzQ==; Received: from relay6-d.mail.gandi.net ([217.70.183.198]) by merlin.infradead.org with esmtps (Exim 4.92 #3 (Red Hat Linux)) id 1hlahp-0004n8-M5 for linux-arm-kernel@lists.infradead.org; Thu, 11 Jul 2019 15:09:58 +0000 X-Originating-IP: 92.137.69.152 Received: from localhost (alyon-656-1-672-152.w92-137.abo.wanadoo.fr [92.137.69.152]) (Authenticated sender: gregory.clement@bootlin.com) by relay6-d.mail.gandi.net (Postfix) with ESMTPSA id 6B866C000A; Thu, 11 Jul 2019 15:09:24 +0000 (UTC) From: Gregory CLEMENT To: Robin Murphy , Joerg Roedel , linux-kernel@vger.kernel.org, iommu@lists.linux-foundation.org Subject: [PATCH v2 4/4] arm64: dts: marvell: armada-ap806: add smmu support Date: Thu, 11 Jul 2019 17:02:42 +0200 Message-Id: <20190711150242.25290-5-gregory.clement@bootlin.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190711150242.25290-1-gregory.clement@bootlin.com> References: <20190711150242.25290-1-gregory.clement@bootlin.com> MIME-Version: 1.0 X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Jason Cooper , Andrew Lunn , Antoine Tenart , Catalin Marinas , Gregory CLEMENT , Will Deacon , Maxime Chevallier , Nadav Haklai , Rob Herring , Thomas Petazzoni , =?utf-8?q?Miqu=C3=A8l_Rayn?= =?utf-8?q?al?= , linux-arm-kernel@lists.infradead.org, Sebastian Hesselbarth Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Add IOMMU node for Marvell AP806 based SoCs. Signed-off-by: Gregory CLEMENT --- arch/arm64/boot/dts/marvell/armada-ap806.dtsi | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/arch/arm64/boot/dts/marvell/armada-ap806.dtsi b/arch/arm64/boot/dts/marvell/armada-ap806.dtsi index 91dad7e4ee59..8e29d593970a 100644 --- a/arch/arm64/boot/dts/marvell/armada-ap806.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-ap806.dtsi @@ -115,6 +115,23 @@ interrupts = <17>; }; + smmu: iommu@5000000 { + compatible = "marvell,mmu-500"; + reg = <0x100000 0x100000>; + dma-coherent; + #iommu-cells = <1>; + #global-interrupts = <1>; + interrupts = , + , + , + , + , + , + , + , + ; + }; + odmi: odmi@300000 { compatible = "marvell,odmi-controller"; interrupt-controller;