From patchwork Wed Jul 25 18:24:36 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thor Thayer X-Patchwork-Id: 10544563 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 49449112B for ; Wed, 25 Jul 2018 18:22:39 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 37B182A133 for ; Wed, 25 Jul 2018 18:22:39 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 290B42A1BD; Wed, 25 Jul 2018 18:22:39 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id A83BC2A827 for ; Wed, 25 Jul 2018 18:22:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:References: In-Reply-To:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=k4nuCnyOkk91wMfJuPVMQEnLrXnX1qmX4noBkSoaGXA=; b=eyXqTHk7XZN69zWohzEEhTHany 1s9Z6mgdiLSWbZgCjcMYKRDfAKC4xiQxT1eZd053wnt0nOiPpspqNhXaaB9bx8EoGi85cg6EpO0sh uQF4dZ+iSIByphVTobIIrmX0QXn1xF3+qMT2OK2DAmV0iNrMaYaRzu8AtAkITSFdEfmJiQ0WzIx7/ rtt80//PaTIlRifhPhc+tj/kBD3aOb+0g9PuF2npUhTCXQCOktWDFdzhDa1Wojjm8gON8DEhVdX1n NOmbWY07EfYoTvzq3A5uh5gNo+Ul4s7Ht2wZSWwiozAbweJS0OXLFthVHDLmjBx29zRR8HJYdZT1g wytpfsTw==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1fiOQj-0006YL-QP; Wed, 25 Jul 2018 18:22:33 +0000 Received: from mga09.intel.com ([134.134.136.24]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1fiOQZ-0006M8-J8 for linux-arm-kernel@lists.infradead.org; Wed, 25 Jul 2018 18:22:25 +0000 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 25 Jul 2018 11:22:13 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.51,401,1526367600"; d="scan'208";a="57133541" Received: from tthayer-hp-z620-workstation.an.intel.com ([10.122.105.144]) by fmsmga007.fm.intel.com with ESMTP; 25 Jul 2018 11:22:12 -0700 From: thor.thayer@linux.intel.com To: joro@8bytes.org, robh+dt@kernel.org, mark.rutland@arm.com, dinguyen@kernel.org, will.deacon@arm.com, robin.murphy@arm.com Subject: [PATCH 1/2] arm64: dts: stratix10: Add Stratix10 SMMU support Date: Wed, 25 Jul 2018 13:24:36 -0500 Message-Id: <1532543077-8933-2-git-send-email-thor.thayer@linux.intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1532543077-8933-1-git-send-email-thor.thayer@linux.intel.com> References: <1532543077-8933-1-git-send-email-thor.thayer@linux.intel.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20180725_112223_674485_C778C1DE X-CRM114-Status: GOOD ( 14.03 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, iommu@lists.linux-foundation.org, Thor Thayer , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Thor Thayer Add SMMU support to the Stratix10 Device Tree which includes adding the SMMU node and adding IOMMU stream ids to the SMMU peripherals. Update bindings. Signed-off-by: Thor Thayer Reviewed-by: Rob Herring --- This patch is dependent on the patch series "iommu/arm-smmu: Add runtime pm/sleep support" (https://patchwork.ozlabs.org/cover/946160/) --- .../devicetree/bindings/iommu/arm,smmu.txt | 25 ++++++++++++++++++ arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi | 30 ++++++++++++++++++++++ 2 files changed, 55 insertions(+) diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.txt b/Documentation/devicetree/bindings/iommu/arm,smmu.txt index 7c71a6ed465a..8e3fe0594e3e 100644 --- a/Documentation/devicetree/bindings/iommu/arm,smmu.txt +++ b/Documentation/devicetree/bindings/iommu/arm,smmu.txt @@ -18,6 +18,7 @@ conditions. "arm,mmu-500" "cavium,smmu-v2" "qcom,-smmu-v2", "qcom,smmu-v2" + "altr,smmu-v2" depending on the particular implementation and/or the version of the architecture implemented. @@ -179,3 +180,27 @@ conditions. <&mmcc SMMU_MDP_AHB_CLK>; clock-names = "bus", "iface"; }; + + /* Stratix10 arm,smmu-v2 implementation */ + smmu5: iommu@fa000000 { + compatible = "altr,smmu-v2", "arm,mmu-500", + "arm,smmu-v2"; + reg = <0xfa000000 0x40000>; + #global-interrupts = <2>; + #iommu-cells = <1>; + clocks = <&clkmgr STRATIX10_L4_MAIN_CLK>; + clock-names = "masters"; + interrupt-parent = <&intc>; + interrupts = <0 128 4>, /* Global Secure Fault */ + <0 129 4>, /* Global Non-secure Fault */ + /* Non-secure Context Interrupts (32) */ + <0 138 4>, <0 139 4>, <0 140 4>, <0 141 4>, + <0 142 4>, <0 143 4>, <0 144 4>, <0 145 4>, + <0 146 4>, <0 147 4>, <0 148 4>, <0 149 4>, + <0 150 4>, <0 151 4>, <0 152 4>, <0 153 4>, + <0 154 4>, <0 155 4>, <0 156 4>, <0 157 4>, + <0 158 4>, <0 159 4>, <0 160 4>, <0 161 4>, + <0 162 4>, <0 163 4>, <0 164 4>, <0 165 4>, + <0 166 4>, <0 167 4>, <0 168 4>, <0 169 4>; + stream-match-mask = <0x7ff0>; + }; diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi index d033da401c26..e38ca86d48f6 100644 --- a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi +++ b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi @@ -137,6 +137,7 @@ reset-names = "stmmaceth", "stmmaceth-ocp"; clocks = <&clkmgr STRATIX10_EMAC0_CLK>; clock-names = "stmmaceth"; + iommus = <&smmu 1>; status = "disabled"; }; @@ -150,6 +151,7 @@ reset-names = "stmmaceth", "stmmaceth-ocp"; clocks = <&clkmgr STRATIX10_EMAC1_CLK>; clock-names = "stmmaceth"; + iommus = <&smmu 2>; status = "disabled"; }; @@ -163,6 +165,7 @@ reset-names = "stmmaceth", "stmmaceth-ocp"; clocks = <&clkmgr STRATIX10_EMAC2_CLK>; clock-names = "stmmaceth"; + iommus = <&smmu 3>; status = "disabled"; }; @@ -273,6 +276,7 @@ clocks = <&clkmgr STRATIX10_L4_MP_CLK>, <&clkmgr STRATIX10_SDMMC_CLK>; clock-names = "biu", "ciu"; + iommus = <&smmu 5>; status = "disabled"; }; @@ -307,6 +311,30 @@ altr,modrst-offset = <0x20>; }; + smmu: iommu@fa000000 { + compatible = "altr,smmu-v2", "arm,mmu-500", + "arm,smmu-v2"; + reg = <0xfa000000 0x40000>; + #global-interrupts = <2>; + #iommu-cells = <1>; + clocks = <&clkmgr STRATIX10_L4_MAIN_CLK>; + clock-names = "masters"; + interrupt-parent = <&intc>; + interrupts = <0 128 4>, /* Global Secure Fault */ + <0 129 4>, /* Global Non-secure Fault */ + /* Non-secure Context Interrupts (32) */ + <0 138 4>, <0 139 4>, <0 140 4>, <0 141 4>, + <0 142 4>, <0 143 4>, <0 144 4>, <0 145 4>, + <0 146 4>, <0 147 4>, <0 148 4>, <0 149 4>, + <0 150 4>, <0 151 4>, <0 152 4>, <0 153 4>, + <0 154 4>, <0 155 4>, <0 156 4>, <0 157 4>, + <0 158 4>, <0 159 4>, <0 160 4>, <0 161 4>, + <0 162 4>, <0 163 4>, <0 164 4>, <0 165 4>, + <0 166 4>, <0 167 4>, <0 168 4>, <0 169 4>; + stream-match-mask = <0x7ff0>; + status = "disabled"; + }; + spi0: spi@ffda4000 { compatible = "snps,dw-apb-ssi"; #address-cells = <1>; @@ -416,6 +444,7 @@ resets = <&rst USB0_RESET>, <&rst USB0_OCP_RESET>; reset-names = "dwc2", "dwc2-ecc"; clocks = <&clkmgr STRATIX10_USB_CLK>; + iommus = <&smmu 6>; status = "disabled"; }; @@ -428,6 +457,7 @@ resets = <&rst USB1_RESET>, <&rst USB1_OCP_RESET>; reset-names = "dwc2", "dwc2-ecc"; clocks = <&clkmgr STRATIX10_USB_CLK>; + iommus = <&smmu 7>; status = "disabled"; }; From patchwork Wed Jul 25 18:24:37 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thor Thayer X-Patchwork-Id: 10544565 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 53D58112E for ; Wed, 25 Jul 2018 18:23:09 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 40AC92A1BD for ; Wed, 25 Jul 2018 18:23:09 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 3156B2AA11; Wed, 25 Jul 2018 18:23:09 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id D7CB62A1BD for ; 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Wed, 25 Jul 2018 18:23:04 +0000 Received: from mga09.intel.com ([134.134.136.24]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1fiOQb-0006Lm-6c for linux-arm-kernel@lists.infradead.org; Wed, 25 Jul 2018 18:22:26 +0000 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 25 Jul 2018 11:22:14 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.51,401,1526367600"; d="scan'208";a="57133547" Received: from tthayer-hp-z620-workstation.an.intel.com ([10.122.105.144]) by fmsmga007.fm.intel.com with ESMTP; 25 Jul 2018 11:22:13 -0700 From: thor.thayer@linux.intel.com To: joro@8bytes.org, robh+dt@kernel.org, mark.rutland@arm.com, dinguyen@kernel.org, will.deacon@arm.com, robin.murphy@arm.com Subject: [PATCH 2/2] iommu/arm-smmu: Add support for Stratix10 smmu-v2 variant Date: Wed, 25 Jul 2018 13:24:37 -0500 Message-Id: <1532543077-8933-3-git-send-email-thor.thayer@linux.intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1532543077-8933-1-git-send-email-thor.thayer@linux.intel.com> References: <1532543077-8933-1-git-send-email-thor.thayer@linux.intel.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20180725_112225_307057_DCAE5FED X-CRM114-Status: GOOD ( 12.85 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, iommu@lists.linux-foundation.org, Thor Thayer , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Thor Thayer Add the clocks required for the Stratix10 SMMU. Define the clock names in the SMMU name array and add DT compatible matching element. Signed-off-by: Thor Thayer --- This patch is dependent on the patch series "iommu/arm-smmu: Add runtime pm/sleep support" (https://patchwork.ozlabs.org/cover/946160/) --- drivers/iommu/arm-smmu.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c index 7c69736a30f8..d46216b34a77 100644 --- a/drivers/iommu/arm-smmu.c +++ b/drivers/iommu/arm-smmu.c @@ -1983,6 +1983,17 @@ static const struct arm_smmu_match_data qcom_smmuv2 = { .num_clks = ARRAY_SIZE(qcom_smmuv2_clks), }; +static const char * const altr_smmuv2_clks[] = { + "masters" +}; + +static const struct arm_smmu_match_data altr_smmuv2 = { + .version = ARM_SMMU_V2, + .model = ARM_MMU500, + .clks = altr_smmuv2_clks, + .num_clks = ARRAY_SIZE(altr_smmuv2_clks), +}; + static const struct of_device_id arm_smmu_of_match[] = { { .compatible = "arm,smmu-v1", .data = &smmu_generic_v1 }, { .compatible = "arm,smmu-v2", .data = &smmu_generic_v2 }, @@ -1991,6 +2002,7 @@ static const struct of_device_id arm_smmu_of_match[] = { { .compatible = "arm,mmu-500", .data = &arm_mmu500 }, { .compatible = "cavium,smmu-v2", .data = &cavium_smmuv2 }, { .compatible = "qcom,smmu-v2", .data = &qcom_smmuv2 }, + { .compatible = "altr,smmu-v2", .data = &altr_smmuv2 }, { }, }; MODULE_DEVICE_TABLE(of, arm_smmu_of_match);