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It will register sensors for thermal framework and use device tree to bind cooling device. Signed-off-by: Yangtao Li --- MAINTAINERS | 7 + drivers/thermal/Kconfig | 14 ++ drivers/thermal/Makefile | 1 + drivers/thermal/sun8i_thermal.c | 399 ++++++++++++++++++++++++++++++++ 4 files changed, 421 insertions(+) create mode 100644 drivers/thermal/sun8i_thermal.c diff --git a/MAINTAINERS b/MAINTAINERS index 47800d32cfbc..89dc43f4064d 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -682,6 +682,13 @@ L: linux-crypto@vger.kernel.org S: Maintained F: drivers/crypto/sunxi-ss/ +ALLWINNER THERMAL DRIVER +M: Yangtao Li +L: linux-pm@vger.kernel.org +S: Maintained +F: Documentation/devicetree/bindings/thermal/sun8i-thermal.yaml +F: drivers/thermal/sun8i_thermal.c + ALLWINNER VPU DRIVER M: Maxime Ripard M: Paul Kocialkowski diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig index 9966364a6deb..f8b73b32b92d 100644 --- a/drivers/thermal/Kconfig +++ b/drivers/thermal/Kconfig @@ -262,6 +262,20 @@ config SPEAR_THERMAL Enable this to plug the SPEAr thermal sensor driver into the Linux thermal framework. +config SUN8I_THERMAL + tristate "Allwinner sun8i thermal driver" + depends on ARCH_SUNXI || COMPILE_TEST + depends on HAS_IOMEM + depends on NVMEM + depends on OF + depends on RESET_CONTROLLER + help + Support for the sun8i thermal sensor driver into the Linux thermal + framework. + + To compile this driver as a module, choose M here: the + module will be called sun8i-thermal. + config ROCKCHIP_THERMAL tristate "Rockchip thermal driver" depends on ARCH_ROCKCHIP || COMPILE_TEST diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile index 74a37c7f847a..fa6f8b206281 100644 --- a/drivers/thermal/Makefile +++ b/drivers/thermal/Makefile @@ -31,6 +31,7 @@ thermal_sys-$(CONFIG_DEVFREQ_THERMAL) += devfreq_cooling.o obj-y += broadcom/ obj-$(CONFIG_THERMAL_MMIO) += thermal_mmio.o obj-$(CONFIG_SPEAR_THERMAL) += spear_thermal.o +obj-$(CONFIG_SUN8I_THERMAL) += sun8i_thermal.o obj-$(CONFIG_ROCKCHIP_THERMAL) += rockchip_thermal.o obj-$(CONFIG_RCAR_THERMAL) += rcar_thermal.o obj-$(CONFIG_RCAR_GEN3_THERMAL) += rcar_gen3_thermal.o diff --git a/drivers/thermal/sun8i_thermal.c b/drivers/thermal/sun8i_thermal.c new file mode 100644 index 000000000000..2ce36fa3fec3 --- /dev/null +++ b/drivers/thermal/sun8i_thermal.c @@ -0,0 +1,399 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Thermal sensor driver for Allwinner SOC + * Copyright (C) 2019 Yangtao Li + * + * Based on the work of Icenowy Zheng + * Based on the work of Ondrej Jirman + * Based on the work of Josef Gajdusek + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define MAX_SENSOR_NUM 4 + +#define SUN50I_H6_SENSOR_NUM 2 +#define SUN50I_H6_OFFSET -2794 +#define SUN50I_H6_SCALE -67 + +#define FT_TEMP_MASK GENMASK(11, 0) +#define TEMP_CALIB_MASK GENMASK(11, 0) +#define TEMP_TO_REG 672 +#define CALIBRATE_DEFAULT 0x800 + +#define SUN50I_THS_CTRL0 0x00 +#define SUN50I_H6_THS_ENABLE 0x04 +#define SUN50I_H6_THS_PC 0x08 +#define SUN50I_H6_THS_DIC 0x10 +#define SUN50I_H6_THS_DIS 0x20 +#define SUN50I_H6_THS_MFC 0x30 +#define SUN50I_H6_THS_TEMP_CALIB 0xa0 +#define SUN50I_H6_THS_TEMP_DATA 0xc0 + +#define SUN50I_THS_CTRL0_T_ACQ(x) ((GENMASK(15, 0) & (x)) << 16) +#define SUN50I_THS_FILTER_EN BIT(2) +#define SUN50I_THS_FILTER_TYPE(x) (GENMASK(1, 0) & (x)) +#define SUN50I_H6_THS_PC_TEMP_PERIOD(x) ((GENMASK(19, 0) & (x)) << 12) +#define SUN50I_H6_THS_DATA_IRQ_STS(x) BIT(x) + +/* millidegree celsius */ +#define SUN50I_H6_FT_DEVIATION 7000 + +struct ths_device; + +struct tsensor { + struct ths_device *tmdev; + struct thermal_zone_device *tzd; + int id; +}; + +struct ths_device { + struct device *dev; + struct regmap *regmap; + struct reset_control *reset; + struct clk *bus_clk; + struct tsensor sensor[MAX_SENSOR_NUM]; +}; + +/* Temp Unit: millidegree Celsius */ +static int sun8i_ths_reg2temp(struct ths_device *tmdev, + int reg) +{ + return (reg + SUN50I_H6_OFFSET) * SUN50I_H6_SCALE; +} + +static int sun8i_ths_get_temp(void *data, int *temp) +{ + struct tsensor *s = data; + struct ths_device *tmdev = s->tmdev; + int val; + + regmap_read(tmdev->regmap, SUN50I_H6_THS_TEMP_DATA + + 0x4 * s->id, &val); + + /* ths have no data yet */ + if (!val) + return -EAGAIN; + + *temp = sun8i_ths_reg2temp(tmdev, val); + /* + * XX - According to the original sdk, there are some platforms(rarely) + * that add a fixed offset value after calculating the temperature + * value. We can't simply put it on the formula for calculating the + * temperature above, because the formula for calculating the + * temperature above is also used when the sensor is calibrated. If + * do this, the correct calibration formula is hard to know. + */ + *temp += SUN50I_H6_FT_DEVIATION; + + return 0; +} + +static const struct thermal_zone_of_device_ops ths_ops = { + .get_temp = sun8i_ths_get_temp, +}; + +static const struct regmap_config config = { + .reg_bits = 32, + .val_bits = 32, + .reg_stride = 4, + .fast_io = true, +}; + +static irqreturn_t sun50i_h6_irq_thread(int irq, void *data) +{ + struct ths_device *tmdev = data; + int i, state; + + regmap_read(tmdev->regmap, SUN50I_H6_THS_DIS, &state); + + for (i = 0; i < SUN50I_H6_SENSOR_NUM; i++) { + + if (state & SUN50I_H6_THS_DATA_IRQ_STS(i)) { + /* clear data irq pending */ + regmap_write(tmdev->regmap, SUN50I_H6_THS_DIS, + SUN50I_H6_THS_DATA_IRQ_STS(i)); + + thermal_zone_device_update(tmdev->sensor[i].tzd, + THERMAL_EVENT_UNSPECIFIED); + } + } + + return IRQ_HANDLED; +} + +static int sun50i_ths_calibrate(struct ths_device *tmdev) +{ + struct nvmem_cell *calcell; + struct device *dev = tmdev->dev; + u16 *caldata; + size_t callen; + int ft_temp; + int i, ret = 0; + + calcell = devm_nvmem_cell_get(dev, "calib"); + if (IS_ERR(calcell)) { + if (PTR_ERR(calcell) == -EPROBE_DEFER) + return -EPROBE_DEFER; + /* + * Even if the external calibration data stored in sid is + * not accessible, the THS hardware can still work, although + * the data won't be so accurate. + * + * The default value of calibration register is 0x800 for + * every sensor, and the calibration value is usually 0x7xx + * or 0x8xx, so they won't be away from the default value + * for a lot. + * + * So here we do not return error if the calibartion data is + * not available, except the probe needs deferring. + */ + goto out; + } + + caldata = nvmem_cell_read(calcell, &callen); + if (IS_ERR(caldata)) { + ret = PTR_ERR(caldata); + goto out; + } + + if (!caldata[0] || callen < 2 + 2 * SUN50I_H6_SENSOR_NUM) { + ret = -EINVAL; + goto out_free; + } + + /* + * efuse layout: + * + * 0 11 16 32 + * +-------+-------+-------+ + * |temp| |sensor0|sensor1| + * +-------+-------+-------+ + * + * The calibration data on the H6 is the ambient temperature and + * sensor values that are filled during the factory test stage. + * + * The unit of stored FT temperature is 0.1 degreee celusis. + * Through the stored ambient temperature and the data read + * by the sensor, after a certain calculation, the calibration + * value to be compensated can be obtained. + */ + ft_temp = caldata[0] & FT_TEMP_MASK; + + for (i = 0; i < SUN50I_H6_SENSOR_NUM; i++) { + int reg = (int)caldata[i + 1]; + int sensor_temp = sun8i_ths_reg2temp(tmdev, reg); + int delta, cdata, offset; + + /* + * To calculate the calibration value: + * + * X(in Celsius) = Ts - ft_temp + * delta = X * 10000 / TEMP_TO_REG + * cdata = CALIBRATE_DEFAULT - delta + * + * cdata: calibration value + */ + delta = (sensor_temp - ft_temp * 100) * 10 / TEMP_TO_REG; + cdata = CALIBRATE_DEFAULT - delta; + if (cdata & ~TEMP_CALIB_MASK) { + /* + * Calibration value more than 12-bit, but calibration + * register is 12-bit. In this case, ths hardware can + * still work without calibration, although the data + * won't be so accurate. + */ + dev_warn(dev, "sensor%d is not calibrated.\n", i); + + continue; + } + + offset = (i % 2) << 4; + regmap_update_bits(tmdev->regmap, + SUN50I_H6_THS_TEMP_CALIB + ((i >> 1) * 4), + 0xfff << offset, + cdata << offset); + } + +out_free: + kfree(caldata); +out: + return ret; +} + +static int sun8i_ths_resource_init(struct ths_device *tmdev) +{ + struct device *dev = tmdev->dev; + struct platform_device *pdev = to_platform_device(dev); + struct resource *mem; + void __iomem *base; + int ret; + + mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); + base = devm_ioremap_resource(dev, mem); + if (IS_ERR(base)) + return PTR_ERR(base); + + tmdev->regmap = devm_regmap_init_mmio(dev, base, &config); + if (IS_ERR(tmdev->regmap)) + return PTR_ERR(tmdev->regmap); + + tmdev->reset = devm_reset_control_get(dev, 0); + if (IS_ERR(tmdev->reset)) + return PTR_ERR(tmdev->reset); + + tmdev->bus_clk = devm_clk_get(&pdev->dev, "bus"); + if (IS_ERR(tmdev->bus_clk)) + return PTR_ERR(tmdev->bus_clk); + + ret = reset_control_deassert(tmdev->reset); + if (ret) + return ret; + + ret = clk_prepare_enable(tmdev->bus_clk); + if (ret) + goto assert_reset; + + ret = sun50i_ths_calibrate(tmdev); + if (ret) + goto bus_disable; + + return 0; + +bus_disable: + clk_disable_unprepare(tmdev->bus_clk); +assert_reset: + reset_control_assert(tmdev->reset); + + return ret; +} + +static int sun50i_h6_thermal_init(struct ths_device *tmdev) +{ + int val; + + /* + * clkin = 24MHz + * T acquire = clkin / (x + 1) + * = 20us + */ + regmap_write(tmdev->regmap, SUN50I_THS_CTRL0, + SUN50I_THS_CTRL0_T_ACQ(479)); + /* average over 4 samples */ + regmap_write(tmdev->regmap, SUN50I_H6_THS_MFC, + SUN50I_THS_FILTER_EN | + SUN50I_THS_FILTER_TYPE(1)); + /* period = (x + 1) * 4096 / clkin; ~10ms */ + regmap_write(tmdev->regmap, SUN50I_H6_THS_PC, + SUN50I_H6_THS_PC_TEMP_PERIOD(58)); + /* enable sensor */ + val = GENMASK(SUN50I_H6_SENSOR_NUM - 1, 0); + regmap_write(tmdev->regmap, SUN50I_H6_THS_ENABLE, val); + /* thermal data interrupt enable */ + val = GENMASK(SUN50I_H6_SENSOR_NUM - 1, 0); + regmap_write(tmdev->regmap, SUN50I_H6_THS_DIC, val); + + return 0; +} + +static int sun8i_ths_register(struct ths_device *tmdev) +{ + struct thermal_zone_device *tzd; + int i; + + for (i = 0; i < SUN50I_H6_SENSOR_NUM; i++) { + tmdev->sensor[i].tmdev = tmdev; + tmdev->sensor[i].id = i; + tmdev->sensor[i].tzd = + devm_thermal_zone_of_sensor_register(tmdev->dev, + i, + &tmdev->sensor[i], + &ths_ops); + if (IS_ERR(tmdev->sensor[i].tzd)) + return PTR_ERR(tzd); + } + + return 0; +} + +static int sun8i_ths_probe(struct platform_device *pdev) +{ + struct ths_device *tmdev; + struct device *dev = &pdev->dev; + int ret, irq; + + tmdev = devm_kzalloc(dev, sizeof(*tmdev), GFP_KERNEL); + if (!tmdev) + return -ENOMEM; + + tmdev->dev = dev; + platform_set_drvdata(pdev, tmdev); + + ret = sun8i_ths_resource_init(tmdev); + if (ret) + return ret; + + irq = platform_get_irq(pdev, 0); + if (irq < 0) + return irq; + + ret = sun50i_h6_thermal_init(tmdev); + if (ret) + return ret; + + ret = sun8i_ths_register(tmdev); + if (ret) + return ret; + + /* + * Avoid entering the interrupt handler, the thermal device is not + * registered yet, we deffer the registration of the interrupt to + * the end. + */ + ret = devm_request_threaded_irq(dev, irq, NULL, + sun50i_h6_irq_thread, + IRQF_ONESHOT, "ths", tmdev); + if (ret) + return ret; + + return ret; +} + +static int sun8i_ths_remove(struct platform_device *pdev) +{ + struct ths_device *tmdev = platform_get_drvdata(pdev); + + clk_disable_unprepare(tmdev->bus_clk); + reset_control_assert(tmdev->reset); + + return 0; +} + +static const struct of_device_id of_ths_match[] = { + { .compatible = "allwinner,sun50i-h6-ths"}, + { /* sentinel */ }, +}; +MODULE_DEVICE_TABLE(of, of_ths_match); + +static struct platform_driver ths_driver = { + .probe = sun8i_ths_probe, + .remove = sun8i_ths_remove, + .driver = { + .name = "sun8i-thermal", + .of_match_table = of_ths_match, + }, +}; +module_platform_driver(ths_driver); + +MODULE_DESCRIPTION("Thermal sensor driver for Allwinner SOC"); +MODULE_LICENSE("GPL v2"); From patchwork Sat Aug 10 05:28:13 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yangtao Li X-Patchwork-Id: 11088273 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 120D5746 for ; Sat, 10 Aug 2019 05:29:51 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id F3EE120223 for ; Sat, 10 Aug 2019 05:29:50 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id E731D22A68; Sat, 10 Aug 2019 05:29:50 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED,DKIM_VALID,FREEMAIL_FROM,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 9D88620223 for ; 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Signed-off-by: Yangtao Li --- .../bindings/thermal/sun8i-thermal.yaml | 79 +++++++++++++++++++ 1 file changed, 79 insertions(+) create mode 100644 Documentation/devicetree/bindings/thermal/sun8i-thermal.yaml diff --git a/Documentation/devicetree/bindings/thermal/sun8i-thermal.yaml b/Documentation/devicetree/bindings/thermal/sun8i-thermal.yaml new file mode 100644 index 000000000000..e0973199ba3c --- /dev/null +++ b/Documentation/devicetree/bindings/thermal/sun8i-thermal.yaml @@ -0,0 +1,79 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/thermal/sun8i-thermal.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Allwinner SUN8I Thermal Controller Device Tree Bindings + +maintainers: + - Yangtao Li + +description: |- + This describes the device tree binding for the Allwinner thermal + controller which measures the on-SoC temperatures. + +properties: + compatible: + enum: + - allwinner,sun50i-h6-ths + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + resets: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + const: bus + + "#thermal-sensor-cells": + const: 1 + + nvmem-cells: + description: ths calibrate data + + nvmem-cell-names: + const: calib + +required: + - compatible + - reg + - reset + - clocks + - clock-names + - interrupts + - "#thermal-sensor-cells" + +additionalProperties: false + +examples: + - | + ths: ths@5070400 { + compatible = "allwinner,sun50i-h6-ths"; + reg = <0x05070400 0x100>; + clocks = <&ccu CLK_BUS_THS>; + clock-names = "bus"; + resets = <&ccu RST_BUS_THS>; + interrupts = ; + nvmem-cells = <&tsen_calib>; + nvmem-cell-names = "calib"; + #thermal-sensor-cells = <1>; + }; + + sid: sid@3006000 { + compatible = "allwinner,sun50i-h6-sid"; + reg = <0x03006000 0x400>; + #address-cells = <1>; + #size-cells = <1>; + tsen_calib: calib@14 { + reg = <0x14 6>; + }; + }; +... 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Fri, 09 Aug 2019 22:29:20 -0700 (PDT) From: Yangtao Li To: rui.zhang@intel.com, edubezval@gmail.com, daniel.lezcano@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, maxime.ripard@bootlin.com, wens@csie.org, mchehab+samsung@kernel.org, davem@davemloft.net, gregkh@linuxfoundation.org, Jonathan.Cameron@huawei.com, nicolas.ferre@microchip.com Subject: [PATCH v5 03/18] thermal: fix indentation in makefile Date: Sat, 10 Aug 2019 05:28:14 +0000 Message-Id: <20190810052829.6032-4-tiny.windzz@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190810052829.6032-1-tiny.windzz@gmail.com> References: <20190810052829.6032-1-tiny.windzz@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190809_222921_871917_3AC32E56 X-CRM114-Status: UNSURE ( 9.49 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Yangtao Li , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pm@vger.kernel.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP To unify code style. Signed-off-by: Yangtao Li --- drivers/thermal/Makefile | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile index fa6f8b206281..d7eafb5ef8ef 100644 --- a/drivers/thermal/Makefile +++ b/drivers/thermal/Makefile @@ -5,7 +5,7 @@ obj-$(CONFIG_THERMAL) += thermal_sys.o thermal_sys-y += thermal_core.o thermal_sysfs.o \ - thermal_helpers.o + thermal_helpers.o # interface to/from other layers providing sensors thermal_sys-$(CONFIG_THERMAL_HWMON) += thermal_hwmon.o @@ -25,11 +25,11 @@ thermal_sys-$(CONFIG_CPU_THERMAL) += cpu_cooling.o thermal_sys-$(CONFIG_CLOCK_THERMAL) += clock_cooling.o # devfreq cooling -thermal_sys-$(CONFIG_DEVFREQ_THERMAL) += devfreq_cooling.o +thermal_sys-$(CONFIG_DEVFREQ_THERMAL) += devfreq_cooling.o # platform thermal drivers obj-y += broadcom/ -obj-$(CONFIG_THERMAL_MMIO) += thermal_mmio.o +obj-$(CONFIG_THERMAL_MMIO) += thermal_mmio.o obj-$(CONFIG_SPEAR_THERMAL) += spear_thermal.o obj-$(CONFIG_SUN8I_THERMAL) += sun8i_thermal.o obj-$(CONFIG_ROCKCHIP_THERMAL) += rockchip_thermal.o @@ -50,7 +50,7 @@ obj-$(CONFIG_TI_SOC_THERMAL) += ti-soc-thermal/ obj-y += st/ obj-$(CONFIG_QCOM_TSENS) += qcom/ obj-y += tegra/ -obj-$(CONFIG_HISI_THERMAL) += hisi_thermal.o +obj-$(CONFIG_HISI_THERMAL) += hisi_thermal.o obj-$(CONFIG_MTK_THERMAL) += mtk_thermal.o obj-$(CONFIG_GENERIC_ADC_THERMAL) += thermal-generic-adc.o obj-$(CONFIG_ZX2967_THERMAL) += zx2967_thermal.o From patchwork Sat Aug 10 05:28:15 2019 Content-Type: text/plain; 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So we need to do some work in order to support more soc. Signed-off-by: Yangtao Li --- drivers/thermal/sun8i_thermal.c | 28 ++++++++++++++++++++-------- 1 file changed, 20 insertions(+), 8 deletions(-) diff --git a/drivers/thermal/sun8i_thermal.c b/drivers/thermal/sun8i_thermal.c index 2ce36fa3fec3..e9c2acbaac74 100644 --- a/drivers/thermal/sun8i_thermal.c +++ b/drivers/thermal/sun8i_thermal.c @@ -22,7 +22,6 @@ #define MAX_SENSOR_NUM 4 -#define SUN50I_H6_SENSOR_NUM 2 #define SUN50I_H6_OFFSET -2794 #define SUN50I_H6_SCALE -67 @@ -57,7 +56,12 @@ struct tsensor { int id; }; +struct ths_thermal_chip { + int sensor_num; +}; + struct ths_device { + const struct ths_thermal_chip *chip; struct device *dev; struct regmap *regmap; struct reset_control *reset; @@ -117,7 +121,7 @@ static irqreturn_t sun50i_h6_irq_thread(int irq, void *data) regmap_read(tmdev->regmap, SUN50I_H6_THS_DIS, &state); - for (i = 0; i < SUN50I_H6_SENSOR_NUM; i++) { + for (i = 0; i < tmdev->chip->sensor_num; i++) { if (state & SUN50I_H6_THS_DATA_IRQ_STS(i)) { /* clear data irq pending */ @@ -167,7 +171,7 @@ static int sun50i_ths_calibrate(struct ths_device *tmdev) goto out; } - if (!caldata[0] || callen < 2 + 2 * SUN50I_H6_SENSOR_NUM) { + if (!caldata[0] || callen < 2 + 2 * tmdev->chip->sensor_num) { ret = -EINVAL; goto out_free; } @@ -190,7 +194,7 @@ static int sun50i_ths_calibrate(struct ths_device *tmdev) */ ft_temp = caldata[0] & FT_TEMP_MASK; - for (i = 0; i < SUN50I_H6_SENSOR_NUM; i++) { + for (i = 0; i < tmdev->chip->sensor_num; i++) { int reg = (int)caldata[i + 1]; int sensor_temp = sun8i_ths_reg2temp(tmdev, reg); int delta, cdata, offset; @@ -297,10 +301,10 @@ static int sun50i_h6_thermal_init(struct ths_device *tmdev) regmap_write(tmdev->regmap, SUN50I_H6_THS_PC, SUN50I_H6_THS_PC_TEMP_PERIOD(58)); /* enable sensor */ - val = GENMASK(SUN50I_H6_SENSOR_NUM - 1, 0); + val = GENMASK(tmdev->chip->sensor_num - 1, 0); regmap_write(tmdev->regmap, SUN50I_H6_THS_ENABLE, val); /* thermal data interrupt enable */ - val = GENMASK(SUN50I_H6_SENSOR_NUM - 1, 0); + val = GENMASK(tmdev->chip->sensor_num - 1, 0); regmap_write(tmdev->regmap, SUN50I_H6_THS_DIC, val); return 0; @@ -311,7 +315,7 @@ static int sun8i_ths_register(struct ths_device *tmdev) struct thermal_zone_device *tzd; int i; - for (i = 0; i < SUN50I_H6_SENSOR_NUM; i++) { + for (i = 0; i < tmdev->chip->sensor_num; i++) { tmdev->sensor[i].tmdev = tmdev; tmdev->sensor[i].id = i; tmdev->sensor[i].tzd = @@ -337,6 +341,10 @@ static int sun8i_ths_probe(struct platform_device *pdev) return -ENOMEM; tmdev->dev = dev; + tmdev->chip = of_device_get_match_data(&pdev->dev); + if (!tmdev->chip) + return -EINVAL; + platform_set_drvdata(pdev, tmdev); ret = sun8i_ths_resource_init(tmdev); @@ -379,8 +387,12 @@ static int sun8i_ths_remove(struct platform_device *pdev) return 0; } +static const struct ths_thermal_chip sun50i_h6_ths = { + .sensor_num = 2, +}; + static const struct of_device_id of_ths_match[] = { - { .compatible = "allwinner,sun50i-h6-ths"}, + { .compatible = "allwinner,sun50i-h6-ths", .data = &sun50i_h6_ths }, { /* sentinel */ }, }; MODULE_DEVICE_TABLE(of, of_ths_match); From patchwork Sat Aug 10 05:28:16 2019 Content-Type: text/plain; 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h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=p+GfeX4Ueh4qeynfnY+nHD9xlpPk1TsHoPAB9+k1TQY=; b=fk2+dFKVi7y5ydIdJ42Nu6h9OV68F9C8czKZOWso8TN5PFojyiZNXBa4NF/a8htq4x 5jVFKzlV/WbcfrSu6TXip56zvbPsmpwCxaNdnA6Sd8z+4sDrqUEKXxai7pmGpHp+xOpW VDhF0rffMN7xQbzUkQBzxNLQqv9mi6di3J+N5O5p5eDH0ij1z1vn1HY1S5ouwgDuepX4 xtmzBM/qZSl7PgTYpM4DmGWkgj1hpsUMHqepeN6LfOmnjPORY+djOIEGWUwttc3WD1XH n7xAgnAfcUJC0COfWQJS4b/r9BJcefgbEe/WEU/IeQ6usWEvAG3V3E6EaXhz+WVEwqSF Re/g== X-Gm-Message-State: APjAAAVLzqqcZEuGUtLeSHta15zWKiiiWyQ0x4txjhLNVnr0zUU7SMl9 5JCnTI3PxTe1565C6bwdElk= X-Google-Smtp-Source: APXvYqxxpWtEqoQhAm3ka4Zp+gt5YbokpRaK82eECedhofkwnz5TtrsipKnUkmCv/rhm//nnApa9bA== X-Received: by 2002:aa7:8d98:: with SMTP id i24mr25669455pfr.199.1565414970942; Fri, 09 Aug 2019 22:29:30 -0700 (PDT) Received: from localhost ([202.182.106.211]) by smtp.gmail.com with ESMTPSA id r6sm17958624pjb.22.2019.08.09.22.29.29 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 09 Aug 2019 22:29:30 -0700 (PDT) From: Yangtao Li To: rui.zhang@intel.com, edubezval@gmail.com, daniel.lezcano@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, maxime.ripard@bootlin.com, wens@csie.org, mchehab+samsung@kernel.org, davem@davemloft.net, gregkh@linuxfoundation.org, Jonathan.Cameron@huawei.com, nicolas.ferre@microchip.com Subject: [PATCH v5 05/18] thermal: sun8i: rework for sun8i_ths_get_temp() Date: Sat, 10 Aug 2019 05:28:16 +0000 Message-Id: <20190810052829.6032-6-tiny.windzz@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190810052829.6032-1-tiny.windzz@gmail.com> References: <20190810052829.6032-1-tiny.windzz@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190809_222931_859333_99BC0AE1 X-CRM114-Status: GOOD ( 14.86 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Yangtao Li , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pm@vger.kernel.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP For different socs, the way they get and calculate the temperature is roughly the same. So get the difference from device compatible. Difference point: 1) temperature calculation formula parameters 2) ths data register start address Signed-off-by: Yangtao Li --- drivers/thermal/sun8i_thermal.c | 17 +++++++++++------ 1 file changed, 11 insertions(+), 6 deletions(-) diff --git a/drivers/thermal/sun8i_thermal.c b/drivers/thermal/sun8i_thermal.c index e9c2acbaac74..f338fa25b98e 100644 --- a/drivers/thermal/sun8i_thermal.c +++ b/drivers/thermal/sun8i_thermal.c @@ -22,9 +22,6 @@ #define MAX_SENSOR_NUM 4 -#define SUN50I_H6_OFFSET -2794 -#define SUN50I_H6_SCALE -67 - #define FT_TEMP_MASK GENMASK(11, 0) #define TEMP_CALIB_MASK GENMASK(11, 0) #define TEMP_TO_REG 672 @@ -58,6 +55,10 @@ struct tsensor { struct ths_thermal_chip { int sensor_num; + int offset; + int scale; + int ft_deviation; + int temp_data_base; }; struct ths_device { @@ -73,7 +74,7 @@ struct ths_device { static int sun8i_ths_reg2temp(struct ths_device *tmdev, int reg) { - return (reg + SUN50I_H6_OFFSET) * SUN50I_H6_SCALE; + return (reg + tmdev->chip->offset) * tmdev->chip->scale; } static int sun8i_ths_get_temp(void *data, int *temp) @@ -82,7 +83,7 @@ static int sun8i_ths_get_temp(void *data, int *temp) struct ths_device *tmdev = s->tmdev; int val; - regmap_read(tmdev->regmap, SUN50I_H6_THS_TEMP_DATA + + regmap_read(tmdev->regmap, tmdev->chip->temp_data_base + 0x4 * s->id, &val); /* ths have no data yet */ @@ -98,7 +99,7 @@ static int sun8i_ths_get_temp(void *data, int *temp) * temperature above is also used when the sensor is calibrated. If * do this, the correct calibration formula is hard to know. */ - *temp += SUN50I_H6_FT_DEVIATION; + *temp += tmdev->chip->ft_deviation; return 0; } @@ -389,6 +390,10 @@ static int sun8i_ths_remove(struct platform_device *pdev) static const struct ths_thermal_chip sun50i_h6_ths = { .sensor_num = 2, + .offset = -2794, + .scale = -67, + .ft_deviation = SUN50I_H6_FT_DEVIATION, + .temp_data_base = SUN50I_H6_THS_TEMP_DATA, }; static const struct of_device_id of_ths_match[] = { From patchwork Sat Aug 10 05:28:17 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yangtao Li X-Patchwork-Id: 11088301 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 846EA14E5 for ; Sat, 10 Aug 2019 05:31:05 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 717CD20223 for ; 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Fri, 09 Aug 2019 22:29:37 -0700 (PDT) Received: from localhost ([202.182.106.211]) by smtp.gmail.com with ESMTPSA id v14sm106463565pfm.164.2019.08.09.22.29.36 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 09 Aug 2019 22:29:36 -0700 (PDT) From: Yangtao Li To: rui.zhang@intel.com, edubezval@gmail.com, daniel.lezcano@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, maxime.ripard@bootlin.com, wens@csie.org, mchehab+samsung@kernel.org, davem@davemloft.net, gregkh@linuxfoundation.org, Jonathan.Cameron@huawei.com, nicolas.ferre@microchip.com Subject: [PATCH v5 06/18] thermal: sun8i: get ths init func from device compatible Date: Sat, 10 Aug 2019 05:28:17 +0000 Message-Id: <20190810052829.6032-7-tiny.windzz@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190810052829.6032-1-tiny.windzz@gmail.com> References: <20190810052829.6032-1-tiny.windzz@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190809_222938_380728_EABAED86 X-CRM114-Status: GOOD ( 12.96 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Yangtao Li , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pm@vger.kernel.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP There are some differences in register initialization for different socs. So we get different initialization functions from device compatible. Signed-off-by: Yangtao Li --- drivers/thermal/sun8i_thermal.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/thermal/sun8i_thermal.c b/drivers/thermal/sun8i_thermal.c index f338fa25b98e..ad877b54f58e 100644 --- a/drivers/thermal/sun8i_thermal.c +++ b/drivers/thermal/sun8i_thermal.c @@ -59,6 +59,7 @@ struct ths_thermal_chip { int scale; int ft_deviation; int temp_data_base; + int (*init)(struct ths_device *tmdev); }; struct ths_device { @@ -356,7 +357,7 @@ static int sun8i_ths_probe(struct platform_device *pdev) if (irq < 0) return irq; - ret = sun50i_h6_thermal_init(tmdev); + ret = tmdev->chip->init(tmdev); if (ret) return ret; @@ -394,6 +395,7 @@ static const struct ths_thermal_chip sun50i_h6_ths = { .scale = -67, .ft_deviation = SUN50I_H6_FT_DEVIATION, .temp_data_base = SUN50I_H6_THS_TEMP_DATA, + .init = sun50i_h6_thermal_init, }; static const struct of_device_id of_ths_match[] = { From patchwork Sat Aug 10 05:28:18 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yangtao Li X-Patchwork-Id: 11088303 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 20B4214E5 for ; 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Fri, 09 Aug 2019 22:29:41 -0700 (PDT) Received: from localhost ([202.182.106.211]) by smtp.gmail.com with ESMTPSA id 185sm100125591pfd.125.2019.08.09.22.29.40 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 09 Aug 2019 22:29:41 -0700 (PDT) From: Yangtao Li To: rui.zhang@intel.com, edubezval@gmail.com, daniel.lezcano@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, maxime.ripard@bootlin.com, wens@csie.org, mchehab+samsung@kernel.org, davem@davemloft.net, gregkh@linuxfoundation.org, Jonathan.Cameron@huawei.com, nicolas.ferre@microchip.com Subject: [PATCH v5 07/18] thermal: sun8i: rework for ths irq handler func Date: Sat, 10 Aug 2019 05:28:18 +0000 Message-Id: <20190810052829.6032-8-tiny.windzz@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190810052829.6032-1-tiny.windzz@gmail.com> References: <20190810052829.6032-1-tiny.windzz@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190809_222942_253302_96C48ADA X-CRM114-Status: GOOD ( 14.05 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Yangtao Li , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pm@vger.kernel.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Here, we do something to prepare for the subsequent support of multiple platforms. 1) rename sun50i_h6_irq_thread to sun8i_irq_thread, because this function should be suitable for all platforms. 2) introduce irq_ack callback to mask interrupt register differences. Signed-off-by: Yangtao Li --- drivers/thermal/sun8i_thermal.c | 27 ++++++++++++++++++++------- 1 file changed, 20 insertions(+), 7 deletions(-) diff --git a/drivers/thermal/sun8i_thermal.c b/drivers/thermal/sun8i_thermal.c index ad877b54f58e..b934bc81eba7 100644 --- a/drivers/thermal/sun8i_thermal.c +++ b/drivers/thermal/sun8i_thermal.c @@ -60,6 +60,7 @@ struct ths_thermal_chip { int ft_deviation; int temp_data_base; int (*init)(struct ths_device *tmdev); + int (*irq_ack)(struct ths_device *tmdev); }; struct ths_device { @@ -116,23 +117,34 @@ static const struct regmap_config config = { .fast_io = true, }; -static irqreturn_t sun50i_h6_irq_thread(int irq, void *data) +static int sun50i_h6_irq_ack(struct ths_device *tmdev) { - struct ths_device *tmdev = data; - int i, state; + int i, state, ret = 0; regmap_read(tmdev->regmap, SUN50I_H6_THS_DIS, &state); for (i = 0; i < tmdev->chip->sensor_num; i++) { - if (state & SUN50I_H6_THS_DATA_IRQ_STS(i)) { - /* clear data irq pending */ regmap_write(tmdev->regmap, SUN50I_H6_THS_DIS, SUN50I_H6_THS_DATA_IRQ_STS(i)); + ret |= BIT(i); + } + } + + return ret; +} +static irqreturn_t sun8i_irq_thread(int irq, void *data) +{ + struct ths_device *tmdev = data; + int i, state; + + state = tmdev->chip->irq_ack(tmdev); + + for (i = 0; i < tmdev->chip->sensor_num; i++) { + if (state & BIT(i)) thermal_zone_device_update(tmdev->sensor[i].tzd, THERMAL_EVENT_UNSPECIFIED); - } } return IRQ_HANDLED; @@ -371,7 +383,7 @@ static int sun8i_ths_probe(struct platform_device *pdev) * the end. */ ret = devm_request_threaded_irq(dev, irq, NULL, - sun50i_h6_irq_thread, + sun8i_irq_thread, IRQF_ONESHOT, "ths", tmdev); if (ret) return ret; @@ -396,6 +408,7 @@ static const struct ths_thermal_chip sun50i_h6_ths = { .ft_deviation = SUN50I_H6_FT_DEVIATION, .temp_data_base = SUN50I_H6_THS_TEMP_DATA, .init = sun50i_h6_thermal_init, + .irq_ack = sun50i_h6_irq_ack, }; static const struct of_device_id of_ths_match[] = { From patchwork Sat Aug 10 05:28:19 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yangtao Li X-Patchwork-Id: 11088305 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 4C04B1399 for ; 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Fri, 09 Aug 2019 22:29:45 -0700 (PDT) Received: from localhost ([202.182.106.211]) by smtp.gmail.com with ESMTPSA id j20sm95375157pfr.113.2019.08.09.22.29.44 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 09 Aug 2019 22:29:45 -0700 (PDT) From: Yangtao Li To: rui.zhang@intel.com, edubezval@gmail.com, daniel.lezcano@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, maxime.ripard@bootlin.com, wens@csie.org, mchehab+samsung@kernel.org, davem@davemloft.net, gregkh@linuxfoundation.org, Jonathan.Cameron@huawei.com, nicolas.ferre@microchip.com Subject: [PATCH v5 08/18] thermal: sun8i: support mod clocks Date: Sat, 10 Aug 2019 05:28:19 +0000 Message-Id: <20190810052829.6032-9-tiny.windzz@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190810052829.6032-1-tiny.windzz@gmail.com> References: <20190810052829.6032-1-tiny.windzz@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190809_222946_508947_50FD540E X-CRM114-Status: GOOD ( 13.51 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Yangtao Li , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pm@vger.kernel.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP H3 has extra clock, so introduce something in ths_thermal_chip/ths_device and adds the process of the clock. This is pre-work for supprt it. Signed-off-by: Yangtao Li --- drivers/thermal/sun8i_thermal.c | 17 ++++++++++++++++- 1 file changed, 16 insertions(+), 1 deletion(-) diff --git a/drivers/thermal/sun8i_thermal.c b/drivers/thermal/sun8i_thermal.c index b934bc81eba7..6f4294c2aba7 100644 --- a/drivers/thermal/sun8i_thermal.c +++ b/drivers/thermal/sun8i_thermal.c @@ -54,6 +54,7 @@ struct tsensor { }; struct ths_thermal_chip { + bool has_mod_clk; int sensor_num; int offset; int scale; @@ -69,6 +70,7 @@ struct ths_device { struct regmap *regmap; struct reset_control *reset; struct clk *bus_clk; + struct clk *mod_clk; struct tsensor sensor[MAX_SENSOR_NUM]; }; @@ -274,6 +276,12 @@ static int sun8i_ths_resource_init(struct ths_device *tmdev) if (IS_ERR(tmdev->bus_clk)) return PTR_ERR(tmdev->bus_clk); + if (tmdev->chip->has_mod_clk) { + tmdev->mod_clk = devm_clk_get(&pdev->dev, "mod"); + if (IS_ERR(tmdev->mod_clk)) + return PTR_ERR(tmdev->mod_clk); + } + ret = reset_control_deassert(tmdev->reset); if (ret) return ret; @@ -282,12 +290,18 @@ static int sun8i_ths_resource_init(struct ths_device *tmdev) if (ret) goto assert_reset; - ret = sun50i_ths_calibrate(tmdev); + ret = clk_prepare_enable(tmdev->mod_clk); if (ret) goto bus_disable; + ret = sun50i_ths_calibrate(tmdev); + if (ret) + goto mod_disable; + return 0; +mod_disable: + clk_disable_unprepare(tmdev->mod_clk); bus_disable: clk_disable_unprepare(tmdev->bus_clk); assert_reset: @@ -395,6 +409,7 @@ static int sun8i_ths_remove(struct platform_device *pdev) { struct ths_device *tmdev = platform_get_drvdata(pdev); + clk_disable_unprepare(tmdev->mod_clk); clk_disable_unprepare(tmdev->bus_clk); reset_control_assert(tmdev->reset); From patchwork Sat Aug 10 05:28:20 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yangtao Li X-Patchwork-Id: 11088307 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 390D11399 for ; Sat, 10 Aug 2019 05:31:58 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 26192212DB for ; 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Fri, 09 Aug 2019 22:29:50 -0700 (PDT) Received: from localhost ([202.182.106.211]) by smtp.gmail.com with ESMTPSA id i7sm8395873pjk.24.2019.08.09.22.29.49 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 09 Aug 2019 22:29:49 -0700 (PDT) From: Yangtao Li To: rui.zhang@intel.com, edubezval@gmail.com, daniel.lezcano@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, maxime.ripard@bootlin.com, wens@csie.org, mchehab+samsung@kernel.org, davem@davemloft.net, gregkh@linuxfoundation.org, Jonathan.Cameron@huawei.com, nicolas.ferre@microchip.com Subject: [PATCH v5 09/18] thermal: sun8i: rework for ths calibrate func Date: Sat, 10 Aug 2019 05:28:20 +0000 Message-Id: <20190810052829.6032-10-tiny.windzz@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190810052829.6032-1-tiny.windzz@gmail.com> References: <20190810052829.6032-1-tiny.windzz@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190809_222951_451403_232424F9 X-CRM114-Status: GOOD ( 19.17 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Yangtao Li , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pm@vger.kernel.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Here, we do something to prepare for the subsequent support of multiple platforms. 1) rename sun50i_ths_calibrate to sun8i_ths_calibrate, because this function should be suitable for all platforms now. 2) introduce calibrate callback to mask calibration method differences. Signed-off-by: Yangtao Li --- drivers/thermal/sun8i_thermal.c | 86 ++++++++++++++++++--------------- 1 file changed, 48 insertions(+), 38 deletions(-) diff --git a/drivers/thermal/sun8i_thermal.c b/drivers/thermal/sun8i_thermal.c index 6f4294c2aba7..47c20c4c69e7 100644 --- a/drivers/thermal/sun8i_thermal.c +++ b/drivers/thermal/sun8i_thermal.c @@ -60,6 +60,8 @@ struct ths_thermal_chip { int scale; int ft_deviation; int temp_data_base; + int (*calibrate)(struct ths_device *tmdev, + u16 *caldata, int callen); int (*init)(struct ths_device *tmdev); int (*irq_ack)(struct ths_device *tmdev); }; @@ -152,45 +154,14 @@ static irqreturn_t sun8i_irq_thread(int irq, void *data) return IRQ_HANDLED; } -static int sun50i_ths_calibrate(struct ths_device *tmdev) +static int sun50i_h6_ths_calibrate(struct ths_device *tmdev, + u16 *caldata, int callen) { - struct nvmem_cell *calcell; struct device *dev = tmdev->dev; - u16 *caldata; - size_t callen; - int ft_temp; - int i, ret = 0; - - calcell = devm_nvmem_cell_get(dev, "calib"); - if (IS_ERR(calcell)) { - if (PTR_ERR(calcell) == -EPROBE_DEFER) - return -EPROBE_DEFER; - /* - * Even if the external calibration data stored in sid is - * not accessible, the THS hardware can still work, although - * the data won't be so accurate. - * - * The default value of calibration register is 0x800 for - * every sensor, and the calibration value is usually 0x7xx - * or 0x8xx, so they won't be away from the default value - * for a lot. - * - * So here we do not return error if the calibartion data is - * not available, except the probe needs deferring. - */ - goto out; - } + int i, ft_temp; - caldata = nvmem_cell_read(calcell, &callen); - if (IS_ERR(caldata)) { - ret = PTR_ERR(caldata); - goto out; - } - - if (!caldata[0] || callen < 2 + 2 * tmdev->chip->sensor_num) { - ret = -EINVAL; - goto out_free; - } + if (!caldata[0] || callen < 2 + 2 * tmdev->chip->sensor_num) + return -EINVAL; /* * efuse layout: @@ -245,7 +216,45 @@ static int sun50i_ths_calibrate(struct ths_device *tmdev) cdata << offset); } -out_free: + return 0; +} + +static int sun8i_ths_calibrate(struct ths_device *tmdev) +{ + struct nvmem_cell *calcell; + struct device *dev = tmdev->dev; + u16 *caldata; + size_t callen; + int ret = 0; + + calcell = devm_nvmem_cell_get(dev, "calib"); + if (IS_ERR(calcell)) { + if (PTR_ERR(calcell) == -EPROBE_DEFER) + return -EPROBE_DEFER; + /* + * Even if the external calibration data stored in sid is + * not accessible, the THS hardware can still work, although + * the data won't be so accurate. + * + * The default value of calibration register is 0x800 for + * every sensor, and the calibration value is usually 0x7xx + * or 0x8xx, so they won't be away from the default value + * for a lot. + * + * So here we do not return error if the calibartion data is + * not available, except the probe needs deferring. + */ + goto out; + } + + caldata = nvmem_cell_read(calcell, &callen); + if (IS_ERR(caldata)) { + ret = PTR_ERR(caldata); + goto out; + } + + tmdev->chip->calibrate(tmdev, caldata, callen); + kfree(caldata); out: return ret; @@ -294,7 +303,7 @@ static int sun8i_ths_resource_init(struct ths_device *tmdev) if (ret) goto bus_disable; - ret = sun50i_ths_calibrate(tmdev); + ret = sun8i_ths_calibrate(tmdev); if (ret) goto mod_disable; @@ -422,6 +431,7 @@ static const struct ths_thermal_chip sun50i_h6_ths = { .scale = -67, .ft_deviation = SUN50I_H6_FT_DEVIATION, .temp_data_base = SUN50I_H6_THS_TEMP_DATA, + .calibrate = sun50i_h6_ths_calibrate, .init = sun50i_h6_thermal_init, .irq_ack = sun50i_h6_irq_ack, }; From patchwork Sat Aug 10 05:28:21 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yangtao Li X-Patchwork-Id: 11088309 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D7BC214F7 for ; Sat, 10 Aug 2019 05:32:14 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id C6316212DB for ; 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Fri, 09 Aug 2019 22:29:54 -0700 (PDT) Received: from localhost ([202.182.106.211]) by smtp.gmail.com with ESMTPSA id s24sm62023523pgm.3.2019.08.09.22.29.53 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 09 Aug 2019 22:29:53 -0700 (PDT) From: Yangtao Li To: rui.zhang@intel.com, edubezval@gmail.com, daniel.lezcano@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, maxime.ripard@bootlin.com, wens@csie.org, mchehab+samsung@kernel.org, davem@davemloft.net, gregkh@linuxfoundation.org, Jonathan.Cameron@huawei.com, nicolas.ferre@microchip.com Subject: [PATCH v5 10/18] dt-bindings: thermal: add binding document for h3 thermal controller Date: Sat, 10 Aug 2019 05:28:21 +0000 Message-Id: <20190810052829.6032-11-tiny.windzz@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190810052829.6032-1-tiny.windzz@gmail.com> References: <20190810052829.6032-1-tiny.windzz@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190809_222955_118486_FF743E8C X-CRM114-Status: GOOD ( 11.62 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Yangtao Li , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pm@vger.kernel.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds binding document for allwinner h3 thermal controller. Signed-off-by: Yangtao Li Reviewed-by: Rob Herring --- .../bindings/thermal/sun8i-thermal.yaml | 81 ++++++++++++++++++- 1 file changed, 78 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/thermal/sun8i-thermal.yaml b/Documentation/devicetree/bindings/thermal/sun8i-thermal.yaml index e0973199ba3c..6624cf6b1ce8 100644 --- a/Documentation/devicetree/bindings/thermal/sun8i-thermal.yaml +++ b/Documentation/devicetree/bindings/thermal/sun8i-thermal.yaml @@ -16,6 +16,7 @@ description: |- properties: compatible: enum: + - allwinner,sun8i-h3-ths - allwinner,sun50i-h6-ths reg: @@ -28,13 +29,21 @@ properties: maxItems: 1 clocks: - maxItems: 1 + minItems: 1 + maxItems: 2 + items: + - description: ths bus clock + - description: ths mod clock clock-names: - const: bus + minItems: 1 + maxItems: 2 + items: + - const: bus + - const: mod "#thermal-sensor-cells": - const: 1 + enum: [ 0, 1 ] nvmem-cells: description: ths calibrate data @@ -51,9 +60,75 @@ required: - interrupts - "#thermal-sensor-cells" +allOf: + - if: + properties: + compatible: + contains: + const: allwinner,sun50i-h6-ths + + then: + properties: + clocks: + minItems: 1 + maxItems: 1 + + clock-names: + minItems: 1 + maxItems: 1 + + else: + properties: + clocks: + minItems: 2 + maxItems: 2 + + clock-names: + minItems: 2 + maxItems: 2 + + - if: + properties: + compatible: + contains: + const: allwinner,sun8i-h3-ths + + then: + properties: + "#thermal-sensor-cells": + const: 0 + + else: + properties: + "#thermal-sensor-cells": + const: 1 + additionalProperties: false examples: + - | + ths: ths@1c25000 { + compatible = "allwinner,sun8i-h3-ths"; + reg = <0x01c25000 0x400>; + clocks = <&ccu CLK_BUS_THS>, <&ccu CLK_THS>; + clock-names = "bus", "mod"; + resets = <&ccu RST_BUS_THS>; + interrupts = ; + nvmem-cells = <&tsen_calib>; + nvmem-cell-names = "calib"; + #thermal-sensor-cells = <0>; + }; + + sid: sid@1c14000 { + compatible = "allwinner,sun8i-h3-sid"; + reg = <0x1c14000 0x400>; + #address-cells = <1>; + #size-cells = <1>; + tsen_calib: calib@34 { + reg = <0x34 2>; + }; + }; + - | ths: ths@5070400 { compatible = "allwinner,sun50i-h6-ths"; From patchwork Sat Aug 10 05:28:22 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yangtao Li X-Patchwork-Id: 11088311 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 755AA1399 for ; Sat, 10 Aug 2019 05:32:32 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 62CC5212DB for ; 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Fri, 09 Aug 2019 22:29:58 -0700 (PDT) Received: from localhost ([202.182.106.211]) by smtp.gmail.com with ESMTPSA id c12sm7848842pfc.22.2019.08.09.22.29.57 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 09 Aug 2019 22:29:57 -0700 (PDT) From: Yangtao Li To: rui.zhang@intel.com, edubezval@gmail.com, daniel.lezcano@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, maxime.ripard@bootlin.com, wens@csie.org, mchehab+samsung@kernel.org, davem@davemloft.net, gregkh@linuxfoundation.org, Jonathan.Cameron@huawei.com, nicolas.ferre@microchip.com Subject: [PATCH v5 11/18] thermal: sun8i: add thermal driver for h3 Date: Sat, 10 Aug 2019 05:28:22 +0000 Message-Id: <20190810052829.6032-12-tiny.windzz@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190810052829.6032-1-tiny.windzz@gmail.com> References: <20190810052829.6032-1-tiny.windzz@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190809_222959_540413_DE3B47BA X-CRM114-Status: GOOD ( 16.26 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Yangtao Li , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pm@vger.kernel.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds the support for allwinner h3 thermal sensor. Signed-off-by: Yangtao Li --- drivers/thermal/sun8i_thermal.c | 91 +++++++++++++++++++++++++++++++++ 1 file changed, 91 insertions(+) diff --git a/drivers/thermal/sun8i_thermal.c b/drivers/thermal/sun8i_thermal.c index 47c20c4c69e7..41ce8cdc0546 100644 --- a/drivers/thermal/sun8i_thermal.c +++ b/drivers/thermal/sun8i_thermal.c @@ -27,6 +27,14 @@ #define TEMP_TO_REG 672 #define CALIBRATE_DEFAULT 0x800 +#define SUN8I_THS_CTRL0 0x00 +#define SUN8I_THS_CTRL2 0x40 +#define SUN8I_THS_IC 0x44 +#define SUN8I_THS_IS 0x48 +#define SUN8I_THS_MFC 0x70 +#define SUN8I_THS_TEMP_CALIB 0x74 +#define SUN8I_THS_TEMP_DATA 0x80 + #define SUN50I_THS_CTRL0 0x00 #define SUN50I_H6_THS_ENABLE 0x04 #define SUN50I_H6_THS_PC 0x08 @@ -36,6 +44,10 @@ #define SUN50I_H6_THS_TEMP_CALIB 0xa0 #define SUN50I_H6_THS_TEMP_DATA 0xc0 +#define SUN8I_THS_CTRL0_T_ACQ0(x) (GENMASK(15, 0) & (x)) +#define SUN8I_THS_CTRL2_T_ACQ1(x) ((GENMASK(15, 0) & (x)) << 16) +#define SUN8I_THS_DATA_IRQ_STS(x) BIT(x + 8) + #define SUN50I_THS_CTRL0_T_ACQ(x) ((GENMASK(15, 0) & (x)) << 16) #define SUN50I_THS_FILTER_EN BIT(2) #define SUN50I_THS_FILTER_TYPE(x) (GENMASK(1, 0) & (x)) @@ -121,6 +133,23 @@ static const struct regmap_config config = { .fast_io = true, }; +static int sun8i_h3_irq_ack(struct ths_device *tmdev) +{ + int i, state, ret = 0; + + regmap_read(tmdev->regmap, SUN8I_THS_IS, &state); + + for (i = 0; i < tmdev->chip->sensor_num; i++) { + if (state & SUN8I_THS_DATA_IRQ_STS(i)) { + regmap_write(tmdev->regmap, SUN8I_THS_IS, + SUN8I_THS_DATA_IRQ_STS(i)); + ret |= BIT(i); + } + } + + return ret; +} + static int sun50i_h6_irq_ack(struct ths_device *tmdev) { int i, state, ret = 0; @@ -154,6 +183,26 @@ static irqreturn_t sun8i_irq_thread(int irq, void *data) return IRQ_HANDLED; } +static int sun8i_h3_ths_calibrate(struct ths_device *tmdev, + u16 *caldata, int callen) +{ + int i; + + if (!caldata[0] || callen < 2 * tmdev->chip->sensor_num) + return -EINVAL; + + for (i = 0; i < tmdev->chip->sensor_num; i++) { + int offset = (i % 2) << 4; + + regmap_update_bits(tmdev->regmap, + SUN8I_THS_TEMP_CALIB + (4 * (i >> 1)), + 0xfff << offset, + caldata[i] << offset); + } + + return 0; +} + static int sun50i_h6_ths_calibrate(struct ths_device *tmdev, u16 *caldata, int callen) { @@ -319,6 +368,36 @@ static int sun8i_ths_resource_init(struct ths_device *tmdev) return ret; } +static int sun8i_h3_thermal_init(struct ths_device *tmdev) +{ + int val; + + /* average over 4 samples */ + regmap_write(tmdev->regmap, SUN8I_THS_MFC, + SUN50I_THS_FILTER_EN | + SUN50I_THS_FILTER_TYPE(1)); + /* + * period = (x + 1) * 4096 / clkin; ~10ms + * enable data interrupt + */ + val = GENMASK(7 + tmdev->chip->sensor_num, 8); + regmap_write(tmdev->regmap, SUN8I_THS_IC, + SUN50I_H6_THS_PC_TEMP_PERIOD(58) | val); + /* + * clkin = 24MHz + * T acquire = clkin / (x + 1) + * = 20us + * enable sensor + */ + regmap_write(tmdev->regmap, SUN8I_THS_CTRL0, + SUN8I_THS_CTRL0_T_ACQ0(479)); + val = GENMASK(tmdev->chip->sensor_num - 1, 0); + regmap_write(tmdev->regmap, SUN8I_THS_CTRL2, + SUN8I_THS_CTRL2_T_ACQ1(479) | val); + + return 0; +} + static int sun50i_h6_thermal_init(struct ths_device *tmdev) { int val; @@ -425,6 +504,17 @@ static int sun8i_ths_remove(struct platform_device *pdev) return 0; } +static const struct ths_thermal_chip sun8i_h3_ths = { + .sensor_num = 1, + .offset = -1794, + .scale = -121, + .has_mod_clk = true, + .temp_data_base = SUN8I_THS_TEMP_DATA, + .calibrate = sun8i_h3_ths_calibrate, + .init = sun8i_h3_thermal_init, + .irq_ack = sun8i_h3_irq_ack, +}; + static const struct ths_thermal_chip sun50i_h6_ths = { .sensor_num = 2, .offset = -2794, @@ -437,6 +527,7 @@ static const struct ths_thermal_chip sun50i_h6_ths = { }; static const struct of_device_id of_ths_match[] = { + { .compatible = "allwinner,sun8i-h3-ths", .data = &sun8i_h3_ths }, { .compatible = "allwinner,sun50i-h6-ths", .data = &sun50i_h6_ths }, { /* sentinel */ }, }; From patchwork Sat Aug 10 05:28:23 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yangtao Li X-Patchwork-Id: 11088315 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id BA6FC1399 for ; Sat, 10 Aug 2019 05:32:51 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A87A9212DB for ; Sat, 10 Aug 2019 05:32:51 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 9B46F22A68; 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Fri, 09 Aug 2019 22:30:02 -0700 (PDT) Received: from localhost ([202.182.106.211]) by smtp.gmail.com with ESMTPSA id n128sm55019042pfn.46.2019.08.09.22.30.01 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 09 Aug 2019 22:30:02 -0700 (PDT) From: Yangtao Li To: rui.zhang@intel.com, edubezval@gmail.com, daniel.lezcano@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, maxime.ripard@bootlin.com, wens@csie.org, mchehab+samsung@kernel.org, davem@davemloft.net, gregkh@linuxfoundation.org, Jonathan.Cameron@huawei.com, nicolas.ferre@microchip.com Subject: [PATCH v5 12/18] dt-bindings: thermal: add binding document for a64 thermal controller Date: Sat, 10 Aug 2019 05:28:23 +0000 Message-Id: <20190810052829.6032-13-tiny.windzz@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190810052829.6032-1-tiny.windzz@gmail.com> References: <20190810052829.6032-1-tiny.windzz@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190809_223004_104670_6D9D8FAF X-CRM114-Status: GOOD ( 10.61 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Yangtao Li , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pm@vger.kernel.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds binding document for allwinner a64 thermal controller. Signed-off-by: Yangtao Li Reviewed-by: Rob Herring --- Documentation/devicetree/bindings/thermal/sun8i-thermal.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/thermal/sun8i-thermal.yaml b/Documentation/devicetree/bindings/thermal/sun8i-thermal.yaml index 6624cf6b1ce8..f935b4fab8ec 100644 --- a/Documentation/devicetree/bindings/thermal/sun8i-thermal.yaml +++ b/Documentation/devicetree/bindings/thermal/sun8i-thermal.yaml @@ -17,6 +17,7 @@ properties: compatible: enum: - allwinner,sun8i-h3-ths + - allwinner,sun50i-a64-ths - allwinner,sun50i-h6-ths reg: From patchwork Sat Aug 10 05:28:24 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yangtao Li X-Patchwork-Id: 11088317 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B109214F7 for ; Sat, 10 Aug 2019 05:33:07 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 990EF212DB for ; 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Fri, 09 Aug 2019 22:30:07 -0700 (PDT) Received: from localhost ([202.182.106.211]) by smtp.gmail.com with ESMTPSA id o12sm6113304pjr.22.2019.08.09.22.30.06 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 09 Aug 2019 22:30:07 -0700 (PDT) From: Yangtao Li To: rui.zhang@intel.com, edubezval@gmail.com, daniel.lezcano@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, maxime.ripard@bootlin.com, wens@csie.org, mchehab+samsung@kernel.org, davem@davemloft.net, gregkh@linuxfoundation.org, Jonathan.Cameron@huawei.com, nicolas.ferre@microchip.com Subject: [PATCH v5 13/18] thermal: sun8i: add thermal driver for A64 Date: Sat, 10 Aug 2019 05:28:24 +0000 Message-Id: <20190810052829.6032-14-tiny.windzz@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190810052829.6032-1-tiny.windzz@gmail.com> References: <20190810052829.6032-1-tiny.windzz@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190809_223008_902222_BBFA34A9 X-CRM114-Status: GOOD ( 11.33 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pm@vger.kernel.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Vasily Khoruzhick Thermal sensor controller in A64 is similar to H3, but it has 3 sensors. Extend H3 functions to add support for multiple sensors. Signed-off-by: Vasily Khoruzhick --- drivers/thermal/sun8i_thermal.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/thermal/sun8i_thermal.c b/drivers/thermal/sun8i_thermal.c index 41ce8cdc0546..3259081da841 100644 --- a/drivers/thermal/sun8i_thermal.c +++ b/drivers/thermal/sun8i_thermal.c @@ -515,6 +515,17 @@ static const struct ths_thermal_chip sun8i_h3_ths = { .irq_ack = sun8i_h3_irq_ack, }; +static const struct ths_thermal_chip sun50i_a64_ths = { + .sensor_num = 3, + .offset = -2170, + .scale = -117, + .has_mod_clk = true, + .temp_data_base = SUN8I_THS_TEMP_DATA, + .calibrate = sun8i_h3_ths_calibrate, + .init = sun8i_h3_thermal_init, + .irq_ack = sun8i_h3_irq_ack, +}; + static const struct ths_thermal_chip sun50i_h6_ths = { .sensor_num = 2, .offset = -2794, @@ -528,6 +539,7 @@ static const struct ths_thermal_chip sun50i_h6_ths = { static const struct of_device_id of_ths_match[] = { { .compatible = "allwinner,sun8i-h3-ths", .data = &sun8i_h3_ths }, + { .compatible = "allwinner,sun50i-a64-ths", .data = &sun50i_a64_ths }, { .compatible = "allwinner,sun50i-h6-ths", .data = &sun50i_h6_ths }, { /* sentinel */ }, }; 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Signed-off-by: Yangtao Li Reviewed-by: Rob Herring --- Documentation/devicetree/bindings/thermal/sun8i-thermal.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/thermal/sun8i-thermal.yaml b/Documentation/devicetree/bindings/thermal/sun8i-thermal.yaml index f935b4fab8ec..2e28f5b33d33 100644 --- a/Documentation/devicetree/bindings/thermal/sun8i-thermal.yaml +++ b/Documentation/devicetree/bindings/thermal/sun8i-thermal.yaml @@ -18,6 +18,7 @@ properties: enum: - allwinner,sun8i-h3-ths - allwinner,sun50i-a64-ths + - allwinner,sun50i-h5-ths - allwinner,sun50i-h6-ths reg: From patchwork Sat Aug 10 05:28:26 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yangtao Li X-Patchwork-Id: 11088321 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7FFAE1399 for ; Sat, 10 Aug 2019 05:33:42 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6D9F3212DB for ; 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Fri, 09 Aug 2019 22:30:16 -0700 (PDT) Received: from localhost ([202.182.106.211]) by smtp.gmail.com with ESMTPSA id z4sm86286175pgp.80.2019.08.09.22.30.15 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 09 Aug 2019 22:30:16 -0700 (PDT) From: Yangtao Li To: rui.zhang@intel.com, edubezval@gmail.com, daniel.lezcano@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, maxime.ripard@bootlin.com, wens@csie.org, mchehab+samsung@kernel.org, davem@davemloft.net, gregkh@linuxfoundation.org, Jonathan.Cameron@huawei.com, nicolas.ferre@microchip.com Subject: [PATCH v5 15/18] thermal: sun8i: allow to use custom temperature calculation function Date: Sat, 10 Aug 2019 05:28:26 +0000 Message-Id: <20190810052829.6032-16-tiny.windzz@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190810052829.6032-1-tiny.windzz@gmail.com> References: <20190810052829.6032-1-tiny.windzz@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190809_223017_162183_5BCC9341 X-CRM114-Status: GOOD ( 14.08 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Icenowy Zheng , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pm@vger.kernel.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Icenowy Zheng The H5 temperature calculation function is strange. Firstly, it's segmented. Secondly, the formula of two sensors are different in the second segment. Allow to use a custom temperature calculation function, in case of the function is complex. Signed-off-by: Icenowy Zheng --- drivers/thermal/sun8i_thermal.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/drivers/thermal/sun8i_thermal.c b/drivers/thermal/sun8i_thermal.c index 3259081da841..a761e2afda08 100644 --- a/drivers/thermal/sun8i_thermal.c +++ b/drivers/thermal/sun8i_thermal.c @@ -76,6 +76,7 @@ struct ths_thermal_chip { u16 *caldata, int callen); int (*init)(struct ths_device *tmdev); int (*irq_ack)(struct ths_device *tmdev); + int (*calc_temp)(int id, int reg); }; struct ths_device { @@ -90,9 +91,12 @@ struct ths_device { /* Temp Unit: millidegree Celsius */ static int sun8i_ths_reg2temp(struct ths_device *tmdev, - int reg) + int id, int reg) { - return (reg + tmdev->chip->offset) * tmdev->chip->scale; + if (tmdev->chip->calc_temp) + return tmdev->chip->calc_temp(id, reg); + else + return (reg + tmdev->chip->offset) * tmdev->chip->scale; } static int sun8i_ths_get_temp(void *data, int *temp) @@ -108,7 +112,7 @@ static int sun8i_ths_get_temp(void *data, int *temp) if (!val) return -EAGAIN; - *temp = sun8i_ths_reg2temp(tmdev, val); + *temp = sun8i_ths_reg2temp(tmdev, s->id, val); /* * XX - According to the original sdk, there are some platforms(rarely) * that add a fixed offset value after calculating the temperature @@ -232,7 +236,7 @@ static int sun50i_h6_ths_calibrate(struct ths_device *tmdev, for (i = 0; i < tmdev->chip->sensor_num; i++) { int reg = (int)caldata[i + 1]; - int sensor_temp = sun8i_ths_reg2temp(tmdev, reg); + int sensor_temp = sun8i_ths_reg2temp(tmdev, i, reg); int delta, cdata, offset; /* From patchwork Sat Aug 10 05:28:27 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yangtao Li X-Patchwork-Id: 11088323 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 25AC81399 for ; Sat, 10 Aug 2019 05:33:59 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 10DA6212DB for ; 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Fri, 09 Aug 2019 22:30:19 -0700 (PDT) Received: from localhost ([202.182.106.211]) by smtp.gmail.com with ESMTPSA id e189sm86883416pgc.15.2019.08.09.22.30.19 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 09 Aug 2019 22:30:19 -0700 (PDT) From: Yangtao Li To: rui.zhang@intel.com, edubezval@gmail.com, daniel.lezcano@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, maxime.ripard@bootlin.com, wens@csie.org, mchehab+samsung@kernel.org, davem@davemloft.net, gregkh@linuxfoundation.org, Jonathan.Cameron@huawei.com, nicolas.ferre@microchip.com Subject: [PATCH v5 16/18] thermal: sun8i: add support for Allwinner H5 thermal sensor Date: Sat, 10 Aug 2019 05:28:27 +0000 Message-Id: <20190810052829.6032-17-tiny.windzz@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190810052829.6032-1-tiny.windzz@gmail.com> References: <20190810052829.6032-1-tiny.windzz@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190809_223020_821375_B59EABE7 X-CRM114-Status: GOOD ( 12.87 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Icenowy Zheng , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pm@vger.kernel.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Icenowy Zheng The thermal sensor in Allwinner H5 has 2 sensors, and they have a special segmented temperature calculation formula. Add support for this thermal sensor. Signed-off-by: Icenowy Zheng --- drivers/thermal/sun8i_thermal.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/drivers/thermal/sun8i_thermal.c b/drivers/thermal/sun8i_thermal.c index a761e2afda08..78a888d85cba 100644 --- a/drivers/thermal/sun8i_thermal.c +++ b/drivers/thermal/sun8i_thermal.c @@ -99,6 +99,16 @@ static int sun8i_ths_reg2temp(struct ths_device *tmdev, return (reg + tmdev->chip->offset) * tmdev->chip->scale; } +static int sun50i_h5_calc_temp(int id, int reg) +{ + if (reg >= 0x500) + return -1191 * reg / 10 + 223000; + else if (!id) + return -1452 * reg / 10 + 259000; + else + return -1590 * reg / 10 + 276000; +} + static int sun8i_ths_get_temp(void *data, int *temp) { struct tsensor *s = data; @@ -530,6 +540,16 @@ static const struct ths_thermal_chip sun50i_a64_ths = { .irq_ack = sun8i_h3_irq_ack, }; +static const struct ths_thermal_chip sun50i_h5_ths = { + .sensor_num = 2, + .has_mod_clk = true, + .temp_data_base = SUN8I_THS_TEMP_DATA, + .calibrate = sun8i_h3_ths_calibrate, + .init = sun8i_h3_thermal_init, + .irq_ack = sun8i_h3_irq_ack, + .calc_temp = sun50i_h5_calc_temp, +}; + static const struct ths_thermal_chip sun50i_h6_ths = { .sensor_num = 2, .offset = -2794, @@ -544,6 +564,7 @@ static const struct ths_thermal_chip sun50i_h6_ths = { static const struct of_device_id of_ths_match[] = { { .compatible = "allwinner,sun8i-h3-ths", .data = &sun8i_h3_ths }, { .compatible = "allwinner,sun50i-a64-ths", .data = &sun50i_a64_ths }, + { .compatible = "allwinner,sun50i-h5-ths", .data = &sun50i_h5_ths }, { .compatible = "allwinner,sun50i-h6-ths", .data = &sun50i_h6_ths }, { /* sentinel */ }, }; From patchwork Sat Aug 10 05:28:28 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yangtao Li X-Patchwork-Id: 11088325 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A215414F7 for ; Sat, 10 Aug 2019 05:34:13 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8CAE8212DB for ; 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Fri, 09 Aug 2019 22:30:23 -0700 (PDT) Received: from localhost ([202.182.106.211]) by smtp.gmail.com with ESMTPSA id k70sm6641708pje.14.2019.08.09.22.30.22 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 09 Aug 2019 22:30:22 -0700 (PDT) From: Yangtao Li To: rui.zhang@intel.com, edubezval@gmail.com, daniel.lezcano@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, maxime.ripard@bootlin.com, wens@csie.org, mchehab+samsung@kernel.org, davem@davemloft.net, gregkh@linuxfoundation.org, Jonathan.Cameron@huawei.com, nicolas.ferre@microchip.com Subject: [PATCH v5 17/18] dt-bindings: thermal: add binding document for r40 thermal controller Date: Sat, 10 Aug 2019 05:28:28 +0000 Message-Id: <20190810052829.6032-18-tiny.windzz@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190810052829.6032-1-tiny.windzz@gmail.com> References: <20190810052829.6032-1-tiny.windzz@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190809_223023_962425_2C9E01C5 X-CRM114-Status: GOOD ( 10.62 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Yangtao Li , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pm@vger.kernel.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds binding document for allwinner r40 thermal controller. Signed-off-by: Yangtao Li Reviewed-by: Rob Herring --- Documentation/devicetree/bindings/thermal/sun8i-thermal.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/thermal/sun8i-thermal.yaml b/Documentation/devicetree/bindings/thermal/sun8i-thermal.yaml index 2e28f5b33d33..28c438d3bfea 100644 --- a/Documentation/devicetree/bindings/thermal/sun8i-thermal.yaml +++ b/Documentation/devicetree/bindings/thermal/sun8i-thermal.yaml @@ -17,6 +17,7 @@ properties: compatible: enum: - allwinner,sun8i-h3-ths + - allwinner,sun8i-r40-ths - allwinner,sun50i-a64-ths - allwinner,sun50i-h5-ths - allwinner,sun50i-h6-ths From patchwork Sat Aug 10 05:28:29 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yangtao Li X-Patchwork-Id: 11088327 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id CB5DC14F7 for ; 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Fri, 09 Aug 2019 22:30:29 -0700 (PDT) Received: from localhost ([202.182.106.211]) by smtp.gmail.com with ESMTPSA id z13sm6999252pjn.32.2019.08.09.22.30.28 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 09 Aug 2019 22:30:29 -0700 (PDT) From: Yangtao Li To: rui.zhang@intel.com, edubezval@gmail.com, daniel.lezcano@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, maxime.ripard@bootlin.com, wens@csie.org, mchehab+samsung@kernel.org, davem@davemloft.net, gregkh@linuxfoundation.org, Jonathan.Cameron@huawei.com, nicolas.ferre@microchip.com Subject: [PATCH v5 18/18] thermal: sun8i: add support for Allwinner R40 thermal sensor Date: Sat, 10 Aug 2019 05:28:29 +0000 Message-Id: <20190810052829.6032-19-tiny.windzz@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190810052829.6032-1-tiny.windzz@gmail.com> References: <20190810052829.6032-1-tiny.windzz@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190809_223030_339845_BEC22A91 X-CRM114-Status: GOOD ( 11.87 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Icenowy Zheng , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pm@vger.kernel.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Icenowy Zheng The thermal sensor in Allwinner R40 SoC is quite similar to the one in Allwinner A64 SoC, with only slightly different temperature calculation formula. Signed-off-by: Icenowy Zheng --- drivers/thermal/sun8i_thermal.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/thermal/sun8i_thermal.c b/drivers/thermal/sun8i_thermal.c index 78a888d85cba..0de9a56c3775 100644 --- a/drivers/thermal/sun8i_thermal.c +++ b/drivers/thermal/sun8i_thermal.c @@ -529,6 +529,17 @@ static const struct ths_thermal_chip sun8i_h3_ths = { .irq_ack = sun8i_h3_irq_ack, }; +static const struct ths_thermal_chip sun8i_r40_ths = { + .sensor_num = 3, + .offset = -2222, + .scale = -113, + .has_mod_clk = true, + .temp_data_base = SUN8I_THS_TEMP_DATA, + .calibrate = sun8i_h3_ths_calibrate, + .init = sun8i_h3_thermal_init, + .irq_ack = sun8i_h3_irq_ack, +}; + static const struct ths_thermal_chip sun50i_a64_ths = { .sensor_num = 3, .offset = -2170, @@ -563,6 +574,7 @@ static const struct ths_thermal_chip sun50i_h6_ths = { static const struct of_device_id of_ths_match[] = { { .compatible = "allwinner,sun8i-h3-ths", .data = &sun8i_h3_ths }, + { .compatible = "allwinner,sun8i-r40-ths", .data = &sun8i_r40_ths }, { .compatible = "allwinner,sun50i-a64-ths", .data = &sun50i_a64_ths }, { .compatible = "allwinner,sun50i-h5-ths", .data = &sun50i_h5_ths }, { .compatible = "allwinner,sun50i-h6-ths", .data = &sun50i_h6_ths },