From patchwork Tue Aug 20 03:23:02 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Samuel Holland X-Patchwork-Id: 11102665 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 1ADC414F7 for ; Tue, 20 Aug 2019 03:23:57 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id E0F5322CF5 for ; Tue, 20 Aug 2019 03:23:56 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=sholland.org header.i=@sholland.org header.b="it0u/kR+"; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b="Vm3u1SlH" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728878AbfHTDXO (ORCPT ); Mon, 19 Aug 2019 23:23:14 -0400 Received: from new3-smtp.messagingengine.com ([66.111.4.229]:58007 "EHLO new3-smtp.messagingengine.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728719AbfHTDXN (ORCPT ); Mon, 19 Aug 2019 23:23:13 -0400 Received: from compute5.internal (compute5.nyi.internal [10.202.2.45]) by mailnew.nyi.internal (Postfix) with ESMTP id 862863504; Mon, 19 Aug 2019 23:23:12 -0400 (EDT) Received: from mailfrontend1 ([10.202.2.162]) by compute5.internal (MEProxy); Mon, 19 Aug 2019 23:23:12 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sholland.org; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; s=fm3; bh=I8Sl5/+srL6CO XATsmZebq4bC+18NIaBiM+bxZUEpcE=; b=it0u/kR+NtzMK1DBrZWn9oTC88iBg Nvu7q6CeR6j5COsX7G5sqxR9puab/9y9mdZEBTA2ZyUYAZ3uj54MovnkmZvyNKC/ h5BH6Y141lg8is6Hv03Joe15GwS6aLxScs3RAEe8wj9qOXrGLfZmofsbX0jBCcYf iJ62Q6N3MsHeBMQoYu3qjdjsiHTdV/vmOAMaf85TYHFhkXyR9cvMO36+aKCR+L3r OD7ykyWqQdzakwsrDyd/MZrD2ndPqdQJjIzYHe6hYJQwI+2uEIeCq6PWcsnCmnhT 3Bw71i9tvYP/a0FLjHPwFt8WJnlQA5v2dil2L7Igcr03QZoCiBh7c+DKw== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-transfer-encoding:date:from :in-reply-to:message-id:mime-version:references:subject:to :x-me-proxy:x-me-proxy:x-me-sender:x-me-sender:x-sasl-enc; s= fm3; bh=I8Sl5/+srL6COXATsmZebq4bC+18NIaBiM+bxZUEpcE=; b=Vm3u1SlH aF0GRAZQmirdnbuTLUCRZDvg1Tdmjy3S/qhuCRJ/RKYZTRhhHKw9m1HUh6VUhU8T WDLAZqOBM357h5WTH0gyy3DhIU1cyeliHq+CdQl1HAB9jCRpmUwQmBcF+cz0HCeg zMvunYDEBpZKS5wL8fq2cNBBUGHSbLiAp9G5gO8T2Te0HiRP1lh5euSW+aoXBAU0 ynyFEJJH3EYCOaL2NxUQvBbas2yhI9WcTyTcecLNHwvWUC3IuDc20vn/0T5voFTt bFihQjecvolj1NTsda8Kn/O892w++qVgAXkg6R6Gvj22AbFJRKEVvrSCOp8Mr8nl hb2XITkknhmAJg== X-ME-Sender: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgeduvddrudegtddgjeegucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmne cujfgurhephffvufffkffojghfggfgsedtkeertdertddtnecuhfhrohhmpefurghmuhgv lhcujfholhhlrghnugcuoehsrghmuhgvlhesshhhohhllhgrnhgurdhorhhgqeenucfkph epjedtrddufeehrddugeekrdduhedunecurfgrrhgrmhepmhgrihhlfhhrohhmpehsrghm uhgvlhesshhhohhllhgrnhgurdhorhhgnecuvehluhhsthgvrhfuihiivgeptd X-ME-Proxy: Received: from titanium.stl.sholland.net (70-135-148-151.lightspeed.stlsmo.sbcglobal.net [70.135.148.151]) by mail.messagingengine.com (Postfix) with ESMTPA id 17B2C80060; Mon, 19 Aug 2019 23:23:11 -0400 (EDT) From: Samuel Holland To: Maxime Ripard , Chen-Yu Tsai , Jassi Brar , Michael Turquette , Stephen Boyd , Rob Herring , Mark Rutland , Corentin Labbe , Vasily Khoruzhick Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com, Samuel Holland Subject: [PATCH v4 01/10] clk: sunxi-ng: Mark msgbox clocks as critical Date: Mon, 19 Aug 2019 22:23:02 -0500 Message-Id: <20190820032311.6506-2-samuel@sholland.org> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190820032311.6506-1-samuel@sholland.org> References: <20190820032311.6506-1-samuel@sholland.org> MIME-Version: 1.0 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The msgbox clock is critical because the hardware it controls is shared between Linux and system firmware. The message box may be used by the EL3 secure monitor's PSCI implementation. On 64-bit sunxi SoCs, this is provided by ARM TF-A; 32-bit SoCs use a different implementation. The secure monitor uses the message box to forward requests to power management firmware running on a separate CPU. It is not enough for the secure monitor to enable the clock each time Linux performs a SMC into EL3, as both the firmware and Linux can run concurrently on separate CPUs. So it is never safe for Linux to turn this clock off, and it should be marked as critical. At this time, such power management firmware only exists for the A64 and H5 SoCs. However, it makes sense to take care of all CCU drivers now for consistency, and to ease the transition in the future once firmware is ported to the other SoCs. Signed-off-by: Samuel Holland --- drivers/clk/sunxi-ng/ccu-sun50i-a64.c | 3 ++- drivers/clk/sunxi-ng/ccu-sun50i-h6.c | 3 ++- drivers/clk/sunxi-ng/ccu-sun8i-a23.c | 3 ++- drivers/clk/sunxi-ng/ccu-sun8i-a33.c | 3 ++- drivers/clk/sunxi-ng/ccu-sun8i-a83t.c | 3 ++- drivers/clk/sunxi-ng/ccu-sun8i-h3.c | 3 ++- drivers/clk/sunxi-ng/ccu-sun9i-a80.c | 3 ++- 7 files changed, 14 insertions(+), 7 deletions(-) diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-a64.c b/drivers/clk/sunxi-ng/ccu-sun50i-a64.c index 49bd7a4c015c..045121b50da3 100644 --- a/drivers/clk/sunxi-ng/ccu-sun50i-a64.c +++ b/drivers/clk/sunxi-ng/ccu-sun50i-a64.c @@ -342,8 +342,9 @@ static SUNXI_CCU_GATE(bus_de_clk, "bus-de", "ahb1", 0x064, BIT(12), 0); static SUNXI_CCU_GATE(bus_gpu_clk, "bus-gpu", "ahb1", 0x064, BIT(20), 0); +/* Used for communication between firmware components at runtime */ static SUNXI_CCU_GATE(bus_msgbox_clk, "bus-msgbox", "ahb1", - 0x064, BIT(21), 0); + 0x064, BIT(21), CLK_IS_CRITICAL); static SUNXI_CCU_GATE(bus_spinlock_clk, "bus-spinlock", "ahb1", 0x064, BIT(22), 0); diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-h6.c b/drivers/clk/sunxi-ng/ccu-sun50i-h6.c index aebef4af9861..14f39bc4180f 100644 --- a/drivers/clk/sunxi-ng/ccu-sun50i-h6.c +++ b/drivers/clk/sunxi-ng/ccu-sun50i-h6.c @@ -340,8 +340,9 @@ static SUNXI_CCU_GATE(bus_vp9_clk, "bus-vp9", "psi-ahb1-ahb2", static SUNXI_CCU_GATE(bus_dma_clk, "bus-dma", "psi-ahb1-ahb2", 0x70c, BIT(0), 0); +/* Used for communication between firmware components at runtime */ static SUNXI_CCU_GATE(bus_msgbox_clk, "bus-msgbox", "psi-ahb1-ahb2", - 0x71c, BIT(0), 0); + 0x71c, BIT(0), CLK_IS_CRITICAL); static SUNXI_CCU_GATE(bus_spinlock_clk, "bus-spinlock", "psi-ahb1-ahb2", 0x72c, BIT(0), 0); diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-a23.c b/drivers/clk/sunxi-ng/ccu-sun8i-a23.c index 103aa504f6c8..5a28583f57e2 100644 --- a/drivers/clk/sunxi-ng/ccu-sun8i-a23.c +++ b/drivers/clk/sunxi-ng/ccu-sun8i-a23.c @@ -255,8 +255,9 @@ static SUNXI_CCU_GATE(bus_de_fe_clk, "bus-de-fe", "ahb1", 0x064, BIT(14), 0); static SUNXI_CCU_GATE(bus_gpu_clk, "bus-gpu", "ahb1", 0x064, BIT(20), 0); +/* Used for communication between firmware components at runtime */ static SUNXI_CCU_GATE(bus_msgbox_clk, "bus-msgbox", "ahb1", - 0x064, BIT(21), 0); + 0x064, BIT(21), CLK_IS_CRITICAL); static SUNXI_CCU_GATE(bus_spinlock_clk, "bus-spinlock", "ahb1", 0x064, BIT(22), 0); static SUNXI_CCU_GATE(bus_drc_clk, "bus-drc", "ahb1", diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-a33.c b/drivers/clk/sunxi-ng/ccu-sun8i-a33.c index 91838cd11037..50cf3726ef30 100644 --- a/drivers/clk/sunxi-ng/ccu-sun8i-a33.c +++ b/drivers/clk/sunxi-ng/ccu-sun8i-a33.c @@ -267,8 +267,9 @@ static SUNXI_CCU_GATE(bus_de_fe_clk, "bus-de-fe", "ahb1", 0x064, BIT(14), 0); static SUNXI_CCU_GATE(bus_gpu_clk, "bus-gpu", "ahb1", 0x064, BIT(20), 0); +/* Used for communication between firmware components at runtime */ static SUNXI_CCU_GATE(bus_msgbox_clk, "bus-msgbox", "ahb1", - 0x064, BIT(21), 0); + 0x064, BIT(21), CLK_IS_CRITICAL); static SUNXI_CCU_GATE(bus_spinlock_clk, "bus-spinlock", "ahb1", 0x064, BIT(22), 0); static SUNXI_CCU_GATE(bus_drc_clk, "bus-drc", "ahb1", diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-a83t.c b/drivers/clk/sunxi-ng/ccu-sun8i-a83t.c index 2b434521c5cc..4ab3a76f4ffa 100644 --- a/drivers/clk/sunxi-ng/ccu-sun8i-a83t.c +++ b/drivers/clk/sunxi-ng/ccu-sun8i-a83t.c @@ -339,8 +339,9 @@ static SUNXI_CCU_GATE(bus_de_clk, "bus-de", "ahb1", 0x064, BIT(12), 0); static SUNXI_CCU_GATE(bus_gpu_clk, "bus-gpu", "ahb1", 0x064, BIT(20), 0); +/* Used for communication between firmware components at runtime */ static SUNXI_CCU_GATE(bus_msgbox_clk, "bus-msgbox", "ahb1", - 0x064, BIT(21), 0); + 0x064, BIT(21), CLK_IS_CRITICAL); static SUNXI_CCU_GATE(bus_spinlock_clk, "bus-spinlock", "ahb1", 0x064, BIT(22), 0); diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-h3.c b/drivers/clk/sunxi-ng/ccu-sun8i-h3.c index 6b636362379e..7429d3fe8fb7 100644 --- a/drivers/clk/sunxi-ng/ccu-sun8i-h3.c +++ b/drivers/clk/sunxi-ng/ccu-sun8i-h3.c @@ -273,8 +273,9 @@ static SUNXI_CCU_GATE(bus_de_clk, "bus-de", "ahb1", 0x064, BIT(12), 0); static SUNXI_CCU_GATE(bus_gpu_clk, "bus-gpu", "ahb1", 0x064, BIT(20), 0); +/* Used for communication between firmware components at runtime */ static SUNXI_CCU_GATE(bus_msgbox_clk, "bus-msgbox", "ahb1", - 0x064, BIT(21), 0); + 0x064, BIT(21), CLK_IS_CRITICAL); static SUNXI_CCU_GATE(bus_spinlock_clk, "bus-spinlock", "ahb1", 0x064, BIT(22), 0); diff --git a/drivers/clk/sunxi-ng/ccu-sun9i-a80.c b/drivers/clk/sunxi-ng/ccu-sun9i-a80.c index dcac1391767f..47d1d18b6f38 100644 --- a/drivers/clk/sunxi-ng/ccu-sun9i-a80.c +++ b/drivers/clk/sunxi-ng/ccu-sun9i-a80.c @@ -748,8 +748,9 @@ static SUNXI_CCU_GATE(bus_usb_clk, "bus-usb", "ahb1", 0x584, BIT(1), 0); static SUNXI_CCU_GATE(bus_gmac_clk, "bus-gmac", "ahb1", 0x584, BIT(17), 0); +/* Used for communication between firmware components at runtime */ static SUNXI_CCU_GATE(bus_msgbox_clk, "bus-msgbox", "ahb1", - 0x584, BIT(21), 0); + 0x584, BIT(21), CLK_IS_CRITICAL); static SUNXI_CCU_GATE(bus_spinlock_clk, "bus-spinlock", "ahb1", 0x584, BIT(22), 0); static SUNXI_CCU_GATE(bus_hstimer_clk, "bus-hstimer", "ahb1", From patchwork Tue Aug 20 03:23:03 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Samuel Holland X-Patchwork-Id: 11102663 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 523AC1813 for ; Tue, 20 Aug 2019 03:23:56 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 2EFC922D37 for ; Tue, 20 Aug 2019 03:23:56 +0000 (UTC) Authentication-Results: mail.kernel.org; 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Mon, 19 Aug 2019 23:23:11 -0400 (EDT) From: Samuel Holland To: Maxime Ripard , Chen-Yu Tsai , Jassi Brar , Michael Turquette , Stephen Boyd , Rob Herring , Mark Rutland , Corentin Labbe , Vasily Khoruzhick Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com, Samuel Holland Subject: [PATCH v4 02/10] clk: sunxi-ng: Mark AR100 clocks as critical Date: Mon, 19 Aug 2019 22:23:03 -0500 Message-Id: <20190820032311.6506-3-samuel@sholland.org> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190820032311.6506-1-samuel@sholland.org> References: <20190820032311.6506-1-samuel@sholland.org> MIME-Version: 1.0 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org On sun8i, sun9i, and sun50i SoCs, system suspend/resume support requires firmware running on the AR100 coprocessor (the "SCP"). Such firmware can provide additional features, such as thermal monitoring and poweron/off support for boards without a PMIC. Since the AR100 may be running critical firmware, even if Linux does not know about it or directly interact with it (all requests may go through an intermediary interface such as PSCI), Linux must not turn off its clock. At this time, such power management firmware only exists for the A64 and H5 SoCs. However, it makes sense to take care of all CCU drivers now for consistency, and to ease the transition in the future once firmware is ported to the other SoCs. Leaving the clock running is safe even if no firmware is present, since the AR100 stays in reset by default. In most cases, the AR100 clock is kept enabled by Linux anyway, since it is the parent of all APB0 bus peripherals. This change only prevents Linux from turning off the AR100 clock in the rare case that no peripherals are in use. Signed-off-by: Samuel Holland --- drivers/clk/sunxi-ng/ccu-sun50i-h6-r.c | 2 +- drivers/clk/sunxi-ng/ccu-sun8i-r.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-h6-r.c b/drivers/clk/sunxi-ng/ccu-sun50i-h6-r.c index 45a1ed3fe674..adf907020951 100644 --- a/drivers/clk/sunxi-ng/ccu-sun50i-h6-r.c +++ b/drivers/clk/sunxi-ng/ccu-sun50i-h6-r.c @@ -45,7 +45,7 @@ static struct ccu_div ar100_clk = { .hw.init = CLK_HW_INIT_PARENTS("ar100", ar100_r_apb2_parents, &ccu_div_ops, - 0), + CLK_IS_CRITICAL), }, }; diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-r.c b/drivers/clk/sunxi-ng/ccu-sun8i-r.c index 4646fdc61053..feef4f750943 100644 --- a/drivers/clk/sunxi-ng/ccu-sun8i-r.c +++ b/drivers/clk/sunxi-ng/ccu-sun8i-r.c @@ -45,7 +45,7 @@ static struct ccu_div ar100_clk = { .hw.init = CLK_HW_INIT_PARENTS_DATA("ar100", ar100_parents, &ccu_div_ops, - 0), + CLK_IS_CRITICAL), }, }; From patchwork Tue Aug 20 03:23:04 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Samuel Holland X-Patchwork-Id: 11102657 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 2BA9D13A0 for ; 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Mon, 19 Aug 2019 23:23:12 -0400 (EDT) From: Samuel Holland To: Maxime Ripard , Chen-Yu Tsai , Jassi Brar , Michael Turquette , Stephen Boyd , Rob Herring , Mark Rutland , Corentin Labbe , Vasily Khoruzhick Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com, Samuel Holland , Rob Herring Subject: [PATCH v4 03/10] dt-bindings: mailbox: Add a sunxi message box binding Date: Mon, 19 Aug 2019 22:23:04 -0500 Message-Id: <20190820032311.6506-4-samuel@sholland.org> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190820032311.6506-1-samuel@sholland.org> References: <20190820032311.6506-1-samuel@sholland.org> MIME-Version: 1.0 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org This mailbox hardware is present in Allwinner sun8i, sun9i, and sun50i SoCs. Add a device tree binding for it. Reviewed-by: Rob Herring Signed-off-by: Samuel Holland --- .../mailbox/allwinner,sunxi-msgbox.yaml | 79 +++++++++++++++++++ 1 file changed, 79 insertions(+) create mode 100644 Documentation/devicetree/bindings/mailbox/allwinner,sunxi-msgbox.yaml diff --git a/Documentation/devicetree/bindings/mailbox/allwinner,sunxi-msgbox.yaml b/Documentation/devicetree/bindings/mailbox/allwinner,sunxi-msgbox.yaml new file mode 100644 index 000000000000..f34a1909ab2e --- /dev/null +++ b/Documentation/devicetree/bindings/mailbox/allwinner,sunxi-msgbox.yaml @@ -0,0 +1,79 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mailbox/allwinner,sunxi-msgbox.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Allwinner sunxi Message Box + +maintainers: + - Samuel Holland + +description: | + The hardware message box on sun6i and newer sunxi SoCs is a two-user mailbox + controller containing 8 unidirectional FIFOs. An interrupt is raised for + received messages, but software must poll to know when a transmitted message + has been acknowledged by the remote user. Each FIFO can hold four 32-bit + messages; when a FIFO is full, clients must wait before more transmissions. + + Refer to ./mailbox.txt for generic information about mailbox device-tree + bindings. + +properties: + compatible: + oneOf: + - items: + - enum: + - allwinner,sun8i-a83t-msgbox + - allwinner,sun8i-h3-msgbox + - allwinner,sun9i-a80-msgbox + - allwinner,sun50i-a64-msgbox + - allwinner,sun50i-h6-msgbox + - const: allwinner,sun6i-a31-msgbox + - items: + - const: allwinner,sun6i-a31-msgbox + + reg: + items: + - description: MMIO register range + + clocks: + maxItems: 1 + description: bus clock + + resets: + maxItems: 1 + description: bus reset + + interrupts: + maxItems: 1 + description: controller interrupt + + '#mbox-cells': + const: 1 + +required: + - compatible + - reg + - clocks + - resets + - interrupts + - '#mbox-cells' + +examples: + - | + #include + #include + #include + + msgbox: mailbox@1c17000 { + compatible = "allwinner,sun8i-h3-msgbox", + "allwinner,sun6i-a31-msgbox"; + reg = <0x01c17000 0x1000>; + clocks = <&ccu CLK_BUS_MSGBOX>; + resets = <&ccu RST_BUS_MSGBOX>; + interrupts = ; + #mbox-cells = <1>; + }; + +... From patchwork Tue Aug 20 03:23:05 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Samuel Holland X-Patchwork-Id: 11102655 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 27D6913A0 for ; Tue, 20 Aug 2019 03:23:46 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id E7D9422DCB for ; Tue, 20 Aug 2019 03:23:45 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=sholland.org header.i=@sholland.org header.b="W5YIMMKO"; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b="YZRrbPW/" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729071AbfHTDXQ (ORCPT ); Mon, 19 Aug 2019 23:23:16 -0400 Received: from new3-smtp.messagingengine.com ([66.111.4.229]:35461 "EHLO new3-smtp.messagingengine.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729024AbfHTDXQ (ORCPT ); Mon, 19 Aug 2019 23:23:16 -0400 Received: from compute5.internal (compute5.nyi.internal [10.202.2.45]) by mailnew.nyi.internal (Postfix) with ESMTP id CB86F353C; Mon, 19 Aug 2019 23:23:14 -0400 (EDT) Received: from mailfrontend1 ([10.202.2.162]) by compute5.internal (MEProxy); Mon, 19 Aug 2019 23:23:14 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sholland.org; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; s=fm3; bh=NsXxRbZj0+Wiy mBbludhcVU5ZXACjk2jJXX+rzhXc40=; b=W5YIMMKOZIw1pl9T6pHMZJqIC3K6u sAxHRXf2cgKdj9WYTShXPt8XJcWnOLLi3rBqPmc4nHb0kVKorDC1gjH0ecMyck5n e5N5H+5hhHrYXYzgU4Yr/ONo6sf8LBlGherUq27+/09LZ+NUrATkb6ujBqWwnBQF t379jNwEYBI3OxHYfTPKKF9ZjHfPDpcEOsqQtYJ/PKQ8/VBcHT0QfxnRCeKGLz5K K3RVLCFY/RkwbgKmmooQDvNIgEaBknV0+lNg3quOXZm+BpvkAeZBVYvq4dy2ShF1 QGGFCS9kTtpgzqcu35uFPOH+YTdDazkwGvbaQVjAGmOe+M2DVhhfVxU3Q== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-transfer-encoding:date:from :in-reply-to:message-id:mime-version:references:subject:to :x-me-proxy:x-me-proxy:x-me-sender:x-me-sender:x-sasl-enc; s= fm3; bh=NsXxRbZj0+WiymBbludhcVU5ZXACjk2jJXX+rzhXc40=; b=YZRrbPW/ 5ItNRqTLtEnE2XE1hAuJhhxn+kaV19gdbbCI/Mj/Lmqg1tQVUXYAKFRSG1jbKwSq fnsESvNv556ozCLj+YsDjHl5WzaKPpoqcPweMrQk4szpZUQkJmYpZPrTboWAM3fj 1cJZzPvlyKapqeuattffJDGcsDaaz7CWPfpHDT5o5Cl8DG0sWywysGKnqfoN4Y7f 4LA459RPp7xriEhf1d6yTwtBwog64hkw/9ijKt1n9wr8xWsUzY+/yY9irs93DKef 6S/zWwo7ph1uZSMegQrlkY5VgcMP1EmCnhk0El6/+Y0GoJ6T4eCe0codi7xkaCbr 82a4JxAGJDa5eA== X-ME-Sender: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgeduvddrudegtddgjeegucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmne cujfgurhephffvufffkffojghfggfgsedtkeertdertddtnecuhfhrohhmpefurghmuhgv lhcujfholhhlrghnugcuoehsrghmuhgvlhesshhhohhllhgrnhgurdhorhhgqeenucfkph epjedtrddufeehrddugeekrdduhedunecurfgrrhgrmhepmhgrihhlfhhrohhmpehsrghm uhgvlhesshhhohhllhgrnhgurdhorhhgnecuvehluhhsthgvrhfuihiivgeptd X-ME-Proxy: Received: from titanium.stl.sholland.net (70-135-148-151.lightspeed.stlsmo.sbcglobal.net [70.135.148.151]) by mail.messagingengine.com (Postfix) with ESMTPA id AF8BC80059; Mon, 19 Aug 2019 23:23:13 -0400 (EDT) From: Samuel Holland To: Maxime Ripard , Chen-Yu Tsai , Jassi Brar , Michael Turquette , Stephen Boyd , Rob Herring , Mark Rutland , Corentin Labbe , Vasily Khoruzhick Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com, Samuel Holland Subject: [PATCH v4 04/10] mailbox: sunxi-msgbox: Add a new mailbox driver Date: Mon, 19 Aug 2019 22:23:05 -0500 Message-Id: <20190820032311.6506-5-samuel@sholland.org> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190820032311.6506-1-samuel@sholland.org> References: <20190820032311.6506-1-samuel@sholland.org> MIME-Version: 1.0 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Allwinner sun8i, sun9i, and sun50i SoCs contain a hardware message box used for communication between the ARM CPUs and the ARISC management coprocessor. The hardware contains 8 unidirectional 4-message FIFOs. Add a driver for it, so it can be used for SCPI or other communication protocols. Signed-off-by: Samuel Holland --- drivers/mailbox/Kconfig | 10 + drivers/mailbox/Makefile | 2 + drivers/mailbox/sunxi-msgbox.c | 323 +++++++++++++++++++++++++++++++++ 3 files changed, 335 insertions(+) create mode 100644 drivers/mailbox/sunxi-msgbox.c diff --git a/drivers/mailbox/Kconfig b/drivers/mailbox/Kconfig index ab4eb750bbdd..57d12936175e 100644 --- a/drivers/mailbox/Kconfig +++ b/drivers/mailbox/Kconfig @@ -227,4 +227,14 @@ config ZYNQMP_IPI_MBOX message to the IPI buffer and will access the IPI control registers to kick the other processor or enquire status. +config SUNXI_MSGBOX + tristate "Allwinner sunxi Message Box" + depends on ARCH_SUNXI || COMPILE_TEST + default ARCH_SUNXI + help + Mailbox implementation for the hardware message box present in + Allwinner sun8i, sun9i, and sun50i SoCs. The hardware message box is + used for communication between the application CPUs and the power + management coprocessor. + endif diff --git a/drivers/mailbox/Makefile b/drivers/mailbox/Makefile index c22fad6f696b..bec2d50b0976 100644 --- a/drivers/mailbox/Makefile +++ b/drivers/mailbox/Makefile @@ -48,3 +48,5 @@ obj-$(CONFIG_STM32_IPCC) += stm32-ipcc.o obj-$(CONFIG_MTK_CMDQ_MBOX) += mtk-cmdq-mailbox.o obj-$(CONFIG_ZYNQMP_IPI_MBOX) += zynqmp-ipi-mailbox.o + +obj-$(CONFIG_SUNXI_MSGBOX) += sunxi-msgbox.o diff --git a/drivers/mailbox/sunxi-msgbox.c b/drivers/mailbox/sunxi-msgbox.c new file mode 100644 index 000000000000..29a5101a5390 --- /dev/null +++ b/drivers/mailbox/sunxi-msgbox.c @@ -0,0 +1,323 @@ +// SPDX-License-Identifier: GPL-2.0 +// +// Copyright (c) 2017-2019 Samuel Holland + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define NUM_CHANS 8 + +#define CTRL_REG(n) (0x0000 + 0x4 * ((n) / 4)) +#define CTRL_RX(n) BIT(0 + 8 * ((n) % 4)) +#define CTRL_TX(n) BIT(4 + 8 * ((n) % 4)) + +#define REMOTE_IRQ_EN_REG 0x0040 +#define REMOTE_IRQ_STAT_REG 0x0050 +#define LOCAL_IRQ_EN_REG 0x0060 +#define LOCAL_IRQ_STAT_REG 0x0070 + +#define RX_IRQ(n) BIT(0 + 2 * (n)) +#define RX_IRQ_MASK 0x5555 +#define TX_IRQ(n) BIT(1 + 2 * (n)) +#define TX_IRQ_MASK 0xaaaa + +#define FIFO_STAT_REG(n) (0x0100 + 0x4 * (n)) +#define FIFO_STAT_MASK GENMASK(0, 0) + +#define MSG_STAT_REG(n) (0x0140 + 0x4 * (n)) +#define MSG_STAT_MASK GENMASK(2, 0) + +#define MSG_DATA_REG(n) (0x0180 + 0x4 * (n)) + +#define mbox_dbg(mbox, ...) dev_dbg((mbox)->controller.dev, __VA_ARGS__) + +struct sunxi_msgbox { + struct mbox_controller controller; + struct clk *clk; + spinlock_t lock; + void __iomem *regs; +}; + +static bool sunxi_msgbox_last_tx_done(struct mbox_chan *chan); +static bool sunxi_msgbox_peek_data(struct mbox_chan *chan); + +static inline int channel_number(struct mbox_chan *chan) +{ + return chan - chan->mbox->chans; +} + +static inline struct sunxi_msgbox *channel_to_msgbox(struct mbox_chan *chan) +{ + return chan->con_priv; +} + +static irqreturn_t sunxi_msgbox_irq(int irq, void *dev_id) +{ + struct sunxi_msgbox *mbox = dev_id; + uint32_t status; + int n; + + /* Only examine channels that are currently enabled. */ + status = readl(mbox->regs + LOCAL_IRQ_EN_REG) & + readl(mbox->regs + LOCAL_IRQ_STAT_REG); + + if (!(status & RX_IRQ_MASK)) + return IRQ_NONE; + + for (n = 0; n < NUM_CHANS; ++n) { + struct mbox_chan *chan = &mbox->controller.chans[n]; + + if (!(status & RX_IRQ(n))) + continue; + + while (sunxi_msgbox_peek_data(chan)) { + uint32_t msg = readl(mbox->regs + MSG_DATA_REG(n)); + + mbox_dbg(mbox, "Channel %d received 0x%08x\n", n, msg); + mbox_chan_received_data(chan, &msg); + } + + /* The IRQ can be cleared only once the FIFO is empty. */ + writel(RX_IRQ(n), mbox->regs + LOCAL_IRQ_STAT_REG); + } + + return IRQ_HANDLED; +} + +static int sunxi_msgbox_send_data(struct mbox_chan *chan, void *data) +{ + struct sunxi_msgbox *mbox = channel_to_msgbox(chan); + int n = channel_number(chan); + uint32_t msg = *(uint32_t *)data; + + /* Using a channel backwards gets the hardware into a bad state. */ + if (WARN_ON_ONCE(!(readl(mbox->regs + CTRL_REG(n)) & CTRL_TX(n)))) + return 0; + + /* We cannot post a new message if the FIFO is full. */ + if (readl(mbox->regs + FIFO_STAT_REG(n)) & FIFO_STAT_MASK) { + mbox_dbg(mbox, "Channel %d busy sending 0x%08x\n", n, msg); + return -EBUSY; + } + + writel(msg, mbox->regs + MSG_DATA_REG(n)); + mbox_dbg(mbox, "Channel %d sent 0x%08x\n", n, msg); + + return 0; +} + +static int sunxi_msgbox_startup(struct mbox_chan *chan) +{ + struct sunxi_msgbox *mbox = channel_to_msgbox(chan); + int n = channel_number(chan); + + /* The coprocessor is responsible for setting channel directions. */ + if (readl(mbox->regs + CTRL_REG(n)) & CTRL_RX(n)) { + /* Flush the receive FIFO. */ + while (sunxi_msgbox_peek_data(chan)) + readl(mbox->regs + MSG_DATA_REG(n)); + writel(RX_IRQ(n), mbox->regs + LOCAL_IRQ_STAT_REG); + + /* Enable the receive IRQ. */ + spin_lock(&mbox->lock); + writel(readl(mbox->regs + LOCAL_IRQ_EN_REG) | RX_IRQ(n), + mbox->regs + LOCAL_IRQ_EN_REG); + spin_unlock(&mbox->lock); + } + + mbox_dbg(mbox, "Channel %d startup complete\n", n); + + return 0; +} + +static void sunxi_msgbox_shutdown(struct mbox_chan *chan) +{ + struct sunxi_msgbox *mbox = channel_to_msgbox(chan); + int n = channel_number(chan); + + if (readl(mbox->regs + CTRL_REG(n)) & CTRL_RX(n)) { + /* Disable the receive IRQ. */ + spin_lock(&mbox->lock); + writel(readl(mbox->regs + LOCAL_IRQ_EN_REG) & ~RX_IRQ(n), + mbox->regs + LOCAL_IRQ_EN_REG); + spin_unlock(&mbox->lock); + + /* Attempt to flush the FIFO until the IRQ is cleared. */ + do { + while (sunxi_msgbox_peek_data(chan)) + readl(mbox->regs + MSG_DATA_REG(n)); + writel(RX_IRQ(n), mbox->regs + LOCAL_IRQ_STAT_REG); + } while (readl(mbox->regs + LOCAL_IRQ_STAT_REG) & RX_IRQ(n)); + } + + mbox_dbg(mbox, "Channel %d shutdown complete\n", n); +} + +static bool sunxi_msgbox_last_tx_done(struct mbox_chan *chan) +{ + struct sunxi_msgbox *mbox = channel_to_msgbox(chan); + int n = channel_number(chan); + + /* + * The hardware allows snooping on the remote user's IRQ statuses. + * We consider a message to be acknowledged only once the receive IRQ + * for that channel is cleared. Since the receive IRQ for a channel + * cannot be cleared until the FIFO for that channel is empty, this + * ensures that the message has actually been read. It also gives the + * recipient an opportunity to perform minimal processing before + * acknowledging the message. + */ + return !(readl(mbox->regs + REMOTE_IRQ_STAT_REG) & RX_IRQ(n)); +} + +static bool sunxi_msgbox_peek_data(struct mbox_chan *chan) +{ + struct sunxi_msgbox *mbox = channel_to_msgbox(chan); + int n = channel_number(chan); + + return readl(mbox->regs + MSG_STAT_REG(n)) & MSG_STAT_MASK; +} + +static const struct mbox_chan_ops sunxi_msgbox_chan_ops = { + .send_data = sunxi_msgbox_send_data, + .startup = sunxi_msgbox_startup, + .shutdown = sunxi_msgbox_shutdown, + .last_tx_done = sunxi_msgbox_last_tx_done, + .peek_data = sunxi_msgbox_peek_data, +}; + +static int sunxi_msgbox_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct mbox_chan *chans; + struct reset_control *reset; + struct resource *res; + struct sunxi_msgbox *mbox; + int i, ret; + + mbox = devm_kzalloc(dev, sizeof(*mbox), GFP_KERNEL); + if (!mbox) + return -ENOMEM; + + chans = devm_kcalloc(dev, NUM_CHANS, sizeof(*chans), GFP_KERNEL); + if (!chans) + return -ENOMEM; + + for (i = 0; i < NUM_CHANS; ++i) + chans[i].con_priv = mbox; + + mbox->clk = devm_clk_get(dev, NULL); + if (IS_ERR(mbox->clk)) { + ret = PTR_ERR(mbox->clk); + dev_err(dev, "Failed to get clock: %d\n", ret); + return ret; + } + + ret = clk_prepare_enable(mbox->clk); + if (ret) { + dev_err(dev, "Failed to enable clock: %d\n", ret); + return ret; + } + + reset = devm_reset_control_get(dev, NULL); + if (IS_ERR(reset)) { + ret = PTR_ERR(reset); + dev_err(dev, "Failed to get reset control: %d\n", ret); + goto err_disable_unprepare; + } + + ret = reset_control_deassert(reset); + if (ret) { + dev_err(dev, "Failed to deassert reset: %d\n", ret); + goto err_disable_unprepare; + } + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!res) { + ret = -ENODEV; + goto err_disable_unprepare; + } + + mbox->regs = devm_ioremap_resource(&pdev->dev, res); + if (IS_ERR(mbox->regs)) { + ret = PTR_ERR(mbox->regs); + dev_err(dev, "Failed to map MMIO resource: %d\n", ret); + goto err_disable_unprepare; + } + + /* Disable all IRQs for this end of the msgbox. */ + writel(0, mbox->regs + LOCAL_IRQ_EN_REG); + + ret = devm_request_irq(dev, irq_of_parse_and_map(dev->of_node, 0), + sunxi_msgbox_irq, 0, dev_name(dev), mbox); + if (ret) { + dev_err(dev, "Failed to register IRQ handler: %d\n", ret); + goto err_disable_unprepare; + } + + mbox->controller.dev = dev; + mbox->controller.ops = &sunxi_msgbox_chan_ops; + mbox->controller.chans = chans; + mbox->controller.num_chans = NUM_CHANS; + mbox->controller.txdone_irq = false; + mbox->controller.txdone_poll = true; + mbox->controller.txpoll_period = 5; + + spin_lock_init(&mbox->lock); + platform_set_drvdata(pdev, mbox); + + ret = mbox_controller_register(&mbox->controller); + if (ret) { + dev_err(dev, "Failed to register controller: %d\n", ret); + goto err_disable_unprepare; + } + + return 0; + +err_disable_unprepare: + clk_disable_unprepare(mbox->clk); + + return ret; +} + +static int sunxi_msgbox_remove(struct platform_device *pdev) +{ + struct sunxi_msgbox *mbox = platform_get_drvdata(pdev); + + mbox_controller_unregister(&mbox->controller); + clk_disable_unprepare(mbox->clk); + + return 0; +} + +static const struct of_device_id sunxi_msgbox_of_match[] = { + { .compatible = "allwinner,sun6i-a31-msgbox", }, + {}, +}; +MODULE_DEVICE_TABLE(of, sunxi_msgbox_of_match); + +static struct platform_driver sunxi_msgbox_driver = { + .driver = { + .name = "sunxi-msgbox", + .of_match_table = sunxi_msgbox_of_match, + }, + .probe = sunxi_msgbox_probe, + .remove = sunxi_msgbox_remove, +}; +module_platform_driver(sunxi_msgbox_driver); + +MODULE_AUTHOR("Samuel Holland "); +MODULE_DESCRIPTION("Allwinner sunxi Message Box"); +MODULE_LICENSE("GPL v2"); From patchwork Tue Aug 20 03:23:06 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Samuel Holland X-Patchwork-Id: 11102653 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 9A6B414F7 for ; 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Mon, 19 Aug 2019 23:23:14 -0400 (EDT) From: Samuel Holland To: Maxime Ripard , Chen-Yu Tsai , Jassi Brar , Michael Turquette , Stephen Boyd , Rob Herring , Mark Rutland , Corentin Labbe , Vasily Khoruzhick Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com, Samuel Holland Subject: [PATCH v4 05/10] ARM: dts: sunxi: a80: Add msgbox node Date: Mon, 19 Aug 2019 22:23:06 -0500 Message-Id: <20190820032311.6506-6-samuel@sholland.org> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190820032311.6506-1-samuel@sholland.org> References: <20190820032311.6506-1-samuel@sholland.org> MIME-Version: 1.0 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The A80 SoC contains a message box that can be used to send messages and interrupts back and forth between the ARM application CPUs and the ARISC coprocessor. Add a device tree node for it. Signed-off-by: Samuel Holland --- arch/arm/boot/dts/sun9i-a80.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm/boot/dts/sun9i-a80.dtsi b/arch/arm/boot/dts/sun9i-a80.dtsi index c34d505c7efe..844a265dbd0e 100644 --- a/arch/arm/boot/dts/sun9i-a80.dtsi +++ b/arch/arm/boot/dts/sun9i-a80.dtsi @@ -318,6 +318,16 @@ }; }; + msgbox: mailbox@803000 { + compatible = "allwinner,sun9i-a80-msgbox", + "allwinner,sun6i-a31-msgbox"; + reg = <0x00803000 0x1000>; + clocks = <&ccu CLK_BUS_MSGBOX>; + resets = <&ccu RST_BUS_MSGBOX>; + interrupts = ; + #mbox-cells = <1>; + }; + gmac: ethernet@830000 { compatible = "allwinner,sun7i-a20-gmac"; reg = <0x00830000 0x1054>; From patchwork Tue Aug 20 03:23:07 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Samuel Holland X-Patchwork-Id: 11102651 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7DDC914F7 for ; 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Mon, 19 Aug 2019 23:23:15 -0400 (EDT) From: Samuel Holland To: Maxime Ripard , Chen-Yu Tsai , Jassi Brar , Michael Turquette , Stephen Boyd , Rob Herring , Mark Rutland , Corentin Labbe , Vasily Khoruzhick Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com, Samuel Holland Subject: [PATCH v4 06/10] ARM: dts: sunxi: a83t: Add msgbox node Date: Mon, 19 Aug 2019 22:23:07 -0500 Message-Id: <20190820032311.6506-7-samuel@sholland.org> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190820032311.6506-1-samuel@sholland.org> References: <20190820032311.6506-1-samuel@sholland.org> MIME-Version: 1.0 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The A83T SoC contains a message box that can be used to send messages and interrupts back and forth between the ARM application CPUs and the ARISC coprocessor. Add a device tree node for it. Signed-off-by: Samuel Holland --- arch/arm/boot/dts/sun8i-a83t.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi index 523be6611c50..8871d1aaf7f5 100644 --- a/arch/arm/boot/dts/sun8i-a83t.dtsi +++ b/arch/arm/boot/dts/sun8i-a83t.dtsi @@ -583,6 +583,16 @@ reg = <0x1c14000 0x400>; }; + msgbox: mailbox@1c17000 { + compatible = "allwinner,sun8i-a83t-msgbox", + "allwinner,sun6i-a31-msgbox"; + reg = <0x01c17000 0x1000>; + clocks = <&ccu CLK_BUS_MSGBOX>; + resets = <&ccu RST_BUS_MSGBOX>; + interrupts = ; + #mbox-cells = <1>; + }; + usb_otg: usb@1c19000 { compatible = "allwinner,sun8i-a83t-musb", "allwinner,sun8i-a33-musb"; From patchwork Tue Aug 20 03:23:08 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Samuel Holland X-Patchwork-Id: 11102645 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E114914F7 for ; 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Mon, 19 Aug 2019 23:23:16 -0400 (EDT) From: Samuel Holland To: Maxime Ripard , Chen-Yu Tsai , Jassi Brar , Michael Turquette , Stephen Boyd , Rob Herring , Mark Rutland , Corentin Labbe , Vasily Khoruzhick Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com, Samuel Holland Subject: [PATCH v4 07/10] ARM: dts: sunxi: h3/h5: Add msgbox node Date: Mon, 19 Aug 2019 22:23:08 -0500 Message-Id: <20190820032311.6506-8-samuel@sholland.org> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190820032311.6506-1-samuel@sholland.org> References: <20190820032311.6506-1-samuel@sholland.org> MIME-Version: 1.0 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The H3 and H5 SoCs contain a message box that can be used to send messages and interrupts back and forth between the ARM application CPUs and the ARISC coprocessor. Add a device tree node for it. Signed-off-by: Samuel Holland --- arch/arm/boot/dts/sunxi-h3-h5.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi index 224e105a994a..f25876a8021a 100644 --- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi +++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi @@ -232,6 +232,16 @@ reg = <0x1c14000 0x400>; }; + msgbox: mailbox@1c17000 { + compatible = "allwinner,sun8i-h3-msgbox", + "allwinner,sun6i-a31-msgbox"; + reg = <0x01c17000 0x1000>; + clocks = <&ccu CLK_BUS_MSGBOX>; + resets = <&ccu RST_BUS_MSGBOX>; + interrupts = ; + #mbox-cells = <1>; + }; + usb_otg: usb@1c19000 { compatible = "allwinner,sun8i-h3-musb"; reg = <0x01c19000 0x400>; From patchwork Tue Aug 20 03:23:09 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Samuel Holland X-Patchwork-Id: 11102639 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id F1B1C14F7 for ; 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Mon, 19 Aug 2019 23:23:16 -0400 (EDT) From: Samuel Holland To: Maxime Ripard , Chen-Yu Tsai , Jassi Brar , Michael Turquette , Stephen Boyd , Rob Herring , Mark Rutland , Corentin Labbe , Vasily Khoruzhick Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com, Samuel Holland Subject: [PATCH v4 08/10] arm64: dts: allwinner: a64: Add msgbox node Date: Mon, 19 Aug 2019 22:23:09 -0500 Message-Id: <20190820032311.6506-9-samuel@sholland.org> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190820032311.6506-1-samuel@sholland.org> References: <20190820032311.6506-1-samuel@sholland.org> MIME-Version: 1.0 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The A64 SoC contains a message box that can be used to send messages and interrupts back and forth between the ARM application CPUs and the ARISC coprocessor. Add a device tree node for it. Signed-off-by: Samuel Holland --- arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi index ddb6f11e89df..428f539a091a 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi @@ -487,6 +487,16 @@ reg = <0x1c14000 0x400>; }; + msgbox: mailbox@1c17000 { + compatible = "allwinner,sun50i-a64-msgbox", + "allwinner,sun6i-a31-msgbox"; + reg = <0x01c17000 0x1000>; + clocks = <&ccu CLK_BUS_MSGBOX>; + resets = <&ccu RST_BUS_MSGBOX>; + interrupts = ; + #mbox-cells = <1>; + }; + usb_otg: usb@1c19000 { compatible = "allwinner,sun8i-a33-musb"; reg = <0x01c19000 0x0400>; From patchwork Tue Aug 20 03:23:10 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Samuel Holland X-Patchwork-Id: 11102649 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 2253E13A0 for ; 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Mon, 19 Aug 2019 23:23:17 -0400 (EDT) From: Samuel Holland To: Maxime Ripard , Chen-Yu Tsai , Jassi Brar , Michael Turquette , Stephen Boyd , Rob Herring , Mark Rutland , Corentin Labbe , Vasily Khoruzhick Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com, Samuel Holland Subject: [PATCH v4 09/10] arm64: dts: allwinner: h6: Add msgbox node Date: Mon, 19 Aug 2019 22:23:10 -0500 Message-Id: <20190820032311.6506-10-samuel@sholland.org> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190820032311.6506-1-samuel@sholland.org> References: <20190820032311.6506-1-samuel@sholland.org> MIME-Version: 1.0 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The H6 SoC contains a message box that can be used to send messages and interrupts back and forth between the ARM application CPUs and the ARISC coprocessor. Add a device tree node for it. Signed-off-by: Samuel Holland --- arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi index 67b732e34091..2ff6a47e3cbf 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi @@ -215,6 +215,16 @@ #dma-cells = <1>; }; + msgbox: mailbox@3003000 { + compatible = "allwinner,sun50i-h6-msgbox", + "allwinner,sun6i-a31-msgbox"; + reg = <0x03003000 0x1000>; + clocks = <&ccu CLK_BUS_MSGBOX>; + resets = <&ccu RST_BUS_MSGBOX>; + interrupts = ; + #mbox-cells = <1>; + }; + sid: efuse@3006000 { compatible = "allwinner,sun50i-h6-sid"; reg = <0x03006000 0x400>; From patchwork Tue Aug 20 03:23:11 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Samuel Holland X-Patchwork-Id: 11102643 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 5E86B13A0 for ; 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Mon, 19 Aug 2019 23:23:19 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sholland.org; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; s=fm3; bh=43b9Z0w2/sueU Lbuz+zMR9jc90HTmmnqAVIiMUenoB4=; b=zr/QsYb7GW02BBon48QgyvHZFGFmJ AhRSb2wPmN/9eN7aCVTUYiBvaAR/3Jx9mYnSqRD27fiAuy0lHRCArbCRlOepDAmD PQV+ML9pdFYfAcpjzB5LFlvdplqUVbUOrKgnmGFF30WmHKOoqkKsbMJ5kwoLCKWM eGlspU8+IFA251/p8EfBV3WFZWkhPBhWNThpvzV+5L/C3YsCXKtkk0da5yXBcqrf CrTVLAVn4z4pNcTUSBW8FB2jlmuLdlzZsMRr8tD+94T/05i3Yed17AXRQ0q/tQDT /ZYuMk+wLgh4b4yEJ7sBX2c3QKBkn3bb9gh3IV/dLNJlriZttipMAB++g== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-transfer-encoding:date:from :in-reply-to:message-id:mime-version:references:subject:to :x-me-proxy:x-me-proxy:x-me-sender:x-me-sender:x-sasl-enc; s= fm3; bh=43b9Z0w2/sueULbuz+zMR9jc90HTmmnqAVIiMUenoB4=; b=G1/LcdY1 mepSW5OoCYBnm/dkEwBGJiXGordmGRP8MTUnEcgVSxH6sKdi+g8AxT4Ez2FJ426q hGk6/2npLayNMvVpxYEzU4VlGLL/YTyO2TdVcEFCmGg4dwDz09YhMOHuzJ+7Kxth +b1DGWbE0+Ami+pLwvpguyRjGEfTUQBUh1XOpRprvjHrCnwHRnpXQ1DfxsJbF5RG 7wBlwCjZsJkJ0Ln3Z4FdwavKpdS0ansetqLzY1U9KIFOJdj3RSnEwEJ99kQ+G4SM btwcj5VpNMF0WuGMIiwBaIX3c9ue5U0M1vDB2P9Psp3K4gJ8cLnh5pkQ5Qek8/5r czR7tt6Wkr/OlA== X-ME-Sender: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgeduvddrudegtddgjeegucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmne cujfgurhephffvufffkffojghfggfgsedtkeertdertddtnecuhfhrohhmpefurghmuhgv lhcujfholhhlrghnugcuoehsrghmuhgvlhesshhhohhllhgrnhgurdhorhhgqeenucffoh hmrghinhepghhithhhuhgsrdgtohhmnecukfhppeejtddrudefhedrudegkedrudehuden ucfrrghrrghmpehmrghilhhfrhhomhepshgrmhhuvghlsehshhholhhlrghnugdrohhrgh enucevlhhushhtvghrufhiiigvpedt X-ME-Proxy: Received: from titanium.stl.sholland.net (70-135-148-151.lightspeed.stlsmo.sbcglobal.net [70.135.148.151]) by mail.messagingengine.com (Postfix) with ESMTPA id 0E8DB80059; Mon, 19 Aug 2019 23:23:18 -0400 (EDT) From: Samuel Holland To: Maxime Ripard , Chen-Yu Tsai , Jassi Brar , Michael Turquette , Stephen Boyd , Rob Herring , Mark Rutland , Corentin Labbe , Vasily Khoruzhick Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com, Samuel Holland Subject: [PATCH v4 10/10] [DO NOT MERGE] drivers: firmware: msgbox demo Date: Mon, 19 Aug 2019 22:23:11 -0500 Message-Id: <20190820032311.6506-11-samuel@sholland.org> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190820032311.6506-1-samuel@sholland.org> References: <20190820032311.6506-1-samuel@sholland.org> MIME-Version: 1.0 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org This driver provides a trivial mailbox client that can be used with the mailbox-demo branch of https://github.com/crust-firmware/crust for verifying the functionality of the sunxi-msgbox driver. This is not a "real" driver, nor a "real" firmware protocol. This driver is not intended to be merged. It is provided only as an example that won't interfere with any other hardware. Signed-off-by: Samuel Holland --- arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 24 ++ arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi | 24 ++ drivers/firmware/Kconfig | 6 + drivers/firmware/Makefile | 1 + drivers/firmware/sunxi_msgbox_demo.c | 310 ++++++++++++++++++ 5 files changed, 365 insertions(+) create mode 100644 drivers/firmware/sunxi_msgbox_demo.c diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi index 428f539a091a..78315d5512db 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi @@ -121,6 +121,30 @@ }; }; + demo_0 { + compatible = "allwinner,sunxi-msgbox-demo"; + mboxes = <&msgbox 0>, <&msgbox 1>; + mbox-names = "tx", "rx"; + }; + + demo_1 { + compatible = "allwinner,sunxi-msgbox-demo"; + mboxes = <&msgbox 2>, <&msgbox 3>; + mbox-names = "tx", "rx"; + }; + + demo_2 { + compatible = "allwinner,sunxi-msgbox-demo"; + mboxes = <&msgbox 4>, <&msgbox 5>; + mbox-names = "tx", "rx"; + }; + + demo_3 { + compatible = "allwinner,sunxi-msgbox-demo"; + mboxes = <&msgbox 6>, <&msgbox 7>; + mbox-names = "tx", "rx"; + }; + de: display-engine { compatible = "allwinner,sun50i-a64-display-engine"; allwinner,pipelines = <&mixer0>, diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi index f002a496d7cb..5a2d85b7e0a1 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi @@ -76,6 +76,30 @@ }; }; + demo_0 { + compatible = "allwinner,sunxi-msgbox-demo"; + mboxes = <&msgbox 0>, <&msgbox 1>; + mbox-names = "tx", "rx"; + }; + + demo_1 { + compatible = "allwinner,sunxi-msgbox-demo"; + mboxes = <&msgbox 2>, <&msgbox 3>; + mbox-names = "tx", "rx"; + }; + + demo_2 { + compatible = "allwinner,sunxi-msgbox-demo"; + mboxes = <&msgbox 4>, <&msgbox 5>; + mbox-names = "tx", "rx"; + }; + + demo_3 { + compatible = "allwinner,sunxi-msgbox-demo"; + mboxes = <&msgbox 6>, <&msgbox 7>; + mbox-names = "tx", "rx"; + }; + psci { compatible = "arm,psci-0.2"; method = "smc"; diff --git a/drivers/firmware/Kconfig b/drivers/firmware/Kconfig index ba8d3d0ef32c..e0f8f3c856c1 100644 --- a/drivers/firmware/Kconfig +++ b/drivers/firmware/Kconfig @@ -240,6 +240,12 @@ config QCOM_SCM_DOWNLOAD_MODE_DEFAULT Say Y here to enable "download mode" by default. +config SUNXI_MSGBOX_DEMO + tristate "sunxi msgbox demo" + depends on MAILBOX + help + Demo client for demo firmware to use in mailbox driver validation. + config TI_SCI_PROTOCOL tristate "TI System Control Interface (TISCI) Message Protocol" depends on TI_MESSAGE_MANAGER diff --git a/drivers/firmware/Makefile b/drivers/firmware/Makefile index 3fa0b34eb72f..6f8e17a854b6 100644 --- a/drivers/firmware/Makefile +++ b/drivers/firmware/Makefile @@ -20,6 +20,7 @@ obj-$(CONFIG_QCOM_SCM) += qcom_scm.o obj-$(CONFIG_QCOM_SCM_64) += qcom_scm-64.o obj-$(CONFIG_QCOM_SCM_32) += qcom_scm-32.o CFLAGS_qcom_scm-32.o :=$(call as-instr,.arch armv7-a\n.arch_extension sec,-DREQUIRES_SEC=1) -march=armv7-a +obj-$(CONFIG_SUNXI_MSGBOX_DEMO) += sunxi_msgbox_demo.o obj-$(CONFIG_TI_SCI_PROTOCOL) += ti_sci.o obj-$(CONFIG_TRUSTED_FOUNDATIONS) += trusted_foundations.o diff --git a/drivers/firmware/sunxi_msgbox_demo.c b/drivers/firmware/sunxi_msgbox_demo.c new file mode 100644 index 000000000000..9431b1ef1841 --- /dev/null +++ b/drivers/firmware/sunxi_msgbox_demo.c @@ -0,0 +1,310 @@ +// SPDX-License-Identifier: GPL-2.0 +// +// Copyright (c) 2018-2019 Samuel Holland + +#include +#include +#include +#include +#include + +enum { + OP_MAGIC, + OP_VERSION, + OP_LOOPBACK, + OP_LOOPBACK_INVERTED, + OP_TIME_SECONDS, + OP_TIME_TICKS, + OP_DELAY_MICROS, + OP_DELAY_MILLIS, + OP_ADDR_SET_LO, + OP_ADDR_SET_HI, + OP_ADDR_READ, + OP_ADDR_WRITE, + OP_INVALID_1, + OP_INVALID_2, + OP_RESET = 16, +}; + +struct msgbox_demo { + struct mbox_chan *rx_chan; + struct mbox_chan *tx_chan; + struct mbox_client cl; + struct completion completion; + uint32_t request; + uint32_t response; + uint32_t address; + uint32_t value; +}; + +static void msgbox_demo_rx(struct mbox_client *cl, void *msg) +{ + struct msgbox_demo *demo = container_of(cl, struct msgbox_demo, cl); + + demo->response = *(uint32_t *)msg; + complete(&demo->completion); +} + +static int msgbox_demo_tx(struct msgbox_demo *demo, uint32_t request) +{ + unsigned long timeout = msecs_to_jiffies(10); + int ret; + + demo->request = request; + demo->response = 0; + reinit_completion(&demo->completion); + + ret = mbox_send_message(demo->tx_chan, &demo->request); + if (ret < 0) { + dev_err(demo->cl.dev, "Failed to send request: %d\n", ret); + return ret; + } + + if (wait_for_completion_timeout(&demo->completion, timeout)) + return 0; + + return -ETIMEDOUT; +} + +static void msgbox_demo_do_operation(struct msgbox_demo *demo, uint16_t op) +{ + struct device *dev = demo->cl.dev; + uint16_t data = 0; + uint32_t resp = 0; + int exp = 0; + int ret; + + switch (op) { + case OP_MAGIC: + resp = 0x1a2a3a4a; + break; + case OP_LOOPBACK: + data = get_random_u32(); + resp = data; + break; + case OP_LOOPBACK_INVERTED: + data = get_random_u32(); + resp = ~data; + break; + case OP_DELAY_MICROS: + data = 25000; + exp = -ETIMEDOUT; + break; + case OP_DELAY_MILLIS: + data = 500; + exp = -ETIMEDOUT; + break; + case OP_ADDR_SET_LO: + data = demo->address & 0xffff; + resp = demo->address; + break; + case OP_ADDR_SET_HI: + data = demo->address >> 16; + break; + case OP_ADDR_WRITE: + data = demo->value; + resp = demo->value; + break; + case OP_INVALID_1: + case OP_INVALID_2: + resp = -1U; + break; + case OP_RESET: + exp = -ETIMEDOUT; + break; + } + + dev_info(demo->cl.dev, "Sending opcode %d, data 0x%08x\n", op, data); + ret = msgbox_demo_tx(demo, op << 16 | data); + + if (ret) { + /* Nothing was received. */ + if (exp) + dev_info(dev, "No response received, as expected\n"); + else + dev_err(dev, "Timeout receiving response\n"); + return; + } + + /* Something was received. */ + if (exp) + dev_err(dev, "Unexpected response 0x%08x\n", demo->response); + else if (!resp) + dev_info(dev, "Received response 0x%08x\n", demo->response); + else if (demo->response == resp) + dev_info(dev, "Good response 0x%08x\n", resp); + else + dev_err(dev, "Expected 0x%08x, received 0x%08x\n", + resp, demo->response); +} + +ssize_t demo_address_show(struct device *dev, struct device_attribute *attr, + char *buf) +{ + struct msgbox_demo *demo = dev_get_drvdata(dev); + + return sprintf(buf, "%08x\n", demo->address); +} + +static ssize_t demo_address_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) +{ + struct msgbox_demo *demo = dev_get_drvdata(dev); + uint32_t val; + + if (sscanf(buf, "%x", &val)) { + demo->address = val; + msgbox_demo_do_operation(demo, OP_ADDR_SET_HI); + msgbox_demo_do_operation(demo, OP_ADDR_SET_LO); + return count; + } + + return 0; +} + +ssize_t demo_value_show(struct device *dev, struct device_attribute *attr, + char *buf) +{ + struct msgbox_demo *demo = dev_get_drvdata(dev); + + msgbox_demo_do_operation(demo, OP_ADDR_READ); + demo->value = demo->response; + + return sprintf(buf, "%08x\n", demo->value); +} + +static ssize_t demo_value_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) +{ + struct msgbox_demo *demo = dev_get_drvdata(dev); + int16_t val; + + if (sscanf(buf, "%hx", &val)) { + demo->value = (int32_t)val; + msgbox_demo_do_operation(demo, OP_ADDR_WRITE); + return count; + } + + return 0; +} + +static ssize_t demo_operation_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) +{ + struct msgbox_demo *demo = dev_get_drvdata(dev); + uint16_t val; + + if (sscanf(buf, "%hu", &val)) { + msgbox_demo_do_operation(demo, val); + return count; + } + + return 0; +} + +static DEVICE_ATTR(demo_address, 0644, demo_address_show, demo_address_store); +static DEVICE_ATTR(demo_value, 0644, demo_value_show, demo_value_store); +static DEVICE_ATTR(demo_operation, 0200, NULL, demo_operation_store); + +static int msgbox_demo_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct device_attribute *attr; + struct msgbox_demo *demo; + int ret; + + demo = devm_kzalloc(dev, sizeof(*demo), GFP_KERNEL); + if (!demo) + return -ENOMEM; + + demo->cl.dev = dev; + demo->cl.rx_callback = msgbox_demo_rx; + + if (of_get_property(dev->of_node, "mbox-names", NULL)) { + demo->rx_chan = mbox_request_channel_byname(&demo->cl, "rx"); + if (IS_ERR(demo->rx_chan)) { + ret = PTR_ERR(demo->rx_chan); + dev_err(dev, "Failed to request rx mailbox channel\n"); + goto err; + } + demo->tx_chan = mbox_request_channel_byname(&demo->cl, "tx"); + if (IS_ERR(demo->tx_chan)) { + ret = PTR_ERR(demo->tx_chan); + dev_err(dev, "Failed to request tx mailbox channel\n"); + goto err_free_rx_chan; + } + } else { + demo->rx_chan = mbox_request_channel(&demo->cl, 0); + demo->tx_chan = demo->rx_chan; + if (IS_ERR(demo->tx_chan)) { + ret = PTR_ERR(demo->tx_chan); + dev_err(dev, "Failed to request mailbox channel\n"); + goto err; + } + } + + attr = &dev_attr_demo_address; + ret = device_create_file(dev, attr); + if (ret) + goto err_creating_files; + attr = &dev_attr_demo_value; + ret = device_create_file(dev, attr); + if (ret) + goto err_creating_files; + attr = &dev_attr_demo_operation; + ret = device_create_file(dev, attr); + if (ret) + goto err_creating_files; + + init_completion(&demo->completion); + + platform_set_drvdata(pdev, demo); + + msgbox_demo_do_operation(demo, OP_VERSION); + + return 0; + +err_creating_files: + dev_err(dev, "Failed to create sysfs attribute %s: %d\n", + attr->attr.name, ret); + if (demo->tx_chan != demo->rx_chan) + mbox_free_channel(demo->tx_chan); +err_free_rx_chan: + mbox_free_channel(demo->rx_chan); +err: + return ret; +} + +static int msgbox_demo_remove(struct platform_device *pdev) +{ + struct msgbox_demo *demo = platform_get_drvdata(pdev); + + if (demo->tx_chan != demo->rx_chan) + mbox_free_channel(demo->tx_chan); + mbox_free_channel(demo->rx_chan); + + return 0; +} + +static const struct of_device_id msgbox_demo_of_match[] = { + { .compatible = "allwinner,sunxi-msgbox-demo" }, + {}, +}; +MODULE_DEVICE_TABLE(of, msgbox_demo_of_match); + +static struct platform_driver msgbox_demo_driver = { + .driver = { + .name = KBUILD_MODNAME, + .of_match_table = msgbox_demo_of_match, + }, + .probe = msgbox_demo_probe, + .remove = msgbox_demo_remove, +}; +module_platform_driver(msgbox_demo_driver); + +MODULE_AUTHOR("Samuel Holland "); +MODULE_DESCRIPTION("sunxi msgbox demo"); +MODULE_LICENSE("GPL v2");