From patchwork Tue Sep 10 22:46:03 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Fosha, Robert M" X-Patchwork-Id: 11140105 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id CC5F114E5 for ; Tue, 10 Sep 2019 22:51:29 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id AB011216F4 for ; Tue, 10 Sep 2019 22:51:28 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org AB011216F4 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 2EEEF6E8DE; Tue, 10 Sep 2019 22:51:28 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by gabe.freedesktop.org (Postfix) with ESMTPS id B4C146E8DE for ; Tue, 10 Sep 2019 22:51:26 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 10 Sep 2019 15:51:26 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,491,1559545200"; d="scan'208";a="178830577" Received: from rmfosha-dev-1.fm.intel.com ([10.19.83.123]) by orsmga008.jf.intel.com with ESMTP; 10 Sep 2019 15:51:25 -0700 From: "Robert M. Fosha" To: intel-gfx@lists.freedesktop.org Date: Tue, 10 Sep 2019 15:46:03 -0700 Message-Id: <20190910224603.23164-1-robert.m.fosha@intel.com> X-Mailer: git-send-email 2.21.0.5.gaeb582a983 MIME-Version: 1.0 Subject: [Intel-gfx] [RFC] drm/i915/guc: Enable guc logging on guc log relay write X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Creating and opening the GuC log relay file enables and starts the relay potentially before the caller is ready to consume logs. Change the behavior so that relay starts only on an explicit call to the write function (with a value of '1'). Other values flush the log relay as before. Cc: Matthew Brost Cc: Daniele Ceraolo Spurio Cc: Michal Wajdeczko Signed-off-by: Robert M. Fosha --- drivers/gpu/drm/i915/gt/uc/intel_guc_log.c | 38 +++++++++++++++++----- drivers/gpu/drm/i915/gt/uc/intel_guc_log.h | 2 ++ drivers/gpu/drm/i915/i915_debugfs.c | 27 +++++++++++++-- 3 files changed, 56 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c index 36332064de9c..9a98270d05b6 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c @@ -361,6 +361,7 @@ void intel_guc_log_init_early(struct intel_guc_log *log) { mutex_init(&log->relay.lock); INIT_WORK(&log->relay.flush_work, capture_logs_work); + log->relay_started = false; } static int guc_log_relay_create(struct intel_guc_log *log) @@ -585,15 +586,6 @@ int intel_guc_log_relay_open(struct intel_guc_log *log) mutex_unlock(&log->relay.lock); - guc_log_enable_flush_events(log); - - /* - * When GuC is logging without us relaying to userspace, we're ignoring - * the flush notification. This means that we need to unconditionally - * flush on relay enabling, since GuC only notifies us once. - */ - queue_work(system_highpri_wq, &log->relay.flush_work); - return 0; out_relay: @@ -604,12 +596,38 @@ int intel_guc_log_relay_open(struct intel_guc_log *log) return ret; } +int intel_guc_log_relay_start(struct intel_guc_log *log) +{ + int ret = 0; + + if (log->relay_started) { + ret = -EEXIST; + } else { + guc_log_enable_flush_events(log); + + /* + * When GuC is logging without us relaying to userspace, we're + * ignoring the flush notification. This means that we need to + * unconditionally * flush on relay enabling, since GuC only + * notifies us once. + */ + queue_work(system_highpri_wq, &log->relay.flush_work); + + log->relay_started = false; + } + + return ret; +} + void intel_guc_log_relay_flush(struct intel_guc_log *log) { struct intel_guc *guc = log_to_guc(log); struct drm_i915_private *i915 = guc_to_gt(guc)->i915; intel_wakeref_t wakeref; + if (!log->relay_started) + return; + /* * Before initiating the forceful flush, wait for any pending/ongoing * flush to complete otherwise forceful flush may not actually happen. @@ -638,6 +656,8 @@ void intel_guc_log_relay_close(struct intel_guc_log *log) guc_log_unmap(log); guc_log_relay_destroy(log); mutex_unlock(&log->relay.lock); + + log->relay_started = false; } void intel_guc_log_handle_flush_event(struct intel_guc_log *log) diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_log.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_log.h index 6f764879acb1..ecf7a49416b4 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_log.h +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_log.h @@ -44,6 +44,7 @@ struct intel_guc; struct intel_guc_log { u32 level; + bool relay_started; struct i915_vma *vma; struct { void *buf_addr; @@ -67,6 +68,7 @@ void intel_guc_log_destroy(struct intel_guc_log *log); int intel_guc_log_set_level(struct intel_guc_log *log, u32 level); bool intel_guc_log_relay_enabled(const struct intel_guc_log *log); int intel_guc_log_relay_open(struct intel_guc_log *log); +int intel_guc_log_relay_start(struct intel_guc_log *log); void intel_guc_log_relay_flush(struct intel_guc_log *log); void intel_guc_log_relay_close(struct intel_guc_log *log); diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index 708855e051b5..c3683fdd0deb 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c @@ -2049,9 +2049,32 @@ i915_guc_log_relay_write(struct file *filp, loff_t *ppos) { struct intel_guc_log *log = filp->private_data; + char *input_buffer; + int val; + int ret; - intel_guc_log_relay_flush(log); - return cnt; + input_buffer = memdup_user_nul(ubuf, cnt); + if (IS_ERR(input_buffer)) + return PTR_ERR(input_buffer); + + ret = kstrtoint(input_buffer, 10, &val); + if (ret < 0) + goto out; + + /* + * Enable and start the guc log relay on value of 1. + * Flush log relay for any other value. + */ + if (val == 1) { + ret = intel_guc_log_relay_start(log); + } else { + intel_guc_log_relay_flush(log); + ret = cnt; + } + +out: + kfree(input_buffer); + return ret; } static int i915_guc_log_relay_release(struct inode *inode, struct file *file)