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X-Spam-Score: -0.2 (/) X-Spam-Report: SpamAssassin version 3.4.2 on bombadil.infradead.org summary: Content analysis details: (-0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2a00:1450:4864:20:0:0:0:341 listed in] [list.dnswl.org] 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider (christianshewitt[at]gmail.com) 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Frank Hartung , Christian Hewitt MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org From: Frank Hartung From: Frank Hartung Meson G12B SoCs (S922X and A311D) are a big-little design where not all CPUs are equal; the A53s cores are weaker than the A72s. Include capacity-dmips-mhz properties to tell the OS there is a difference in processing capacity. The dmips values are based on similar submissions for other A53/A72 SoCs: HiSilicon 3660 [1] and Rockchip RK3399 [2]. This change is particularly beneficial for use-cases like retro gaming where emulators often run on a single core. The OS now chooses an A72 core instead of an A53 core. [1] https://lore.kernel.org/patchwork/patch/862742/ [2] https://patchwork.kernel.org/patch/10836577/ Signed-off-by: Frank Hartung Signed-off-by: Christian Hewitt Reviewed-by: Neil Armstrong --- arch/arm64/boot/dts/amlogic/meson-g12b.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi index 5628ccd..7f78d88 100644 --- a/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi @@ -49,6 +49,7 @@ compatible = "arm,cortex-a53"; reg = <0x0 0x0>; enable-method = "psci"; + capacity-dmips-mhz = <592>; next-level-cache = <&l2>; }; @@ -57,6 +58,7 @@ compatible = "arm,cortex-a53"; reg = <0x0 0x1>; enable-method = "psci"; + capacity-dmips-mhz = <592>; next-level-cache = <&l2>; }; @@ -65,6 +67,7 @@ compatible = "arm,cortex-a73"; reg = <0x0 0x100>; enable-method = "psci"; + capacity-dmips-mhz = <1024>; next-level-cache = <&l2>; }; @@ -73,6 +76,7 @@ compatible = "arm,cortex-a73"; reg = <0x0 0x101>; enable-method = "psci"; + capacity-dmips-mhz = <1024>; next-level-cache = <&l2>; }; @@ -81,6 +85,7 @@ compatible = "arm,cortex-a73"; reg = <0x0 0x102>; enable-method = "psci"; + capacity-dmips-mhz = <1024>; next-level-cache = <&l2>; }; @@ -89,6 +94,7 @@ compatible = "arm,cortex-a73"; reg = <0x0 0x103>; enable-method = "psci"; + capacity-dmips-mhz = <1024>; next-level-cache = <&l2>; };