From patchwork Sat Sep 21 10:08:36 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 11155411 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 6197214E5 for ; Sat, 21 Sep 2019 10:10:22 +0000 (UTC) Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 41C04217F5 for ; Sat, 21 Sep 2019 10:10:22 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 41C04217F5 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1iBcJw-0003rl-1A; Sat, 21 Sep 2019 10:08:52 +0000 Received: from all-amaz-eas1.inumbo.com ([34.197.232.57] helo=us1-amaz-eas2.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1iBcJu-0003re-5G for xen-devel@lists.xenproject.org; Sat, 21 Sep 2019 10:08:50 +0000 X-Inumbo-ID: cd9802e6-dc57-11e9-95b8-12813bfff9fa Received: from foss.arm.com (unknown [217.140.110.172]) by us1-amaz-eas2.inumbo.com (Halon) with ESMTP id cd9802e6-dc57-11e9-95b8-12813bfff9fa; Sat, 21 Sep 2019 10:08:48 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id DFDDE1000; Sat, 21 Sep 2019 03:08:47 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 39FC13F59C; Sat, 21 Sep 2019 03:08:47 -0700 (PDT) From: Julien Grall To: xen-devel@lists.xenproject.org Date: Sat, 21 Sep 2019 11:08:36 +0100 Message-Id: <20190921100836.21396-1-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 Subject: [Xen-devel] [RESEND][PATCH for-4.13] xen/arm: mm: Clear boot pagetables before bringing-up each secondary CPU X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Julien Grall , Stefano Stabellini , Volodymyr Babchuk MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" At the moment, boot pagetables are only cleared once at boot. This means when booting CPU2 (and onwards) then boot pagetables will not be cleared. To keep the interface exactly the same for all secondary CPU, the boot pagetables are now cleared before bringing-up each secondary CPU. Signed-off-by: Julien Grall Reviewed-by: Volodymyr Babchuk Reviewed-by: Stefano Stabellini --- xen/arch/arm/mm.c | 27 ++++++++++++++++++--------- 1 file changed, 18 insertions(+), 9 deletions(-) diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c index 1129dc28c8..e14ee76ff8 100644 --- a/xen/arch/arm/mm.c +++ b/xen/arch/arm/mm.c @@ -704,8 +704,20 @@ void __init setup_pagetables(unsigned long boot_phys_offset) switch_ttbr(ttbr); - /* Clear the copy of the boot pagetables. Each secondary CPU - * rebuilds these itself (see head.S) */ + xen_pt_enforce_wnx(); + +#ifdef CONFIG_ARM_32 + per_cpu(xen_pgtable, 0) = cpu0_pgtable; + per_cpu(xen_dommap, 0) = cpu0_dommap; +#endif +} + +static void clear_boot_pagetables(void) +{ + /* + * Clear the copy of the boot pagetables. Each secondary CPU + * rebuilds these itself (see head.S) + */ clear_table(boot_pgtable); #ifdef CONFIG_ARM_64 clear_table(boot_first); @@ -713,18 +725,13 @@ void __init setup_pagetables(unsigned long boot_phys_offset) #endif clear_table(boot_second); clear_table(boot_third); - - xen_pt_enforce_wnx(); - -#ifdef CONFIG_ARM_32 - per_cpu(xen_pgtable, 0) = cpu0_pgtable; - per_cpu(xen_dommap, 0) = cpu0_dommap; -#endif } #ifdef CONFIG_ARM_64 int init_secondary_pagetables(int cpu) { + clear_boot_pagetables(); + /* Set init_ttbr for this CPU coming up. All CPus share a single setof * pagetables, but rewrite it each time for consistency with 32 bit. */ init_ttbr = (uintptr_t) xen_pgtable + phys_offset; @@ -767,6 +774,8 @@ int init_secondary_pagetables(int cpu) per_cpu(xen_pgtable, cpu) = first; per_cpu(xen_dommap, cpu) = domheap; + clear_boot_pagetables(); + /* Set init_ttbr for this CPU coming up */ init_ttbr = __pa(first); clean_dcache(init_ttbr);