From patchwork Fri Sep 27 09:08:33 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ramalingam C X-Patchwork-Id: 11164121 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id DE71B14E5 for ; Fri, 27 Sep 2019 09:08:47 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id C5AEA2146E for ; Fri, 27 Sep 2019 09:08:47 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org C5AEA2146E Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 26C596EEC0; Fri, 27 Sep 2019 09:08:47 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by gabe.freedesktop.org (Postfix) with ESMTPS id 54C896EEC0 for ; Fri, 27 Sep 2019 09:08:45 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 27 Sep 2019 02:08:44 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,554,1559545200"; d="scan'208";a="180445747" Received: from ramaling-i9x.iind.intel.com ([10.99.66.154]) by orsmga007.jf.intel.com with ESMTP; 27 Sep 2019 02:08:42 -0700 From: Ramalingam C To: intel-gfx Date: Fri, 27 Sep 2019 14:38:33 +0530 Message-Id: <20190927090833.16383-1-ramalingam.c@intel.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190926052135.29911-2-ramalingam.c@intel.com> References: <20190926052135.29911-2-ramalingam.c@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v2 2/3] drm/i915: Allowed memory region for GEM obj X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Matthew Auld Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Each GEM object is initialized with allowed memory regions for it's migration across memory region. In future patch we are restricting the memory regions or few objects. This is developed on top of v3 LMEM series https://patchwork.freedesktop.org/series/56683/ v2: dev_priv is retrieved from obj [Chris] CC: Matthew Auld Signed-off-by: Ramalingam C --- drivers/gpu/drm/i915/gem/i915_gem_object.c | 9 +++++++++ drivers/gpu/drm/i915/gem/i915_gem_object_types.h | 3 +++ 2 files changed, 12 insertions(+) diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.c b/drivers/gpu/drm/i915/gem/i915_gem_object.c index 0f33da5e541d..165ae03c6774 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_object.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_object.c @@ -51,6 +51,8 @@ void i915_gem_object_free(struct drm_i915_gem_object *obj) void i915_gem_object_init(struct drm_i915_gem_object *obj, const struct drm_i915_gem_object_ops *ops) { + struct drm_i915_file_private *dev_priv = to_i915(obj->base.drm); + mutex_init(&obj->mm.lock); spin_lock_init(&obj->vma.lock); @@ -70,6 +72,8 @@ void i915_gem_object_init(struct drm_i915_gem_object *obj, obj->mm.madv = I915_MADV_WILLNEED; INIT_RADIX_TREE(&obj->mm.get_page.radix, GFP_KERNEL | __GFP_NOWARN); mutex_init(&obj->mm.get_page.lock); + + obj->memory_regions = INTEL_INFO(dev_priv)->memory_regions; } /** @@ -534,6 +538,11 @@ static int i915_gem_object_region_select(struct drm_i915_private *dev_priv, u32 region = uregions_copy[i]; enum intel_region_id id = __region_id(region); + if (!(obj->memory_regions & region)) { + ret = -EINVAL; + continue; + } + if (id == INTEL_MEMORY_UKNOWN) { ret = -EINVAL; goto err; diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h index 7b93450a860b..af5505e0bd0a 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h +++ b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h @@ -286,6 +286,9 @@ struct drm_i915_gem_object { /** for phys allocated objects */ struct drm_dma_handle *phys_handle; + + /* Allowed memory regions for this obj to reside in. */ + u32 memory_regions; }; static inline struct drm_i915_gem_object * From patchwork Fri Sep 27 09:09:42 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ramalingam C X-Patchwork-Id: 11164127 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 2C99914DB for ; Fri, 27 Sep 2019 09:09:56 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 14C4D217D7 for ; Fri, 27 Sep 2019 09:09:56 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 14C4D217D7 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 88F456EEC5; Fri, 27 Sep 2019 09:09:55 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id 59A826EEC5 for ; Fri, 27 Sep 2019 09:09:54 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 27 Sep 2019 02:09:53 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,554,1559545200"; d="scan'208";a="183915505" Received: from ramaling-i9x.iind.intel.com ([10.99.66.154]) by orsmga008.jf.intel.com with ESMTP; 27 Sep 2019 02:09:52 -0700 From: Ramalingam C To: intel-gfx Date: Fri, 27 Sep 2019 14:39:42 +0530 Message-Id: <20190927090942.16439-1-ramalingam.c@intel.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190926052135.29911-3-ramalingam.c@intel.com> References: <20190926052135.29911-3-ramalingam.c@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v2 3/3] drm/i915: FB backing gem obj should reside in LMEM X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Matthew Auld Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" If Local memory is supported by hardware, we want framebuffer backing gem objects out of local memory. If local memory is supported and gem object if not from local memory we migrate the obj into local memory. And once framebuffer is created we block the migration of the associated object out of local memory. This is developed on top of v3 LMEM series https://patchwork.freedesktop.org/series/56683/ v2: memory regions are correctly assigned to obj->memory_regions [tvrtko] migration failure is reported as debug log [Tvrtko] cc: Matthew Auld Signed-off-by: Ramalingam C --- drivers/gpu/drm/i915/display/intel_display.c | 25 +++++++++ drivers/gpu/drm/i915/gem/i915_gem_object.c | 58 ++++++++++++-------- drivers/gpu/drm/i915/gem/i915_gem_object.h | 2 + 3 files changed, 61 insertions(+), 24 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 1cc74844d3ea..175c01e24c78 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -56,6 +56,8 @@ #include "display/intel_tv.h" #include "display/intel_vdsc.h" +#include "gem/i915_gem_object.h" + #include "i915_drv.h" #include "i915_trace.h" #include "intel_acpi.h" @@ -15496,6 +15498,11 @@ static void intel_setup_outputs(struct drm_i915_private *dev_priv) static void intel_user_framebuffer_destroy(struct drm_framebuffer *fb) { struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb); + struct drm_i915_private *dev_priv = to_i915(fb->dev); + + /* removing the FB memory region restriction on obj, if any */ + intel_fb->front_buffer->obj->memory_regions = + INTEL_INFO(dev_priv)->memory_regions; drm_framebuffer_cleanup(fb); intel_frontbuffer_put(intel_fb->frontbuffer); @@ -15543,11 +15550,25 @@ static int intel_framebuffer_init(struct intel_framebuffer *intel_fb, { struct drm_i915_private *dev_priv = to_i915(obj->base.dev); struct drm_framebuffer *fb = &intel_fb->base; + u32 *region_map; u32 max_stride; unsigned int tiling, stride; int ret = -EINVAL; int i; + /* GEM Obj for frame buffer is expected to be in LMEM. */ + if (HAS_LMEM(dev_priv)) + if (obj->mm.region->type != INTEL_LMEM) { + region_map = &intel_region_map[INTEL_MEMORY_LMEM]; + ret = i915_gem_object_mem_region_migrate(obj, + region_map, 1); + if (ret) { + DRM_DEBUG_KMS("Migration to LMEM Failed(%d)\n", + ret); + return ret; + } + } + intel_fb->frontbuffer = intel_frontbuffer_get(obj); if (!intel_fb->frontbuffer) return -ENOMEM; @@ -15666,6 +15687,10 @@ static int intel_framebuffer_init(struct intel_framebuffer *intel_fb, goto err; } + /* Blocking the migration of gem obj out of LMEM */ + if (HAS_LMEM(dev_priv)) + obj->memory_regions = REGION_LMEM; + return 0; err: diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.c b/drivers/gpu/drm/i915/gem/i915_gem_object.c index 165ae03c6774..b2e692cb18f1 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_object.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_object.c @@ -502,30 +502,11 @@ __region_id(u32 region) return INTEL_MEMORY_UKNOWN; } -static int i915_gem_object_region_select(struct drm_i915_private *dev_priv, - struct drm_i915_gem_object_param *args, - struct drm_file *file, - struct drm_i915_gem_object *obj) +int i915_gem_object_mem_region_migrate(struct drm_i915_gem_object *obj, + u32 *uregions, u32 region_count) { + struct drm_i915_file_private *dev_priv = to_i915(obj->base.drm); struct intel_context *ce = dev_priv->engine[BCS0]->kernel_context; - u32 __user *uregions = u64_to_user_ptr(args->data); - u32 uregions_copy[INTEL_MEMORY_UKNOWN]; - int i, ret; - - if (args->size > INTEL_MEMORY_UKNOWN) - return -EINVAL; - - memset(uregions_copy, 0, sizeof(uregions_copy)); - for (i = 0; i < args->size; i++) { - u32 region; - - ret = get_user(region, uregions); - if (ret) - return ret; - - uregions_copy[i] = region; - ++uregions; - } mutex_lock(&dev_priv->drm.struct_mutex); ret = i915_gem_object_prepare_move(obj); @@ -534,8 +515,8 @@ static int i915_gem_object_region_select(struct drm_i915_private *dev_priv, goto err; } - for (i = 0; i < args->size; i++) { - u32 region = uregions_copy[i]; + for (i = 0; i < region_count; i++) { + u32 region = uregions[i]; enum intel_region_id id = __region_id(region); if (!(obj->memory_regions & region)) { @@ -577,6 +558,35 @@ static int i915_gem_object_region_select(struct drm_i915_private *dev_priv, return ret; } +static int i915_gem_object_region_select(struct drm_i915_private *dev_priv, + struct drm_i915_gem_object_param *args, + struct drm_file *file, + struct drm_i915_gem_object *obj) +{ + struct intel_context *ce = dev_priv->engine[BCS0]->kernel_context; + u32 __user *uregions = u64_to_user_ptr(args->data); + u32 uregions_copy[INTEL_MEMORY_UKNOWN]; + int i, ret; + + if (args->size > INTEL_MEMORY_UKNOWN) + return -EINVAL; + + memset(uregions_copy, 0, sizeof(uregions_copy)); + for (i = 0; i < args->size; i++) { + u32 region; + + ret = get_user(region, uregions); + if (ret) + return ret; + + uregions_copy[i] = region; + ++uregions; + } + + return i915_gem_object_mem_region_migrate(obj, uregions_copy, + args->size); +} + int i915_gem_object_setparam_ioctl(struct drm_device *dev, void *data, struct drm_file *file) { diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.h b/drivers/gpu/drm/i915/gem/i915_gem_object.h index a7c073aeb777..996646001d80 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_object.h +++ b/drivers/gpu/drm/i915/gem/i915_gem_object.h @@ -47,6 +47,8 @@ int i915_gem_object_migrate(struct drm_i915_gem_object *obj, enum intel_region_id id); void i915_gem_flush_free_objects(struct drm_i915_private *i915); +int i915_gem_object_mem_region_migrate(struct drm_i915_gem_object *obj, + u32 *uregions, u32 region_count); void __i915_gem_object_reset_page_iter(struct drm_i915_gem_object *obj);