From patchwork Fri Oct 4 08:35:27 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fabrizio Castro X-Patchwork-Id: 11173795 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D7D7213B1 for ; Fri, 4 Oct 2019 08:35:50 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id B737E21D81 for ; Fri, 4 Oct 2019 08:35:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730320AbfJDIfu (ORCPT ); Fri, 4 Oct 2019 04:35:50 -0400 Received: from relmlor1.renesas.com ([210.160.252.171]:29757 "EHLO relmlie5.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726024AbfJDIft (ORCPT ); Fri, 4 Oct 2019 04:35:49 -0400 X-IronPort-AV: E=Sophos;i="5.67,255,1566831600"; d="scan'208";a="28287578" Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie5.idc.renesas.com with ESMTP; 04 Oct 2019 17:35:47 +0900 Received: from fabrizio-dev.ree.adwin.renesas.com (unknown [10.226.36.196]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id 2F3A941E71A3; Fri, 4 Oct 2019 17:35:41 +0900 (JST) From: Fabrizio Castro To: Geert Uytterhoeven , Rob Herring , Mark Rutland , Mark Brown , Wim Van Sebroeck , Guenter Roeck Cc: Fabrizio Castro , Bjorn Helgaas , Simon Horman , Magnus Damm , linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org, linux-watchdog@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Chris Paterson , Biju Das , Laurent Pinchart , Kieran Bingham , Jacopo Mondi , xu_shunji@hoperun.com Subject: [PATCH 1/7] dt-bindings: watchdog: renesas-wdt: Document r8a774b1 support Date: Fri, 4 Oct 2019 09:35:27 +0100 Message-Id: <1570178133-21532-2-git-send-email-fabrizio.castro@bp.renesas.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1570178133-21532-1-git-send-email-fabrizio.castro@bp.renesas.com> References: <1570178133-21532-1-git-send-email-fabrizio.castro@bp.renesas.com> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org RZ/G2N (a.k.a. R8A774B1) watchdog implementation is compatible with R-Car Gen3, therefore add the relevant documentation. Signed-off-by: Fabrizio Castro Reviewed-by: Guenter Roeck Reviewed-by: Geert Uytterhoeven --- Documentation/devicetree/bindings/watchdog/renesas,wdt.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/watchdog/renesas,wdt.txt b/Documentation/devicetree/bindings/watchdog/renesas,wdt.txt index 9f365c1..a5bf04d 100644 --- a/Documentation/devicetree/bindings/watchdog/renesas,wdt.txt +++ b/Documentation/devicetree/bindings/watchdog/renesas,wdt.txt @@ -10,6 +10,7 @@ Required properties: - "renesas,r8a7745-wdt" (RZ/G1E) - "renesas,r8a77470-wdt" (RZ/G1C) - "renesas,r8a774a1-wdt" (RZ/G2M) + - "renesas,r8a774b1-wdt" (RZ/G2N) - "renesas,r8a774c0-wdt" (RZ/G2E) - "renesas,r8a7790-wdt" (R-Car H2) - "renesas,r8a7791-wdt" (R-Car M2-W) From patchwork Fri Oct 4 08:35:28 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fabrizio Castro X-Patchwork-Id: 11173809 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 438AE1747 for ; Fri, 4 Oct 2019 08:35:59 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 22FB821A4C for ; Fri, 4 Oct 2019 08:35:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731053AbfJDIfy (ORCPT ); Fri, 4 Oct 2019 04:35:54 -0400 Received: from relmlor1.renesas.com ([210.160.252.171]:29757 "EHLO relmlie5.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726024AbfJDIfy (ORCPT ); Fri, 4 Oct 2019 04:35:54 -0400 X-IronPort-AV: E=Sophos;i="5.67,255,1566831600"; d="scan'208";a="28287584" Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie5.idc.renesas.com with ESMTP; 04 Oct 2019 17:35:52 +0900 Received: from fabrizio-dev.ree.adwin.renesas.com (unknown [10.226.36.196]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id 899E141E561A; Fri, 4 Oct 2019 17:35:47 +0900 (JST) From: Fabrizio Castro To: Geert Uytterhoeven , Rob Herring , Mark Rutland , Mark Brown , Wim Van Sebroeck , Guenter Roeck Cc: Fabrizio Castro , Bjorn Helgaas , Simon Horman , Magnus Damm , linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org, linux-watchdog@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Chris Paterson , Biju Das , Laurent Pinchart , Kieran Bingham , Jacopo Mondi , xu_shunji@hoperun.com Subject: [PATCH 2/7] dt-bindings: spi: sh-msiof: Add r8a774b1 support Date: Fri, 4 Oct 2019 09:35:28 +0100 Message-Id: <1570178133-21532-3-git-send-email-fabrizio.castro@bp.renesas.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1570178133-21532-1-git-send-email-fabrizio.castro@bp.renesas.com> References: <1570178133-21532-1-git-send-email-fabrizio.castro@bp.renesas.com> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Document RZ/G2N (R8A774B1) SoC bindings. Signed-off-by: Fabrizio Castro Reviewed-by: Geert Uytterhoeven --- This patch depends on https://patchwork.kernel.org/patch/11162283/ --- Documentation/devicetree/bindings/spi/renesas,sh-msiof.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/spi/renesas,sh-msiof.yaml b/Documentation/devicetree/bindings/spi/renesas,sh-msiof.yaml index 4afaa48..b6c1dd2 100644 --- a/Documentation/devicetree/bindings/spi/renesas,sh-msiof.yaml +++ b/Documentation/devicetree/bindings/spi/renesas,sh-msiof.yaml @@ -35,6 +35,7 @@ properties: - items: - enum: - renesas,msiof-r8a774a1 # RZ/G2M + - renesas,msiof-r8a774b1 # RZ/G2N - renesas,msiof-r8a774c0 # RZ/G2E - renesas,msiof-r8a7795 # R-Car H3 - renesas,msiof-r8a7796 # R-Car M3-W From patchwork Fri Oct 4 08:35:29 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fabrizio Castro X-Patchwork-Id: 11173811 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id BDF9316B1 for ; Fri, 4 Oct 2019 08:36:00 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 9C805222C8 for ; Fri, 4 Oct 2019 08:36:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731153AbfJDIgA (ORCPT ); Fri, 4 Oct 2019 04:36:00 -0400 Received: from relmlor1.renesas.com ([210.160.252.171]:29757 "EHLO relmlie5.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726024AbfJDIf7 (ORCPT ); Fri, 4 Oct 2019 04:35:59 -0400 X-IronPort-AV: E=Sophos;i="5.67,255,1566831600"; d="scan'208";a="28287603" Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie5.idc.renesas.com with ESMTP; 04 Oct 2019 17:35:57 +0900 Received: from fabrizio-dev.ree.adwin.renesas.com (unknown [10.226.36.196]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id E738041E561A; Fri, 4 Oct 2019 17:35:52 +0900 (JST) From: Fabrizio Castro To: Geert Uytterhoeven , Rob Herring , Mark Rutland , Mark Brown , Wim Van Sebroeck , Guenter Roeck Cc: Fabrizio Castro , Bjorn Helgaas , Simon Horman , Magnus Damm , linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org, linux-watchdog@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Chris Paterson , Biju Das , Laurent Pinchart , Kieran Bingham , Jacopo Mondi , xu_shunji@hoperun.com Subject: [PATCH 3/7] dt-bindings: PCI: rcar: Add device tree support for r8a774b1 Date: Fri, 4 Oct 2019 09:35:29 +0100 Message-Id: <1570178133-21532-4-git-send-email-fabrizio.castro@bp.renesas.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1570178133-21532-1-git-send-email-fabrizio.castro@bp.renesas.com> References: <1570178133-21532-1-git-send-email-fabrizio.castro@bp.renesas.com> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Add PCIe support for the RZ/G2N (a.k.a. R8A774B1). Signed-off-by: Fabrizio Castro Reviewed-by: Andrew Murray Reviewed-by: Geert Uytterhoeven --- Documentation/devicetree/bindings/pci/rcar-pci.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/pci/rcar-pci.txt b/Documentation/devicetree/bindings/pci/rcar-pci.txt index 45bba9f..12702c8 100644 --- a/Documentation/devicetree/bindings/pci/rcar-pci.txt +++ b/Documentation/devicetree/bindings/pci/rcar-pci.txt @@ -4,6 +4,7 @@ Required properties: compatible: "renesas,pcie-r8a7743" for the R8A7743 SoC; "renesas,pcie-r8a7744" for the R8A7744 SoC; "renesas,pcie-r8a774a1" for the R8A774A1 SoC; + "renesas,pcie-r8a774b1" for the R8A774B1 SoC; "renesas,pcie-r8a774c0" for the R8A774C0 SoC; "renesas,pcie-r8a7779" for the R8A7779 SoC; "renesas,pcie-r8a7790" for the R8A7790 SoC; From patchwork Fri Oct 4 08:35:30 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fabrizio Castro X-Patchwork-Id: 11173823 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 75B47195A for ; Fri, 4 Oct 2019 08:36:05 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 538D0222C7 for ; Fri, 4 Oct 2019 08:36:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731191AbfJDIgE (ORCPT ); Fri, 4 Oct 2019 04:36:04 -0400 Received: from relmlor2.renesas.com ([210.160.252.172]:15455 "EHLO relmlie6.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726024AbfJDIgE (ORCPT ); Fri, 4 Oct 2019 04:36:04 -0400 X-IronPort-AV: E=Sophos;i="5.67,255,1566831600"; d="scan'208";a="28068790" Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie6.idc.renesas.com with ESMTP; 04 Oct 2019 17:36:02 +0900 Received: from fabrizio-dev.ree.adwin.renesas.com (unknown [10.226.36.196]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id 4422641E561A; Fri, 4 Oct 2019 17:35:58 +0900 (JST) From: Fabrizio Castro To: Geert Uytterhoeven , Rob Herring , Mark Rutland , Mark Brown , Wim Van Sebroeck , Guenter Roeck Cc: Fabrizio Castro , Bjorn Helgaas , Simon Horman , Magnus Damm , linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-spi@vger.kernel.org, linux-watchdog@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Chris Paterson , Biju Das , Laurent Pinchart , Kieran Bingham , Jacopo Mondi , xu_shunji@hoperun.com Subject: [PATCH 4/7] arm64: dts: renesas: r8a774b1: Add RWDT node Date: Fri, 4 Oct 2019 09:35:30 +0100 Message-Id: <1570178133-21532-5-git-send-email-fabrizio.castro@bp.renesas.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1570178133-21532-1-git-send-email-fabrizio.castro@bp.renesas.com> References: <1570178133-21532-1-git-send-email-fabrizio.castro@bp.renesas.com> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Populate the device tree node for the Watchdog Timer (RWDT) controller on the Renesas RZ/G2N (r8a774b1) SoC. Signed-off-by: Fabrizio Castro Reviewed-by: Geert Uytterhoeven --- arch/arm64/boot/dts/renesas/r8a774b1.dtsi | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/renesas/r8a774b1.dtsi b/arch/arm64/boot/dts/renesas/r8a774b1.dtsi index 538e9ce..3f885a6 100644 --- a/arch/arm64/boot/dts/renesas/r8a774b1.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a774b1.dtsi @@ -151,8 +151,13 @@ ranges; rwdt: watchdog@e6020000 { + compatible = "renesas,r8a774b1-wdt", + "renesas,rcar-gen3-wdt"; reg = <0 0xe6020000 0 0x0c>; - /* placeholder */ + clocks = <&cpg CPG_MOD 402>; + power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; + resets = <&cpg 402>; + status = "disabled"; }; gpio0: gpio@e6050000 { From patchwork Fri Oct 4 08:35:31 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fabrizio Castro X-Patchwork-Id: 11173833 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 2B12B1747 for ; Fri, 4 Oct 2019 08:36:12 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 1449821A4C for ; Fri, 4 Oct 2019 08:36:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731213AbfJDIgL (ORCPT ); Fri, 4 Oct 2019 04:36:11 -0400 Received: from relmlor1.renesas.com ([210.160.252.171]:15709 "EHLO relmlie5.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726024AbfJDIgK (ORCPT ); Fri, 4 Oct 2019 04:36:10 -0400 X-IronPort-AV: E=Sophos;i="5.67,255,1566831600"; d="scan'208";a="28287629" Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie5.idc.renesas.com with ESMTP; 04 Oct 2019 17:36:08 +0900 Received: from fabrizio-dev.ree.adwin.renesas.com (unknown [10.226.36.196]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id 62AAC41E73E6; Fri, 4 Oct 2019 17:36:03 +0900 (JST) From: Fabrizio Castro To: Geert Uytterhoeven , Rob Herring , Mark Rutland , Mark Brown , Wim Van Sebroeck , Guenter Roeck Cc: Fabrizio Castro , Bjorn Helgaas , Simon Horman , Magnus Damm , linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-spi@vger.kernel.org, linux-watchdog@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Chris Paterson , Biju Das , Laurent Pinchart , Kieran Bingham , Jacopo Mondi , xu_shunji@hoperun.com Subject: [PATCH 5/7] arm64: dts: renesas: r8a774b1: Add all MSIOF nodes Date: Fri, 4 Oct 2019 09:35:31 +0100 Message-Id: <1570178133-21532-6-git-send-email-fabrizio.castro@bp.renesas.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1570178133-21532-1-git-send-email-fabrizio.castro@bp.renesas.com> References: <1570178133-21532-1-git-send-email-fabrizio.castro@bp.renesas.com> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Add the device nodes for all MSIOF SPI controllers on the RZ/G2N SoC (a.k.a. r8a774b1). Signed-off-by: Fabrizio Castro Reviewed-by: Geert Uytterhoeven --- arch/arm64/boot/dts/renesas/r8a774b1.dtsi | 62 +++++++++++++++++++++++++++++++ 1 file changed, 62 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r8a774b1.dtsi b/arch/arm64/boot/dts/renesas/r8a774b1.dtsi index 3f885a6..3bd0b47 100644 --- a/arch/arm64/boot/dts/renesas/r8a774b1.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a774b1.dtsi @@ -1115,6 +1115,68 @@ status = "disabled"; }; + msiof0: spi@e6e90000 { + compatible = "renesas,msiof-r8a774b1", + "renesas,rcar-gen3-msiof"; + reg = <0 0xe6e90000 0 0x0064>; + interrupts = ; + clocks = <&cpg CPG_MOD 211>; + dmas = <&dmac1 0x41>, <&dmac1 0x40>, + <&dmac2 0x41>, <&dmac2 0x40>; + dma-names = "tx", "rx", "tx", "rx"; + power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; + resets = <&cpg 211>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + msiof1: spi@e6ea0000 { + compatible = "renesas,msiof-r8a774b1", + "renesas,rcar-gen3-msiof"; + reg = <0 0xe6ea0000 0 0x0064>; + interrupts = ; + clocks = <&cpg CPG_MOD 210>; + dmas = <&dmac1 0x43>, <&dmac1 0x42>, + <&dmac2 0x43>, <&dmac2 0x42>; + dma-names = "tx", "rx", "tx", "rx"; + power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; + resets = <&cpg 210>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + msiof2: spi@e6c00000 { + compatible = "renesas,msiof-r8a774b1", + "renesas,rcar-gen3-msiof"; + reg = <0 0xe6c00000 0 0x0064>; + interrupts = ; + clocks = <&cpg CPG_MOD 209>; + dmas = <&dmac0 0x45>, <&dmac0 0x44>; + dma-names = "tx", "rx"; + power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; + resets = <&cpg 209>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + msiof3: spi@e6c10000 { + compatible = "renesas,msiof-r8a774b1", + "renesas,rcar-gen3-msiof"; + reg = <0 0xe6c10000 0 0x0064>; + interrupts = ; + clocks = <&cpg CPG_MOD 208>; + dmas = <&dmac0 0x47>, <&dmac0 0x46>; + dma-names = "tx", "rx"; + power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; + resets = <&cpg 208>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + rcar_sound: sound@ec500000 { reg = <0 0xec500000 0 0x1000>, /* SCU */ <0 0xec5a0000 0 0x100>, /* ADG */ From patchwork Fri Oct 4 08:35:32 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fabrizio Castro X-Patchwork-Id: 11173841 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C39641747 for ; Fri, 4 Oct 2019 08:36:16 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id AC8E221D81 for ; Fri, 4 Oct 2019 08:36:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2387427AbfJDIgP (ORCPT ); Fri, 4 Oct 2019 04:36:15 -0400 Received: from relmlor1.renesas.com ([210.160.252.171]:15709 "EHLO relmlie5.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1731200AbfJDIgP (ORCPT ); Fri, 4 Oct 2019 04:36:15 -0400 X-IronPort-AV: E=Sophos;i="5.67,255,1566831600"; d="scan'208";a="28287635" Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie5.idc.renesas.com with ESMTP; 04 Oct 2019 17:36:13 +0900 Received: from fabrizio-dev.ree.adwin.renesas.com (unknown [10.226.36.196]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id 827E341E73E6; Fri, 4 Oct 2019 17:36:08 +0900 (JST) From: Fabrizio Castro To: Geert Uytterhoeven , Rob Herring , Mark Rutland , Mark Brown , Wim Van Sebroeck , Guenter Roeck Cc: Fabrizio Castro , Bjorn Helgaas , Simon Horman , Magnus Damm , linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-spi@vger.kernel.org, linux-watchdog@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Chris Paterson , Biju Das , Laurent Pinchart , Kieran Bingham , Jacopo Mondi , xu_shunji@hoperun.com Subject: [PATCH 6/7] arm64: dts: renesas: r8a774b1: Add PCIe device nodes Date: Fri, 4 Oct 2019 09:35:32 +0100 Message-Id: <1570178133-21532-7-git-send-email-fabrizio.castro@bp.renesas.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1570178133-21532-1-git-send-email-fabrizio.castro@bp.renesas.com> References: <1570178133-21532-1-git-send-email-fabrizio.castro@bp.renesas.com> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org This patch adds PCIe{0,1} device nodes for R8A774B1 SoC. Signed-off-by: Fabrizio Castro Reviewed-by: Andrew Murray Reviewed-by: Geert Uytterhoeven --- arch/arm64/boot/dts/renesas/r8a774b1.dtsi | 42 +++++++++++++++++++++++++++++-- 1 file changed, 40 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/renesas/r8a774b1.dtsi b/arch/arm64/boot/dts/renesas/r8a774b1.dtsi index 3bd0b47..0163b284 100644 --- a/arch/arm64/boot/dts/renesas/r8a774b1.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a774b1.dtsi @@ -1304,19 +1304,57 @@ }; pciec0: pcie@fe000000 { + compatible = "renesas,pcie-r8a774b1", + "renesas,pcie-rcar-gen3"; reg = <0 0xfe000000 0 0x80000>; #address-cells = <3>; #size-cells = <2>; bus-range = <0x00 0xff>; - /* placeholder */ + device_type = "pci"; + ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000 + 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000 + 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000 + 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; + /* Map all possible DDR as inbound ranges */ + dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>; + interrupts = , + , + ; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; + clock-names = "pcie", "pcie_bus"; + power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; + resets = <&cpg 319>; + status = "disabled"; }; pciec1: pcie@ee800000 { + compatible = "renesas,pcie-r8a774b1", + "renesas,pcie-rcar-gen3"; reg = <0 0xee800000 0 0x80000>; #address-cells = <3>; #size-cells = <2>; bus-range = <0x00 0xff>; - /* placeholder */ + device_type = "pci"; + ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000 + 0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000 + 0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000 + 0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>; + /* Map all possible DDR as inbound ranges */ + dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>; + interrupts = , + , + ; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>; + clock-names = "pcie", "pcie_bus"; + power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; + resets = <&cpg 318>; + status = "disabled"; }; fdp1@fe940000 { From patchwork Fri Oct 4 08:35:33 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fabrizio Castro X-Patchwork-Id: 11173849 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C7501196C for ; Fri, 4 Oct 2019 08:36:21 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id A748A21A4C for ; Fri, 4 Oct 2019 08:36:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727978AbfJDIgU (ORCPT ); Fri, 4 Oct 2019 04:36:20 -0400 Received: from relmlor1.renesas.com ([210.160.252.171]:15709 "EHLO relmlie5.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1728462AbfJDIgU (ORCPT ); Fri, 4 Oct 2019 04:36:20 -0400 X-IronPort-AV: E=Sophos;i="5.67,255,1566831600"; d="scan'208";a="28287642" Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie5.idc.renesas.com with ESMTP; 04 Oct 2019 17:36:18 +0900 Received: from fabrizio-dev.ree.adwin.renesas.com (unknown [10.226.36.196]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id A14F241E73E6; Fri, 4 Oct 2019 17:36:13 +0900 (JST) From: Fabrizio Castro To: Geert Uytterhoeven , Rob Herring , Mark Rutland , Mark Brown , Wim Van Sebroeck , Guenter Roeck Cc: Fabrizio Castro , Bjorn Helgaas , Simon Horman , Magnus Damm , linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-spi@vger.kernel.org, linux-watchdog@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Chris Paterson , Biju Das , Laurent Pinchart , Kieran Bingham , Jacopo Mondi , xu_shunji@hoperun.com Subject: [PATCH 7/7] arm64: dts: renesas: hihope-rzg2-ex: Let the board specific DT decide about pciec1 Date: Fri, 4 Oct 2019 09:35:33 +0100 Message-Id: <1570178133-21532-8-git-send-email-fabrizio.castro@bp.renesas.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1570178133-21532-1-git-send-email-fabrizio.castro@bp.renesas.com> References: <1570178133-21532-1-git-send-email-fabrizio.castro@bp.renesas.com> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org The plan for the HiHope RZ/G2N board is to enable pciec0 by default, and use pciec1 physical interface for SATA (as SATA and PCIE1 share the same physical interface), therefore move pciec1 enabling away from hihope-rzg2-ex. Signed-off-by: Fabrizio Castro Reviewed-by: Geert Uytterhoeven --- arch/arm64/boot/dts/renesas/hihope-rzg2-ex.dtsi | 4 ---- arch/arm64/boot/dts/renesas/r8a774a1-hihope-rzg2m-ex.dts | 4 ++++ 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/renesas/hihope-rzg2-ex.dtsi b/arch/arm64/boot/dts/renesas/hihope-rzg2-ex.dtsi index ae1ef2d..63e407a 100644 --- a/arch/arm64/boot/dts/renesas/hihope-rzg2-ex.dtsi +++ b/arch/arm64/boot/dts/renesas/hihope-rzg2-ex.dtsi @@ -85,10 +85,6 @@ status = "okay"; }; -&pciec1 { - status = "okay"; -}; - &pfc { pinctrl-0 = <&scif_clk_pins>; pinctrl-names = "default"; diff --git a/arch/arm64/boot/dts/renesas/r8a774a1-hihope-rzg2m-ex.dts b/arch/arm64/boot/dts/renesas/r8a774a1-hihope-rzg2m-ex.dts index 6e33a3b..c754fca 100644 --- a/arch/arm64/boot/dts/renesas/r8a774a1-hihope-rzg2m-ex.dts +++ b/arch/arm64/boot/dts/renesas/r8a774a1-hihope-rzg2m-ex.dts @@ -13,3 +13,7 @@ compatible = "hoperun,hihope-rzg2-ex", "hoperun,hihope-rzg2m", "renesas,r8a774a1"; }; + +&pciec1 { + status = "okay"; +};