From patchwork Sun Oct 6 10:46:34 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marc Zyngier X-Patchwork-Id: 11176279 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id CAB301747 for ; Sun, 6 Oct 2019 10:47:06 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id A992F2084D for ; Sun, 6 Oct 2019 10:47:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1570358826; bh=BP1l8qRwdBHc2b0glDmUNsamGkZG1dNdWAdZx4mn8yc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=rbeSdxq8HyUqTkutuo0dUVrnNO0hGsw7uTAt78w8i8CgG2D+MZ8vkzc9nOw77DxN9 Y86UZnIvr8IQKrqh7IzJBPI2+Y2jyOMrfY9fsap619N1i3d6r7EUTrfE/R2UHfJo1n MOtzubgvCjrIY9cKe6Mk1KdvsDhgBLzFQ7wMS0xU= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726519AbfJFKrC (ORCPT ); Sun, 6 Oct 2019 06:47:02 -0400 Received: from mail.kernel.org ([198.145.29.99]:38048 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726248AbfJFKrC (ORCPT ); Sun, 6 Oct 2019 06:47:02 -0400 Received: from localhost.localdomain (82-132-217-85.dab.02.net [82.132.217.85]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 1640E21479; Sun, 6 Oct 2019 10:46:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1570358822; bh=BP1l8qRwdBHc2b0glDmUNsamGkZG1dNdWAdZx4mn8yc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=h6Qx4aJw/nWwQAC8L/sKrb93GHAkb1BQJqdEWMG8dvovCAmixwSxGvx4AnecyF0Nw mKAGSs3M3Yy+o6xRhNodMge8uwM5yGuqYNkOn2un/VMl1TaX7AHmC5p9KZa/vDI4ko vH0BxBuzUEBrfz554CNWs9jbo1AJVmzh/Q2zS6xA= From: maz@kernel.org To: linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org Cc: Marc Zyngier , Andrew Murray , Julien Thierry , James Morse , Suzuki K Poulose , Mark Rutland Subject: [PATCH 1/3] KVM: arm64: pmu: Fix cycle counter truncation Date: Sun, 6 Oct 2019 11:46:34 +0100 Message-Id: <20191006104636.11194-2-maz@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191006104636.11194-1-maz@kernel.org> References: <20191006104636.11194-1-maz@kernel.org> MIME-Version: 1.0 Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org From: Marc Zyngier When a counter is disabled, its value is sampled before the event is being disabled, and the value written back in the shadow register. In that process, the value gets truncated to 32bit, which is adequate for any counter but the cycle counter (defined as a 64bit counter). This obviously results in a corrupted counter, and things like "perf record -e cycles" not working at all when run in a guest... A similar, but less critical bug exists in kvm_pmu_get_counter_value. Make the truncation conditional on the counter not being the cycle counter, which results in a minor code reorganisation. Fixes: 80f393a23be6 ("KVM: arm/arm64: Support chained PMU counters") Cc: Andrew Murray Reported-by: Julien Thierry Signed-off-by: Marc Zyngier Reviewed-by: Andrew Murray --- virt/kvm/arm/pmu.c | 22 ++++++++++++---------- 1 file changed, 12 insertions(+), 10 deletions(-) diff --git a/virt/kvm/arm/pmu.c b/virt/kvm/arm/pmu.c index 362a01886bab..c30c3a74fc7f 100644 --- a/virt/kvm/arm/pmu.c +++ b/virt/kvm/arm/pmu.c @@ -146,8 +146,7 @@ u64 kvm_pmu_get_counter_value(struct kvm_vcpu *vcpu, u64 select_idx) if (kvm_pmu_pmc_is_chained(pmc) && kvm_pmu_idx_is_high_counter(select_idx)) counter = upper_32_bits(counter); - - else if (!kvm_pmu_idx_is_64bit(vcpu, select_idx)) + else if (select_idx != ARMV8_PMU_CYCLE_IDX) counter = lower_32_bits(counter); return counter; @@ -193,7 +192,7 @@ static void kvm_pmu_release_perf_event(struct kvm_pmc *pmc) */ static void kvm_pmu_stop_counter(struct kvm_vcpu *vcpu, struct kvm_pmc *pmc) { - u64 counter, reg; + u64 counter, reg, val; pmc = kvm_pmu_get_canonical_pmc(pmc); if (!pmc->perf_event) @@ -201,16 +200,19 @@ static void kvm_pmu_stop_counter(struct kvm_vcpu *vcpu, struct kvm_pmc *pmc) counter = kvm_pmu_get_pair_counter_value(vcpu, pmc); - if (kvm_pmu_pmc_is_chained(pmc)) { - reg = PMEVCNTR0_EL0 + pmc->idx; - __vcpu_sys_reg(vcpu, reg) = lower_32_bits(counter); - __vcpu_sys_reg(vcpu, reg + 1) = upper_32_bits(counter); + if (pmc->idx == ARMV8_PMU_CYCLE_IDX) { + reg = PMCCNTR_EL0; + val = counter; } else { - reg = (pmc->idx == ARMV8_PMU_CYCLE_IDX) - ? PMCCNTR_EL0 : PMEVCNTR0_EL0 + pmc->idx; - __vcpu_sys_reg(vcpu, reg) = lower_32_bits(counter); + reg = PMEVCNTR0_EL0 + pmc->idx; + val = lower_32_bits(counter); } + __vcpu_sys_reg(vcpu, reg) = val; + + if (kvm_pmu_pmc_is_chained(pmc)) + __vcpu_sys_reg(vcpu, reg + 1) = upper_32_bits(counter); + kvm_pmu_release_perf_event(pmc); } From patchwork Sun Oct 6 10:46:35 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marc Zyngier X-Patchwork-Id: 11176281 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 2CDF076 for ; Sun, 6 Oct 2019 10:47:08 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 0BCF721479 for ; Sun, 6 Oct 2019 10:47:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1570358828; bh=Y4fY/CdaZ0ayAbABW+r8tYbydxtNMytTr4+K3p1Jdus=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=zJG+VAauL0hncNGh6cJdE94NIgjFHggHhM20dFKbs4t2DgE1VW82HfDfWCeyqApYF tKhahcOifCSiHJQ2mN/V9x0uijItlis4+629On5aUYOFcyH+3liRkZqR+fvd7Q3oDh w2QLmg7mbYEtroWixZHcjaToLgA1421p0yD/VNbg= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726291AbfJFKrG (ORCPT ); Sun, 6 Oct 2019 06:47:06 -0400 Received: from mail.kernel.org ([198.145.29.99]:38146 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726521AbfJFKrG (ORCPT ); Sun, 6 Oct 2019 06:47:06 -0400 Received: from localhost.localdomain (82-132-217-85.dab.02.net [82.132.217.85]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id BE58B2166E; Sun, 6 Oct 2019 10:47:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1570358825; bh=Y4fY/CdaZ0ayAbABW+r8tYbydxtNMytTr4+K3p1Jdus=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=J0qBdbW0A99q3fDBN4EdDLO+DnnsArsbEa/I0OCHwVJz/XufJkEeA+79IE8Xc7CbQ YXD7FjG9bZZaCIMuNaioSCUrnCAAaL2fTWMkw2M/i+Hh/o+mVfrzMlE94qM9NGBG2u zUakgFjjNbLB7DQShdcPg+2SFW/MO+F919j3urYM= From: maz@kernel.org To: linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org Cc: Marc Zyngier , Andrew Murray , Julien Thierry , James Morse , Suzuki K Poulose , Mark Rutland Subject: [PATCH 2/3] arm64: KVM: Handle PMCR_EL0.LC as RES1 on pure AArch64 systems Date: Sun, 6 Oct 2019 11:46:35 +0100 Message-Id: <20191006104636.11194-3-maz@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191006104636.11194-1-maz@kernel.org> References: <20191006104636.11194-1-maz@kernel.org> MIME-Version: 1.0 Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org From: Marc Zyngier Of PMCR_EL0.LC, the ARMv8 ARM says: "In an AArch64 only implementation, this field is RES 1." So be it. Fixes: ab9468340d2bc ("arm64: KVM: Add access handler for PMCR register") Reviewed-by: Andrew Murray Signed-off-by: Marc Zyngier --- arch/arm64/kvm/sys_regs.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c index 2071260a275b..46822afc57e0 100644 --- a/arch/arm64/kvm/sys_regs.c +++ b/arch/arm64/kvm/sys_regs.c @@ -632,6 +632,8 @@ static void reset_pmcr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r) */ val = ((pmcr & ~ARMV8_PMU_PMCR_MASK) | (ARMV8_PMU_PMCR_MASK & 0xdecafbad)) & (~ARMV8_PMU_PMCR_E); + if (!system_supports_32bit_el0()) + val |= ARMV8_PMU_PMCR_LC; __vcpu_sys_reg(vcpu, r->reg) = val; } @@ -682,6 +684,8 @@ static bool access_pmcr(struct kvm_vcpu *vcpu, struct sys_reg_params *p, val = __vcpu_sys_reg(vcpu, PMCR_EL0); val &= ~ARMV8_PMU_PMCR_MASK; val |= p->regval & ARMV8_PMU_PMCR_MASK; + if (!system_supports_32bit_el0()) + val |= ARMV8_PMU_PMCR_LC; __vcpu_sys_reg(vcpu, PMCR_EL0) = val; kvm_pmu_handle_pmcr(vcpu, val); kvm_vcpu_pmu_restore_guest(vcpu); From patchwork Sun Oct 6 10:46:36 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marc Zyngier X-Patchwork-Id: 11176283 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E375E76 for ; Sun, 6 Oct 2019 10:47:11 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id C1F602173B for ; Sun, 6 Oct 2019 10:47:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1570358831; bh=Kbjk8U9KY83YtrC+Vj1iMZXkRW6yshTSizjEOBVjj3c=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=VoOgMSGAfBg3DqNImdEBFSDElSD4NBX53yvuOpBCA+qZFi0wPVq+S+fdNaiGNKuaG ZVWWJZNf8kbEJkvrqLc5AdRohB8SdO49OnordnbFQLlslZg0sCSw5Vu8LUU5MjAwKM 1WpWRMEVT9V4BKaio5hnpbjTnMEGsUTU014gwDNg= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726529AbfJFKrK (ORCPT ); Sun, 6 Oct 2019 06:47:10 -0400 Received: from mail.kernel.org ([198.145.29.99]:38196 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726583AbfJFKrK (ORCPT ); Sun, 6 Oct 2019 06:47:10 -0400 Received: from localhost.localdomain (82-132-217-85.dab.02.net [82.132.217.85]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id DE3C32084D; Sun, 6 Oct 2019 10:47:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1570358829; bh=Kbjk8U9KY83YtrC+Vj1iMZXkRW6yshTSizjEOBVjj3c=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=mez2mYzED96KqrhBz67wivD2jw1wIwdikf3GrsDkzHasjg5QTgXSnijiFwjnfUbJy q13TxPAqD2mC4KN2lk89SDpLrAzbDj7P7FgMLg58iOXMyDyMTEIVHiS5U0hEnPsyow r6xpj6r4VNBE1Bvan82NC5l+sIsAwQ9Ok7USMXS0= From: maz@kernel.org To: linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org Cc: Marc Zyngier , Andrew Murray , Julien Thierry , James Morse , Suzuki K Poulose , Mark Rutland Subject: [PATCH 3/3] KVM: arm64: pmu: Reset sample period on overflow handling Date: Sun, 6 Oct 2019 11:46:36 +0100 Message-Id: <20191006104636.11194-4-maz@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191006104636.11194-1-maz@kernel.org> References: <20191006104636.11194-1-maz@kernel.org> MIME-Version: 1.0 Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org From: Marc Zyngier The PMU emulation code uses the perf event sample period to trigger the overflow detection. This works fine for the *first* overflow handling, but results in a huge number of interrupts on the host, unrelated to the number of interrupts handled in the guest (a x20 factor is pretty common for the cycle counter). On a slow system (such as a SW model), this can result in the guest only making forward progress at a glacial pace. It turns out that the clue is in the name. The sample period is exactly that: a period. And once the an overflow has occured, the following period should be the full width of the associated counter, instead of whatever the guest had initially programed. Reset the sample period to the architected value in the overflow handler, which now results in a number of host interrupts that is much closer to the number of interrupts in the guest. Fixes: b02386eb7dac ("arm64: KVM: Add PMU overflow interrupt routing") Signed-off-by: Marc Zyngier --- virt/kvm/arm/pmu.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/virt/kvm/arm/pmu.c b/virt/kvm/arm/pmu.c index c30c3a74fc7f..3ca4761fc0f5 100644 --- a/virt/kvm/arm/pmu.c +++ b/virt/kvm/arm/pmu.c @@ -444,6 +444,18 @@ static void kvm_pmu_perf_overflow(struct perf_event *perf_event, struct kvm_pmc *pmc = perf_event->overflow_handler_context; struct kvm_vcpu *vcpu = kvm_pmc_to_vcpu(pmc); int idx = pmc->idx; + u64 val, period; + + /* Start by resetting the sample period to the architectural limit */ + val = kvm_pmu_get_pair_counter_value(vcpu, pmc); + + if (kvm_pmu_idx_is_64bit(vcpu, pmc->idx)) + period = (-val) & GENMASK(63, 0); + else + period = (-val) & GENMASK(31, 0); + + pmc->perf_event->attr.sample_period = period; + pmc->perf_event->hw.sample_period = period; __vcpu_sys_reg(vcpu, PMOVSSET_EL0) |= BIT(idx);