From patchwork Thu Oct 10 08:21:04 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 11182871 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 84F541864 for ; Thu, 10 Oct 2019 08:21:25 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 654C82190F for ; Thu, 10 Oct 2019 08:21:25 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="n+ePALqM" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1733225AbfJJIVY (ORCPT ); Thu, 10 Oct 2019 04:21:24 -0400 Received: from fllv0016.ext.ti.com ([198.47.19.142]:39296 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1733188AbfJJIVY (ORCPT ); Thu, 10 Oct 2019 04:21:24 -0400 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id x9A8LECl101667; Thu, 10 Oct 2019 03:21:14 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1570695674; bh=tu0nnpfGzidXSw6/IM0hH5/1VmGSmGFdGSiEQ/tREe8=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=n+ePALqMLDuo0IqsY2eoEQTS4ujCu6x1HIllAvfIx2ZjerFTxA/tCVAiItUS1qUjv yFGRQYj+YnG9CrzUJGrhgI4jSCHgcC4ERK84B9DGl1xb69MYUBG2ksnjwiHwxD72Ry eyjoygOoyhTx5xsGqdTQNjSj6I3RXkdT9a8XFk6s= Received: from DFLE115.ent.ti.com (dfle115.ent.ti.com [10.64.6.36]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x9A8LEBn104160 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 10 Oct 2019 03:21:14 -0500 Received: from DFLE105.ent.ti.com (10.64.6.26) by DFLE115.ent.ti.com (10.64.6.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Thu, 10 Oct 2019 03:21:10 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE105.ent.ti.com (10.64.6.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Thu, 10 Oct 2019 03:21:13 -0500 Received: from sokoban.bb.dnainternet.fi (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id x9A8LAtB012630; Thu, 10 Oct 2019 03:21:12 -0500 From: Tero Kristo To: , CC: , Subject: [PATCH 1/5] ARM: dts: dra7: add PRM nodes Date: Thu, 10 Oct 2019 11:21:04 +0300 Message-ID: <20191010082108.15448-2-t-kristo@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191010082108.15448-1-t-kristo@ti.com> References: <20191010082108.15448-1-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org Add PRM nodes for dra7 series of SoCs. These are initially used to support reset control for some of the nodes, but will be extended later to add powerdomain control and support for PRCM irqs among other things. Signed-off-by: Tero Kristo --- arch/arm/boot/dts/dra7.dtsi | 55 +++++++++++++++++++++++++++++++++++++ 1 file changed, 55 insertions(+) diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi index 953f0ffce2a9..f4c73cca6354 100644 --- a/arch/arm/boot/dts/dra7.dtsi +++ b/arch/arm/boot/dts/dra7.dtsi @@ -763,3 +763,54 @@ #include "dra7-l4.dtsi" #include "dra7xx-clocks.dtsi" + +&prm { + prm_dsp1: prm@400 { + compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst"; + reg = <0x400 0x100>; + #reset-cells = <1>; + }; + + prm_ipu: prm@500 { + compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst"; + reg = <0x500 0x100>; + #reset-cells = <1>; + }; + + prm_core: prm@700 { + compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst"; + reg = <0x700 0x100>; + #reset-cells = <1>; + }; + + prm_iva: prm@f00 { + compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst"; + reg = <0xf00 0x100>; + }; + + prm_dsp2: prm@1b00 { + compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst"; + reg = <0x1b00 0x40>; + #reset-cells = <1>; + }; + + prm_eve1: prm@1b40 { + compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst"; + reg = <0x1b40 0x40>; + }; + + prm_eve2: prm@1b80 { + compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst"; + reg = <0x1b80 0x40>; + }; + + prm_eve3: prm@1bc0 { + compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst"; + reg = <0x1bc0 0x40>; + }; + + prm_eve4: prm@1c00 { + compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst"; + reg = <0x1c00 0x60>; + }; +}; From patchwork Thu Oct 10 08:21:05 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 11182873 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id AD1361575 for ; Thu, 10 Oct 2019 08:21:25 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 8D8F12190F for ; Thu, 10 Oct 2019 08:21:25 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="fcK3fH88" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1733188AbfJJIVY (ORCPT ); Thu, 10 Oct 2019 04:21:24 -0400 Received: from fllv0016.ext.ti.com ([198.47.19.142]:39298 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1733192AbfJJIVY (ORCPT ); Thu, 10 Oct 2019 04:21:24 -0400 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id x9A8LGiS101677; Thu, 10 Oct 2019 03:21:16 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1570695676; bh=eTzIUfQtNTD3JWckXPA0kJGgMMdg/QU/zw3ZRvdBMLI=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=fcK3fH88uLsZiGDukqUAp376VDdYyxEQK/LAwnSuAmc/Qp4eIKcKY4np1otcwJxYe Lxe+SiMtcaEfFLgmEhRci5uAOUhnZ3Vm2b+oF7apg7mX1Mww714PLl7CIEjsy6I1e8 LS69BlVdccMVv45CtB0O25OZSaXlnSyn1qSOJ8yA= Received: from DFLE112.ent.ti.com (dfle112.ent.ti.com [10.64.6.33]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x9A8LGwO003566 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 10 Oct 2019 03:21:16 -0500 Received: from DFLE114.ent.ti.com (10.64.6.35) by DFLE112.ent.ti.com (10.64.6.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Thu, 10 Oct 2019 03:21:11 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Thu, 10 Oct 2019 03:21:15 -0500 Received: from sokoban.bb.dnainternet.fi (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id x9A8LAtC012630; Thu, 10 Oct 2019 03:21:14 -0500 From: Tero Kristo To: , CC: , Subject: [PATCH 2/5] ARM: dts: omap4: add PRM nodes Date: Thu, 10 Oct 2019 11:21:05 +0300 Message-ID: <20191010082108.15448-3-t-kristo@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191010082108.15448-1-t-kristo@ti.com> References: <20191010082108.15448-1-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org Add PRM nodes for omap4 series of SoCs. These are initially used to support reset control for some of the nodes, but will be extended later to add powerdomain control and support for PRCM irqs among other things. Signed-off-by: Tero Kristo --- arch/arm/boot/dts/omap4-l4.dtsi | 2 +- arch/arm/boot/dts/omap4.dtsi | 29 +++++++++++++++++++++++++++++ 2 files changed, 30 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/omap4-l4.dtsi b/arch/arm/boot/dts/omap4-l4.dtsi index d60d5e0ecc4c..3421ef387e21 100644 --- a/arch/arm/boot/dts/omap4-l4.dtsi +++ b/arch/arm/boot/dts/omap4-l4.dtsi @@ -1007,7 +1007,7 @@ ranges = <0x0 0x6000 0x2000>; prm: prm@0 { - compatible = "ti,omap4-prm"; + compatible = "ti,omap4-prm", "simple-bus"; reg = <0x0 0x2000>; interrupts = ; #address-cells = <1>; diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi index 7cc95bc1598b..f25f027e7c1c 100644 --- a/arch/arm/boot/dts/omap4.dtsi +++ b/arch/arm/boot/dts/omap4.dtsi @@ -442,3 +442,29 @@ #include "omap4-l4.dtsi" #include "omap4-l4-abe.dtsi" #include "omap44xx-clocks.dtsi" + +&prm { + prm_tesla: prm@400 { + compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst"; + reg = <0x400 0x100>; + #reset-cells = <1>; + }; + + prm_core: prm@700 { + compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst"; + reg = <0x700 0x100>; + #reset-cells = <1>; + }; + + prm_ivahd: prm@f00 { + compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst"; + reg = <0xf00 0x100>; + #reset-cells = <1>; + }; + + prm_device: prm@1b00 { + compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst"; + reg = <0x1b00 0x40>; + #reset-cells = <1>; + }; +}; From patchwork Thu Oct 10 08:21:06 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 11182863 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 9C399139A for ; Thu, 10 Oct 2019 08:21:23 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 737522067B for ; Thu, 10 Oct 2019 08:21:23 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="VrH5ZIqJ" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1733171AbfJJIVW (ORCPT ); Thu, 10 Oct 2019 04:21:22 -0400 Received: from lelv0142.ext.ti.com ([198.47.23.249]:41350 "EHLO lelv0142.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1733170AbfJJIVW (ORCPT ); Thu, 10 Oct 2019 04:21:22 -0400 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id x9A8LHw2124191; Thu, 10 Oct 2019 03:21:17 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1570695677; bh=Ivfa6xStCW1FR0q2GN3mF+HPXnlsXQHMTyczYoiOtus=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=VrH5ZIqJBeBCsmm77xjciQ7WfGg+X8gxsepYkVfurLQnpmqudOdAAhus+dV+GplfF HoXrF0efNo2vsP9G3WZIgl/iSIAd4TQ5BQCSiRvLQtqdek92DgAoEXM6phbD4e3Lq7 joZeMtCj6WcGBBgbzm+0COQo2+RAOQHF5f/dDcu8= Received: from DFLE114.ent.ti.com (dfle114.ent.ti.com [10.64.6.35]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x9A8LHAZ003574 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 10 Oct 2019 03:21:17 -0500 Received: from DFLE102.ent.ti.com (10.64.6.23) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Thu, 10 Oct 2019 03:21:16 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE102.ent.ti.com (10.64.6.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Thu, 10 Oct 2019 03:21:16 -0500 Received: from sokoban.bb.dnainternet.fi (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id x9A8LAtD012630; Thu, 10 Oct 2019 03:21:15 -0500 From: Tero Kristo To: , CC: , Subject: [PATCH 3/5] ARM: dts: am33xx: Add PRM data Date: Thu, 10 Oct 2019 11:21:06 +0300 Message-ID: <20191010082108.15448-4-t-kristo@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191010082108.15448-1-t-kristo@ti.com> References: <20191010082108.15448-1-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org Add PRM data for AM33xx SoC. Initially this is used to provide reset support, but will be expanded later to support also powerdomain control. Signed-off-by: Tero Kristo --- arch/arm/boot/dts/am33xx.dtsi | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi index fb6b8aa12cc5..33b3346e4769 100644 --- a/arch/arm/boot/dts/am33xx.dtsi +++ b/arch/arm/boot/dts/am33xx.dtsi @@ -465,3 +465,29 @@ #include "am33xx-l4.dtsi" #include "am33xx-clocks.dtsi" + +&prcm { + prm_per: prm@c00 { + compatible = "ti,am3-prm-inst", "ti,omap-prm-inst"; + reg = <0xc00 0x100>; + #reset-cells = <1>; + }; + + prm_wkup: prm@d00 { + compatible = "ti,am3-prm-inst", "ti,omap-prm-inst"; + reg = <0xd00 0x100>; + #reset-cells = <1>; + }; + + prm_device: prm@f00 { + compatible = "ti,am3-prm-inst", "ti,omap-prm-inst"; + reg = <0xf00 0x100>; + #reset-cells = <1>; + }; + + prm_gfx: prm@1100 { + compatible = "ti,am3-prm-inst", "ti,omap-prm-inst"; + reg = <0x1100 0x100>; + #reset-cells = <1>; + }; +}; From patchwork Thu Oct 10 08:21:07 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 11182869 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 042961575 for ; Thu, 10 Oct 2019 08:21:25 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id CE2BE21A4A for ; Thu, 10 Oct 2019 08:21:24 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="YMpSQu8O" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732980AbfJJIVY (ORCPT ); Thu, 10 Oct 2019 04:21:24 -0400 Received: from lelv0142.ext.ti.com ([198.47.23.249]:41354 "EHLO lelv0142.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1733170AbfJJIVY (ORCPT ); Thu, 10 Oct 2019 04:21:24 -0400 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id x9A8LITn124205; Thu, 10 Oct 2019 03:21:18 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1570695678; bh=F9zbnh1P8R8YEhBkXE0nYD7EK62+X5hv0IBIarcNf6U=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=YMpSQu8OMxqQOxVsz2HdiIhRbY7Y4GeQBX/JAExxXUBrR3V6Am43WA3VWbT/kAdt6 7o5wPZvN3PqEP+YkrMWq8XJyoLklhGIUCBK8GCwrP9OaOFBkl920txYwg3uI1MZ9IY GRqMBKawc8o16G/JVPHi+3pUThqaD7LWs6y9f0Ks= Received: from DLEE114.ent.ti.com (dlee114.ent.ti.com [157.170.170.25]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTP id x9A8LI2J098988; Thu, 10 Oct 2019 03:21:18 -0500 Received: from DLEE103.ent.ti.com (157.170.170.33) by DLEE114.ent.ti.com (157.170.170.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Thu, 10 Oct 2019 03:21:15 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DLEE103.ent.ti.com (157.170.170.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Thu, 10 Oct 2019 03:21:14 -0500 Received: from sokoban.bb.dnainternet.fi (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id x9A8LAtE012630; Thu, 10 Oct 2019 03:21:17 -0500 From: Tero Kristo To: , CC: , Subject: [PATCH 4/5] ARM: dts: am43xx: Add PRM data Date: Thu, 10 Oct 2019 11:21:07 +0300 Message-ID: <20191010082108.15448-5-t-kristo@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191010082108.15448-1-t-kristo@ti.com> References: <20191010082108.15448-1-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org Add PRM data for AM43xx SoC. Initially this is used to provide reset support, but will be expanded later to support also powerdomain control. Signed-off-by: Tero Kristo --- arch/arm/boot/dts/am4372.dtsi | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi index 848e2a8884e2..1c0ea9f1ce6e 100644 --- a/arch/arm/boot/dts/am4372.dtsi +++ b/arch/arm/boot/dts/am4372.dtsi @@ -373,3 +373,29 @@ #include "am437x-l4.dtsi" #include "am43xx-clocks.dtsi" + +&prcm { + prm_gfx: prm@400 { + compatible = "ti,am4-prm-inst", "ti,omap-prm-inst"; + reg = <0x400 0x100>; + #reset-cells = <1>; + }; + + prm_per: prm@800 { + compatible = "ti,am4-prm-inst", "ti,omap-prm-inst"; + reg = <0x800 0x100>; + #reset-cells = <1>; + }; + + prm_wkup: prm@2000 { + compatible = "ti,am4-prm-inst", "ti,omap-prm-inst"; + reg = <0x2000 0x100>; + #reset-cells = <1>; + }; + + prm_device: prm@4000 { + compatible = "ti,am4-prm-inst", "ti,omap-prm-inst"; + reg = <0x4000 0x100>; + #reset-cells = <1>; + }; +}; From patchwork Thu Oct 10 08:21:08 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 11182877 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B6AA9139A for ; Thu, 10 Oct 2019 08:21:31 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 9803C2067B for ; Thu, 10 Oct 2019 08:21:31 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="QsnYSKeo" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1733192AbfJJIVZ (ORCPT ); Thu, 10 Oct 2019 04:21:25 -0400 Received: from fllv0015.ext.ti.com ([198.47.19.141]:36540 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1733170AbfJJIVZ (ORCPT ); Thu, 10 Oct 2019 04:21:25 -0400 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id x9A8LK2F119361; Thu, 10 Oct 2019 03:21:20 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1570695680; bh=BZjTfO0hw7QY/DOKoGd7XFdcQdgiFx0Fe8Ciulw6L6Y=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=QsnYSKeo/U7vszz/eNAwI0k5ZhEqYCiH0KHPaFceG6ycVg/FaRd8GalbvE7ifQB27 5JPSrkSQMZMjpyRAemC/UrMgBu8KJFQcdpRopo7N0tt30Q9C61KcaRKo0QkElvZlUC pOSmGTBGur8INj7Z3rDW8w4AwRwGi/UK+uAgyaY0= Received: from DLEE114.ent.ti.com (dlee114.ent.ti.com [157.170.170.25]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x9A8LKk7003671 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 10 Oct 2019 03:21:20 -0500 Received: from DLEE106.ent.ti.com (157.170.170.36) by DLEE114.ent.ti.com (157.170.170.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Thu, 10 Oct 2019 03:21:16 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DLEE106.ent.ti.com (157.170.170.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Thu, 10 Oct 2019 03:21:19 -0500 Received: from sokoban.bb.dnainternet.fi (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id x9A8LAtF012630; Thu, 10 Oct 2019 03:21:18 -0500 From: Tero Kristo To: , CC: , Subject: [PATCH 5/5] ARM: dts: omap5: Add PRM data Date: Thu, 10 Oct 2019 11:21:08 +0300 Message-ID: <20191010082108.15448-6-t-kristo@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191010082108.15448-1-t-kristo@ti.com> References: <20191010082108.15448-1-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org Add PRM data for OMAP54xx SoC. Initially this is used to provide reset support, but will be expanded later to support also powerdomain control. Signed-off-by: Tero Kristo --- arch/arm/boot/dts/omap5.dtsi | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi index 1fb7937638f0..cec8a38fb420 100644 --- a/arch/arm/boot/dts/omap5.dtsi +++ b/arch/arm/boot/dts/omap5.dtsi @@ -435,3 +435,29 @@ #include "omap5-l4-abe.dtsi" #include "omap54xx-clocks.dtsi" + +&prm { + prm_dsp: prm@400 { + compatible = "ti,omap5-prm-inst", "ti,omap-prm-inst"; + reg = <0x400 0x100>; + #reset-cells = <1>; + }; + + prm_core: prm@700 { + compatible = "ti,omap5-prm-inst", "ti,omap-prm-inst"; + reg = <0x700 0x100>; + #reset-cells = <1>; + }; + + prm_iva: prm@1200 { + compatible = "ti,omap5-prm-inst", "ti,omap-prm-inst"; + reg = <0x1200 0x100>; + #reset-cells = <1>; + }; + + prm_device: prm@1c00 { + compatible = "ti,omap5-prm-inst", "ti,omap-prm-inst"; + reg = <0x1c00 0x100>; + #reset-cells = <1>; + }; +};