From patchwork Mon Oct 14 11:01:16 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kulkarni, Vandita" X-Patchwork-Id: 11188349 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 0697015AB for ; Mon, 14 Oct 2019 11:30:57 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id E32A520650 for ; Mon, 14 Oct 2019 11:30:56 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org E32A520650 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7B7126E284; Mon, 14 Oct 2019 11:30:54 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id 781A56E27F for ; Mon, 14 Oct 2019 11:30:49 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 14 Oct 2019 04:30:41 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.67,295,1566889200"; d="scan'208";a="185465853" Received: from vandita-desktop.iind.intel.com ([10.223.74.218]) by orsmga007.jf.intel.com with ESMTP; 14 Oct 2019 04:30:39 -0700 From: Vandita Kulkarni To: intel-gfx@lists.freedesktop.org Date: Mon, 14 Oct 2019 16:31:16 +0530 Message-Id: <20191014110122.31923-2-vandita.kulkarni@intel.com> X-Mailer: git-send-email 2.21.0.5.gaeb582a In-Reply-To: <20191014110122.31923-1-vandita.kulkarni@intel.com> References: <20191014110122.31923-1-vandita.kulkarni@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [RFC 1/7] drm/i915/dsi: Define command mode registers X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jani.nikula@intel.com Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Adding all the register definitions needed for mipi dsi command mode. Signed-off-by: Madhav Chauhan Signed-off-by: Vandita Kulkarni --- drivers/gpu/drm/i915/i915_reg.h | 76 +++++++++++++++++++++++++++++---- 1 file changed, 68 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index e24991e54897..73bc85855b79 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -4919,14 +4919,20 @@ enum { #define BLM_PCH_POLARITY (1 << 29) #define BLC_PWM_PCH_CTL2 _MMIO(0xc8254) -#define UTIL_PIN_CTL _MMIO(0x48400) -#define UTIL_PIN_ENABLE (1 << 31) - -#define UTIL_PIN_PIPE(x) ((x) << 29) -#define UTIL_PIN_PIPE_MASK (3 << 29) -#define UTIL_PIN_MODE_PWM (1 << 24) -#define UTIL_PIN_MODE_MASK (0xf << 24) -#define UTIL_PIN_POLARITY (1 << 22) +#define UTIL_PIN_CTL _MMIO(0x48400) +#define UTIL_PIN_ENABLE (1 << 31) +#define UTIL_PIN_PIPE_MASK (3 << 29) +#define UTIL_PIN_PIPE(x) ((x) << 29) +#define UTIL_PIN_MODE_MASK (0xf << 24) +#define UTIL_PIN_MODE_DATA (0 << 24) +#define UTIL_PIN_MODE_PWM (1 << 24) +#define UTIL_PIN_MODE_VBLANK (4 << 24) +#define UTIL_PIN_MODE_VSYNC (5 << 24) +#define UTIL_PIN_MODE_EYE_LEVEL (8 << 24) +#define UTIL_PIN_OP_DATA (1 << 23) +#define UTIL_PIN_POLARITY (1 << 22) +#define ICL_UTIL_PIN_DIRECTION (1 << 19) +#define ICL_UTIL_PIN_IP_DATA (1 << 16) /* BXT backlight register definition. */ #define _BXT_BLC_PWM_CTL1 0xC8250 @@ -7407,6 +7413,8 @@ enum { #define GEN8_DE_PORT_IMR _MMIO(0x44444) #define GEN8_DE_PORT_IIR _MMIO(0x44448) #define GEN8_DE_PORT_IER _MMIO(0x4444c) +#define ICL_DSI_1 (1 << 31) +#define ICL_DSI_0 (1 << 30) #define ICL_AUX_CHANNEL_E (1 << 29) #define CNL_AUX_CHANNEL_F (1 << 28) #define GEN9_AUX_CHANNEL_D (1 << 27) @@ -10659,6 +10667,57 @@ enum skl_power_gate { #define ICL_ESC_CLK_DIV_SHIFT 0 #define DSI_MAX_ESC_CLK 20000 /* in KHz */ +#define _ICL_DSI_CMD_FRMCTL_0 0x6b034 +#define _ICL_DSI_CMD_FRMCTL_1 0x6b834 +#define ICL_DSI_CMD_FRMCTL(port) _MMIO_PORT(port, \ + _ICL_DSI_CMD_FRMCTL_0,\ + _ICL_DSI_CMD_FRMCTL_1) +#define ICL_FRAME_UPDATE_REQUEST (1 << 31) +#define ICL_PERIODIC_FRAME_UPDATE_ENABLE (1 << 29) +#define ICL_NULL_PACKET_ENABLE (1 << 28) +#define ICL_FRAME_IN_PROGRESS (1 << 0) + +#define _ICL_DSI_INTR_MASK_REG_0 0x6b070 +#define _ICL_DSI_INTR_MASK_REG_1 0x6b870 +#define ICL_DSI_INTR_MASK_REG(port) _MMIO_PORT(port, \ + _ICL_DSI_INTR_MASK_REG_0,\ + _ICL_DSI_INTR_MASK_REG_1) + +#define _ICL_DSI_INTR_IDENT_REG_0 0x6b074 +#define _ICL_DSI_INTR_IDENT_REG_1 0x6b874 +#define ICL_DSI_INTR_IDENT_REG(port) _MMIO_PORT(port, \ + _ICL_DSI_INTR_IDENT_REG_0,\ + _ICL_DSI_INTR_IDENT_REG_1) +#define ICL_TE_EVENT (1 << 31) +#define ICL_RX_DATA_OR_BTA_TERMINATED (1 << 30) +#define ICL_TX_DATA (1 << 29) +#define ICL_ULPS_ENTRY_DONE (1 << 28) +#define ICL_NON_TE_TRIGGER_RECEIVED (1 << 27) +#define ICL_HOST_CHKSUM_ERROR (1 << 26) +#define ICL_HOST_MULTI_ECC_ERROR (1 << 25) +#define ICL_HOST_SINGL_ECC_ERROR (1 << 24) +#define ICL_HOST_CONTENTION_DETECTED (1 << 23) +#define ICL_HOST_FALSE_CONTROL_ERROR (1 << 22) +#define ICL_HOST_TIMEOUT_ERROR (1 << 21) +#define ICL_HOST_LOW_POWER_TX_SYNC_ERROR (1 << 20) +#define ICL_HOST_ESCAPE_MODE_ENTRY_ERROR (1 << 19) +#define ICL_FRAME_UPDATE_DONE (1 << 16) +#define ICL_PROTOCOL_VIOLATION_REPORTED (1 << 15) +#define ICL_INVALID_TX_LENGTH (1 << 13) +#define ICL_INVALID_VC (1 << 12) +#define ICL_INVALID_DATA_TYPE (1 << 11) +#define ICL_PERIPHERAL_CHKSUM_ERROR (1 << 10) +#define ICL_PERIPHERAL_MULTI_ECC_ERROR (1 << 9) +#define ICL_PERIPHERAL_SINGLE_ECC_ERROR (1 << 8) +#define ICL_PERIPHERAL_CONTENTION_DETECTED (1 << 7) +#define ICL_PERIPHERAL_FALSE_CTRL_ERROR (1 << 6) +#define ICL_PERIPHERAL_TIMEOUT_ERROR (1 << 5) +#define ICL_PERIPHERAL_LP_TX_SYNC_ERROR (1 << 4) +#define ICL_PERIPHERAL_ESC_MODE_ENTRY_CMD_ERROR (1 << 3) +#define ICL_EOT_SYNC_ERROR (1 << 2) +#define ICL_SOT_SYNC_ERROR (1 << 1) +#define ICL_SOT_ERROR (1 << 0) + /* Gen4+ Timestamp and Pipe Frame time stamp registers */ #define GEN4_TIMESTAMP _MMIO(0x2358) #define ILK_TIMESTAMP_HI _MMIO(0x70070) @@ -11263,6 +11322,7 @@ enum skl_power_gate { #define CMD_MODE_TE_GATE (0x1 << 28) #define VIDEO_MODE_SYNC_EVENT (0x2 << 28) #define VIDEO_MODE_SYNC_PULSE (0x3 << 28) +#define TE_SOURCE_GPIO (1 << 27) #define LINK_READY (1 << 20) #define PIX_FMT_MASK (0x3 << 16) #define PIX_FMT_SHIFT 16 From patchwork Mon Oct 14 11:01:17 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kulkarni, Vandita" X-Patchwork-Id: 11188343 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A6326139A for ; Mon, 14 Oct 2019 11:30:52 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 8E84020650 for ; Mon, 14 Oct 2019 11:30:52 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 8E84020650 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B68046E282; Mon, 14 Oct 2019 11:30:50 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id A36F46E282 for ; Mon, 14 Oct 2019 11:30:49 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 14 Oct 2019 04:30:43 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.67,295,1566889200"; d="scan'208";a="185465859" Received: from vandita-desktop.iind.intel.com ([10.223.74.218]) by orsmga007.jf.intel.com with ESMTP; 14 Oct 2019 04:30:41 -0700 From: Vandita Kulkarni To: intel-gfx@lists.freedesktop.org Date: Mon, 14 Oct 2019 16:31:17 +0530 Message-Id: <20191014110122.31923-3-vandita.kulkarni@intel.com> X-Mailer: git-send-email 2.21.0.5.gaeb582a In-Reply-To: <20191014110122.31923-1-vandita.kulkarni@intel.com> References: <20191014110122.31923-1-vandita.kulkarni@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [RFC 2/7] drm/i915/dsi: Configure transcoder operation for command mode. X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jani.nikula@intel.com Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Configure the transcoder to operate in TE GATE command mode and take TE events from GPIO. Also disable the periodic command mode, that GOP would have programmed. Signed-off-by: Vandita Kulkarni --- drivers/gpu/drm/i915/display/icl_dsi.c | 32 ++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c index 6e398c33a524..8e6c09a1db78 100644 --- a/drivers/gpu/drm/i915/display/icl_dsi.c +++ b/drivers/gpu/drm/i915/display/icl_dsi.c @@ -704,6 +704,10 @@ gen11_dsi_configure_transcoder(struct intel_encoder *encoder, tmp |= VIDEO_MODE_SYNC_PULSE; break; } + } else { + tmp &= ~OP_MODE_MASK; + tmp |= CMD_MODE_TE_GATE; + tmp |= TE_SOURCE_GPIO; } I915_WRITE(DSI_TRANS_FUNC_CONF(dsi_trans), tmp); @@ -953,6 +957,22 @@ static void gen11_dsi_setup_timeouts(struct intel_encoder *encoder) } } +static void gen11_dsi_config_util_pin(struct intel_encoder *encoder) +{ + struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); + struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base); + u32 tmp; + + /* used only as TE i/p for DSI0 for dual link TE is from slave DSI1 */ + if (is_vid_mode(intel_dsi) || (intel_dsi->dual_link)) + return; + + tmp = I915_READ(UTIL_PIN_CTL); + tmp |= ICL_UTIL_PIN_DIRECTION; + tmp |= UTIL_PIN_ENABLE; + I915_WRITE(UTIL_PIN_CTL, tmp); +} + static void gen11_dsi_enable_port_and_phy(struct intel_encoder *encoder, const struct intel_crtc_state *pipe_config) @@ -974,6 +994,9 @@ gen11_dsi_enable_port_and_phy(struct intel_encoder *encoder, /* setup D-PHY timings */ gen11_dsi_setup_dphy_timings(encoder); + /* Since transcoder is configured to take events from GPIO */ + gen11_dsi_config_util_pin(encoder); + /* step 4h: setup DSI protocol timeouts */ gen11_dsi_setup_timeouts(encoder); @@ -1104,6 +1127,15 @@ static void gen11_dsi_deconfigure_trancoder(struct intel_encoder *encoder) enum transcoder dsi_trans; u32 tmp; + /* disable periodic update mode */ + if (is_cmd_mode(intel_dsi)) { + for_each_dsi_port(port, intel_dsi->ports) { + tmp = I915_READ(ICL_DSI_CMD_FRMCTL(port)); + tmp &= ~ICL_PERIODIC_FRAME_UPDATE_ENABLE; + I915_WRITE(ICL_DSI_CMD_FRMCTL(port), tmp); + } + } + /* put dsi link in ULPS */ for_each_dsi_port(port, intel_dsi->ports) { dsi_trans = dsi_port_to_transcoder(port); From patchwork Mon Oct 14 11:01:18 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kulkarni, Vandita" X-Patchwork-Id: 11188341 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 189F115AB for ; Mon, 14 Oct 2019 11:30:51 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id F0D5420650 for ; Mon, 14 Oct 2019 11:30:50 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org F0D5420650 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 4CB7F6E27F; Mon, 14 Oct 2019 11:30:50 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id D0DA26E27F for ; Mon, 14 Oct 2019 11:30:49 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 14 Oct 2019 04:30:45 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.67,295,1566889200"; d="scan'208";a="185465870" Received: from vandita-desktop.iind.intel.com ([10.223.74.218]) by orsmga007.jf.intel.com with ESMTP; 14 Oct 2019 04:30:43 -0700 From: Vandita Kulkarni To: intel-gfx@lists.freedesktop.org Date: Mon, 14 Oct 2019 16:31:18 +0530 Message-Id: <20191014110122.31923-4-vandita.kulkarni@intel.com> X-Mailer: git-send-email 2.21.0.5.gaeb582a In-Reply-To: <20191014110122.31923-1-vandita.kulkarni@intel.com> References: <20191014110122.31923-1-vandita.kulkarni@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [RFC 3/7] drm/i915/dsi: Add vblank calculation for command mode X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jani.nikula@intel.com Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Transcoder timing calculation differ for command mode. Signed-off-by: Vandita Kulkarni --- drivers/gpu/drm/i915/display/icl_dsi.c | 56 +++++++++++++++++--------- 1 file changed, 37 insertions(+), 19 deletions(-) diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c index 8e6c09a1db78..5dd9eebab6b1 100644 --- a/drivers/gpu/drm/i915/display/icl_dsi.c +++ b/drivers/gpu/drm/i915/display/icl_dsi.c @@ -780,6 +780,7 @@ gen11_dsi_set_transcoder_timings(struct intel_encoder *encoder, u16 hback_porch; /* vertical timings */ u16 vtotal, vactive, vsync_start, vsync_end, vsync_shift; + int bpp, line_time_us, byte_clk_period_ns; hactive = adjusted_mode->crtc_hdisplay; htotal = adjusted_mode->crtc_htotal; @@ -841,40 +842,57 @@ gen11_dsi_set_transcoder_timings(struct intel_encoder *encoder, } /* program TRANS_VTOTAL register */ - for_each_dsi_port(port, intel_dsi->ports) { - dsi_trans = dsi_port_to_transcoder(port); - /* - * FIXME: Programing this by assuming progressive mode, since - * non-interlaced info from VBT is not saved inside - * struct drm_display_mode. - * For interlace mode: program required pixel minus 2 - */ - I915_WRITE(VTOTAL(dsi_trans), - (vactive - 1) | ((vtotal - 1) << 16)); + if (intel_dsi->operation_mode == INTEL_DSI_VIDEO_MODE) { + for_each_dsi_port(port, intel_dsi->ports) { + dsi_trans = dsi_port_to_transcoder(port); + /* + * FIXME: Programing this by assuming progressive mode, + * since non-interlaced info from VBT is not saved + * inside struct drm_display_mode. + * For interlace mode: program required pixel minus 2 + */ + I915_WRITE(VTOTAL(dsi_trans), + (vactive - 1) | ((vtotal - 1) << 16)); + } + } else { + for_each_dsi_port(port, intel_dsi->ports) { + bpp = mipi_dsi_pixel_format_to_bpp(intel_dsi->pixel_format); + byte_clk_period_ns = 8 * 1000000 / intel_dsi->pclk; + htotal = hactive + 160; + line_time_us = (htotal * (bpp / 8) * byte_clk_period_ns) / (1000 * intel_dsi->lane_count); + vtotal = vactive + DIV_ROUND_UP(460, line_time_us); + I915_WRITE(VTOTAL(dsi_trans), + (vactive - 1) | ((vtotal - 1) << 16)); + } } + if (vsync_end < vsync_start || vsync_end > vtotal) DRM_ERROR("Invalid vsync_end value\n"); if (vsync_start < vactive) DRM_ERROR("vsync_start less than vactive\n"); - /* program TRANS_VSYNC register */ - for_each_dsi_port(port, intel_dsi->ports) { - dsi_trans = dsi_port_to_transcoder(port); - I915_WRITE(VSYNC(dsi_trans), - (vsync_start - 1) | ((vsync_end - 1) << 16)); + /* program TRANS_VSYNC register for video mode only */ + if (intel_dsi->operation_mode == INTEL_DSI_VIDEO_MODE) { + for_each_dsi_port(port, intel_dsi->ports) { + dsi_trans = dsi_port_to_transcoder(port); + I915_WRITE(VSYNC(dsi_trans), + (vsync_start - 1) | ((vsync_end - 1) << 16)); + } } /* - * FIXME: It has to be programmed only for interlaced + * FIXME: It has to be programmed only for video modes and interlaced * modes. Put the check condition here once interlaced * info available as described above. * program TRANS_VSYNCSHIFT register */ - for_each_dsi_port(port, intel_dsi->ports) { - dsi_trans = dsi_port_to_transcoder(port); - I915_WRITE(VSYNCSHIFT(dsi_trans), vsync_shift); + if (intel_dsi->operation_mode == INTEL_DSI_VIDEO_MODE) { + for_each_dsi_port(port, intel_dsi->ports) { + dsi_trans = dsi_port_to_transcoder(port); + I915_WRITE(VSYNCSHIFT(dsi_trans), vsync_shift); + } } /* program TRANS_VBLANK register, should be same as vtotal programmed */ From patchwork Mon Oct 14 11:01:19 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kulkarni, Vandita" X-Patchwork-Id: 11188347 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id F3FC41668 for ; Mon, 14 Oct 2019 11:30:55 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id DC9D220650 for ; Mon, 14 Oct 2019 11:30:55 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org DC9D220650 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 5528E6E288; Mon, 14 Oct 2019 11:30:54 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id 0668A6E282 for ; Mon, 14 Oct 2019 11:30:49 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 14 Oct 2019 04:30:48 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.67,295,1566889200"; d="scan'208";a="185465882" Received: from vandita-desktop.iind.intel.com ([10.223.74.218]) by orsmga007.jf.intel.com with ESMTP; 14 Oct 2019 04:30:46 -0700 From: Vandita Kulkarni To: intel-gfx@lists.freedesktop.org Date: Mon, 14 Oct 2019 16:31:19 +0530 Message-Id: <20191014110122.31923-5-vandita.kulkarni@intel.com> X-Mailer: git-send-email 2.21.0.5.gaeb582a In-Reply-To: <20191014110122.31923-1-vandita.kulkarni@intel.com> References: <20191014110122.31923-1-vandita.kulkarni@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [RFC 4/7] drm/i915/dsi: Helper to find dsi encoder in cmd mode X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jani.nikula@intel.com Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Madhav Chauhan This patch adds a helper function to find encoder if DSI is operating in command mode. This function will be used while enabling/disabling TE interrupts for DSI. Signed-off-by: Madhav Chauhan Signed-off-by: Vandita Kulkarni --- drivers/gpu/drm/i915/display/icl_dsi.c | 17 +++++++++++++++++ drivers/gpu/drm/i915/display/intel_dsi.h | 3 +++ 2 files changed, 20 insertions(+) diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c index 5dd9eebab6b1..877746416e52 100644 --- a/drivers/gpu/drm/i915/display/icl_dsi.c +++ b/drivers/gpu/drm/i915/display/icl_dsi.c @@ -73,6 +73,23 @@ static enum transcoder dsi_port_to_transcoder(enum port port) return TRANSCODER_DSI_1; } +struct intel_encoder *gen11_dsi_find_cmd_mode_encoder(struct intel_crtc *crtc) +{ + struct drm_device *dev = crtc->base.dev; + struct intel_encoder *encoder; + struct intel_dsi *intel_dsi; + + for_each_encoder_on_crtc(dev, &crtc->base, encoder) { + if (encoder->type != INTEL_OUTPUT_DSI) + continue; + intel_dsi = enc_to_intel_dsi(&encoder->base); + if (intel_dsi->operation_mode == INTEL_DSI_COMMAND_MODE) + return encoder; + } + + return NULL; +} + static void wait_for_cmds_dispatched_to_panel(struct intel_encoder *encoder) { struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); diff --git a/drivers/gpu/drm/i915/display/intel_dsi.h b/drivers/gpu/drm/i915/display/intel_dsi.h index b15be5814599..071dad7ee04a 100644 --- a/drivers/gpu/drm/i915/display/intel_dsi.h +++ b/drivers/gpu/drm/i915/display/intel_dsi.h @@ -201,6 +201,9 @@ u32 bxt_dsi_get_pclk(struct intel_encoder *encoder, struct intel_crtc_state *config); void bxt_dsi_reset_clocks(struct intel_encoder *encoder, enum port port); +/* icl_dsi.c */ +struct intel_encoder *gen11_dsi_find_cmd_mode_encoder(struct intel_crtc *crtc); + /* intel_dsi_vbt.c */ bool intel_dsi_vbt_init(struct intel_dsi *intel_dsi, u16 panel_id); void intel_dsi_vbt_exec_sequence(struct intel_dsi *intel_dsi, From patchwork Mon Oct 14 11:01:20 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kulkarni, Vandita" X-Patchwork-Id: 11188345 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 2AF71139A for ; Mon, 14 Oct 2019 11:30:55 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 1326920650 for ; Mon, 14 Oct 2019 11:30:55 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 1326920650 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 41E536E287; Mon, 14 Oct 2019 11:30:54 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id 591186E282 for ; Mon, 14 Oct 2019 11:30:50 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 14 Oct 2019 04:30:50 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.67,295,1566889200"; d="scan'208";a="185465888" Received: from vandita-desktop.iind.intel.com ([10.223.74.218]) by orsmga007.jf.intel.com with ESMTP; 14 Oct 2019 04:30:48 -0700 From: Vandita Kulkarni To: intel-gfx@lists.freedesktop.org Date: Mon, 14 Oct 2019 16:31:20 +0530 Message-Id: <20191014110122.31923-6-vandita.kulkarni@intel.com> X-Mailer: git-send-email 2.21.0.5.gaeb582a In-Reply-To: <20191014110122.31923-1-vandita.kulkarni@intel.com> References: <20191014110122.31923-1-vandita.kulkarni@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [RFC 5/7] drm/i915/dsi: Configure TE interrupt for cmd mode X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jani.nikula@intel.com Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" We need to configure TE interrupt in two places. Port interrupt and DSI interrupt mask registers. Signed-off-by: Vandita Kulkarni --- drivers/gpu/drm/i915/i915_irq.c | 49 ++++++++++++++++++++++++++++++++- 1 file changed, 48 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index 3af7f7914c40..bfb2a63504fb 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -41,6 +41,7 @@ #include "display/intel_hotplug.h" #include "display/intel_lpe_audio.h" #include "display/intel_psr.h" +#include "display/intel_dsi.h" #include "gt/intel_gt.h" #include "gt/intel_gt_irq.h" @@ -2960,12 +2961,44 @@ int ilk_enable_vblank(struct drm_crtc *crtc) return 0; } +static void gen11_dsi_configure_te(struct drm_crtc *crtc, bool enable) +{ + struct drm_i915_private *dev_priv = to_i915(crtc->dev); + struct intel_crtc *intel_crtc = to_intel_crtc(crtc); + struct intel_encoder *encoder = NULL; + struct intel_dsi *intel_dsi; + enum port port; + u32 tmp; + + encoder = gen11_dsi_find_cmd_mode_encoder(intel_crtc); + if (!encoder) + return; + + intel_dsi = enc_to_intel_dsi(&encoder->base); + /* Assuming single link would always be enabled on PORT_A */ + port = (intel_dsi->ports & BIT(PORT_B) & BIT(PORT_A)) ? PORT_B : PORT_A; + tmp = I915_READ(ICL_DSI_INTR_MASK_REG(port)); + if (enable) + tmp &= ~ICL_TE_EVENT; + else + tmp |= ICL_TE_EVENT; + + I915_WRITE(ICL_DSI_INTR_MASK_REG(port), tmp); +} + int bdw_enable_vblank(struct drm_crtc *crtc) { struct drm_i915_private *dev_priv = to_i915(crtc->dev); + struct intel_crtc *intel_crtc = to_intel_crtc(crtc); enum pipe pipe = to_intel_crtc(crtc)->pipe; unsigned long irqflags; + if (INTEL_GEN(dev_priv) >= 11 && + (intel_crtc_has_type(intel_crtc->config, INTEL_OUTPUT_DSI))) { + gen11_dsi_configure_te(crtc, true); + return 0; + } + spin_lock_irqsave(&dev_priv->irq_lock, irqflags); bdw_enable_pipe_irq(dev_priv, pipe, GEN8_PIPE_VBLANK); spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags); @@ -3031,9 +3064,16 @@ void ilk_disable_vblank(struct drm_crtc *crtc) void bdw_disable_vblank(struct drm_crtc *crtc) { struct drm_i915_private *dev_priv = to_i915(crtc->dev); - enum pipe pipe = to_intel_crtc(crtc)->pipe; + struct intel_crtc *intel_crtc = to_intel_crtc(crtc); + enum pipe pipe = intel_crtc->pipe; unsigned long irqflags; + if (INTEL_GEN(dev_priv) >= 11 && + (intel_crtc_has_type(intel_crtc->config, INTEL_OUTPUT_DSI))) { + gen11_dsi_configure_te(crtc, false); + return; + } + spin_lock_irqsave(&dev_priv->irq_lock, irqflags); bdw_disable_pipe_irq(dev_priv, pipe, GEN8_PIPE_VBLANK); spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags); @@ -3726,6 +3766,13 @@ static void gen8_de_irq_postinstall(struct drm_i915_private *dev_priv) gen3_assert_iir_is_zero(uncore, EDP_PSR_IIR); } + if (INTEL_GEN(dev_priv) >= 11) { + enum port port; + + if (intel_bios_is_dsi_present(dev_priv, &port)) + de_port_masked |= ICL_DSI_0 | ICL_DSI_1; + } + for_each_pipe(dev_priv, pipe) { dev_priv->de_irq_mask[pipe] = ~de_pipe_masked; From patchwork Mon Oct 14 11:01:21 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kulkarni, Vandita" X-Patchwork-Id: 11188353 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 4792715AB for ; Mon, 14 Oct 2019 11:31:01 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3020420650 for ; Mon, 14 Oct 2019 11:31:01 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 3020420650 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id A079F6E28E; Mon, 14 Oct 2019 11:31:00 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id 5DE176E284 for ; Mon, 14 Oct 2019 11:30:52 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 14 Oct 2019 04:30:52 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.67,295,1566889200"; d="scan'208";a="185465905" Received: from vandita-desktop.iind.intel.com ([10.223.74.218]) by orsmga007.jf.intel.com with ESMTP; 14 Oct 2019 04:30:50 -0700 From: Vandita Kulkarni To: intel-gfx@lists.freedesktop.org Date: Mon, 14 Oct 2019 16:31:21 +0530 Message-Id: <20191014110122.31923-7-vandita.kulkarni@intel.com> X-Mailer: git-send-email 2.21.0.5.gaeb582a In-Reply-To: <20191014110122.31923-1-vandita.kulkarni@intel.com> References: <20191014110122.31923-1-vandita.kulkarni@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [RFC 6/7] drm/i915/dsi: Add TE handler for dsi cmd mode. X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jani.nikula@intel.com Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" In case of dual link, we get the TE on slave. So clear the TE on slave DSI IIR. Signed-off-by: Vandita Kulkarni --- drivers/gpu/drm/i915/i915_irq.c | 61 +++++++++++++++++++++++++++++++++ 1 file changed, 61 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index bfb2a63504fb..d12efa72943b 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -2628,6 +2628,61 @@ gen8_de_misc_irq_handler(struct drm_i915_private *dev_priv, u32 iir) DRM_ERROR("Unexpected DE Misc interrupt\n"); } +void gen11_dsi_te_interrupt_handler(struct drm_i915_private *dev_priv, + u32 iir_value) +{ + enum pipe pipe = INVALID_PIPE; + enum port port; + enum transcoder dsi_trans; + u32 val; + + /* + * Incase of dual link, TE comes from DSI_1 + * this is to check if dual link is enabled + */ + val = I915_READ(TRANS_DDI_FUNC_CTL2(TRANSCODER_DSI_0)); + val &= PORT_SYNC_MODE_ENABLE; + + /* + * if dual link is enabled, then read DSI_0 + * transcoder registers + */ + port = ((iir_value & ICL_DSI_1) && val) || (iir_value & ICL_DSI_0) ? PORT_A : PORT_B; + dsi_trans = (port == PORT_A) ? TRANSCODER_DSI_0 : TRANSCODER_DSI_1; + + /* Check if DSI configured in command mode */ + val = I915_READ(DSI_TRANS_FUNC_CONF(dsi_trans)); + val = (val & OP_MODE_MASK) >> 28; + + if (val) { + DRM_ERROR("DSI trancoder not configured in command mode\n"); + return; + } + + /* Get PIPE for handling VBLANK event */ + val = I915_READ(TRANS_DDI_FUNC_CTL(dsi_trans)); + switch (val & TRANS_DDI_EDP_INPUT_MASK) { + case TRANS_DDI_EDP_INPUT_A_ON: + pipe = PIPE_A; + break; + case TRANS_DDI_EDP_INPUT_B_ONOFF: + pipe = PIPE_B; + break; + case TRANS_DDI_EDP_INPUT_C_ONOFF: + pipe = PIPE_C; + break; + default: + DRM_ERROR("Invalid PIPE\n"); + } + + /* clear TE in dsi IIR */ + port = (iir_value & ICL_DSI_1) ? PORT_B : PORT_A; + val = I915_READ(ICL_DSI_INTR_IDENT_REG(port)); + I915_WRITE((ICL_DSI_INTR_IDENT_REG(port)), val); + + drm_handle_vblank(&dev_priv->drm, pipe); +} + static irqreturn_t gen8_de_irq_handler(struct drm_i915_private *dev_priv, u32 master_ctl) { @@ -2692,6 +2747,12 @@ gen8_de_irq_handler(struct drm_i915_private *dev_priv, u32 master_ctl) found = true; } + if ((INTEL_GEN(dev_priv) >= 11) && + (iir & (ICL_DSI_0 | ICL_DSI_1))) { + gen11_dsi_te_interrupt_handler(dev_priv, iir); + found = true; + } + if (!found) DRM_ERROR("Unexpected DE Port interrupt\n"); } From patchwork Mon Oct 14 11:01:22 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kulkarni, Vandita" X-Patchwork-Id: 11188351 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B7F5B139A for ; Mon, 14 Oct 2019 11:31:00 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A054820650 for ; Mon, 14 Oct 2019 11:31:00 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org A054820650 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 3EA9A6E28A; Mon, 14 Oct 2019 11:31:00 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id AA5CC6E28A for ; Mon, 14 Oct 2019 11:30:54 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 14 Oct 2019 04:30:54 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.67,295,1566889200"; d="scan'208";a="185465916" Received: from vandita-desktop.iind.intel.com ([10.223.74.218]) by orsmga007.jf.intel.com with ESMTP; 14 Oct 2019 04:30:52 -0700 From: Vandita Kulkarni To: intel-gfx@lists.freedesktop.org Date: Mon, 14 Oct 2019 16:31:22 +0530 Message-Id: <20191014110122.31923-8-vandita.kulkarni@intel.com> X-Mailer: git-send-email 2.21.0.5.gaeb582a In-Reply-To: <20191014110122.31923-1-vandita.kulkarni@intel.com> References: <20191014110122.31923-1-vandita.kulkarni@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [RFC 7/7] drm/i915/dsi: Initiate frame request in cmd mode X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jani.nikula@intel.com Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" In TE Gate mode, on every flip we need to set the frame update request bit. After this bit is set transcoder hardware will automatically send the frame data to the panel when it receives the TE event. Signed-off-by: Vandita Kulkarni --- drivers/gpu/drm/i915/display/icl_dsi.c | 27 +++++++++++++++++++ drivers/gpu/drm/i915/display/intel_display.c | 16 +++++++++++ .../drm/i915/display/intel_display_types.h | 3 +++ drivers/gpu/drm/i915/display/intel_dsi.h | 3 +++ 4 files changed, 49 insertions(+) diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c index 877746416e52..c72917ddf8e7 100644 --- a/drivers/gpu/drm/i915/display/icl_dsi.c +++ b/drivers/gpu/drm/i915/display/icl_dsi.c @@ -90,6 +90,33 @@ struct intel_encoder *gen11_dsi_find_cmd_mode_encoder(struct intel_crtc *crtc) return NULL; } +void gen11_dsi_check_frame_update_needed(struct intel_crtc *intel_crtc, + struct intel_crtc_state *crtc_state) +{ + struct intel_encoder *intel_encoder = NULL; + + intel_encoder = gen11_dsi_find_cmd_mode_encoder(intel_crtc); + if (!intel_encoder) + return; + + /* TBD Use bits to say update on which dsi port instead of a bool */ + crtc_state->dsi_frame_update = true; +} + +void gen11_dsi_frame_update(struct intel_crtc_state *crtc_state) +{ + struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); + u32 tmp; + + /* TBD: add check on port */ + if (crtc_state->dsi_frame_update) { + tmp = I915_READ(ICL_DSI_CMD_FRMCTL(PORT_A)); + tmp |= ICL_FRAME_UPDATE_REQUEST; + I915_WRITE(ICL_DSI_CMD_FRMCTL(PORT_A), tmp); + } +} + static void wait_for_cmds_dispatched_to_panel(struct intel_encoder *encoder) { struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 3cf39fc153b3..a902bb2bf075 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -11858,6 +11858,11 @@ static int intel_crtc_atomic_check(struct drm_crtc *_crtc, crtc_state); } + if ((INTEL_GEN(dev_priv) >= 11) && + (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DSI))) { + gen11_dsi_check_frame_update_needed(crtc, crtc_state); + } + if (HAS_IPS(dev_priv)) crtc_state->ips_enabled = hsw_compute_ips_config(crtc_state); @@ -13618,6 +13623,7 @@ static int intel_atomic_check(struct drm_device *dev, if (ret) goto fail; + for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) { if (!needs_modeset(new_crtc_state) && @@ -14108,6 +14114,16 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state) intel_color_load_luts(new_crtc_state); } + /* + * Incase of mipi dsi command mode, we need to set frame update + * for every commit + */ + for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) { + if (new_crtc_state->base.active && + !needs_modeset(new_crtc_state) && + new_crtc_state->dsi_frame_update) + gen11_dsi_frame_update(new_crtc_state); + } /* * Now that the vblank has passed, we can go ahead and program the * optimal watermarks on platforms that need two-step watermark diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h index 40390d855815..69da4ec45691 100644 --- a/drivers/gpu/drm/i915/display/intel_display_types.h +++ b/drivers/gpu/drm/i915/display/intel_display_types.h @@ -991,6 +991,9 @@ struct intel_crtc_state { /* Forward Error correction State */ bool fec_enable; + + /* frame update for dsi command mode */ + bool dsi_frame_update; }; struct intel_crtc { diff --git a/drivers/gpu/drm/i915/display/intel_dsi.h b/drivers/gpu/drm/i915/display/intel_dsi.h index 071dad7ee04a..d9350b842115 100644 --- a/drivers/gpu/drm/i915/display/intel_dsi.h +++ b/drivers/gpu/drm/i915/display/intel_dsi.h @@ -203,6 +203,9 @@ void bxt_dsi_reset_clocks(struct intel_encoder *encoder, enum port port); /* icl_dsi.c */ struct intel_encoder *gen11_dsi_find_cmd_mode_encoder(struct intel_crtc *crtc); +void gen11_dsi_check_frame_update_needed(struct intel_crtc *crtc, + struct intel_crtc_state *crtc_state); +void gen11_dsi_frame_update(struct intel_crtc_state *crtc_state); /* intel_dsi_vbt.c */ bool intel_dsi_vbt_init(struct intel_dsi *intel_dsi, u16 panel_id);