From patchwork Wed Oct 23 17:47:12 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Cercueil X-Patchwork-Id: 11207307 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3BA84112B for ; Wed, 23 Oct 2019 17:47:25 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 06A1821929 for ; Wed, 23 Oct 2019 17:47:25 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=crapouillou.net header.i=@crapouillou.net header.b="IiaX5j3x" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731423AbfJWRrX (ORCPT ); Wed, 23 Oct 2019 13:47:23 -0400 Received: from outils.crapouillou.net ([89.234.176.41]:38342 "EHLO crapouillou.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730988AbfJWRrX (ORCPT ); Wed, 23 Oct 2019 13:47:23 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=crapouillou.net; s=mail; t=1571852841; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-transfer-encoding:content-transfer-encoding: in-reply-to:references; bh=fkkYd+A3LtbnJ8VlG6CjKA7lliTwdOuqmLmZmhqC4oI=; b=IiaX5j3xIeiz/5eRCTjkwX7W0CJ+f0c1BkWOLbCNQo2cielWbb9RZGCioUiKnAah2TQTxs 8auWZHN/QYMuD2r3sLuJNTtEzrPRDCW7LqD0NsaYc6McCwLfxelltamiYzi3HPpDP/JhW1 jYIeVriZjVzI9TqTFzEo7VV5P98+9o8= From: Paul Cercueil To: Guenter Roeck , Wim Van Sebroeck Cc: linux-watchdog@vger.kernel.org, linux-kernel@vger.kernel.org, od@zcrc.me, Paul Cercueil , Mathieu Malaterre , Artur Rojek Subject: [PATCH v2 1/3] watchdog: jz4740: Use WDT clock provided by TCU driver Date: Wed, 23 Oct 2019 19:47:12 +0200 Message-Id: <20191023174714.14362-1-paul@crapouillou.net> MIME-Version: 1.0 Sender: linux-watchdog-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-watchdog@vger.kernel.org Instead of requesting the "ext" clock and handling the watchdog clock divider and gating in the watchdog driver, we now request and use the "wdt" clock that is supplied by the ingenic-timer "TCU" driver. The major benefit is that the watchdog's clock rate and parent can now be specified from within devicetree, instead of hardcoded in the driver. Also, this driver won't poke anymore into the TCU registers to enable/disable the clock, as this is now handled by the TCU driver. On the bad side, we break the ABI with devicetree - as we now request a different clock. In this very specific case it is still okay, as every Ingenic JZ47xx-based board out there compile the devicetree within the kernel; so it's still time to push breaking changes, in order to get a clean devicetree that won't break once it musn't. Signed-off-by: Paul Cercueil Tested-by: Mathieu Malaterre Tested-by: Artur Rojek Acked-by: Guenter Roeck --- Notes: v2: Rebase on top of 5.4-rc4 drivers/watchdog/Kconfig | 1 + drivers/watchdog/jz4740_wdt.c | 75 ++++++++++++++--------------------- 2 files changed, 31 insertions(+), 45 deletions(-) diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig index 58e7c100b6ad..6421187769cf 100644 --- a/drivers/watchdog/Kconfig +++ b/drivers/watchdog/Kconfig @@ -1642,6 +1642,7 @@ config INDYDOG config JZ4740_WDT tristate "Ingenic jz4740 SoC hardware watchdog" depends on MACH_JZ4740 || MACH_JZ4780 + depends on COMMON_CLK select WATCHDOG_CORE help Hardware driver for the built-in watchdog timer on Ingenic jz4740 SoCs. diff --git a/drivers/watchdog/jz4740_wdt.c b/drivers/watchdog/jz4740_wdt.c index c6052ae54f32..72920f09f4a7 100644 --- a/drivers/watchdog/jz4740_wdt.c +++ b/drivers/watchdog/jz4740_wdt.c @@ -18,19 +18,6 @@ #include #include -#include - -#define JZ_WDT_CLOCK_PCLK 0x1 -#define JZ_WDT_CLOCK_RTC 0x2 -#define JZ_WDT_CLOCK_EXT 0x4 - -#define JZ_WDT_CLOCK_DIV_1 (0 << TCU_TCSR_PRESCALE_LSB) -#define JZ_WDT_CLOCK_DIV_4 (1 << TCU_TCSR_PRESCALE_LSB) -#define JZ_WDT_CLOCK_DIV_16 (2 << TCU_TCSR_PRESCALE_LSB) -#define JZ_WDT_CLOCK_DIV_64 (3 << TCU_TCSR_PRESCALE_LSB) -#define JZ_WDT_CLOCK_DIV_256 (4 << TCU_TCSR_PRESCALE_LSB) -#define JZ_WDT_CLOCK_DIV_1024 (5 << TCU_TCSR_PRESCALE_LSB) - #define DEFAULT_HEARTBEAT 5 #define MAX_HEARTBEAT 2048 @@ -50,7 +37,8 @@ MODULE_PARM_DESC(heartbeat, struct jz4740_wdt_drvdata { struct watchdog_device wdt; void __iomem *base; - struct clk *rtc_clk; + struct clk *clk; + unsigned long clk_rate; }; static int jz4740_wdt_ping(struct watchdog_device *wdt_dev) @@ -65,32 +53,14 @@ static int jz4740_wdt_set_timeout(struct watchdog_device *wdt_dev, unsigned int new_timeout) { struct jz4740_wdt_drvdata *drvdata = watchdog_get_drvdata(wdt_dev); - unsigned int rtc_clk_rate; - unsigned int timeout_value; - unsigned short clock_div = JZ_WDT_CLOCK_DIV_1; + u16 timeout_value = (u16)(drvdata->clk_rate * new_timeout); u8 tcer; - rtc_clk_rate = clk_get_rate(drvdata->rtc_clk); - - timeout_value = rtc_clk_rate * new_timeout; - while (timeout_value > 0xffff) { - if (clock_div == JZ_WDT_CLOCK_DIV_1024) { - /* Requested timeout too high; - * use highest possible value. */ - timeout_value = 0xffff; - break; - } - timeout_value >>= 2; - clock_div += (1 << TCU_TCSR_PRESCALE_LSB); - } - tcer = readb(drvdata->base + TCU_REG_WDT_TCER); writeb(0x0, drvdata->base + TCU_REG_WDT_TCER); - writew(clock_div, drvdata->base + TCU_REG_WDT_TCSR); writew((u16)timeout_value, drvdata->base + TCU_REG_WDT_TDR); writew(0x0, drvdata->base + TCU_REG_WDT_TCNT); - writew(clock_div | JZ_WDT_CLOCK_RTC, drvdata->base + TCU_REG_WDT_TCSR); if (tcer & TCU_WDT_TCER_TCEN) writeb(TCU_WDT_TCER_TCEN, drvdata->base + TCU_REG_WDT_TCER); @@ -102,11 +72,15 @@ static int jz4740_wdt_set_timeout(struct watchdog_device *wdt_dev, static int jz4740_wdt_start(struct watchdog_device *wdt_dev) { struct jz4740_wdt_drvdata *drvdata = watchdog_get_drvdata(wdt_dev); + int ret; u8 tcer; + ret = clk_prepare_enable(drvdata->clk); + if (ret) + return ret; + tcer = readb(drvdata->base + TCU_REG_WDT_TCER); - jz4740_timer_enable_watchdog(); jz4740_wdt_set_timeout(wdt_dev, wdt_dev->timeout); /* Start watchdog if it wasn't started already */ @@ -121,7 +95,7 @@ static int jz4740_wdt_stop(struct watchdog_device *wdt_dev) struct jz4740_wdt_drvdata *drvdata = watchdog_get_drvdata(wdt_dev); writeb(0x0, drvdata->base + TCU_REG_WDT_TCER); - jz4740_timer_disable_watchdog(); + clk_disable_unprepare(drvdata->clk); return 0; } @@ -162,21 +136,38 @@ static int jz4740_wdt_probe(struct platform_device *pdev) struct device *dev = &pdev->dev; struct jz4740_wdt_drvdata *drvdata; struct watchdog_device *jz4740_wdt; + long rate; + int ret; drvdata = devm_kzalloc(dev, sizeof(struct jz4740_wdt_drvdata), GFP_KERNEL); if (!drvdata) return -ENOMEM; - if (heartbeat < 1 || heartbeat > MAX_HEARTBEAT) - heartbeat = DEFAULT_HEARTBEAT; + drvdata->clk = devm_clk_get(&pdev->dev, "wdt"); + if (IS_ERR(drvdata->clk)) { + dev_err(&pdev->dev, "cannot find WDT clock\n"); + return PTR_ERR(drvdata->clk); + } + + /* Set smallest clock possible */ + rate = clk_round_rate(drvdata->clk, 1); + if (rate < 0) + return rate; + + ret = clk_set_rate(drvdata->clk, rate); + if (ret) + return ret; + drvdata->clk_rate = rate; jz4740_wdt = &drvdata->wdt; jz4740_wdt->info = &jz4740_wdt_info; jz4740_wdt->ops = &jz4740_wdt_ops; - jz4740_wdt->timeout = heartbeat; jz4740_wdt->min_timeout = 1; - jz4740_wdt->max_timeout = MAX_HEARTBEAT; + jz4740_wdt->max_timeout = 0xffff / rate; + jz4740_wdt->timeout = clamp(heartbeat, + jz4740_wdt->min_timeout, + jz4740_wdt->max_timeout); jz4740_wdt->parent = dev; watchdog_set_nowayout(jz4740_wdt, nowayout); watchdog_set_drvdata(jz4740_wdt, drvdata); @@ -185,12 +176,6 @@ static int jz4740_wdt_probe(struct platform_device *pdev) if (IS_ERR(drvdata->base)) return PTR_ERR(drvdata->base); - drvdata->rtc_clk = devm_clk_get(dev, "rtc"); - if (IS_ERR(drvdata->rtc_clk)) { - dev_err(dev, "cannot find RTC clock\n"); - return PTR_ERR(drvdata->rtc_clk); - } - return devm_watchdog_register_device(dev, &drvdata->wdt); } From patchwork Wed Oct 23 17:47:13 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Cercueil X-Patchwork-Id: 11207309 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id ED8B9112B for ; Wed, 23 Oct 2019 17:47:30 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id CB0D02173B for ; Wed, 23 Oct 2019 17:47:30 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=crapouillou.net header.i=@crapouillou.net header.b="ACQWP5bs" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730988AbfJWRra (ORCPT ); Wed, 23 Oct 2019 13:47:30 -0400 Received: from outils.crapouillou.net ([89.234.176.41]:38610 "EHLO crapouillou.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730513AbfJWRra (ORCPT ); Wed, 23 Oct 2019 13:47:30 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=crapouillou.net; s=mail; t=1571852842; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=mw3H1n/jwcizL4RpISfM0SdzIvSyZlZQ0uvl9RUxxmY=; b=ACQWP5bswURj4+7m8A/P2HKfDw8ZLi66nwwPGX5eqAO8moTK84ZJyHaKTdUO1wC1thnmso s9hXu1fcvi1b8cbRyTfs35Aedvlnnxr4hPwydj1KX8cWkijGzCJwTQU0aweDLcu29HD4sv 4glwlia1Hh4LFTMFRdRqsSJ4Q+NvGbM= From: Paul Cercueil To: Guenter Roeck , Wim Van Sebroeck Cc: linux-watchdog@vger.kernel.org, linux-kernel@vger.kernel.org, od@zcrc.me, Paul Cercueil , Mathieu Malaterre , Artur Rojek Subject: [PATCH v2 2/3] watchdog: jz4740: Use regmap provided by TCU driver Date: Wed, 23 Oct 2019 19:47:13 +0200 Message-Id: <20191023174714.14362-2-paul@crapouillou.net> In-Reply-To: <20191023174714.14362-1-paul@crapouillou.net> References: <20191023174714.14362-1-paul@crapouillou.net> MIME-Version: 1.0 Sender: linux-watchdog-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-watchdog@vger.kernel.org Since we broke the ABI by changing the clock, the driver was also updated to use the regmap provided by the TCU driver. Signed-off-by: Paul Cercueil Tested-by: Mathieu Malaterre Tested-by: Artur Rojek Acked-by: Guenter Roeck --- Notes: v2: Rebase on top of 5.4-rc4 drivers/watchdog/Kconfig | 1 + drivers/watchdog/jz4740_wdt.c | 35 ++++++++++++++++++++--------------- 2 files changed, 21 insertions(+), 15 deletions(-) diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig index 6421187769cf..dbef995856bf 100644 --- a/drivers/watchdog/Kconfig +++ b/drivers/watchdog/Kconfig @@ -1644,6 +1644,7 @@ config JZ4740_WDT depends on MACH_JZ4740 || MACH_JZ4780 depends on COMMON_CLK select WATCHDOG_CORE + select MFD_SYSCON help Hardware driver for the built-in watchdog timer on Ingenic jz4740 SoCs. diff --git a/drivers/watchdog/jz4740_wdt.c b/drivers/watchdog/jz4740_wdt.c index 72920f09f4a7..bdf9564efa29 100644 --- a/drivers/watchdog/jz4740_wdt.c +++ b/drivers/watchdog/jz4740_wdt.c @@ -5,6 +5,7 @@ */ #include +#include #include #include #include @@ -17,6 +18,7 @@ #include #include #include +#include #define DEFAULT_HEARTBEAT 5 #define MAX_HEARTBEAT 2048 @@ -36,7 +38,7 @@ MODULE_PARM_DESC(heartbeat, struct jz4740_wdt_drvdata { struct watchdog_device wdt; - void __iomem *base; + struct regmap *map; struct clk *clk; unsigned long clk_rate; }; @@ -45,7 +47,8 @@ static int jz4740_wdt_ping(struct watchdog_device *wdt_dev) { struct jz4740_wdt_drvdata *drvdata = watchdog_get_drvdata(wdt_dev); - writew(0x0, drvdata->base + TCU_REG_WDT_TCNT); + regmap_write(drvdata->map, TCU_REG_WDT_TCNT, 0); + return 0; } @@ -54,16 +57,16 @@ static int jz4740_wdt_set_timeout(struct watchdog_device *wdt_dev, { struct jz4740_wdt_drvdata *drvdata = watchdog_get_drvdata(wdt_dev); u16 timeout_value = (u16)(drvdata->clk_rate * new_timeout); - u8 tcer; + unsigned int tcer; - tcer = readb(drvdata->base + TCU_REG_WDT_TCER); - writeb(0x0, drvdata->base + TCU_REG_WDT_TCER); + regmap_read(drvdata->map, TCU_REG_WDT_TCER, &tcer); + regmap_write(drvdata->map, TCU_REG_WDT_TCER, 0); - writew((u16)timeout_value, drvdata->base + TCU_REG_WDT_TDR); - writew(0x0, drvdata->base + TCU_REG_WDT_TCNT); + regmap_write(drvdata->map, TCU_REG_WDT_TDR, timeout_value); + regmap_write(drvdata->map, TCU_REG_WDT_TCNT, 0); if (tcer & TCU_WDT_TCER_TCEN) - writeb(TCU_WDT_TCER_TCEN, drvdata->base + TCU_REG_WDT_TCER); + regmap_write(drvdata->map, TCU_REG_WDT_TCER, TCU_WDT_TCER_TCEN); wdt_dev->timeout = new_timeout; return 0; @@ -72,20 +75,20 @@ static int jz4740_wdt_set_timeout(struct watchdog_device *wdt_dev, static int jz4740_wdt_start(struct watchdog_device *wdt_dev) { struct jz4740_wdt_drvdata *drvdata = watchdog_get_drvdata(wdt_dev); + unsigned int tcer; int ret; - u8 tcer; ret = clk_prepare_enable(drvdata->clk); if (ret) return ret; - tcer = readb(drvdata->base + TCU_REG_WDT_TCER); + regmap_read(drvdata->map, TCU_REG_WDT_TCER, &tcer); jz4740_wdt_set_timeout(wdt_dev, wdt_dev->timeout); /* Start watchdog if it wasn't started already */ if (!(tcer & TCU_WDT_TCER_TCEN)) - writeb(TCU_WDT_TCER_TCEN, drvdata->base + TCU_REG_WDT_TCER); + regmap_write(drvdata->map, TCU_REG_WDT_TCER, TCU_WDT_TCER_TCEN); return 0; } @@ -94,7 +97,7 @@ static int jz4740_wdt_stop(struct watchdog_device *wdt_dev) { struct jz4740_wdt_drvdata *drvdata = watchdog_get_drvdata(wdt_dev); - writeb(0x0, drvdata->base + TCU_REG_WDT_TCER); + regmap_write(drvdata->map, TCU_REG_WDT_TCER, 0); clk_disable_unprepare(drvdata->clk); return 0; @@ -172,9 +175,11 @@ static int jz4740_wdt_probe(struct platform_device *pdev) watchdog_set_nowayout(jz4740_wdt, nowayout); watchdog_set_drvdata(jz4740_wdt, drvdata); - drvdata->base = devm_platform_ioremap_resource(pdev, 0); - if (IS_ERR(drvdata->base)) - return PTR_ERR(drvdata->base); + drvdata->map = device_node_to_regmap(dev->parent->of_node); + if (!drvdata->map) { + dev_err(dev, "regmap not found\n"); + return -EINVAL; + } return devm_watchdog_register_device(dev, &drvdata->wdt); } From patchwork Wed Oct 23 17:47:14 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Cercueil X-Patchwork-Id: 11207311 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 8BDB3139A for ; Wed, 23 Oct 2019 17:47:37 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 6B76121929 for ; Wed, 23 Oct 2019 17:47:37 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=crapouillou.net header.i=@crapouillou.net header.b="wM7lI1Fg" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731941AbfJWRrh (ORCPT ); Wed, 23 Oct 2019 13:47:37 -0400 Received: from outils.crapouillou.net ([89.234.176.41]:38668 "EHLO crapouillou.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730513AbfJWRrg (ORCPT ); Wed, 23 Oct 2019 13:47:36 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=crapouillou.net; s=mail; t=1571852843; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=n2YxJuEgeum48XOf8+NOF4s4gfxtGM+tvTtwbCujb0E=; b=wM7lI1FgaKyh76bG9Ww+hKrY1LJdZa77wh81VQWYjUAV5hBPf57jMfsS1miWOxYk6XeMm9 XWhcRuwEHjLZiW987ljqJdrP7JX95TPMiRDQ7yhoS09VQdUs2AdnJ9XWpmzn292P5wr+nw O4d0hx9FAQnxdel5rdG/8W/u22Ays/w= From: Paul Cercueil To: Guenter Roeck , Wim Van Sebroeck Cc: linux-watchdog@vger.kernel.org, linux-kernel@vger.kernel.org, od@zcrc.me, Paul Cercueil Subject: [PATCH v2 3/3] watchdog: jz4740: Drop dependency on MACH_JZ47xx Date: Wed, 23 Oct 2019 19:47:14 +0200 Message-Id: <20191023174714.14362-3-paul@crapouillou.net> In-Reply-To: <20191023174714.14362-1-paul@crapouillou.net> References: <20191023174714.14362-1-paul@crapouillou.net> MIME-Version: 1.0 Sender: linux-watchdog-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-watchdog@vger.kernel.org Depending on MACH_JZ47xx prevent us from creating a generic kernel that works on more than one MIPS board. Instead, we just depend on MIPS being set. Signed-off-by: Paul Cercueil Acked-by: Guenter Roeck --- Notes: v2: Rebase on top of 5.4-rc4 drivers/watchdog/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig index dbef995856bf..fd4844f0a8f3 100644 --- a/drivers/watchdog/Kconfig +++ b/drivers/watchdog/Kconfig @@ -1641,7 +1641,7 @@ config INDYDOG config JZ4740_WDT tristate "Ingenic jz4740 SoC hardware watchdog" - depends on MACH_JZ4740 || MACH_JZ4780 + depends on MIPS depends on COMMON_CLK select WATCHDOG_CORE select MFD_SYSCON