From patchwork Tue Oct 29 09:28:08 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jan Beulich X-Patchwork-Id: 11217499 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 9069B14DB for ; Tue, 29 Oct 2019 09:29:58 +0000 (UTC) Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 7444F20717 for ; Tue, 29 Oct 2019 09:29:58 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 7444F20717 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=suse.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1iPNnQ-0007f2-CK; Tue, 29 Oct 2019 09:28:12 +0000 Received: from us1-rack-iad1.inumbo.com ([172.99.69.81]) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1iPNnO-0007ex-KF for xen-devel@lists.xenproject.org; Tue, 29 Oct 2019 09:28:10 +0000 X-Inumbo-ID: 6aca485a-fa2e-11e9-beca-bc764e2007e4 Received: from mx1.suse.de (unknown [195.135.220.15]) by us1-rack-iad1.inumbo.com (Halon) with ESMTPS id 6aca485a-fa2e-11e9-beca-bc764e2007e4; Tue, 29 Oct 2019 09:28:08 +0000 (UTC) X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id 657C0AD0B; Tue, 29 Oct 2019 09:28:07 +0000 (UTC) To: Andy Lutomirski From: Jan Beulich Message-ID: <4250bba0-1719-60ae-3d1f-350fb5d2021d@suse.com> Date: Tue, 29 Oct 2019 10:28:08 +0100 User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:60.0) Gecko/20100101 Thunderbird/60.9.0 MIME-Version: 1.0 Content-Language: en-US Subject: [Xen-devel] [PATCH v2] x86/stackframe/32: repair 32-bit Xen PV X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Peter Zijlstra , "xen-devel@lists.xenproject.org" , the arch/x86 maintainers Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" Once again RPL checks have been introduced which don't account for a 32-bit kernel living in ring 1 when running in a PV Xen domain. The case in FIXUP_FRAME has been preventing boot; adjust BUG_IF_WRONG_CR3 as well just in case. Fixes: 3c88c692c287 ("x86/stackframe/32: Provide consistent pt_regs") Signed-off-by: Jan Beulich --- v2: Avoid #ifdef and alter comment along the lines of Andy's suggestion. --- a/arch/x86/entry/entry_32.S +++ b/arch/x86/entry/entry_32.S @@ -48,6 +48,13 @@ #include "calling.h" +/* + * When running on Xen PV, the actual %cs register's RPL in the kernel is 1, + * not 0. If we need to distinguish between a %cs from kernel mode and a %cs + * from user mode, we can do test $2 instead of test $3. + */ +#define USER_SEGMENT_RPL_MASK 2 + .section .entry.text, "ax" /* @@ -172,7 +179,7 @@ ALTERNATIVE "jmp .Lend_\@", "", X86_FEATURE_PTI .if \no_user_check == 0 /* coming from usermode? */ - testl $SEGMENT_RPL_MASK, PT_CS(%esp) + testl $USER_SEGMENT_RPL_MASK, PT_CS(%esp) jz .Lend_\@ .endif /* On user-cr3? */ @@ -217,7 +224,7 @@ testl $X86_EFLAGS_VM, 4*4(%esp) jnz .Lfrom_usermode_no_fixup_\@ #endif - testl $SEGMENT_RPL_MASK, 3*4(%esp) + testl $USER_SEGMENT_RPL_MASK, 3*4(%esp) jnz .Lfrom_usermode_no_fixup_\@ orl $CS_FROM_KERNEL, 3*4(%esp)