From patchwork Tue Oct 29 16:44:26 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 11218165 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id BC61E139A for ; Tue, 29 Oct 2019 16:44:47 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 9A81B217F9 for ; Tue, 29 Oct 2019 16:44:47 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="nGhuDYkf" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2390544AbfJ2Qor (ORCPT ); Tue, 29 Oct 2019 12:44:47 -0400 Received: from mail-lj1-f193.google.com ([209.85.208.193]:34838 "EHLO mail-lj1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2390556AbfJ2Qoq (ORCPT ); Tue, 29 Oct 2019 12:44:46 -0400 Received: by mail-lj1-f193.google.com with SMTP id m7so16040249lji.2 for ; Tue, 29 Oct 2019 09:44:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=bWmI0Xiuvq89sgTizuBFylB3C9/WTB7ILCq148rwhZk=; b=nGhuDYkfvkQnrZTY/TN3SJPYAaq6N0hugnaQQTvYzRjyoPirGxoPyytewdnMuFCFij DaKmL0IiI3Qljq5CIImb9zhUYVW5VW+op923nnammGE5rv2FOHsLNPRmSR5VSjEBxWTZ +oyoY/dWhez06dxKGThbrMguGRiBM7sr5gIaMs4iiiLuPwmPqMDG6CWDzEBWGB0x0Ha1 In+/km5T6X+Vcwoxcv0M++rn5YHmiXagng2jm6Cu5K0cpWPMP5hz4j2QblIRc92btI15 4916IppXqRFSp/7tSoPmztteLkZaZyI8t2KNAKLsXA/ULl2xQ7yG8pW90jbbx1HmvIqH BLRA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=bWmI0Xiuvq89sgTizuBFylB3C9/WTB7ILCq148rwhZk=; b=o0PzIX+fIYesfUwmdKnH4XbnDKJdwMfXOyxQCWwYRt5bYVk9oRdx9G4W87ggsygXal iF6mkSiy2Prpz6bhDJtjCfmCNmUwRlIfEawOWmdu5odCUTz/X94qBOEoNN7aSeGru8S8 iM4HX5IvILversHUYx5uy4YwuDfgiqJQvDdC25WBUV8KYbpKNlHYgLVx53Cex8zCK7eF +Y913/WmDpkV2+wEo1ZJu//7uBUABoYkYZZKqe3E56uvmybCHud8y0mtNnCvphvoBlqX UCHb/xY7XZbbIjWG7a2EvNM7ckDiGFi5vHn/bKijTn3Vl95QT4r7FFQZu+ccB1oT0C+Z rv1A== X-Gm-Message-State: APjAAAVSui83zNlq5yaKNzNscrzed34BwbA2SoP7mRrcVsNrb4239hzO sqgdTwPgZKWWuxQ+FqlpZM4qww== X-Google-Smtp-Source: APXvYqxiw4yXF19S009oKLq+GuUCc8WXW014siinCqLOYELILmRXWbsHObr2NPT+v/kN830ot6hPPw== X-Received: by 2002:a2e:9a9a:: with SMTP id p26mr3283051lji.164.1572367485207; Tue, 29 Oct 2019 09:44:45 -0700 (PDT) Received: from localhost.localdomain (h-158-174-22-210.NA.cust.bahnhof.se. [158.174.22.210]) by smtp.gmail.com with ESMTPSA id f28sm2048161lfh.35.2019.10.29.09.44.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Oct 2019 09:44:44 -0700 (PDT) From: Ulf Hansson To: "Rafael J . Wysocki" , Daniel Lezcano , Sudeep Holla , Lorenzo Pieralisi , Mark Rutland , Lina Iyer , linux-pm@vger.kernel.org Cc: Rob Herring , Vincent Guittot , Stephen Boyd , Andy Gross , Bjorn Andersson , Kevin Hilman , Ulf Hansson , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org Subject: [PATCH v2 01/13] cpuidle: psci: Align psci_power_state count with idle state count Date: Tue, 29 Oct 2019 17:44:26 +0100 Message-Id: <20191029164438.17012-2-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191029164438.17012-1-ulf.hansson@linaro.org> References: <20191029164438.17012-1-ulf.hansson@linaro.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Sudeep Holla Instead of allocating 'n-1' states in psci_power_state to manage 'n' idle states which include "ARM WFI" state, it would be simpler to have 1:1 mapping between psci_power_state and cpuidle driver states. ARM WFI state(i.e. idx == 0) is handled specially in the generic macro CPU_PM_CPU_IDLE_ENTER_PARAM and hence state[-1] is not possible. However for sake of code readability, it is better to have 1:1 mapping and not use [idx - 1] to access psci_power_state corresponding to driver cpuidle state for idx. psci_power_state[0] is default initialised to 0 and is never accessed while entering WFI state. Reported-by: Ulf Hansson Signed-off-by: Sudeep Holla Reviewed-by: Ulf Hansson --- Changes in v2: - Added tags. --- drivers/cpuidle/cpuidle-psci.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/cpuidle/cpuidle-psci.c b/drivers/cpuidle/cpuidle-psci.c index f3c1a2396f98..361985f52ddd 100644 --- a/drivers/cpuidle/cpuidle-psci.c +++ b/drivers/cpuidle/cpuidle-psci.c @@ -30,7 +30,7 @@ static int psci_enter_idle_state(struct cpuidle_device *dev, u32 *state = __this_cpu_read(psci_power_state); return CPU_PM_CPU_IDLE_ENTER_PARAM(psci_cpu_suspend_enter, - idx, state[idx - 1]); + idx, state[idx]); } static struct cpuidle_driver psci_idle_driver __initdata = { @@ -89,12 +89,14 @@ static int __init psci_dt_cpu_init_idle(struct device_node *cpu_node, int cpu) if (!count) return -ENODEV; + count++; /* Add WFI state too */ psci_states = kcalloc(count, sizeof(*psci_states), GFP_KERNEL); if (!psci_states) return -ENOMEM; - for (i = 0; i < count; i++) { - state_node = of_parse_phandle(cpu_node, "cpu-idle-states", i); + for (i = 1; i < count; i++) { + state_node = of_parse_phandle(cpu_node, "cpu-idle-states", + i - 1); ret = psci_dt_parse_state_node(state_node, &psci_states[i]); of_node_put(state_node); From patchwork Tue Oct 29 16:44:27 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 11218171 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A8013139A for ; Tue, 29 Oct 2019 16:44:51 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 7C29121479 for ; Tue, 29 Oct 2019 16:44:51 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="Fkoxqmi5" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2390625AbfJ2Qou (ORCPT ); Tue, 29 Oct 2019 12:44:50 -0400 Received: from mail-lj1-f195.google.com ([209.85.208.195]:41583 "EHLO mail-lj1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2390521AbfJ2Qou (ORCPT ); Tue, 29 Oct 2019 12:44:50 -0400 Received: by mail-lj1-f195.google.com with SMTP id m9so6358447ljh.8 for ; Tue, 29 Oct 2019 09:44:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=vx1yeiYtbxdfUZEGLcn/GapdFgHrvVzZj2LYjH6Qipc=; b=Fkoxqmi5obbN5D8KiED0GDf2VMvl+yGRap5u5DvS5arveZdlAQDAPXHdayL1+WTok+ LGYVQ5ILzMpoernOY5Qd/dwjKhlBMWBdUZc2ODopoU7NPU7oxthRe3fTPkiS4Ft+Lc7m aE4wxkchBGDMleSnkmLrCtgti0b75RN6qyqJOq0+czV+kJi5lyJxPrAmjBF5DWFjVrT1 2azq3w9IMJTYkkt6CIu771rCLj+N2TpEQmLMav3yvsenOsefdWc3jpS/3tf/6xDPR5Le 84RHvn18prIrS2TSR/gWIuDE5MWjam+6gHZMAsfRCEvpfq3NJ6nDTU9pWFbdLBFKmqR1 nP9Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=vx1yeiYtbxdfUZEGLcn/GapdFgHrvVzZj2LYjH6Qipc=; b=miMJIycMZmKW05h+a23NGpmdePqM6QpAlquuMT1Rf3XtAXxBJry6ozINvqLB9QK3NV VslVKG66+JGq5sH/7YoZO3aAryQVpMjOfaF8LluaKfkcGd72GtCBdSP4FocW1KjAPPwx zA1sf3ye1mCd7H66N7QNsEiG49HrPYMbEsLZEPVBqGez/lxyTs9TUahpPc8JJCSfpeCM /JCilsG0cTFkAOIodAqIWjzA/woPkmh24s7829lryWcKX4XmXAzandq5ifgs/4dPtag3 b5c9iYVUGJL+Enc/l8ltm+FXXJL59RnhksyzPFskiIGrtESzu1VUmnz0eakmJnoclTlx Uufw== X-Gm-Message-State: APjAAAWARfG2ytekznXbRXky2KXqRBmVkhcLKY5gSTksrUfdJtRakxPr Gd3gQhKFlJhTZfioATO480zrDQ== X-Google-Smtp-Source: APXvYqzNAJhOXSwzgS3m1Z95FU4/bc2E3nX7fJG9+SlaGXQA0RhR9Fs7yJqz8IEOfLNRvwR9bzPwxw== X-Received: by 2002:a2e:b607:: with SMTP id r7mr3349557ljn.47.1572367487022; Tue, 29 Oct 2019 09:44:47 -0700 (PDT) Received: from localhost.localdomain (h-158-174-22-210.NA.cust.bahnhof.se. [158.174.22.210]) by smtp.gmail.com with ESMTPSA id f28sm2048161lfh.35.2019.10.29.09.44.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Oct 2019 09:44:46 -0700 (PDT) From: Ulf Hansson To: "Rafael J . Wysocki" , Daniel Lezcano , Sudeep Holla , Lorenzo Pieralisi , Mark Rutland , Lina Iyer , linux-pm@vger.kernel.org Cc: Rob Herring , Vincent Guittot , Stephen Boyd , Andy Gross , Bjorn Andersson , Kevin Hilman , Ulf Hansson , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, Lina Iyer Subject: [PATCH v2 02/13] dt: psci: Update DT bindings to support hierarchical PSCI states Date: Tue, 29 Oct 2019 17:44:27 +0100 Message-Id: <20191029164438.17012-3-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191029164438.17012-1-ulf.hansson@linaro.org> References: <20191029164438.17012-1-ulf.hansson@linaro.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Update PSCI DT bindings to allow to represent idle states for CPUs and the CPU topology, by using a hierarchical layout. Primarily this is done by re-using the existing DT bindings for PM domains [1] and for PM domain idle states [2]. Let's also add an example into the document for the PSCI DT bindings, to clearly show the new hierarchical based layout. The currently supported flattened layout, is already described in the ARM idle states bindings [3], so let's leave that as is. [1] Documentation/devicetree/bindings/power/power_domain.txt [2] Documentation/devicetree/bindings/power/domain-idle-state.txt [3] Documentation/devicetree/bindings/arm/idle-states.txt Co-developed-by: Lina Iyer Signed-off-by: Lina Iyer Signed-off-by: Ulf Hansson Reviewed-by: Sudeep Holla --- Changes in v2: - Clarifications and also added updates cpus.yaml, to descrive that CPUs may be attached to PM domains. --- .../devicetree/bindings/arm/cpus.yaml | 15 +++ .../devicetree/bindings/arm/psci.yaml | 102 ++++++++++++++++++ 2 files changed, 117 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml index cb30895e3b67..92a775d6fc0e 100644 --- a/Documentation/devicetree/bindings/arm/cpus.yaml +++ b/Documentation/devicetree/bindings/arm/cpus.yaml @@ -241,6 +241,21 @@ properties: where voltage is in V, frequency is in MHz. + power-domains: + $ref: '/schemas/types.yaml#/definitions/phandle-array' + description: + List of phandles and PM domain specifiers, as defined by bindings of the + PM domain provider (see also ../power_domain.txt). + + power-domain-names: + $ref: '/schemas/types.yaml#/definitions/string-array' + description: + A list of power domain name strings sorted in the same order as the + power-domains property. + + For PSCI based platforms, the name corresponding to the index of the PSCI + PM domain provider, must be "psci". + qcom,saw: $ref: '/schemas/types.yaml#/definitions/phandle' description: | diff --git a/Documentation/devicetree/bindings/arm/psci.yaml b/Documentation/devicetree/bindings/arm/psci.yaml index 7abdf58b335e..9fed255cc92d 100644 --- a/Documentation/devicetree/bindings/arm/psci.yaml +++ b/Documentation/devicetree/bindings/arm/psci.yaml @@ -102,6 +102,34 @@ properties: [1] Kernel documentation - ARM idle states bindings Documentation/devicetree/bindings/arm/idle-states.txt + "#power-domain-cells": + description: + The number of cells in a PM domain specifier as per binding in [3]. + Must be 0 as to represent a single PM domain. + + ARM systems can have multiple cores, sometimes in an hierarchical + arrangement. This often, but not always, maps directly to the processor + power topology of the system. Individual nodes in a topology have their + own specific power states and can be better represented hierarchically. + + For these cases, the definitions of the idle states for the CPUs and the + CPU topology, must conform to the binding in [3]. The idle states + themselves must conform to the binding in [4] and must specify the + arm,psci-suspend-param property. + + It should also be noted that, in PSCI firmware v1.0 the OS-Initiated + (OSI) CPU suspend mode is introduced. Using a hierarchical representation + helps to implement support for OSI mode and OS implementations may choose + to mandate it. + + [3] Documentation/devicetree/bindings/power/power_domain.txt + [4] Documentation/devicetree/bindings/power/domain-idle-state.txt + + power-domains: + $ref: '/schemas/types.yaml#/definitions/phandle-array' + description: + List of phandles and PM domain specifiers, as defined by bindings of the + PM domain provider. required: - compatible @@ -160,4 +188,78 @@ examples: cpu_on = <0x95c10002>; cpu_off = <0x95c10001>; }; + + - |+ + + // Case 4: CPUs and CPU idle states described using the hierarchical model. + + cpus { + + CPU0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0>; + enable-method = "psci"; + power-domains = <&CPU_PD0>; + power-domain-names = "psci"; + }; + + CPU1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a57", "arm,armv8"; + reg = <0x100>; + enable-method = "psci"; + power-domains = <&CPU_PD1>; + power-domain-names = "psci"; + }; + + idle-states { + + CPU_PWRDN: cpu-power-down { + compatible = "arm,idle-state"; + arm,psci-suspend-param = <0x0000001>; + entry-latency-us = <10>; + exit-latency-us = <10>; + min-residency-us = <100>; + }; + + CLUSTER_RET: cluster-retention { + compatible = "domain-idle-state"; + arm,psci-suspend-param = <0x1000011>; + entry-latency-us = <500>; + exit-latency-us = <500>; + min-residency-us = <2000>; + }; + + CLUSTER_PWRDN: cluster-power-down { + compatible = "domain-idle-state"; + arm,psci-suspend-param = <0x1000031>; + entry-latency-us = <2000>; + exit-latency-us = <2000>; + min-residency-us = <6000>; + }; + }; + }; + + psci { + compatible = "arm,psci-1.0"; + method = "smc"; + + CPU_PD0: cpu-pd0 { + #power-domain-cells = <0>; + domain-idle-states = <&CPU_PWRDN>; + power-domains = <&CLUSTER_PD>; + }; + + CPU_PD1: cpu-pd1 { + #power-domain-cells = <0>; + domain-idle-states = <&CPU_PWRDN>; + power-domains = <&CLUSTER_PD>; + }; + + CLUSTER_PD: cluster-pd { + #power-domain-cells = <0>; + domain-idle-states = <&CLUSTER_RET>, <&CLUSTER_PWRDN>; + }; + }; ... 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[158.174.22.210]) by smtp.gmail.com with ESMTPSA id f28sm2048161lfh.35.2019.10.29.09.44.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Oct 2019 09:44:47 -0700 (PDT) From: Ulf Hansson To: "Rafael J . Wysocki" , Daniel Lezcano , Sudeep Holla , Lorenzo Pieralisi , Mark Rutland , Lina Iyer , linux-pm@vger.kernel.org Cc: Rob Herring , Vincent Guittot , Stephen Boyd , Andy Gross , Bjorn Andersson , Kevin Hilman , Ulf Hansson , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org Subject: [PATCH v2 03/13] firmware: psci: Export functions to manage the OSI mode Date: Tue, 29 Oct 2019 17:44:28 +0100 Message-Id: <20191029164438.17012-4-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191029164438.17012-1-ulf.hansson@linaro.org> References: <20191029164438.17012-1-ulf.hansson@linaro.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org To allow subsequent changes to implement support for OSI mode through the cpuidle-psci driver, export the existing psci_has_osi_support(). Export also a new function, psci_set_osi_mode(), that allows its caller to enable the OS-initiated CPU-suspend mode in the PSCI FW. To deal with backwards compatibility for a kernel started through a kexec call, default to set the CPU-suspend mode to the Platform Coordinated mode during boot. Signed-off-by: Ulf Hansson Reviewed-by: Sudeep Holla --- Changes in v2: - Added tags. --- drivers/firmware/psci/psci.c | 18 ++++++++++++++++-- include/linux/psci.h | 2 ++ 2 files changed, 18 insertions(+), 2 deletions(-) diff --git a/drivers/firmware/psci/psci.c b/drivers/firmware/psci/psci.c index 84f4ff351c62..76f3a991d4d7 100644 --- a/drivers/firmware/psci/psci.c +++ b/drivers/firmware/psci/psci.c @@ -89,7 +89,7 @@ static inline bool psci_has_ext_power_state(void) PSCI_1_0_FEATURES_CPU_SUSPEND_PF_MASK; } -static inline bool psci_has_osi_support(void) +bool psci_has_osi_support(void) { return psci_cpu_suspend_feature & PSCI_1_0_OS_INITIATED; } @@ -154,6 +154,15 @@ static u32 psci_get_version(void) return invoke_psci_fn(PSCI_0_2_FN_PSCI_VERSION, 0, 0, 0); } +int psci_set_osi_mode(void) +{ + int err; + + err = invoke_psci_fn(PSCI_1_0_FN_SET_SUSPEND_MODE, + PSCI_1_0_SUSPEND_MODE_OSI, 0, 0); + return psci_to_linux_errno(err); +} + static int psci_cpu_suspend(u32 state, unsigned long entry_point) { int err; @@ -536,9 +545,14 @@ static int __init psci_1_0_init(struct device_node *np) if (err) return err; - if (psci_has_osi_support()) + if (psci_has_osi_support()) { pr_info("OSI mode supported.\n"); + /* Default to PC mode. */ + invoke_psci_fn(PSCI_1_0_FN_SET_SUSPEND_MODE, + PSCI_1_0_SUSPEND_MODE_PC, 0, 0); + } + return 0; } diff --git a/include/linux/psci.h b/include/linux/psci.h index e2bacc6fd2f2..f76b45341adf 100644 --- a/include/linux/psci.h +++ b/include/linux/psci.h @@ -17,6 +17,8 @@ bool psci_tos_resident_on(int cpu); int psci_cpu_suspend_enter(u32 state); bool psci_power_state_is_valid(u32 state); +int psci_set_osi_mode(void); +bool psci_has_osi_support(void); enum psci_conduit { PSCI_CONDUIT_NONE, From patchwork Tue Oct 29 16:44:29 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 11218179 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id CBD95112B for ; Tue, 29 Oct 2019 16:44:53 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id A98C72087F for ; Tue, 29 Oct 2019 16:44:53 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="kBwGCSdc" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2390619AbfJ2Qox (ORCPT ); Tue, 29 Oct 2019 12:44:53 -0400 Received: from mail-lj1-f196.google.com ([209.85.208.196]:45437 "EHLO mail-lj1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2390521AbfJ2Qow (ORCPT ); Tue, 29 Oct 2019 12:44:52 -0400 Received: by mail-lj1-f196.google.com with SMTP id q64so15989265ljb.12 for ; Tue, 29 Oct 2019 09:44:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=gHfhTk/O49Ag6+ZgN50VNvSjMx4ttcjd8NQhNmRdxaI=; b=kBwGCSdcHXtMe3sAoLYr0VqgSQvqQMH7Be08x+ORAc/oHNG4om3G2+2RVU3MwRtSev JgE3Bws5r9oxtaoqgcdO5trbHkW8Wq9DQd6/OsJ86y36wblEkknTE6yi1NljQ/R8pWrh 4gwuaySu0L2rh2+UdpZN9NJw0+W9Gqzzp8KR6nGBzAo1gDbowaKp59MYDdocACXuDQt1 Hjq15y6tPjVCfpN9npjBKhR/1w1FAc2HuSGjSpUuSWyaN20PVbSGbOFEF85Lqc9rxX+g +Yh8+ptPJbGSyiMSYALJ3qf514fbpfyoSjfRgVrjSmbFBII+rr5ZHxujfbiicWoB7ZM6 fsRg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=gHfhTk/O49Ag6+ZgN50VNvSjMx4ttcjd8NQhNmRdxaI=; b=DeqLiM2wbj993LMEAexEes8OALnXd94hUdq3Fp3pd2TDqaNf4qS/tP/epQcwVs1JP5 69Dyzecx54buiIK0x/0nzgmL23gMoF4ltlxZZimjInL2b/ZtClABGoFfhMxP3AkAqBmw xfvqXPUNfyPy076ka8HR5nnLAiDMFpPFVlWfFDUkeS1zN1ThXDjxDqCZuxBRu3833zC9 YV7N8hHNGUk2GvTE7BubQXhXB6TWV+vYWiGiaAdC0F0mgbGmSLX8CSyIh9xv0vi9B5c5 IdGzdlW+K0sSIrG5xyf1Nlof0uLy9PTtCkODa+MPB8nnevudu1AnIL3FZFuV9nAr5mPm li4Q== X-Gm-Message-State: APjAAAWO9NjTLfmW9OzvXtkLzVrovG6GklSJ+7L5SuEhqhDMyowq36jj m5qvQKEPM6nf0u7oQKLw5JbKlw== X-Google-Smtp-Source: APXvYqz3ttjp033w7q9pFbNW+CdyFiZXvfTHTwHhsj8i7aBiEIBj+pAt4q6efIJOsShT2yI5wSVanA== X-Received: by 2002:a2e:350f:: with SMTP id z15mr3476941ljz.185.1572367490178; Tue, 29 Oct 2019 09:44:50 -0700 (PDT) Received: from localhost.localdomain (h-158-174-22-210.NA.cust.bahnhof.se. [158.174.22.210]) by smtp.gmail.com with ESMTPSA id f28sm2048161lfh.35.2019.10.29.09.44.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Oct 2019 09:44:49 -0700 (PDT) From: Ulf Hansson To: "Rafael J . Wysocki" , Daniel Lezcano , Sudeep Holla , Lorenzo Pieralisi , Mark Rutland , Lina Iyer , linux-pm@vger.kernel.org Cc: Rob Herring , Vincent Guittot , Stephen Boyd , Andy Gross , Bjorn Andersson , Kevin Hilman , Ulf Hansson , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, Lina Iyer Subject: [PATCH v2 04/13] of: base: Add of_get_cpu_state_node() to get idle states for a CPU node Date: Tue, 29 Oct 2019 17:44:29 +0100 Message-Id: <20191029164438.17012-5-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191029164438.17012-1-ulf.hansson@linaro.org> References: <20191029164438.17012-1-ulf.hansson@linaro.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The CPU's idle state nodes are currently parsed at the common cpuidle DT library, but also when initializing data for specific CPU idle operations, as in the PSCI cpuidle driver case and qcom-spm cpuidle case. To avoid open-coding, let's introduce of_get_cpu_state_node(), which takes the device node for the CPU and the index to the requested idle state node, as in-parameters. In case a corresponding idle state node is found, it returns the node with the refcount incremented for it, else it returns NULL. Moreover, for PSCI there are two options to describe the CPU's idle states [1], either via a flattened description or a hierarchical layout. Hence, let's take both options into account. [1] Documentation/devicetree/bindings/arm/psci.yaml Suggested-by: Sudeep Holla Co-developed-by: Lina Iyer Signed-off-by: Lina Iyer Reviewed-by: Rob Herring Reviewed-by: Daniel Lezcano Signed-off-by: Ulf Hansson Reviewed-by: Sudeep Holla --- Changes in v2: - Added tags. --- drivers/of/base.c | 36 ++++++++++++++++++++++++++++++++++++ include/linux/of.h | 8 ++++++++ 2 files changed, 44 insertions(+) diff --git a/drivers/of/base.c b/drivers/of/base.c index 1d667eb730e1..0e4cdf0f3864 100644 --- a/drivers/of/base.c +++ b/drivers/of/base.c @@ -477,6 +477,42 @@ int of_cpu_node_to_id(struct device_node *cpu_node) } EXPORT_SYMBOL(of_cpu_node_to_id); +/** + * of_get_cpu_state_node - Get CPU's idle state node at the given index + * + * @cpu_node: The device node for the CPU + * @index: The index in the list of the idle states + * + * Two generic methods can be used to describe a CPU's idle states, either via + * a flattened description through the "cpu-idle-states" binding or via the + * hierarchical layout, using the "power-domains" and the "domain-idle-states" + * bindings. This function check for both and returns the idle state node for + * the requested index. + * + * In case an idle state node is found at @index, the refcount is incremented + * for it, so call of_node_put() on it when done. Returns NULL if not found. + */ +struct device_node *of_get_cpu_state_node(struct device_node *cpu_node, + int index) +{ + struct of_phandle_args args; + int err; + + err = of_parse_phandle_with_args(cpu_node, "power-domains", + "#power-domain-cells", 0, &args); + if (!err) { + struct device_node *state_node = + of_parse_phandle(args.np, "domain-idle-states", index); + + of_node_put(args.np); + if (state_node) + return state_node; + } + + return of_parse_phandle(cpu_node, "cpu-idle-states", index); +} +EXPORT_SYMBOL(of_get_cpu_state_node); + /** * __of_device_is_compatible() - Check if the node matches given constraints * @device: pointer to node diff --git a/include/linux/of.h b/include/linux/of.h index 844f89e1b039..c669c0a4732f 100644 --- a/include/linux/of.h +++ b/include/linux/of.h @@ -351,6 +351,8 @@ extern const void *of_get_property(const struct device_node *node, int *lenp); extern struct device_node *of_get_cpu_node(int cpu, unsigned int *thread); extern struct device_node *of_get_next_cpu_node(struct device_node *prev); +extern struct device_node *of_get_cpu_state_node(struct device_node *cpu_node, + int index); #define for_each_property_of_node(dn, pp) \ for (pp = dn->properties; pp != NULL; pp = pp->next) @@ -765,6 +767,12 @@ static inline struct device_node *of_get_next_cpu_node(struct device_node *prev) return NULL; } +static inline struct device_node *of_get_cpu_state_node(struct device_node *cpu_node, + int index) +{ + return NULL; +} + static inline int of_n_addr_cells(struct device_node *np) { return 0; From patchwork Tue Oct 29 16:44:30 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 11218185 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 6337B1709 for ; Tue, 29 Oct 2019 16:44:55 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 407C720874 for ; Tue, 29 Oct 2019 16:44:55 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="eCGaQk2C" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2390631AbfJ2Qoy (ORCPT ); Tue, 29 Oct 2019 12:44:54 -0400 Received: from mail-lf1-f67.google.com ([209.85.167.67]:34265 "EHLO mail-lf1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2390481AbfJ2Qoy (ORCPT ); Tue, 29 Oct 2019 12:44:54 -0400 Received: by mail-lf1-f67.google.com with SMTP id f5so11065280lfp.1 for ; Tue, 29 Oct 2019 09:44:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=ez2utYAtjrFLSHNrrL2RvE6Z5l8CFOmyZBlsi6wZqI8=; b=eCGaQk2ChyJ/95Dayhp/eCVH9GYp8vqXLGYdKqn+s6sbEXDtYLqRbzL7MikO9jQwyb NSWhHLVWes+HJoe8km3MiXNurD1DIePI4IWhRMUJBpByb2QW+HnOwvhkWFffVUwo1qqE 74g+X6ot4NazRXExIRE9h6nF5bDA3m6jHXT5deC0kDgH83ltRxgW2Mafp/I7qfrbwGec BZci5DBOypZIdRKtHNqIhasuVY2HvSsYaGEQVgReO9iPipAlWPN+I5faeOai7oGtGJa/ 1xlmHTo7sf0GTQml9Crhr1W0TtwNUr4qnjdFhNspGAPBO/3t9kbe6mGFB2FCR9QjWZRe /jVg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=ez2utYAtjrFLSHNrrL2RvE6Z5l8CFOmyZBlsi6wZqI8=; b=Z8nTZDcVanaO0dWMUH2pXZyzycYlNZ2axLra1HxekbQcAIwQgUHKeD2YrXByEa4oCM gf8bz6o1r+iZnV06+JzLxyRixpYsgyjX75phBBRetqNKiVlN9zcizfn4461j6MVyrLMV m3JZbrJzk9g3YFBZlUB4lhq4dmlFhMcdtsWaUFMQhJ2k6V+p3hdaD+FxR7at5QWmu3Uj kIClPTfhd4WCXL9kwOZrrk72b6LH+X4uTIUDzYJ1o7x95ae+1k/6jPL0Gj6SdWd6rJPg NrscYlij0s0pNzrLhXb4naRf6AejGB5CuTmkigV2AU3Utv/B9HplUfrjQIDjIKLqBt6Y mPZg== X-Gm-Message-State: APjAAAVi275xOKcui1C+kBy5XdZTKrJsEFPBL1u3K7nmbujWu+RYrigW eyGNfRwpaGvJS7HBMLz4wT+arg== X-Google-Smtp-Source: APXvYqwG093vCEUK38BuHysHC02MT9Ew/IBlJLhyuhJziPLSFaU9E7tosCpzLO3LqiexNq1Pnlj3zQ== X-Received: by 2002:ac2:43b6:: with SMTP id t22mr3275250lfl.126.1572367491899; Tue, 29 Oct 2019 09:44:51 -0700 (PDT) Received: from localhost.localdomain (h-158-174-22-210.NA.cust.bahnhof.se. [158.174.22.210]) by smtp.gmail.com with ESMTPSA id f28sm2048161lfh.35.2019.10.29.09.44.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Oct 2019 09:44:51 -0700 (PDT) From: Ulf Hansson To: "Rafael J . Wysocki" , Daniel Lezcano , Sudeep Holla , Lorenzo Pieralisi , Mark Rutland , Lina Iyer , linux-pm@vger.kernel.org Cc: Rob Herring , Vincent Guittot , Stephen Boyd , Andy Gross , Bjorn Andersson , Kevin Hilman , Ulf Hansson , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, Lina Iyer Subject: [PATCH v2 05/13] cpuidle: dt: Support hierarchical CPU idle states Date: Tue, 29 Oct 2019 17:44:30 +0100 Message-Id: <20191029164438.17012-6-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191029164438.17012-1-ulf.hansson@linaro.org> References: <20191029164438.17012-1-ulf.hansson@linaro.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Lina Iyer Currently CPU's idle states are represented using the flattened model. Let's add support for the hierarchical layout, via converting to use of_get_cpu_state_node(). Suggested-by: Sudeep Holla Signed-off-by: Lina Iyer Reviewed-by: Daniel Lezcano Co-developed-by: Ulf Hansson Signed-off-by: Ulf Hansson Reviewed-by: Sudeep Holla --- Changes in v2: - Added tags. --- drivers/cpuidle/dt_idle_states.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/cpuidle/dt_idle_states.c b/drivers/cpuidle/dt_idle_states.c index d06d21a9525d..252f2a9686a6 100644 --- a/drivers/cpuidle/dt_idle_states.c +++ b/drivers/cpuidle/dt_idle_states.c @@ -111,8 +111,7 @@ static bool idle_state_valid(struct device_node *state_node, unsigned int idx, for (cpu = cpumask_next(cpumask_first(cpumask), cpumask); cpu < nr_cpu_ids; cpu = cpumask_next(cpu, cpumask)) { cpu_node = of_cpu_device_node_get(cpu); - curr_state_node = of_parse_phandle(cpu_node, "cpu-idle-states", - idx); + curr_state_node = of_get_cpu_state_node(cpu_node, idx); if (state_node != curr_state_node) valid = false; @@ -170,7 +169,7 @@ int dt_init_idle_driver(struct cpuidle_driver *drv, cpu_node = of_cpu_device_node_get(cpumask_first(cpumask)); for (i = 0; ; i++) { - state_node = of_parse_phandle(cpu_node, "cpu-idle-states", i); + state_node = of_get_cpu_state_node(cpu_node, i); if (!state_node) break; From patchwork Tue Oct 29 16:44:31 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 11218187 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id CCD8A112B for ; Tue, 29 Oct 2019 16:44:56 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id A9CC12087F for ; Tue, 29 Oct 2019 16:44:56 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="Wq5NfHQP" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2390638AbfJ2Qo4 (ORCPT ); Tue, 29 Oct 2019 12:44:56 -0400 Received: from mail-lf1-f65.google.com ([209.85.167.65]:39008 "EHLO mail-lf1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2390624AbfJ2Qo4 (ORCPT ); Tue, 29 Oct 2019 12:44:56 -0400 Received: by mail-lf1-f65.google.com with SMTP id 195so11047820lfj.6 for ; Tue, 29 Oct 2019 09:44:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=lVOXUxxNfV4wN8bXUUjCt19F2H674agulhVmSpBAGAE=; b=Wq5NfHQPAlEsbZnoQSMFmjC6IAkDnAhfODokHmgWVS89BHlzxBq+ZIf8QlWoglh0YS 4TeLiSC2uYyogVPZ3eCnP0EuopYnwKNk6DKy0T/tPABYmb6JOUPxItn2XxgeuAuSCWpq OudHPaKwaUZRxh/QMpMbNhOjU2IZ2Q8cIzpFzc7tLvhIoGa1oFjLfmpIIbsmbAPEXOQL HRdAyY1mdURR5DmHxMN5wRmFt9zw1oS9mLzxxVM+T5b7WILz0Sx81Jg9XXWGRdz4YURc Jg67ktqi3/B61awY2CkjMd5/w09MMl3vU1SwFJXpNNHKp7Xt5yFrq3EiH/oH55ELcysM DT2A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=lVOXUxxNfV4wN8bXUUjCt19F2H674agulhVmSpBAGAE=; b=DPhoMMi8wjGq2cZblpYqjyWOKYisGcjvZD6VGBx3JVEohWoHDMldusMcMBFfb7rkf5 AW9vhDVpK6F+ez6S9BONxK9R7JD3gFHM7lr+eL/twderbLS3+foXowA5JJSEJQ+WHK/R SqOZK60BM/B4haCOQ9EFk4QDzK4JWXuLnZm2oLK0EGy9lchJ9PwpL4tzFoAhNzgX2txk TdTpeYMlLnIMqU3yJYq52phqnv1yEHJ1XYJ6Sj6kBEV3n/fcJivzaONheL+RD7ZHsvLU vSzybOEe5zgAsk0UPAPamRBXebI1DKPmUmQsWfIumV0vJ4rZyqva9FDhKxj212917m+E 4FJg== X-Gm-Message-State: APjAAAUwTZHR2tKu5XT2IaJZe0TjpL5HeSNYtbMzkTR2aWV+RZRfV/98 jc/3skfpBL3eku9wP3DWHwPf9Q== X-Google-Smtp-Source: APXvYqxGf8w8I3KVuSqOM7/zKsnP0xinWPh7Ee1N9tyxQPh9MinelvopEFVFU27e5Ky+H/l8+CQgXw== X-Received: by 2002:ac2:5b42:: with SMTP id i2mr3123478lfp.164.1572367493929; Tue, 29 Oct 2019 09:44:53 -0700 (PDT) Received: from localhost.localdomain (h-158-174-22-210.NA.cust.bahnhof.se. [158.174.22.210]) by smtp.gmail.com with ESMTPSA id f28sm2048161lfh.35.2019.10.29.09.44.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Oct 2019 09:44:53 -0700 (PDT) From: Ulf Hansson To: "Rafael J . Wysocki" , Daniel Lezcano , Sudeep Holla , Lorenzo Pieralisi , Mark Rutland , Lina Iyer , linux-pm@vger.kernel.org Cc: Rob Herring , Vincent Guittot , Stephen Boyd , Andy Gross , Bjorn Andersson , Kevin Hilman , Ulf Hansson , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org Subject: [PATCH v2 06/13] cpuidle: psci: Simplify OF parsing of CPU idle state nodes Date: Tue, 29 Oct 2019 17:44:31 +0100 Message-Id: <20191029164438.17012-7-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191029164438.17012-1-ulf.hansson@linaro.org> References: <20191029164438.17012-1-ulf.hansson@linaro.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Iterating through the idle state nodes in DT, to find out the number of states that needs to be allocated is unnecessary, as it has already been done from dt_init_idle_driver(). Therefore, drop the iteration and use the number we already have at hand. Signed-off-by: Ulf Hansson Reviewed-by: Sudeep Holla --- Changes in v2: - Rebased. - Renamed variable and fixed tab-intendent. --- drivers/cpuidle/cpuidle-psci.c | 35 +++++++++++++++++----------------- 1 file changed, 17 insertions(+), 18 deletions(-) diff --git a/drivers/cpuidle/cpuidle-psci.c b/drivers/cpuidle/cpuidle-psci.c index 361985f52ddd..761359be50f2 100644 --- a/drivers/cpuidle/cpuidle-psci.c +++ b/drivers/cpuidle/cpuidle-psci.c @@ -73,30 +73,24 @@ static int __init psci_dt_parse_state_node(struct device_node *np, u32 *state) return 0; } -static int __init psci_dt_cpu_init_idle(struct device_node *cpu_node, int cpu) +static int __init psci_dt_cpu_init_idle(struct device_node *cpu_node, + unsigned int state_count, int cpu) { - int i, ret = 0, count = 0; + int i, ret = 0; u32 *psci_states; struct device_node *state_node; - /* Count idle states */ - while ((state_node = of_parse_phandle(cpu_node, "cpu-idle-states", - count))) { - count++; - of_node_put(state_node); - } - - if (!count) - return -ENODEV; - - count++; /* Add WFI state too */ - psci_states = kcalloc(count, sizeof(*psci_states), GFP_KERNEL); + state_count++; /* Add WFI state too */ + psci_states = kcalloc(state_count, sizeof(*psci_states), GFP_KERNEL); if (!psci_states) return -ENOMEM; - for (i = 1; i < count; i++) { + for (i = 1; i < state_count; i++) { state_node = of_parse_phandle(cpu_node, "cpu-idle-states", i - 1); + if (!state_node) + break; + ret = psci_dt_parse_state_node(state_node, &psci_states[i]); of_node_put(state_node); @@ -106,6 +100,11 @@ static int __init psci_dt_cpu_init_idle(struct device_node *cpu_node, int cpu) pr_debug("psci-power-state %#x index %d\n", psci_states[i], i); } + if (i != state_count) { + ret = -ENODEV; + goto free_mem; + } + /* Idle states parsed correctly, initialize per-cpu pointer */ per_cpu(psci_power_state, cpu) = psci_states; return 0; @@ -115,7 +114,7 @@ static int __init psci_dt_cpu_init_idle(struct device_node *cpu_node, int cpu) return ret; } -static __init int psci_cpu_init_idle(unsigned int cpu) +static __init int psci_cpu_init_idle(unsigned int cpu, unsigned int state_count) { struct device_node *cpu_node; int ret; @@ -131,7 +130,7 @@ static __init int psci_cpu_init_idle(unsigned int cpu) if (!cpu_node) return -ENODEV; - ret = psci_dt_cpu_init_idle(cpu_node, cpu); + ret = psci_dt_cpu_init_idle(cpu_node, state_count, cpu); of_node_put(cpu_node); @@ -187,7 +186,7 @@ static int __init psci_idle_init_cpu(int cpu) /* * Initialize PSCI idle states. */ - ret = psci_cpu_init_idle(cpu); + ret = psci_cpu_init_idle(cpu, ret); if (ret) { pr_err("CPU %d failed to PSCI idle\n", cpu); goto out_kfree_drv; From patchwork Tue Oct 29 16:44:32 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 11218193 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 5DB1E1709 for ; Tue, 29 Oct 2019 16:44:58 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 3B60A208E3 for ; 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[158.174.22.210]) by smtp.gmail.com with ESMTPSA id f28sm2048161lfh.35.2019.10.29.09.44.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Oct 2019 09:44:54 -0700 (PDT) From: Ulf Hansson To: "Rafael J . Wysocki" , Daniel Lezcano , Sudeep Holla , Lorenzo Pieralisi , Mark Rutland , Lina Iyer , linux-pm@vger.kernel.org Cc: Rob Herring , Vincent Guittot , Stephen Boyd , Andy Gross , Bjorn Andersson , Kevin Hilman , Ulf Hansson , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org Subject: [PATCH v2 07/13] cpuidle: psci: Support hierarchical CPU idle states Date: Tue, 29 Oct 2019 17:44:32 +0100 Message-Id: <20191029164438.17012-8-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191029164438.17012-1-ulf.hansson@linaro.org> References: <20191029164438.17012-1-ulf.hansson@linaro.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Currently CPU's idle states are represented using the flattened model. Let's add support for the hierarchical layout, via converting to use of_get_cpu_state_node(). Signed-off-by: Ulf Hansson Reviewed-by: Sudeep Holla --- Changes in v2: - Added tags. --- drivers/cpuidle/cpuidle-psci.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/cpuidle/cpuidle-psci.c b/drivers/cpuidle/cpuidle-psci.c index 761359be50f2..830995b8a56f 100644 --- a/drivers/cpuidle/cpuidle-psci.c +++ b/drivers/cpuidle/cpuidle-psci.c @@ -86,8 +86,7 @@ static int __init psci_dt_cpu_init_idle(struct device_node *cpu_node, return -ENOMEM; for (i = 1; i < state_count; i++) { - state_node = of_parse_phandle(cpu_node, "cpu-idle-states", - i - 1); + state_node = of_get_cpu_state_node(cpu_node, i - 1); if (!state_node) break; From patchwork Tue Oct 29 16:44:33 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 11218197 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id AB92D112B for ; Tue, 29 Oct 2019 16:44:59 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 889052087F for ; Tue, 29 Oct 2019 16:44:59 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="kloNjm7Q" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2390637AbfJ2Qo7 (ORCPT ); Tue, 29 Oct 2019 12:44:59 -0400 Received: from mail-lj1-f196.google.com ([209.85.208.196]:34873 "EHLO mail-lj1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2390515AbfJ2Qo6 (ORCPT ); Tue, 29 Oct 2019 12:44:58 -0400 Received: by mail-lj1-f196.google.com with SMTP id m7so16040920lji.2 for ; Tue, 29 Oct 2019 09:44:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=gp0cxGjsLa/5p2k8fB9GEAU+2hCtpg307yRdN/E/Ges=; b=kloNjm7Qehm+0bNq+PjeVTCYJebZI/Nt6BoOXCGhZ42Lubnovk82si9lvQTNSrPnjm yzvWB1RpsrPT+K1kmcm6o5d4IqmC41y1IyMDP13qMcKxRrQh2YmwJqIaW3OBGnAjTFuV DszyrwgR8jjtwkB3ejpvj2tTiJ2M8eEhgOD179EDaWIRqU83CoUZIlGbm7U8eQ9vDiTA zsrKHMsBtxGZAqsMxXGD65M6PTDqW6izTs0p+m4Hb4Xe/idX0r3dkQ8L+nBIBxMca/SL cEDO7mPDzkN1WnosM9QLAZr6n83sytpWKb58MPsofUsZCNBPGuC7ElmYfAbQppnCVQM3 bhoA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=gp0cxGjsLa/5p2k8fB9GEAU+2hCtpg307yRdN/E/Ges=; b=TOQGtN8Sq+KXQjB0Id2R964DLIe7dlNjW19nW73IbrnpLM9iP2tu3S8Kk5nXtX6sBj 8mIZNUXN+wEYDH27de15BfVa66YJ2iK13MruBWgBrwKXe6hp5jYarPVQ+m1hCDFohB4X 2Thx1nguN0Aol7OFH//6qAzXwJ0aUne75L4BfAfF8oYo07agRu9/Gjko0wS+zMYfkUm7 bc9XUp/qqveGodhLjcqGgoAAKPT1RRFcL9HFlRL/1IenZkr3mkFQyZ1IxMg/biyI6mRF t9bezt63C++B/gDB9hWu7MY3lCmKzDzARg4iFvxdiyJin2DOTPDdCjcijck6qxdFDZ2Q mzAQ== X-Gm-Message-State: APjAAAWGyALCe2weA1Giwt6dH4OwkHHV+Z8afiUER1iscJM6x6043J22 hy0u58ToT6C0LdXyEW9lFzGZ9g== X-Google-Smtp-Source: APXvYqxF9BFsEOTuLQ4K8J/4i3dG6qTKDv5+wlVsmO+sGvo23A7onGcqdB8AKr150o5WRbwcKMmJAg== X-Received: by 2002:a2e:9782:: with SMTP id y2mr3394331lji.46.1572367496902; Tue, 29 Oct 2019 09:44:56 -0700 (PDT) Received: from localhost.localdomain (h-158-174-22-210.NA.cust.bahnhof.se. [158.174.22.210]) by smtp.gmail.com with ESMTPSA id f28sm2048161lfh.35.2019.10.29.09.44.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Oct 2019 09:44:56 -0700 (PDT) From: Ulf Hansson To: "Rafael J . Wysocki" , Daniel Lezcano , Sudeep Holla , Lorenzo Pieralisi , Mark Rutland , Lina Iyer , linux-pm@vger.kernel.org Cc: Rob Herring , Vincent Guittot , Stephen Boyd , Andy Gross , Bjorn Andersson , Kevin Hilman , Ulf Hansson , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org Subject: [PATCH v2 08/13] cpuidle: psci: Add a helper to attach a CPU to its PM domain Date: Tue, 29 Oct 2019 17:44:33 +0100 Message-Id: <20191029164438.17012-9-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191029164438.17012-1-ulf.hansson@linaro.org> References: <20191029164438.17012-1-ulf.hansson@linaro.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Introduce a PSCI DT helper function, psci_dt_attach_cpu(), which takes a CPU number as an in-parameter and tries to attach the CPU's struct device to its corresponding PM domain. Let's makes use of dev_pm_domain_attach_by_name(), as it allows us to specify "psci" as the "name" of the PM domain to attach to. Additionally, let's also prepare the attached device to be power managed via runtime PM. Note that, the implementation of the new helper function is in a new separate c-file, which may seems a bit too much at this point. However, subsequent changes that implements the remaining part of the PM domain support for cpuidle-psci, helps to justify this split. Signed-off-by: Ulf Hansson --- Changes in v2: - Reorder patch to be the first one that starts adding the PM domain support. - Rebased. --- drivers/cpuidle/Makefile | 4 ++- drivers/cpuidle/cpuidle-psci-domain.c | 36 +++++++++++++++++++++++++++ drivers/cpuidle/cpuidle-psci.h | 12 +++++++++ 3 files changed, 51 insertions(+), 1 deletion(-) create mode 100644 drivers/cpuidle/cpuidle-psci-domain.c create mode 100644 drivers/cpuidle/cpuidle-psci.h diff --git a/drivers/cpuidle/Makefile b/drivers/cpuidle/Makefile index ee70d5cc5b99..cc8c769d7fa9 100644 --- a/drivers/cpuidle/Makefile +++ b/drivers/cpuidle/Makefile @@ -21,7 +21,9 @@ obj-$(CONFIG_ARM_U8500_CPUIDLE) += cpuidle-ux500.o obj-$(CONFIG_ARM_AT91_CPUIDLE) += cpuidle-at91.o obj-$(CONFIG_ARM_EXYNOS_CPUIDLE) += cpuidle-exynos.o obj-$(CONFIG_ARM_CPUIDLE) += cpuidle-arm.o -obj-$(CONFIG_ARM_PSCI_CPUIDLE) += cpuidle-psci.o +obj-$(CONFIG_ARM_PSCI_CPUIDLE) += cpuidle_psci.o +cpuidle_psci-y := cpuidle-psci.o +cpuidle_psci-$(CONFIG_PM_GENERIC_DOMAINS_OF) += cpuidle-psci-domain.o ############################################################################### # MIPS drivers diff --git a/drivers/cpuidle/cpuidle-psci-domain.c b/drivers/cpuidle/cpuidle-psci-domain.c new file mode 100644 index 000000000000..bc7df4dc0686 --- /dev/null +++ b/drivers/cpuidle/cpuidle-psci-domain.c @@ -0,0 +1,36 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * PM domains for CPUs via genpd - managed by cpuidle-psci. + * + * Copyright (C) 2019 Linaro Ltd. + * Author: Ulf Hansson + * + */ + +#include +#include +#include +#include +#include +#include + +#include "cpuidle-psci.h" + +struct device *psci_dt_attach_cpu(int cpu) +{ + struct device *dev; + + /* Currently limit the hierarchical topology to be used in OSI mode. */ + if (!psci_has_osi_support()) + return NULL; + + dev = dev_pm_domain_attach_by_name(get_cpu_device(cpu), "psci"); + if (IS_ERR_OR_NULL(dev)) + return dev; + + pm_runtime_irq_safe(dev); + if (cpu_online(cpu)) + pm_runtime_get_sync(dev); + + return dev; +} diff --git a/drivers/cpuidle/cpuidle-psci.h b/drivers/cpuidle/cpuidle-psci.h new file mode 100644 index 000000000000..0cadbb71dc55 --- /dev/null +++ b/drivers/cpuidle/cpuidle-psci.h @@ -0,0 +1,12 @@ +/* SPDX-License-Identifier: GPL-2.0 */ + +#ifndef __CPUIDLE_PSCI_H +#define __CPUIDLE_PSCI_H + +#ifdef CONFIG_PM_GENERIC_DOMAINS_OF +struct device *psci_dt_attach_cpu(int cpu); +#else +static inline struct device *psci_dt_attach_cpu(int cpu) { return NULL; } +#endif + +#endif /* __CPUIDLE_PSCI_H */ From patchwork Tue Oct 29 16:44:34 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 11218203 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E4ED31709 for ; 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[158.174.22.210]) by smtp.gmail.com with ESMTPSA id f28sm2048161lfh.35.2019.10.29.09.44.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Oct 2019 09:44:57 -0700 (PDT) From: Ulf Hansson To: "Rafael J . Wysocki" , Daniel Lezcano , Sudeep Holla , Lorenzo Pieralisi , Mark Rutland , Lina Iyer , linux-pm@vger.kernel.org Cc: Rob Herring , Vincent Guittot , Stephen Boyd , Andy Gross , Bjorn Andersson , Kevin Hilman , Ulf Hansson , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org Subject: [PATCH v2 09/13] cpuidle: psci: Attach CPU devices to their PM domains Date: Tue, 29 Oct 2019 17:44:34 +0100 Message-Id: <20191029164438.17012-10-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191029164438.17012-1-ulf.hansson@linaro.org> References: <20191029164438.17012-1-ulf.hansson@linaro.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org In order to enable a CPU to be power managed through its PM domain, let's try to attach it by calling psci_dt_attach_cpu() during the cpuidle initialization. psci_dt_attach_cpu() returns a pointer to the attached struct device, which later should be used for runtime PM, hence we need to store it somewhere. Rather than adding yet another per CPU variable, let's create a per CPU struct to collect the relevant per CPU variables. Signed-off-by: Ulf Hansson --- Changes in v2: - Rebased. --- drivers/cpuidle/cpuidle-psci.c | 24 ++++++++++++++++++++---- 1 file changed, 20 insertions(+), 4 deletions(-) diff --git a/drivers/cpuidle/cpuidle-psci.c b/drivers/cpuidle/cpuidle-psci.c index 830995b8a56f..167249d0493f 100644 --- a/drivers/cpuidle/cpuidle-psci.c +++ b/drivers/cpuidle/cpuidle-psci.c @@ -20,14 +20,20 @@ #include +#include "cpuidle-psci.h" #include "dt_idle_states.h" -static DEFINE_PER_CPU_READ_MOSTLY(u32 *, psci_power_state); +struct psci_cpuidle_data { + u32 *psci_states; + struct device *dev; +}; + +static DEFINE_PER_CPU_READ_MOSTLY(struct psci_cpuidle_data, psci_cpuidle_data); static int psci_enter_idle_state(struct cpuidle_device *dev, struct cpuidle_driver *drv, int idx) { - u32 *state = __this_cpu_read(psci_power_state); + u32 *state = __this_cpu_read(psci_cpuidle_data.psci_states); return CPU_PM_CPU_IDLE_ENTER_PARAM(psci_cpu_suspend_enter, idx, state[idx]); @@ -78,7 +84,9 @@ static int __init psci_dt_cpu_init_idle(struct device_node *cpu_node, { int i, ret = 0; u32 *psci_states; + struct device *dev; struct device_node *state_node; + struct psci_cpuidle_data *data = per_cpu_ptr(&psci_cpuidle_data, cpu); state_count++; /* Add WFI state too */ psci_states = kcalloc(state_count, sizeof(*psci_states), GFP_KERNEL); @@ -104,8 +112,16 @@ static int __init psci_dt_cpu_init_idle(struct device_node *cpu_node, goto free_mem; } - /* Idle states parsed correctly, initialize per-cpu pointer */ - per_cpu(psci_power_state, cpu) = psci_states; + dev = psci_dt_attach_cpu(cpu); + if (IS_ERR(dev)) { + ret = PTR_ERR(dev); + goto free_mem; + } + + data->dev = dev; + + /* Idle states parsed correctly, store them in the per-cpu struct. */ + data->psci_states = psci_states; return 0; free_mem: From patchwork Tue Oct 29 16:44:35 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 11218205 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7311913BD for ; Tue, 29 Oct 2019 16:45:03 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 500D52087F for ; Tue, 29 Oct 2019 16:45:03 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="aqzEO0G1" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2390648AbfJ2QpC (ORCPT ); Tue, 29 Oct 2019 12:45:02 -0400 Received: from mail-lj1-f193.google.com ([209.85.208.193]:41610 "EHLO mail-lj1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2390553AbfJ2QpC (ORCPT ); Tue, 29 Oct 2019 12:45:02 -0400 Received: by mail-lj1-f193.google.com with SMTP id m9so6359212ljh.8 for ; Tue, 29 Oct 2019 09:45:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=rmTg5S9BzhED65UVWftQq6ljq1LQZhA0EBbzU9hhqeQ=; b=aqzEO0G1RyLhLQmCiDT2JleGD1IdETwghK3gyCVpU3BoJ9IuHC/mJJtZqyEw7OS5bY 8Pt4WTtjZ+5IeX1WyaqK0oxx9v79xIuTQqk2y4zsdW41U0BO6JplWCJNK0dtZpODoM0L 0lKghAQnovyr1JsLBsc29QAhAX43dJTSGZc4b1wvan915ofokrkC+6XjliyFzkzr/lyG NG0DkvysJMRGehwK4eH/+gmFLoocqpJy2k/jfeIAAVJjfDpLGzFhNnCrBqv5ZeazYjAn JlUcvaviVU0GvIb7r3OWkBXXWrrW+mGtVJequx0KFAO2HlykGcmi2A0fAv9aJQmGLA+b GqIA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=rmTg5S9BzhED65UVWftQq6ljq1LQZhA0EBbzU9hhqeQ=; b=QuGsM2cQ4cBP+02CshnjrnONKixLK86lQDMb4JyBcbJXpYJYEv4iTfGPjSiTvJHnsU fei34iyp4jdFVqNSocayaIs0FQctGhrnj9Fm2jPGxO7Kt48vF3v0ZF3GwVzWpSNjxI9L zQXgfR7otYfRcAX+8FOvKDWa91LWTr8fFTjhVxgaoxTVuB/Ij5WDluKThuai51GGWeBo 9E4h5gCMf4/Ox63Lc4DZ9W/Z3Mk04dlc31FBj7Hf7HLJpyis8sRqlbmutmqKKHABxEQM 6iKw4ZNK/Ox6nLR4RKBk0fOfyR5Mu66RhKefyGjnz7b21h+Zk9R+7CXKtDMZ+Yr4y5fY dk/g== X-Gm-Message-State: APjAAAUolA7jGlxenA/lj9uSNNUWWvz2ymo4smoiiDRBIWe2a2r2UZ/N ouwwNQnzAVdQ4mdCPoF+/UvGdA== X-Google-Smtp-Source: APXvYqzEL/7R3mVVyBqWfGuEW21GUqv79UeOF7RbekoESh7r+dEmrlO8kUYeAvjCF8KRrW5zWEFfXw== X-Received: by 2002:a2e:8113:: with SMTP id d19mr3480037ljg.229.1572367500173; Tue, 29 Oct 2019 09:45:00 -0700 (PDT) Received: from localhost.localdomain (h-158-174-22-210.NA.cust.bahnhof.se. [158.174.22.210]) by smtp.gmail.com with ESMTPSA id f28sm2048161lfh.35.2019.10.29.09.44.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Oct 2019 09:44:59 -0700 (PDT) From: Ulf Hansson To: "Rafael J . Wysocki" , Daniel Lezcano , Sudeep Holla , Lorenzo Pieralisi , Mark Rutland , Lina Iyer , linux-pm@vger.kernel.org Cc: Rob Herring , Vincent Guittot , Stephen Boyd , Andy Gross , Bjorn Andersson , Kevin Hilman , Ulf Hansson , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, Lina Iyer Subject: [PATCH v2 10/13] cpuidle: psci: Prepare to use OS initiated suspend mode via PM domains Date: Tue, 29 Oct 2019 17:44:35 +0100 Message-Id: <20191029164438.17012-11-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191029164438.17012-1-ulf.hansson@linaro.org> References: <20191029164438.17012-1-ulf.hansson@linaro.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The per CPU variable psci_power_state, contains an array of fixed values, which reflects the corresponding arm,psci-suspend-param parsed from DT, for each of the available CPU idle states. This isn't sufficient when using the hierarchical CPU topology in DT, in combination with having PSCI OS initiated (OSI) mode enabled. More precisely, in OSI mode, Linux is responsible of telling the PSCI FW what idle state the cluster (a group of CPUs) should enter, while in PSCI Platform Coordinated (PC) mode, each CPU independently votes for an idle state of the cluster. For this reason, introduce a per CPU variable called domain_state and implement two helper functions to read/write its value. Then let the domain_state take precedence over the regular selected state, when entering and idle state. Finally, let's also avoid sprinkling the existing non-OSI path with operations being specific for OSI. Co-developed-by: Lina Iyer Signed-off-by: Lina Iyer Signed-off-by: Ulf Hansson --- Changes in v2: - Rebased. --- drivers/cpuidle/cpuidle-psci.c | 47 +++++++++++++++++++++++++++++++--- 1 file changed, 44 insertions(+), 3 deletions(-) diff --git a/drivers/cpuidle/cpuidle-psci.c b/drivers/cpuidle/cpuidle-psci.c index 167249d0493f..4b0183d010e0 100644 --- a/drivers/cpuidle/cpuidle-psci.c +++ b/drivers/cpuidle/cpuidle-psci.c @@ -29,14 +29,55 @@ struct psci_cpuidle_data { }; static DEFINE_PER_CPU_READ_MOSTLY(struct psci_cpuidle_data, psci_cpuidle_data); +static DEFINE_PER_CPU(u32, domain_state); + +static inline void psci_set_domain_state(u32 state) +{ + __this_cpu_write(domain_state, state); +} + +static inline u32 psci_get_domain_state(void) +{ + return __this_cpu_read(domain_state); +} + +static inline int _psci_enter_state(int idx, u32 state) +{ + return CPU_PM_CPU_IDLE_ENTER_PARAM(psci_cpu_suspend_enter, idx, state); +} + +static int psci_enter_domain_state(int idx, struct psci_cpuidle_data *data) +{ + int ret; + u32 *states = data->psci_states; + u32 state = psci_get_domain_state(); + + if (!state) + state = states[idx]; + + ret = _psci_enter_state(idx, state); + + /* Clear the domain state to start fresh when back from idle. */ + psci_set_domain_state(0); + return ret; +} + +static int psci_enter_state(int idx, struct psci_cpuidle_data *data) +{ + u32 *states = data->psci_states; + + return _psci_enter_state(idx, states[idx]); +} static int psci_enter_idle_state(struct cpuidle_device *dev, struct cpuidle_driver *drv, int idx) { - u32 *state = __this_cpu_read(psci_cpuidle_data.psci_states); + struct psci_cpuidle_data *data = this_cpu_ptr(&psci_cpuidle_data); + + if (!data->dev) + return psci_enter_state(idx, data); - return CPU_PM_CPU_IDLE_ENTER_PARAM(psci_cpu_suspend_enter, - idx, state[idx]); + return psci_enter_domain_state(idx, data); } static struct cpuidle_driver psci_idle_driver __initdata = { From patchwork Tue Oct 29 16:44:36 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 11218211 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 9EB601709 for ; Tue, 29 Oct 2019 16:45:04 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 79B7621479 for ; Tue, 29 Oct 2019 16:45:04 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="wrOFgiwt" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2390643AbfJ2QpE (ORCPT ); Tue, 29 Oct 2019 12:45:04 -0400 Received: from mail-lj1-f195.google.com ([209.85.208.195]:41617 "EHLO mail-lj1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2390644AbfJ2QpD (ORCPT ); Tue, 29 Oct 2019 12:45:03 -0400 Received: by mail-lj1-f195.google.com with SMTP id m9so6359308ljh.8 for ; Tue, 29 Oct 2019 09:45:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=oPeghc6WqG1iFH3/ouy3iONyWp9Iyx8uFEd3HgEFhLk=; b=wrOFgiwtszMolhgnzxseLGcu4GGivTDev2DuMZF5S+K3pvdZw3gzV80jSc+iKNalzg 3jq/ygxLZUPCte2H+90aboCJeYosvTFeewSQrUp7gqdUcTpxl2olrUzW55dSFxqS2X4n pK6cwxmnWPlTEEUyOPd/NTtCaGlcbrQ1XyAZcYAnRFmd1nJTnWC+Ak01jyggNQ7zs2c1 NUiNV7ukM36egEaPE8tXtJ5wQQVAmC7mbh2vRWBvR9tX36/S5DjLvCefJHgRLIOLINKH U+hqAkGNAqm8UWIDOOoA5iB7zVQgM5M46iPMTWTjK3fHlbDHnMfQ19bhe297cLV4GuUj 9OeA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=oPeghc6WqG1iFH3/ouy3iONyWp9Iyx8uFEd3HgEFhLk=; b=W0IUntIXSDqqso2x2M3RT0U/ODX0xyFITvDA8OEO2Z/rPCJUod2PYaQtc4vB/Bjcvy Er1AbZQ/AyW9ciGnwCIGwEj9r8jrgzFTIRxLR8BXtdP88R92oXDoOE+4NsBIWiMfsDAW DBr9XknnPJ/CIE44RwlL5+w1eDlds/WsTckDW+rgBdB77u/rQEV8w9drMjcPCXF6pEMD ZIpBHAP5ZVd9Rc9r6C3ARgza+/zq0AIg6E0sFv0Fh7G4zpAHOSYO5hGJHpnjUo6nl5dL 1bY0Am5NJvn3DVsM6JcVLlmjjoRSgYWKfPI/D/bfvrtxLM8hqBQ3JmHY/DJ48xcVg60Q WiCQ== X-Gm-Message-State: APjAAAUZhfHorhUtKqaV8rs2m5/9p4PY3WguMaT75TpQNWVNL/gWSG1C xCK1dUUFdEEs3J6Lr5fke3O5Vw== X-Google-Smtp-Source: APXvYqyIFKxFkqbyPaXM93D7aym8tj0pRQr9/BS4/DANzI/lG6G74uINtsQQx6lGNYgWxgUkzs6yiA== X-Received: by 2002:a05:651c:293:: with SMTP id b19mr3286729ljo.176.1572367501795; Tue, 29 Oct 2019 09:45:01 -0700 (PDT) Received: from localhost.localdomain (h-158-174-22-210.NA.cust.bahnhof.se. [158.174.22.210]) by smtp.gmail.com with ESMTPSA id f28sm2048161lfh.35.2019.10.29.09.45.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Oct 2019 09:45:01 -0700 (PDT) From: Ulf Hansson To: "Rafael J . Wysocki" , Daniel Lezcano , Sudeep Holla , Lorenzo Pieralisi , Mark Rutland , Lina Iyer , linux-pm@vger.kernel.org Cc: Rob Herring , Vincent Guittot , Stephen Boyd , Andy Gross , Bjorn Andersson , Kevin Hilman , Ulf Hansson , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org Subject: [PATCH v2 11/13] cpuidle: psci: Manage runtime PM in the idle path Date: Tue, 29 Oct 2019 17:44:36 +0100 Message-Id: <20191029164438.17012-12-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191029164438.17012-1-ulf.hansson@linaro.org> References: <20191029164438.17012-1-ulf.hansson@linaro.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org In case we have succeeded to attach a CPU to its PM domain, let's deploy runtime PM support for the corresponding attached device, to allow the CPU to be powered-managed accordingly. To set the triggering point for when runtime PM reference counting should be done, let's store the index of deepest idle state for the CPU in the per CPU struct. Then use this index to compare the selected idle state index when entering idle, as to understand whether runtime PM reference counting is needed or not. Note that, from the hierarchical point view, there may be good reasons to do runtime PM reference counting even on shallower idle states, but at this point this isn't supported, mainly due to limitations set by the generic PM domain. Signed-off-by: Ulf Hansson --- Changes in v2: - Rebased. --- drivers/cpuidle/cpuidle-psci.c | 18 +++++++++++++++++- 1 file changed, 17 insertions(+), 1 deletion(-) diff --git a/drivers/cpuidle/cpuidle-psci.c b/drivers/cpuidle/cpuidle-psci.c index 4b0183d010e0..937a8e450251 100644 --- a/drivers/cpuidle/cpuidle-psci.c +++ b/drivers/cpuidle/cpuidle-psci.c @@ -16,6 +16,7 @@ #include #include #include +#include #include #include @@ -25,6 +26,7 @@ struct psci_cpuidle_data { u32 *psci_states; + u32 rpm_state_id; struct device *dev; }; @@ -50,13 +52,26 @@ static int psci_enter_domain_state(int idx, struct psci_cpuidle_data *data) { int ret; u32 *states = data->psci_states; - u32 state = psci_get_domain_state(); + struct device *pd_dev = data->dev; + bool runtime_pm = (pd_dev && data->rpm_state_id == idx); + u32 state; + /* + * Do runtime PM if we are using the hierarchical CPU toplogy, but only + * when cpuidle have selected the deepest idle state for the CPU. + */ + if (runtime_pm) + pm_runtime_put_sync_suspend(pd_dev); + + state = psci_get_domain_state(); if (!state) state = states[idx]; ret = _psci_enter_state(idx, state); + if (runtime_pm) + pm_runtime_get_sync(pd_dev); + /* Clear the domain state to start fresh when back from idle. */ psci_set_domain_state(0); return ret; @@ -160,6 +175,7 @@ static int __init psci_dt_cpu_init_idle(struct device_node *cpu_node, } data->dev = dev; + data->rpm_state_id = state_count - 1; /* Idle states parsed correctly, store them in the per-cpu struct. */ data->psci_states = psci_states; From patchwork Tue Oct 29 16:44:37 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 11218217 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 577841709 for ; Tue, 29 Oct 2019 16:45:08 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 2BAC121721 for ; Tue, 29 Oct 2019 16:45:08 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="HznpTk/v" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2390651AbfJ2QpH (ORCPT ); Tue, 29 Oct 2019 12:45:07 -0400 Received: from mail-lf1-f65.google.com ([209.85.167.65]:41303 "EHLO mail-lf1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2390650AbfJ2QpH (ORCPT ); Tue, 29 Oct 2019 12:45:07 -0400 Received: by mail-lf1-f65.google.com with SMTP id j14so6106416lfb.8 for ; Tue, 29 Oct 2019 09:45:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=hmVZbRVz8KfqipbRYtbANumh10v6tAjJaji0EHXGY84=; b=HznpTk/vG4FRQpLwZBdp/3nPLWkeiSbtHevt+RbiHJ5IOYxUfN+Z8nNbK9gMnvRPU0 35CzPAGhKlGamDfkOqyRRbr7rlky0uRnmlMAuR95JNTijILHaNzSnYnexmKW6cptc1Kr wAKfRwiaW8gJMpTkTwT+NeHIvcYPlrHNVZsXfVFlWR0ec0sGBIsUOHsupiuAdkM0pIas ReXYt9b6iHLTls5zne2GGj1cIt6dg/NIczv/P3RsYHBEE6+uLxe5naBl1X+2poWkNlXg KMd8PgKhbhwhNErij43G77eGUC2/1s6qilihm2rB/6tUqAzhlJ5sWMcFzKR15FGYe9J3 7TJw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=hmVZbRVz8KfqipbRYtbANumh10v6tAjJaji0EHXGY84=; b=NQwOuACJCwmJJuFxH0OktpRcgB4LGyv/lj4fc+rjyfl5g9PFjJF6gTco03E1Mubsif tuQJkkItXH7+6btxRhxFNaou+xdUp4UD6gs+usgMhGwPtyQQ2WlqU8+BhA3Jg6igDGmG eD/r6zOj+ppxbefhxpcED/RjGJOHIdT7Vuptwk4ZvsA95y22cijC+ukSfximO/u3JxW+ zoZOYLLi1y46g9gx3p7Q8xHpmCV5gsnGDE9QhcwWL4XRHOSkZYBaYf7Ciw6SFOi9Iftv VUfAWMlgqVBjfM9xxIRXYfPT7IQ6QirIEJb6weApqK5ftnUmBHWs0JgEYJbbEMPkwr0u L3Cg== X-Gm-Message-State: APjAAAWyypgsX1f9nRsEsCpF/I9+AlhD38wUEbj33xwN5pILpem1rKi8 EI/+/CIym9sah9yia9jvkbe4LA== X-Google-Smtp-Source: APXvYqxiq7MpKPb7BGxD4n3eN3TOCJ6hMOte+ZPBVA5EBKKD9zAUMosVJ9hM4ASOZT6kfy8CICykhw== X-Received: by 2002:a19:a8b:: with SMTP id 133mr3162903lfk.136.1572367503191; Tue, 29 Oct 2019 09:45:03 -0700 (PDT) Received: from localhost.localdomain (h-158-174-22-210.NA.cust.bahnhof.se. [158.174.22.210]) by smtp.gmail.com with ESMTPSA id f28sm2048161lfh.35.2019.10.29.09.45.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Oct 2019 09:45:02 -0700 (PDT) From: Ulf Hansson To: "Rafael J . Wysocki" , Daniel Lezcano , Sudeep Holla , Lorenzo Pieralisi , Mark Rutland , Lina Iyer , linux-pm@vger.kernel.org Cc: Rob Herring , Vincent Guittot , Stephen Boyd , Andy Gross , Bjorn Andersson , Kevin Hilman , Ulf Hansson , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, Lina Iyer Subject: [PATCH v2 12/13] cpuidle: psci: Add support for PM domains by using genpd Date: Tue, 29 Oct 2019 17:44:37 +0100 Message-Id: <20191029164438.17012-13-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191029164438.17012-1-ulf.hansson@linaro.org> References: <20191029164438.17012-1-ulf.hansson@linaro.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org When the hierarchical CPU topology layout is used in DT and the PSCI OSI mode is supported by the PSCI FW, let's initialize a corresponding PM domain topology by using genpd. This enables a CPU and a group of CPUs, when attached to the topology, to be power-managed accordingly. To trigger the attempt to initialize the genpd data structures let's use a subsys_initcall, which should be early enough to allow CPUs, but also other devices to be attached. The initialization consists of parsing the PSCI OF node for the topology and the "domain idle states" DT bindings. In case the idle states are compatible with "domain-idle-state", the initialized genpd becomes responsible of selecting an idle state for the PM domain, via assigning it a genpd governor. Note that, a successful initialization of the genpd data structures, is followed by a call to psci_set_osi_mode(), as to try to enable the OSI mode in the PSCI FW. In case this fails, we fall back into a degraded mode rather than bailing out and returning an error code. Co-developed-by: Lina Iyer Signed-off-by: Lina Iyer Signed-off-by: Ulf Hansson --- Changes in v2: - Rebased. --- drivers/cpuidle/cpuidle-psci-domain.c | 266 ++++++++++++++++++++++++++ drivers/cpuidle/cpuidle-psci.c | 4 +- drivers/cpuidle/cpuidle-psci.h | 5 + 3 files changed, 273 insertions(+), 2 deletions(-) diff --git a/drivers/cpuidle/cpuidle-psci-domain.c b/drivers/cpuidle/cpuidle-psci-domain.c index bc7df4dc0686..7429fd7626a1 100644 --- a/drivers/cpuidle/cpuidle-psci-domain.c +++ b/drivers/cpuidle/cpuidle-psci-domain.c @@ -7,15 +7,281 @@ * */ +#define pr_fmt(fmt) "CPUidle PSCI: " fmt + #include #include #include #include #include #include +#include +#include #include "cpuidle-psci.h" +struct psci_pd_provider { + struct list_head link; + struct device_node *node; +}; + +static LIST_HEAD(psci_pd_providers); +static bool osi_mode_enabled; + +static int psci_pd_power_off(struct generic_pm_domain *pd) +{ + struct genpd_power_state *state = &pd->states[pd->state_idx]; + u32 *pd_state; + + /* If we have failed to enable OSI mode, then abort power off. */ + if (!osi_mode_enabled) + return -EBUSY; + + if (!state->data) + return 0; + + /* OSI mode is enabled, set the corresponding domain state. */ + pd_state = state->data; + psci_set_domain_state(*pd_state); + + return 0; +} + +static int __init psci_pd_parse_state_nodes(struct genpd_power_state *states, + int state_count) +{ + int i, ret; + u32 psci_state, *psci_state_buf; + + for (i = 0; i < state_count; i++) { + ret = psci_dt_parse_state_node(to_of_node(states[i].fwnode), + &psci_state); + if (ret) + goto free_state; + + psci_state_buf = kmalloc(sizeof(u32), GFP_KERNEL); + if (!psci_state_buf) { + ret = -ENOMEM; + goto free_state; + } + *psci_state_buf = psci_state; + states[i].data = psci_state_buf; + } + + return 0; + +free_state: + i--; + for (; i >= 0; i--) + kfree(states[i].data); + return ret; +} + +static int __init psci_pd_parse_states(struct device_node *np, + struct genpd_power_state **states, int *state_count) +{ + int ret; + + /* Parse the domain idle states. */ + ret = of_genpd_parse_idle_states(np, states, state_count); + if (ret) + return ret; + + /* Fill out the PSCI specifics for each found state. */ + ret = psci_pd_parse_state_nodes(*states, *state_count); + if (ret) + kfree(*states); + + return ret; +} + +static void psci_pd_free_states(struct genpd_power_state *states, + unsigned int state_count) +{ + int i; + + for (i = 0; i < state_count; i++) + kfree(states[i].data); + kfree(states); +} + +static int __init psci_pd_init(struct device_node *np) +{ + struct generic_pm_domain *pd; + struct psci_pd_provider *pd_provider; + struct dev_power_governor *pd_gov; + struct genpd_power_state *states = NULL; + int ret = -ENOMEM, state_count = 0; + + pd = kzalloc(sizeof(*pd), GFP_KERNEL); + if (!pd) + goto out; + + pd_provider = kzalloc(sizeof(*pd_provider), GFP_KERNEL); + if (!pd_provider) + goto free_pd; + + pd->name = kasprintf(GFP_KERNEL, "%pOF", np); + if (!pd->name) + goto free_pd_prov; + + /* + * Parse the domain idle states and let genpd manage the state selection + * for those being compatible with "domain-idle-state". + */ + ret = psci_pd_parse_states(np, &states, &state_count); + if (ret) + goto free_name; + + pd->free_states = psci_pd_free_states; + pd->name = kbasename(pd->name); + pd->power_off = psci_pd_power_off; + pd->states = states; + pd->state_count = state_count; + pd->flags |= GENPD_FLAG_IRQ_SAFE | GENPD_FLAG_CPU_DOMAIN; + + /* Use governor for CPU PM domains if it has some states to manage. */ + pd_gov = state_count > 0 ? &pm_domain_cpu_gov : NULL; + + ret = pm_genpd_init(pd, pd_gov, false); + if (ret) { + psci_pd_free_states(states, state_count); + goto free_name; + } + + ret = of_genpd_add_provider_simple(np, pd); + if (ret) + goto remove_pd; + + pd_provider->node = of_node_get(np); + list_add(&pd_provider->link, &psci_pd_providers); + + pr_debug("init PM domain %s\n", pd->name); + return 0; + +remove_pd: + pm_genpd_remove(pd); +free_name: + kfree(pd->name); +free_pd_prov: + kfree(pd_provider); +free_pd: + kfree(pd); +out: + pr_err("failed to init PM domain ret=%d %pOF\n", ret, np); + return ret; +} + +static void __init psci_pd_remove(void) +{ + struct psci_pd_provider *pd_provider, *it; + struct generic_pm_domain *genpd; + + list_for_each_entry_safe(pd_provider, it, &psci_pd_providers, link) { + of_genpd_del_provider(pd_provider->node); + + genpd = of_genpd_remove_last(pd_provider->node); + if (!IS_ERR(genpd)) + kfree(genpd); + + of_node_put(pd_provider->node); + list_del(&pd_provider->link); + kfree(pd_provider); + } +} + +static int __init psci_pd_init_topology(struct device_node *np) +{ + struct device_node *node; + struct of_phandle_args child, parent; + int ret; + + for_each_child_of_node(np, node) { + if (of_parse_phandle_with_args(node, "power-domains", + "#power-domain-cells", 0, &parent)) + continue; + + child.np = node; + child.args_count = 0; + + ret = of_genpd_add_subdomain(&parent, &child); + of_node_put(parent.np); + if (ret) { + of_node_put(node); + return ret; + } + } + + return 0; +} + +static const struct of_device_id psci_of_match[] __initconst = { + { .compatible = "arm,psci" }, + { .compatible = "arm,psci-0.2" }, + { .compatible = "arm,psci-1.0" }, + {} +}; + +static int __init psci_idle_init_domains(void) +{ + struct device_node *np = of_find_matching_node(NULL, psci_of_match); + struct device_node *node; + int ret = 0, pd_count = 0; + + if (!np) + return -ENODEV; + + /* Currently limit the hierarchical topology to be used in OSI mode. */ + if (!psci_has_osi_support()) + goto out; + + /* + * Parse child nodes for the "#power-domain-cells" property and + * initialize a genpd/genpd-of-provider pair when it's found. + */ + for_each_child_of_node(np, node) { + if (!of_find_property(node, "#power-domain-cells", NULL)) + continue; + + ret = psci_pd_init(node); + if (ret) + goto put_node; + + pd_count++; + } + + /* Bail out if not using the hierarchical CPU topology. */ + if (!pd_count) + goto out; + + /* Link genpd masters/subdomains to model the CPU topology. */ + ret = psci_pd_init_topology(np); + if (ret) + goto remove_pd; + + /* Try to enable OSI mode. */ + ret = psci_set_osi_mode(); + if (ret) + pr_warn("failed to enable OSI mode: %d\n", ret); + else + osi_mode_enabled = true; + + of_node_put(np); + pr_info("Initialized CPU PM domain topology\n"); + return pd_count; + +put_node: + of_node_put(node); +remove_pd: + if (pd_count) + psci_pd_remove(); + pr_err("failed to create CPU PM domains ret=%d\n", ret); +out: + of_node_put(np); + return ret; +} +subsys_initcall(psci_idle_init_domains); + struct device *psci_dt_attach_cpu(int cpu) { struct device *dev; diff --git a/drivers/cpuidle/cpuidle-psci.c b/drivers/cpuidle/cpuidle-psci.c index 937a8e450251..3e747a3b6264 100644 --- a/drivers/cpuidle/cpuidle-psci.c +++ b/drivers/cpuidle/cpuidle-psci.c @@ -33,7 +33,7 @@ struct psci_cpuidle_data { static DEFINE_PER_CPU_READ_MOSTLY(struct psci_cpuidle_data, psci_cpuidle_data); static DEFINE_PER_CPU(u32, domain_state); -static inline void psci_set_domain_state(u32 state) +void psci_set_domain_state(u32 state) { __this_cpu_write(domain_state, state); } @@ -118,7 +118,7 @@ static const struct of_device_id psci_idle_state_match[] __initconst = { { }, }; -static int __init psci_dt_parse_state_node(struct device_node *np, u32 *state) +int __init psci_dt_parse_state_node(struct device_node *np, u32 *state) { int err = of_property_read_u32(np, "arm,psci-suspend-param", state); diff --git a/drivers/cpuidle/cpuidle-psci.h b/drivers/cpuidle/cpuidle-psci.h index 0cadbb71dc55..d2e55cad9ac6 100644 --- a/drivers/cpuidle/cpuidle-psci.h +++ b/drivers/cpuidle/cpuidle-psci.h @@ -3,6 +3,11 @@ #ifndef __CPUIDLE_PSCI_H #define __CPUIDLE_PSCI_H +struct device_node; + +void psci_set_domain_state(u32 state); +int __init psci_dt_parse_state_node(struct device_node *np, u32 *state); + #ifdef CONFIG_PM_GENERIC_DOMAINS_OF struct device *psci_dt_attach_cpu(int cpu); #else From patchwork Tue Oct 29 16:44:38 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 11218215 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 1ACB9112B for ; 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[158.174.22.210]) by smtp.gmail.com with ESMTPSA id f28sm2048161lfh.35.2019.10.29.09.45.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Oct 2019 09:45:03 -0700 (PDT) From: Ulf Hansson To: "Rafael J . Wysocki" , Daniel Lezcano , Sudeep Holla , Lorenzo Pieralisi , Mark Rutland , Lina Iyer , linux-pm@vger.kernel.org Cc: Rob Herring , Vincent Guittot , Stephen Boyd , Andy Gross , Bjorn Andersson , Kevin Hilman , Ulf Hansson , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, Lina Iyer Subject: [PATCH v2 13/13] arm64: dts: Convert to the hierarchical CPU topology layout for MSM8916 Date: Tue, 29 Oct 2019 17:44:38 +0100 Message-Id: <20191029164438.17012-14-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191029164438.17012-1-ulf.hansson@linaro.org> References: <20191029164438.17012-1-ulf.hansson@linaro.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org To enable the OS to better support PSCI OS initiated CPU suspend mode, let's convert from the flattened layout to the hierarchical layout. In the hierarchical layout, let's create a power domain provider per CPU and describe the idle states for each CPU inside the power domain provider node. To group the CPUs into a cluster, let's add another power domain provider and make it act as the master domain. Note that, the CPU's idle states remains compatible with "arm,idle-state", while the cluster's idle state becomes compatible with "domain-idle-state". Co-developed-by: Lina Iyer Signed-off-by: Lina Iyer Signed-off-by: Ulf Hansson --- Changes in v2: - Dropped CC of Andy, due to wrong email anyway. Instead include him for the series. --- arch/arm64/boot/dts/qcom/msm8916.dtsi | 57 +++++++++++++++++++++++++-- 1 file changed, 53 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi index 5ea9fb8f2f87..1ece0c763592 100644 --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi @@ -102,10 +102,11 @@ reg = <0x0>; next-level-cache = <&L2_0>; enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0>; clocks = <&apcs>; operating-points-v2 = <&cpu_opp_table>; #cooling-cells = <2>; + power-domains = <&CPU_PD0>; + power-domain-names = "psci"; }; CPU1: cpu@1 { @@ -114,10 +115,11 @@ reg = <0x1>; next-level-cache = <&L2_0>; enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0>; clocks = <&apcs>; operating-points-v2 = <&cpu_opp_table>; #cooling-cells = <2>; + power-domains = <&CPU_PD1>; + power-domain-names = "psci"; }; CPU2: cpu@2 { @@ -126,10 +128,11 @@ reg = <0x2>; next-level-cache = <&L2_0>; enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0>; clocks = <&apcs>; operating-points-v2 = <&cpu_opp_table>; #cooling-cells = <2>; + power-domains = <&CPU_PD2>; + power-domain-names = "psci"; }; CPU3: cpu@3 { @@ -138,10 +141,11 @@ reg = <0x3>; next-level-cache = <&L2_0>; enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0>; clocks = <&apcs>; operating-points-v2 = <&cpu_opp_table>; #cooling-cells = <2>; + power-domains = <&CPU_PD3>; + power-domain-names = "psci"; }; L2_0: l2-cache { @@ -161,12 +165,57 @@ min-residency-us = <2000>; local-timer-stop; }; + + CLUSTER_RET: cluster-retention { + compatible = "domain-idle-state"; + arm,psci-suspend-param = <0x41000012>; + entry-latency-us = <500>; + exit-latency-us = <500>; + min-residency-us = <2000>; + }; + + CLUSTER_PWRDN: cluster-gdhs { + compatible = "domain-idle-state"; + arm,psci-suspend-param = <0x41000032>; + entry-latency-us = <2000>; + exit-latency-us = <2000>; + min-residency-us = <6000>; + }; }; }; psci { compatible = "arm,psci-1.0"; method = "smc"; + + CPU_PD0: cpu-pd0 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER_PD>; + domain-idle-states = <&CPU_SLEEP_0>; + }; + + CPU_PD1: cpu-pd1 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER_PD>; + domain-idle-states = <&CPU_SLEEP_0>; + }; + + CPU_PD2: cpu-pd2 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER_PD>; + domain-idle-states = <&CPU_SLEEP_0>; + }; + + CPU_PD3: cpu-pd3 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER_PD>; + domain-idle-states = <&CPU_SLEEP_0>; + }; + + CLUSTER_PD: cluster-pd { + #power-domain-cells = <0>; + domain-idle-states = <&CLUSTER_RET>, <&CLUSTER_PWRDN>; + }; }; pmu {