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[46.91.226.206]) by smtp.gmail.com with ESMTPSA id w81sm11048760wmg.5.2019.11.02.07.45.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 02 Nov 2019 07:45:22 -0700 (PDT) From: Thierry Reding To: Linuxkernel+Patchwork-Soc via Email Integration Cc: Thierry Reding , Jon Hunter , linux-tegra@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [GIT PULL 1/8] dt-bindings: Changes for v5.5-rc1 Date: Sat, 2 Nov 2019 15:45:14 +0100 Message-Id: <20191102144521.3863321-1-thierry.reding@gmail.com> MIME-Version: 1.0 X-TUID: 8NezwzLjSwtA Precedence: Bulk List-Unsubscribe: Sender: patchwork-soc@linux.kernel.org List-Id: Mailing-List: list patchwork-soc@linux.kernel.org; contact patchwork-soc+owner@linux.kernel.org Delivered-To: mailing list patchwork-soc@linux.kernel.org Reply-To: patchwork-soc+owner@linux.kernel.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linux.kernel.org; q=dns/txt; s=20140610; t=1572830282; bh=j6b0xc9mgKBwWHI3gLQndNMmMwJhXrRrTJElWwqyJ4E=; h=Cc:Date:From:Reply-To:Subject:To; b=LJUhN77yMX73UVcuzpKz1baMUkW/992tISgDVUrJyFov7e1OkddvBtgcQkTRe6lc5kL F2VJpv4AHInJQ4qIrfUqGCIi4hECqw+6mvun/3nw32JgH9eCrgmZ5A2hAHQR2CEEdh30a jQK+U6RyfCkpc+MXofM3wBPlYqi41EEPgss= Hi ARM SoC maintainers, The following changes since commit 54ecb8f7028c5eb3d740bb82b0f1d90f2df63c5c: Linux 5.4-rc1 (2019-09-30 10:35:40 -0700) are available in the Git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux.git tags/tegra-for-5.5-dt-bindings for you to fetch changes up to 641262f5e1ed5c96799e17595893fa1a703616ac: dt-bindings: memory: Add binding for NVIDIA Tegra30 External Memory Controller (2019-10-29 20:22:34 +0100) Thanks, Thierry ---------------------------------------------------------------- dt-bindings: Changes for v5.5-rc1 This contains various updates to device tree bindings and includes that are related to driver changes in other Tegra branches. ---------------------------------------------------------------- Dmitry Osipenko (4): dt-bindings: regulator: Document regulators coupling of NVIDIA Tegra20/30 SoCs dt-bindings: memory: tegra30: Convert to Tegra124 YAML dt-bindings: memory: Add binding for NVIDIA Tegra30 Memory Controller dt-bindings: memory: Add binding for NVIDIA Tegra30 External Memory Controller Thierry Reding (1): dt-bindings: clock: tegra: Rename SOR0_LVDS to SOR0_OUT .../memory-controllers/nvidia,tegra124-mc.yaml | 152 ++++++++++ .../memory-controllers/nvidia,tegra30-emc.yaml | 336 +++++++++++++++++++++ .../memory-controllers/nvidia,tegra30-mc.txt | 123 -------- .../memory-controllers/nvidia,tegra30-mc.yaml | 167 ++++++++++ .../regulator/nvidia,tegra-regulators-coupling.txt | 65 ++++ include/dt-bindings/clock/tegra124-car-common.h | 3 +- include/dt-bindings/clock/tegra210-car.h | 3 +- 7 files changed, 724 insertions(+), 125 deletions(-) create mode 100644 Documentation/devicetree/bindings/memory-controllers/nvidia,tegra124-mc.yaml create mode 100644 Documentation/devicetree/bindings/memory-controllers/nvidia,tegra30-emc.yaml delete mode 100644 Documentation/devicetree/bindings/memory-controllers/nvidia,tegra30-mc.txt create mode 100644 Documentation/devicetree/bindings/memory-controllers/nvidia,tegra30-mc.yaml create mode 100644 Documentation/devicetree/bindings/regulator/nvidia,tegra-regulators-coupling.txt -=-=-=-=-=-=-=-=-=-=-=- Links: You receive all messages sent to this group. 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[46.91.226.206]) by smtp.gmail.com with ESMTPSA id w81sm11048840wmg.5.2019.11.02.07.45.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 02 Nov 2019 07:45:24 -0700 (PDT) From: Thierry Reding To: Linuxkernel+Patchwork-Soc via Email Integration Cc: Thierry Reding , Jon Hunter , linux-tegra@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [GIT PULL 2/8] firmware: tegra: Changes for v5.5-rc1 Date: Sat, 2 Nov 2019 15:45:15 +0100 Message-Id: <20191102144521.3863321-2-thierry.reding@gmail.com> In-Reply-To: <20191102144521.3863321-1-thierry.reding@gmail.com> References: <20191102144521.3863321-1-thierry.reding@gmail.com> MIME-Version: 1.0 X-TUID: EacYlmlv0YlR Precedence: Bulk List-Unsubscribe: Sender: patchwork-soc@linux.kernel.org List-Id: Mailing-List: list patchwork-soc@linux.kernel.org; contact patchwork-soc+owner@linux.kernel.org Delivered-To: mailing list patchwork-soc@linux.kernel.org Reply-To: patchwork-soc+owner@linux.kernel.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linux.kernel.org; q=dns/txt; s=20140610; t=1572830290; bh=rdA12/vUW7K/Sq9YUaMFbN0fbtQGsEFv4+dGUuZZpoY=; h=Cc:Date:From:Reply-To:Subject:To; b=wfIUZjS4wcR1FyYOoqjRh+1m6p3/qlHO/4a9C2YxrZWIAADKhDOuCzx1uN0oMqRNztT JGnvg09LxvnX3OowaEXAEsk39j2ZZPf+ZX1VVRjB04KEbkeKTax0oBmF5eTbjMEuO/+NE Y9DgAU1FqzoaX6kFuFzHDT1e67ivcvnVdI4= Hi ARM SoC maintainers, The following changes since commit 54ecb8f7028c5eb3d740bb82b0f1d90f2df63c5c: Linux 5.4-rc1 (2019-09-30 10:35:40 -0700) are available in the Git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux.git tags/tegra-for-5.5-firmware for you to fetch changes up to befc1bab91171d25de22dbcbf41309582a63ecd7: firmware: tegra: Move BPMP resume to noirq phase (2019-10-01 16:38:45 +0200) Thanks, Thierry ---------------------------------------------------------------- firmware: tegra: Changes for v5.5-rc1 This contains a single fix for suspend/resume on Tegra194. ---------------------------------------------------------------- Vidya Sagar (1): firmware: tegra: Move BPMP resume to noirq phase drivers/firmware/tegra/bpmp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -=-=-=-=-=-=-=-=-=-=-=- Links: You receive all messages sent to this group. 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[46.91.226.206]) by smtp.gmail.com with ESMTPSA id y16sm1366647wro.25.2019.11.02.07.45.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 02 Nov 2019 07:45:27 -0700 (PDT) From: Thierry Reding To: Linuxkernel+Patchwork-Soc via Email Integration Cc: Thierry Reding , Jon Hunter , linux-tegra@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [GIT PULL 3/8] memory: tegra: Changes for v5.5-rc1 Date: Sat, 2 Nov 2019 15:45:16 +0100 Message-Id: <20191102144521.3863321-3-thierry.reding@gmail.com> In-Reply-To: <20191102144521.3863321-1-thierry.reding@gmail.com> References: <20191102144521.3863321-1-thierry.reding@gmail.com> MIME-Version: 1.0 X-TUID: gu/6hTTMkGLe Precedence: Bulk List-Unsubscribe: Sender: patchwork-soc@linux.kernel.org List-Id: Mailing-List: list patchwork-soc@linux.kernel.org; contact patchwork-soc+owner@linux.kernel.org Delivered-To: mailing list patchwork-soc@linux.kernel.org Reply-To: patchwork-soc+owner@linux.kernel.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linux.kernel.org; q=dns/txt; s=20140610; t=1572830282; bh=TK5Ue4nGn8BWaMmN4/lE/7yVDzei8lLVpsa7boU+bDc=; h=Cc:Date:From:Reply-To:Subject:To; b=QieF23FcFZCIFGCwY9Y65HG/gpnXUpk1WM+2aNtz8vER4NI5saZ8QkFI7LK+L7W0b5g SlddH4UTJxGrN9h4STzAhLxTOSUYL6jg3nYIdsQqZY7TUtbmp6XBng1P+7f8My1VfFw3Q XeAqgkE5+nVzrvRI7cPSKa4w6+n+exE/w3E= Hi ARM SoC maintainers, The following changes since commit 54ecb8f7028c5eb3d740bb82b0f1d90f2df63c5c: Linux 5.4-rc1 (2019-09-30 10:35:40 -0700) are available in the Git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux.git tags/tegra-for-5.5-memory for you to fetch changes up to 8b04225c4464422f185e62c2cedfb9e234423814: memory: tegra: Consolidate registers definition into common header (2019-11-01 10:57:37 +0100) Thanks, Thierry ---------------------------------------------------------------- memory: tegra: Changes for v5.5-rc1 This contains a couple of fixes and adds support for EMC frequency scaling on Tegra30. ---------------------------------------------------------------- Dmitry Osipenko (11): clk: tegra: Add Tegra20/30 EMC clock implementation memory: tegra: Don't set EMC rate to maximum on probe for Tegra20 memory: tegra: Adapt for Tegra20 clock driver changes memory: tegra: Include io.h instead of iopoll.h memory: tegra: Pre-configure debug register on Tegra20 memory: tegra: Print a brief info message about EMC timings memory: tegra: Increase handshake timeout on Tegra20 memory: tegra: Do not handle error from wait_for_completion_timeout() memory: tegra: Introduce Tegra30 EMC driver memory: tegra: Ensure timing control debug features are disabled memory: tegra: Consolidate registers definition into common header Sowjanya Komatineni (1): clk: Add API to get index of the clock parent Thierry Reding (3): Merge branch 'for-5.5/clk' memory: tegra: Set DMA mask based on supported address bits memory: tegra: Add gr2d and gr3d to DRM IOMMU group drivers/clk/clk.c | 17 + drivers/clk/tegra/Makefile | 2 + drivers/clk/tegra/clk-tegra20-emc.c | 293 +++++++++ drivers/clk/tegra/clk-tegra20.c | 55 +- drivers/clk/tegra/clk-tegra30.c | 38 +- drivers/clk/tegra/clk.h | 3 + drivers/memory/tegra/Kconfig | 10 + drivers/memory/tegra/Makefile | 1 + drivers/memory/tegra/mc.c | 52 +- drivers/memory/tegra/mc.h | 74 ++- drivers/memory/tegra/tegra114.c | 10 +- drivers/memory/tegra/tegra124.c | 30 +- drivers/memory/tegra/tegra20-emc.c | 134 ++-- drivers/memory/tegra/tegra30-emc.c | 1232 +++++++++++++++++++++++++++++++++++ drivers/memory/tegra/tegra30.c | 34 +- include/linux/clk-provider.h | 1 + include/linux/clk/tegra.h | 11 + include/soc/tegra/mc.h | 2 +- 18 files changed, 1797 insertions(+), 202 deletions(-) create mode 100644 drivers/clk/tegra/clk-tegra20-emc.c create mode 100644 drivers/memory/tegra/tegra30-emc.c -=-=-=-=-=-=-=-=-=-=-=- Links: You receive all messages sent to this group. View/Reply Online (#787): https://linux.kernel.org/g/patchwork-soc/message/787 Mute This Topic: https://linux.kernel.org/mt/41021436/1554929 Group Owner: patchwork-soc+owner@linux.kernel.org Unsubscribe: https://linux.kernel.org/g/patchwork-soc/unsub [patchwork-linux-kernel-org@patchwork.kernel.org] -=-=-=-=-=-=-=-=-=-=-=- From patchwork Sat Nov 2 14:45:17 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 11224807 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id DBC2015AB for ; Mon, 4 Nov 2019 01:18:02 +0000 (UTC) Received: from web01.groups.io (web01.groups.io [66.175.222.12]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 95953222D0 for ; Mon, 4 Nov 2019 01:18:02 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=linux.kernel.org header.i=@linux.kernel.org header.b="ODepyIJ9" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 95953222D0 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=bounce+26986+788+1554929+3438807@linux.kernel.org X-Received: by 127.0.0.2 with SMTP id aaaaYY1556264xaaaaaaaaaa; Sun, 03 Nov 2019 17:18:02 -0800 X-Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by mx.groups.io with SMTP id smtpd.web10.10155.1572830273105415190 for ; Sun, 03 Nov 2019 17:17:53 -0800 X-Received: by mail.kernel.org (Postfix) id E23F3222CD; Mon, 4 Nov 2019 01:17:52 +0000 (UTC) X-Received: from mail-lj1-f196.google.com (mail-lj1-f196.google.com [209.85.208.196]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 7A6A32190F for ; Mon, 4 Nov 2019 01:17:52 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 7A6A32190F X-Received: by mail-lj1-f196.google.com with SMTP id y23so4828519ljh.10 for ; Sun, 03 Nov 2019 17:17:52 -0800 (PST) X-Gm-Message-State: aaaaaaaaaaaaaaaaaaaaaaaax1554929AA= X-Google-Smtp-Source: APXvYqzKCTWXm60XdwnK6quRfXsekxtCHNwu9XJcBP4HZ8H8oBzNynsKCo6ro0NEzw/bzI4X1ytZHQ== X-Received: by 2002:a2e:b54d:: with SMTP id a13mr7458748ljn.4.1572830270350; Sun, 03 Nov 2019 17:17:50 -0800 (PST) X-Received: from localhost (h85-30-9-151.cust.a3fiber.se. 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[46.91.226.206]) by smtp.gmail.com with ESMTPSA id w15sm10926330wro.65.2019.11.02.07.45.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 02 Nov 2019 07:45:29 -0700 (PDT) From: Thierry Reding To: Linuxkernel+Patchwork-Soc via Email Integration Cc: Thierry Reding , Jon Hunter , linux-tegra@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [GIT PULL 4/8] soc/tegra: Changes for v5.5-rc1 Date: Sat, 2 Nov 2019 15:45:17 +0100 Message-Id: <20191102144521.3863321-4-thierry.reding@gmail.com> In-Reply-To: <20191102144521.3863321-1-thierry.reding@gmail.com> References: <20191102144521.3863321-1-thierry.reding@gmail.com> MIME-Version: 1.0 X-TUID: IrN6gEpCI+e+ Precedence: Bulk List-Unsubscribe: Sender: patchwork-soc@linux.kernel.org List-Id: Mailing-List: list patchwork-soc@linux.kernel.org; contact patchwork-soc+owner@linux.kernel.org Delivered-To: mailing list patchwork-soc@linux.kernel.org Reply-To: patchwork-soc+owner@linux.kernel.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linux.kernel.org; q=dns/txt; s=20140610; t=1572830282; bh=Z6ZhCBm3XIcZH+vaLt5uhL9hQUgkNb3qxzUagfczZYE=; h=Cc:Date:From:Reply-To:Subject:To; b=ODepyIJ9Pm3+2f0QfLtNGGq3QBPz2Tu5gPqM8sdMAlrpDuuvbpW6zUVWl8tOQH0wvKN HS9YeLJAgUt1hybD4wSMzAs/7ruYi+8XykUKOXtLLGXdz/c8VHt2VqFDdTMXpenA0kRs8 BgO99xzf7cR5Fj1lm5FwXM4JN1VIhCIDSEU= Hi ARM SoC maintainers, The following changes since commit 54ecb8f7028c5eb3d740bb82b0f1d90f2df63c5c: Linux 5.4-rc1 (2019-09-30 10:35:40 -0700) are available in the Git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux.git tags/tegra-for-5.5-soc for you to fetch changes up to 69dfb3d4a89afccca1d8f282e49ad1362100cc43: soc/tegra: pmc: Remove unnecessary memory barrier (2019-10-29 14:36:24 +0100) Thanks, Thierry ---------------------------------------------------------------- soc/tegra: Changes for v5.5-rc1 Adds wake event support on Tegra210, implements the NVMEM API for the Tegra FUSE block and adds coupled regulators support for Tegra20 and Tegra30. ---------------------------------------------------------------- Dmitry Osipenko (4): soc/tegra: regulators: Add regulators coupler for Tegra20 soc/tegra: regulators: Add regulators coupler for Tegra30 soc/tegra: pmc: Query PCLK clock rate at probe time soc/tegra: pmc: Remove unnecessary memory barrier Nagarjuna Kristam (1): soc/tegra: fuse: Add FUSE clock check in tegra_fuse_readl() Sowjanya Komatineni (4): soc/tegra: pmc: Support wake events on more Tegra SoCs soc/tegra: pmc: Add wake event support on Tegra210 soc/tegra: pmc: Configure core power request polarity soc/tegra: pmc: Configure deep sleep control settings Thierry Reding (5): soc/tegra: pmc: Fix crashes for hierarchical interrupts soc/tegra: fuse: Restore base on sysfs failure soc/tegra: fuse: Implement nvmem device soc/tegra: fuse: Add cell information soc/tegra: fuse: Register cell lookups for compatibility drivers/soc/tegra/Kconfig | 10 + drivers/soc/tegra/Makefile | 2 + drivers/soc/tegra/fuse/fuse-tegra.c | 198 +++++++++++++----- drivers/soc/tegra/fuse/fuse-tegra30.c | 154 ++++++++++++++ drivers/soc/tegra/fuse/fuse.h | 8 + drivers/soc/tegra/pmc.c | 232 +++++++++++++++++++-- drivers/soc/tegra/regulators-tegra20.c | 365 +++++++++++++++++++++++++++++++++ drivers/soc/tegra/regulators-tegra30.c | 317 ++++++++++++++++++++++++++++ 8 files changed, 1212 insertions(+), 74 deletions(-) create mode 100644 drivers/soc/tegra/regulators-tegra20.c create mode 100644 drivers/soc/tegra/regulators-tegra30.c -=-=-=-=-=-=-=-=-=-=-=- Links: You receive all messages sent to this group. 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[46.91.226.206]) by smtp.gmail.com with ESMTPSA id t134sm13522661wmt.24.2019.11.02.07.45.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 02 Nov 2019 07:45:31 -0700 (PDT) From: Thierry Reding To: Linuxkernel+Patchwork-Soc via Email Integration Cc: Thierry Reding , Jon Hunter , linux-tegra@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [GIT PULL 5/8] ARM: tegra: Core changes for v5.5-rc1 Date: Sat, 2 Nov 2019 15:45:18 +0100 Message-Id: <20191102144521.3863321-5-thierry.reding@gmail.com> In-Reply-To: <20191102144521.3863321-1-thierry.reding@gmail.com> References: <20191102144521.3863321-1-thierry.reding@gmail.com> MIME-Version: 1.0 X-TUID: jt0a4qb7t5Zh Precedence: Bulk List-Unsubscribe: Sender: patchwork-soc@linux.kernel.org List-Id: Mailing-List: list patchwork-soc@linux.kernel.org; contact patchwork-soc+owner@linux.kernel.org Delivered-To: mailing list patchwork-soc@linux.kernel.org Reply-To: patchwork-soc+owner@linux.kernel.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linux.kernel.org; q=dns/txt; s=20140610; t=1572830290; bh=JFDA7S9DdvfBamK5oRDZWPch5XYjDpUFvId3lfY/HUI=; h=Cc:Date:From:Reply-To:Subject:To; b=iq9J1uxYOzdaVIJlLuptbMSOQOFFCNSeGdEHRxlOORBIW7YBDH1qboOVH1gGtwbHx15 OcRHcEZjIsEL5qD1NY3SmKQylhUH+wSJhGJCbagOyZjwBEj2BijEFH20XaPha1eVkzK7E TFSvVyHxwzMgUzs05gyRvryoiep0ZIxLCuA= Hi ARM SoC maintainers, The following changes since commit 54ecb8f7028c5eb3d740bb82b0f1d90f2df63c5c: Linux 5.4-rc1 (2019-09-30 10:35:40 -0700) are available in the Git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux.git tags/tegra-for-5.5-arm-core for you to fetch changes up to 91d7ff5aa7e3edd9ab99a424099476ed5667b152: ARM: tegra: Use WFE for power-gating on Tegra30 (2019-10-29 14:32:01 +0100) Thanks, Thierry ---------------------------------------------------------------- ARM: tegra: Core changes for v5.5-rc1 Contains two fixes for CPU idle and suspend/resume on early Tegra SoCs. ---------------------------------------------------------------- Dmitry Osipenko (2): ARM: tegra: Fix FLOW_CTLR_HALT register clobbering by tegra_resume() ARM: tegra: Use WFE for power-gating on Tegra30 arch/arm/mach-tegra/reset-handler.S | 6 +++--- arch/arm/mach-tegra/sleep-tegra30.S | 4 +++- drivers/soc/tegra/flowctrl.c | 19 +++++++++++++++++-- 3 files changed, 23 insertions(+), 6 deletions(-) -=-=-=-=-=-=-=-=-=-=-=- Links: You receive all messages sent to this group. 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[46.91.226.206]) by smtp.gmail.com with ESMTPSA id o81sm2119190wmb.38.2019.11.02.07.45.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 02 Nov 2019 07:45:33 -0700 (PDT) From: Thierry Reding To: Linuxkernel+Patchwork-Soc via Email Integration Cc: Thierry Reding , Jon Hunter , linux-tegra@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [GIT PULL 6/8] ARM: tegra: Device tree changes for v5.5-rc1 Date: Sat, 2 Nov 2019 15:45:19 +0100 Message-Id: <20191102144521.3863321-6-thierry.reding@gmail.com> In-Reply-To: <20191102144521.3863321-1-thierry.reding@gmail.com> References: <20191102144521.3863321-1-thierry.reding@gmail.com> MIME-Version: 1.0 X-TUID: rBKHpBlUkyyz Precedence: Bulk List-Unsubscribe: Sender: patchwork-soc@linux.kernel.org List-Id: Mailing-List: list patchwork-soc@linux.kernel.org; contact patchwork-soc+owner@linux.kernel.org Delivered-To: mailing list patchwork-soc@linux.kernel.org Reply-To: patchwork-soc+owner@linux.kernel.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linux.kernel.org; q=dns/txt; s=20140610; t=1572830290; bh=TyKDCi8K+5YIFVjuhCfojnAj3f8i/TeEk/urRY789c4=; h=Cc:Date:From:Reply-To:Subject:To; b=LvFXxSrSqIOzB0u4Q9CO86WhMmU9V6yIIfypvFppt2d/Lx6mMX6i4b7Rd0VCO5szHkP RtY50LSagND1hv7vR/PeKm0i91LON7Z47PYobs+VHfZquoQOB2zwhs79OJC8LsuvR6T2K lB2qbNQDLPMedsjl5c36NLjpPZ+I+9VeADM= Hi ARM SoC maintainers, The following changes since commit 54ecb8f7028c5eb3d740bb82b0f1d90f2df63c5c: Linux 5.4-rc1 (2019-09-30 10:35:40 -0700) are available in the Git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux.git tags/tegra-for-5.5-arm-dt for you to fetch changes up to 4053aa65c517fba954af05e826bb97b2eaefe92a: ARM: tegra: cardhu-a04: Add CPU Operating Performance Points (2019-10-29 20:29:17 +0100) Thanks, Thierry ---------------------------------------------------------------- ARM: tegra: Device tree changes for v5.5-rc1 Adds support for CPU frequency scaling on Tegra20 and Tegra30, EMC frequency scaling on Tegra30, SMMU support for VDE on Tegra30, the STMPE ADC found on Toradex T30 modules as well as fixes for eDP support on Venice2. ---------------------------------------------------------------- Dmitry Osipenko (12): ARM: tegra: Connect SMMU with Video Decoder Engine on Tegra30 ARM: tegra: nyan-big: Add timings for RAM codes 4 and 6 ARM: tegra: Add External Memory Controller node on Tegra30 ARM: tegra: Add Tegra20 CPU clock ARM: tegra: Add Tegra30 CPU clock ARM: tegra: Add CPU Operating Performance Points for Tegra20 ARM: tegra: Add CPU Operating Performance Points for Tegra30 ARM: tegra: paz00: Set up voltage regulators for DVFS ARM: tegra: paz00: Add CPU Operating Performance Points ARM: tegra: trimslice: Add CPU Operating Performance Points ARM: tegra: cardhu-a04: Set up voltage regulators for DVFS ARM: tegra: cardhu-a04: Add CPU Operating Performance Points Philippe Schenker (1): ARM: tegra: Add stmpe-adc DT node to Toradex T30 modules Thierry Reding (4): dt-bindings: clock: tegra: Rename SOR0_LVDS to SOR0_OUT Merge branch 'for-5.5/dt-bindings' ARM: tegra: Add SOR0_OUT clock on Tegra124 ARM: tegra: Add eDP power supplies on Venice2 arch/arm/boot/dts/tegra124-nyan-big-emc.dtsi | 7869 +++++++++++++++++----- arch/arm/boot/dts/tegra124-venice2.dts | 3 + arch/arm/boot/dts/tegra124.dtsi | 3 +- arch/arm/boot/dts/tegra20-cpu-opp-microvolt.dtsi | 201 + arch/arm/boot/dts/tegra20-cpu-opp.dtsi | 302 + arch/arm/boot/dts/tegra20-paz00.dts | 41 +- arch/arm/boot/dts/tegra20-trimslice.dts | 11 + arch/arm/boot/dts/tegra20.dtsi | 2 + arch/arm/boot/dts/tegra30-apalis-v1.1.dtsi | 22 +- arch/arm/boot/dts/tegra30-apalis.dtsi | 22 +- arch/arm/boot/dts/tegra30-cardhu-a04.dts | 48 + arch/arm/boot/dts/tegra30-colibri.dtsi | 22 +- arch/arm/boot/dts/tegra30-cpu-opp-microvolt.dtsi | 801 +++ arch/arm/boot/dts/tegra30-cpu-opp.dtsi | 1202 ++++ arch/arm/boot/dts/tegra30.dtsi | 14 + include/dt-bindings/clock/tegra124-car-common.h | 3 +- include/dt-bindings/clock/tegra210-car.h | 3 +- 17 files changed, 8914 insertions(+), 1655 deletions(-) create mode 100644 arch/arm/boot/dts/tegra20-cpu-opp-microvolt.dtsi create mode 100644 arch/arm/boot/dts/tegra20-cpu-opp.dtsi create mode 100644 arch/arm/boot/dts/tegra30-cpu-opp-microvolt.dtsi create mode 100644 arch/arm/boot/dts/tegra30-cpu-opp.dtsi -=-=-=-=-=-=-=-=-=-=-=- Links: You receive all messages sent to this group. View/Reply Online (#790): https://linux.kernel.org/g/patchwork-soc/message/790 Mute This Topic: https://linux.kernel.org/mt/41021443/1554929 Group Owner: patchwork-soc+owner@linux.kernel.org Unsubscribe: https://linux.kernel.org/g/patchwork-soc/unsub [patchwork-linux-kernel-org@patchwork.kernel.org] -=-=-=-=-=-=-=-=-=-=-=- From patchwork Sat Nov 2 14:45:20 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 11224815 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E66F91515 for ; Mon, 4 Nov 2019 01:18:10 +0000 (UTC) Received: from web01.groups.io (web01.groups.io [66.175.222.12]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id BF8742190F for ; Mon, 4 Nov 2019 01:18:10 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=linux.kernel.org header.i=@linux.kernel.org header.b="HTuLeH2M" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org BF8742190F Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=bounce+26986+791+1554929+3438807@linux.kernel.org X-Received: by 127.0.0.2 with SMTP id aaaaYY1556264xaaaaaaaaaa; Sun, 03 Nov 2019 17:18:10 -0800 X-Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by mx.groups.io with SMTP id smtpd.web10.10156.1572830277427419533 for ; Sun, 03 Nov 2019 17:17:57 -0800 X-Received: by mail.kernel.org (Postfix) id 2E43C222CD; Mon, 4 Nov 2019 01:17:57 +0000 (UTC) X-Received: from mail-lf1-f65.google.com (mail-lf1-f65.google.com [209.85.167.65]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id C10832190F for ; Mon, 4 Nov 2019 01:17:56 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org C10832190F X-Received: by mail-lf1-f65.google.com with SMTP id f5so10957468lfp.1 for ; Sun, 03 Nov 2019 17:17:56 -0800 (PST) X-Gm-Message-State: aaaaaaaaaaaaaaaaaaaaaaaax1554929AA= X-Google-Smtp-Source: APXvYqwxkDrhyv3frSmiVmcnbyivY29pLSo5t8dvC4h34e6WaTyKe15pTc0lh3gMs2rm8KYmPQeq4A== X-Received: by 2002:ac2:5967:: with SMTP id h7mr14253520lfp.119.1572830274705; Sun, 03 Nov 2019 17:17:54 -0800 (PST) X-Received: from localhost (h85-30-9-151.cust.a3fiber.se. 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[46.91.226.206]) by smtp.gmail.com with ESMTPSA id j22sm15143980wrd.41.2019.11.02.07.45.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 02 Nov 2019 07:45:35 -0700 (PDT) From: Thierry Reding To: Linuxkernel+Patchwork-Soc via Email Integration Cc: Thierry Reding , Jon Hunter , linux-tegra@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [GIT PULL 7/8] ARM: tegra: Default configuration changes for v5.5-rc1 Date: Sat, 2 Nov 2019 15:45:20 +0100 Message-Id: <20191102144521.3863321-7-thierry.reding@gmail.com> In-Reply-To: <20191102144521.3863321-1-thierry.reding@gmail.com> References: <20191102144521.3863321-1-thierry.reding@gmail.com> MIME-Version: 1.0 X-TUID: 0GsgZxnAM54E Precedence: Bulk List-Unsubscribe: Sender: patchwork-soc@linux.kernel.org List-Id: Mailing-List: list patchwork-soc@linux.kernel.org; contact patchwork-soc+owner@linux.kernel.org Delivered-To: mailing list patchwork-soc@linux.kernel.org Reply-To: patchwork-soc+owner@linux.kernel.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linux.kernel.org; q=dns/txt; s=20140610; t=1572830290; bh=ymJ22Wdq9Fk9OpVB5sU+iZMZUyiWdczF3P/tN/R3f/k=; h=Cc:Date:From:Reply-To:Subject:To; b=HTuLeH2MCb+F2eLfamJLDBW3rMh+2HiT9gQobCS1qRxh4AGJemlnprr6/iCM7ckaENT 7TXytQ3LcIUk9LhhXAytfedJNoIzL4CTe+BRh6U0ZRF1rHn/fxmuvVpRWiDGhcfQm1VSl CJxutXbeuMNfv184re3KcgbSK3NQWeR01NI= Hi ARM SoC maintainers, The following changes since commit 54ecb8f7028c5eb3d740bb82b0f1d90f2df63c5c: Linux 5.4-rc1 (2019-09-30 10:35:40 -0700) are available in the Git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux.git tags/tegra-for-5.5-arm-defconfig for you to fetch changes up to 480bb31f4286d838fc0eebcfd813dd83236406e7: ARM: tegra: Enable Tegra VDE driver in tegra_defconfig (2019-10-29 14:10:35 +0100) Thanks, Thierry ---------------------------------------------------------------- ARM: tegra: Default configuration changes for v5.5-rc1 Enables the Tegra VDE driver by default. This is currently in staging but can be used with existing userspace to do hardware-accelerated video decoding of H.264 streams. ---------------------------------------------------------------- Dmitry Osipenko (1): ARM: tegra: Enable Tegra VDE driver in tegra_defconfig arch/arm/configs/tegra_defconfig | 2 ++ 1 file changed, 2 insertions(+) -=-=-=-=-=-=-=-=-=-=-=- Links: You receive all messages sent to this group. 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[46.91.226.206]) by smtp.gmail.com with ESMTPSA id i3sm10704851wrw.69.2019.11.02.07.45.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 02 Nov 2019 07:45:37 -0700 (PDT) From: Thierry Reding To: Linuxkernel+Patchwork-Soc via Email Integration Cc: Thierry Reding , Jon Hunter , linux-tegra@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [GIT PULL 8/8] arm64: tegra: Device tree changes for v5.5-rc1 Date: Sat, 2 Nov 2019 15:45:21 +0100 Message-Id: <20191102144521.3863321-8-thierry.reding@gmail.com> In-Reply-To: <20191102144521.3863321-1-thierry.reding@gmail.com> References: <20191102144521.3863321-1-thierry.reding@gmail.com> MIME-Version: 1.0 X-TUID: agO9jB4PGIn7 Precedence: Bulk List-Unsubscribe: Sender: patchwork-soc@linux.kernel.org List-Id: Mailing-List: list patchwork-soc@linux.kernel.org; contact patchwork-soc+owner@linux.kernel.org Delivered-To: mailing list patchwork-soc@linux.kernel.org Reply-To: patchwork-soc+owner@linux.kernel.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linux.kernel.org; q=dns/txt; s=20140610; t=1572830290; bh=8EDlzBjjv8NvltZA8QKtKGVX4OI5nPN2EAmtHZmRAWw=; h=Cc:Date:From:Reply-To:Subject:To; b=EQs0AGUP6C627zP4Cz+CzgOc1q+TMIasF7yZDWU1ur3hWFFa4ckSwfQT9lwG0bvFpV2 5GLkowi2OCvXaAriavsjB+xQ4MaoID1Xp9oOE3rzIe6F3LNkI8N1Dmvls6DCIWlAD8EUI tnSAhO/aVlVFUHk4a/6ND7jATKCbAx2VU9A= Hi ARM SoC maintainers, The following changes since commit 54ecb8f7028c5eb3d740bb82b0f1d90f2df63c5c: Linux 5.4-rc1 (2019-09-30 10:35:40 -0700) are available in the Git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux.git tags/tegra-for-5.5-arm64-dt for you to fetch changes up to 47b4e129155fd1e721462fa23d128940c93b5b7b: arm64: tegra: Add Jetson Nano SC7 timings (2019-10-29 20:30:09 +0100) Thanks, Thierry ---------------------------------------------------------------- arm64: tegra: Device tree changes for v5.5-rc1 Adds support for DP and XUSB on various boards, enables SMMU support for more devices and fixes a couple of DTC warnings and inconsistencies that are reported at runtime. These changes along with some of the driver changes in other branches allow suspend/resume support on Tegra210 devices (e.g. Jetson TX1 and Jetson Nano). ---------------------------------------------------------------- Jon Hunter (2): arm64: tegra: Fix 'active-low' warning for Jetson TX1 regulator arm64: tegra: Fix 'active-low' warning for Jetson Xavier regulator Nagarjuna Kristam (3): arm64: tegra: Enable XUSB pad controller on Jetson TX2 arm64: tegra: Enable SMMU for XUSB host on Tegra186 arm64: tegra: Enable XUSB host controller on Jetson TX2 Sowjanya Komatineni (3): arm64: tegra: Enable wake from deep sleep on RTC alarm arm64: tegra: Add Jetson TX1 SC7 timings arm64: tegra: Add Jetson Nano SC7 timings Thierry Reding (18): dt-bindings: clock: tegra: Rename SOR0_LVDS to SOR0_OUT Merge branch 'for-5.5/dt-bindings' arm64: tegra: Add CPU and cache topology for Tegra194 arm64: tegra: Add unit-address for CBB on Tegra194 arm64: tegra: Add unit-address for ACONNECT on Tegra194 arm64: tegra: Fix base address for SOR1 on Tegra194 arm64: tegra: Hook up edp interrupt on Tegra210 SOCTHERM arm64: tegra: Fix compatible string for EQOS on Tegra194 arm64: tegra: Add ethernet alias on Jetson AGX Xavier arm64: tegra: Enable SMMU for VIC on Tegra186 arm64: tegra: Add SOR0_OUT clock on Tegra210 arm64: tegra: Enable DP support on Jetson Nano arm64: tegra: Fix compatible for SOR1 arm64: tegra: Enable DP support on Jetson TX2 arm64: tegra: p2888: Rename regulators for consistency arm64: tegra: Enable DisplayPort on Jetson AGX Xavier arm64: tegra: Add blank lines for better readability arm64: tegra: Add PMU on Tegra210 Vidya Sagar (1): arm64: tegra: Assume no CLKREQ presence by default arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts | 12 +- arch/arm64/boot/dts/nvidia/tegra186.dtsi | 4 +- arch/arm64/boot/dts/nvidia/tegra194-p2888.dtsi | 36 ++--- arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts | 33 +++- arch/arm64/boot/dts/nvidia/tegra194.dtsi | 171 ++++++++++++++++++--- arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi | 7 + arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi | 2 +- arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts | 35 +++++ arch/arm64/boot/dts/nvidia/tegra210.dtsi | 25 ++- include/dt-bindings/clock/tegra124-car-common.h | 3 +- include/dt-bindings/clock/tegra210-car.h | 3 +- 11 files changed, 278 insertions(+), 53 deletions(-) -=-=-=-=-=-=-=-=-=-=-=- Links: You receive all messages sent to this group. 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