From patchwork Mon Nov 4 21:44:37 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Greg Kroah-Hartman X-Patchwork-Id: 11226563 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 51C5716B1 for ; Mon, 4 Nov 2019 21:48:53 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 304EB21D7D for ; Mon, 4 Nov 2019 21:48:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1572904133; bh=WjvZDnRLShYKiiRSM0euLyfqBON8RcUSVSgPwVQF2xM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=wW3Wv8Fob4W3+rw/sgpyb7gSkx4qov2N+NASMm0q82YlEZQDcGLPJFS4A9RTP3oXy lL/0KKaLUvRE743qQiL8N56EzIP2G/d+97mYVvLi7iSsInP6SblsqHjDGYPTaIQZQs fVFPZAjQ1sVv5X1XRpi+s5VDd/CoE/oSyFhSqt5k= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730147AbfKDVsv (ORCPT ); Mon, 4 Nov 2019 16:48:51 -0500 Received: from mail.kernel.org ([198.145.29.99]:39526 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730141AbfKDVss (ORCPT ); Mon, 4 Nov 2019 16:48:48 -0500 Received: from localhost (6.204-14-84.ripe.coltfrance.com [84.14.204.6]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 3D7BA21655; Mon, 4 Nov 2019 21:48:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1572904127; bh=WjvZDnRLShYKiiRSM0euLyfqBON8RcUSVSgPwVQF2xM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=bTvCnQIKH5ILR05kam8LUEmFqjqIIh287ELFxED7F2SESD0k3tB9juejDwUn59l0X nCFz8UKT/HF4iMqOFhsKYvxSTU7VeRyLBgyKbWzq0YnZkU76bmBN6KJZ5YccIOnod5 AE97OEkFM6j3p/FZTWD9q91RFwVun505ZkO2W4fM= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Kan Liang , Qiuxu Zhuo , Tony Luck , Borislav Petkov , Andy Shevchenko , Aristeu Rozanski , "H. Peter Anvin" , Ingo Molnar , linux-edac , Mauro Carvalho Chehab , Megha Dey , Peter Zijlstra , Rajneesh Bhardwaj , Thomas Gleixner , x86-ml , Sasha Levin Subject: [PATCH 4.4 06/46] x86/cpu: Add Atom Tremont (Jacobsville) Date: Mon, 4 Nov 2019 22:44:37 +0100 Message-Id: <20191104211837.155072104@linuxfoundation.org> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191104211830.912265604@linuxfoundation.org> References: <20191104211830.912265604@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Sender: linux-edac-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-edac@vger.kernel.org From: Kan Liang [ Upstream commit 00ae831dfe4474ef6029558f5eb3ef0332d80043 ] Add the Atom Tremont model number to the Intel family list. [ Tony: Also update comment at head of file to say "_X" suffix is also used for microserver parts. ] Signed-off-by: Kan Liang Signed-off-by: Qiuxu Zhuo Signed-off-by: Tony Luck Signed-off-by: Borislav Petkov Cc: Andy Shevchenko Cc: Aristeu Rozanski Cc: "H. Peter Anvin" Cc: Ingo Molnar Cc: linux-edac Cc: Mauro Carvalho Chehab Cc: Megha Dey Cc: Peter Zijlstra Cc: Qiuxu Zhuo Cc: Rajneesh Bhardwaj Cc: Thomas Gleixner Cc: x86-ml Link: https://lkml.kernel.org/r/20190125195902.17109-4-tony.luck@intel.com Signed-off-by: Sasha Levin --- arch/x86/include/asm/intel-family.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/x86/include/asm/intel-family.h b/arch/x86/include/asm/intel-family.h index 6801f958e2542..aaa0bd820cf4d 100644 --- a/arch/x86/include/asm/intel-family.h +++ b/arch/x86/include/asm/intel-family.h @@ -5,7 +5,7 @@ * "Big Core" Processors (Branded as Core, Xeon, etc...) * * The "_X" parts are generally the EP and EX Xeons, or the - * "Extreme" ones, like Broadwell-E. + * "Extreme" ones, like Broadwell-E, or Atom microserver. * * Things ending in "2" are usually because we have no better * name for them. There's no processor called "WESTMERE2". @@ -67,6 +67,7 @@ #define INTEL_FAM6_ATOM_GOLDMONT 0x5C /* Apollo Lake */ #define INTEL_FAM6_ATOM_GOLDMONT_X 0x5F /* Denverton */ #define INTEL_FAM6_ATOM_GOLDMONT_PLUS 0x7A /* Gemini Lake */ +#define INTEL_FAM6_ATOM_TREMONT_X 0x86 /* Jacobsville */ /* Xeon Phi */