From patchwork Mon Sep 17 16:32:51 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Tom Psyborg X-Patchwork-Id: 10603027 X-Patchwork-Delegate: kvalo@adurom.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 1BB0817D5 for ; Mon, 17 Sep 2018 16:33:10 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0B68D291EB for ; Mon, 17 Sep 2018 16:33:10 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id F1CCB292F4; Mon, 17 Sep 2018 16:33:09 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FROM,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id CAF50291EB for ; Mon, 17 Sep 2018 16:33:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728704AbeIQWBN (ORCPT ); Mon, 17 Sep 2018 18:01:13 -0400 Received: from mail-wr1-f65.google.com ([209.85.221.65]:34389 "EHLO mail-wr1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728065AbeIQWBN (ORCPT ); Mon, 17 Sep 2018 18:01:13 -0400 Received: by mail-wr1-f65.google.com with SMTP id g33-v6so18022977wrd.1 for ; Mon, 17 Sep 2018 09:33:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:subject:date:message-id:mime-version :content-transfer-encoding; bh=NAosil1z9Jnz6WnTjg9RBV/5dDihfHzEI15cFFCV6l8=; b=jPwBb5WhA2M+OaTdGJkufTMibMbEEhC3pv+WhQWG0FQgnCEa5whsVjIlhWLOjJ7NLU 0zZDRYS+J0dyZsqUKfz8CHcnp1PY9U7YCIZ0+WMnWoKWGK2qS+o0dWBgd3HEGLVkt9/4 xeD2HXM2xnrHTXHAxW9iH0wH+Faj8g1pMpUpQwxoPiLVkVnRDREEXxgwbzVEoXDCLMkt tYq+7MQ6XpVM5SeIUy2u/D15LFbFvaCjeTfzVnNdrXF4mzW7cPew1GVdGgcUTf4VFnQ5 XSQ/1G2dRruGw2DI+BOlc8sOdKEU0NZYAHx2VLrJMlb6Ad/lxjEMHh6DgtjwmW5Ym5bF FG8A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:mime-version :content-transfer-encoding; bh=NAosil1z9Jnz6WnTjg9RBV/5dDihfHzEI15cFFCV6l8=; b=SKAjuFyWAqflAI1znKm7bWcQnYytIa3Tw5xB+bUo61EWBe2S/WybGl2SRB8FMEYygO wzBjyAyIqw7i3rA/8MfV81Jj8vQXWCLwHrSYOKHC4kqofBVlQmvJR2/XKnf5R3TYOoAD XJg8hFHX/+LD8VKypgDzDk9cO0fftP7okoicpcQNxHakZTtyEnqv+2ek2DY8s+vretOJ CPu4Ne+JD431RiQk+kuFbksJRPQwnnSlklQ165IUhdiLdCijxtToSlzFks9cmBnyrvbX bMfPQx+fyFC/TQulR3FM+8XL57BwwuHig4l3A6R377p+HubZhgkvdLmOyhfrWNjucKiS +0TA== X-Gm-Message-State: APzg51CZacWYZS11+Nq7vj4J4GDg52MQkF88wv8QK3r0tpsyhJgu9r0l fxdwD1eWetr0cf3Kezki8RsDl5lr X-Google-Smtp-Source: ANB0Vdbh9l6IvH4ASsOXq/+e/YeSDBTcAGMWZrn55CGNnwqrI3kM6MN0TE9thV7qEEtIZwIpX4hg/A== X-Received: by 2002:a5d:6381:: with SMTP id p1-v6mr19363116wru.106.1537201982992; Mon, 17 Sep 2018 09:33:02 -0700 (PDT) Received: from localhost.localdomain ([31.147.208.18]) by smtp.googlemail.com with ESMTPSA id c3-v6sm17807307wrm.56.2018.09.17.09.33.01 for (version=TLS1 cipher=AES128-SHA bits=128/128); Mon, 17 Sep 2018 09:33:02 -0700 (PDT) From: =?utf-8?q?Tomislav_Po=C5=BEega?= To: linux-wireless@vger.kernel.org Subject: [PATCH 1/5] rt2x00: set registers based on current band Date: Mon, 17 Sep 2018 18:32:51 +0200 Message-Id: <1537201975-3032-1-git-send-email-pozega.tomislav@gmail.com> X-Mailer: git-send-email 1.7.0.4 MIME-Version: 1.0 Sender: linux-wireless-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-wireless@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Use curr_band instead of rf->channel among various subroutines - mostly for 2.4GHz band but in some circumstances for 5GHz band too. Signed-off-by: Tomislav Požega --- drivers/net/wireless/ralink/rt2x00/rt2800lib.c | 130 +++++++++++++----------- 1 files changed, 72 insertions(+), 58 deletions(-) diff --git a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c index a567bc2..33968ab 100644 --- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c +++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c @@ -2033,7 +2033,7 @@ static void rt2800_config_lna_gain(struct rt2x00_dev *rt2x00dev, u16 eeprom; short lna_gain; - if (libconf->rf.channel <= 14) { + if (rt2x00dev->curr_band == NL80211_BAND_2GHZ) { eeprom = rt2800_eeprom_read(rt2x00dev, EEPROM_LNA); lna_gain = rt2x00_get_field16(eeprom, EEPROM_LNA_BG); } else if (libconf->rf.channel <= 64) { @@ -2122,7 +2122,7 @@ static void rt2800_config_channel_rf2xxx(struct rt2x00_dev *rt2x00dev, } else if (rt2x00dev->default_ant.rx_chain_num == 2) rt2x00_set_field32(&rf->rf2, RF2_ANTENNA_RX2, 1); - if (rf->channel > 14) { + if (rt2x00dev->curr_band == NL80211_BAND_5GHZ) { /* * When TX power is below 0, we should increase it by 7 to * make it a positive value (Minimum value is -7). @@ -2271,21 +2271,21 @@ static void rt2800_config_channel_rf3052(struct rt2x00_dev *rt2x00dev, rfcsr = rt2800_rfcsr_read(rt2x00dev, 6); rt2x00_set_field8(&rfcsr, RFCSR6_R1, rf->rf2); - if (rf->channel <= 14) + if (rt2x00dev->curr_band == NL80211_BAND_2GHZ) rt2x00_set_field8(&rfcsr, RFCSR6_TXDIV, 2); else rt2x00_set_field8(&rfcsr, RFCSR6_TXDIV, 1); rt2800_rfcsr_write(rt2x00dev, 6, rfcsr); rfcsr = rt2800_rfcsr_read(rt2x00dev, 5); - if (rf->channel <= 14) + if (rt2x00dev->curr_band == NL80211_BAND_2GHZ) rt2x00_set_field8(&rfcsr, RFCSR5_R1, 1); else rt2x00_set_field8(&rfcsr, RFCSR5_R1, 2); rt2800_rfcsr_write(rt2x00dev, 5, rfcsr); rfcsr = rt2800_rfcsr_read(rt2x00dev, 12); - if (rf->channel <= 14) { + if (rt2x00dev->curr_band == NL80211_BAND_2GHZ) { rt2x00_set_field8(&rfcsr, RFCSR12_DR0, 3); rt2x00_set_field8(&rfcsr, RFCSR12_TX_POWER, info->default_power1); @@ -2298,7 +2298,7 @@ static void rt2800_config_channel_rf3052(struct rt2x00_dev *rt2x00dev, rt2800_rfcsr_write(rt2x00dev, 12, rfcsr); rfcsr = rt2800_rfcsr_read(rt2x00dev, 13); - if (rf->channel <= 14) { + if (rt2x00dev->curr_band == NL80211_BAND_2GHZ) { rt2x00_set_field8(&rfcsr, RFCSR13_DR0, 3); rt2x00_set_field8(&rfcsr, RFCSR13_TX_POWER, info->default_power2); @@ -2318,7 +2318,7 @@ static void rt2800_config_channel_rf3052(struct rt2x00_dev *rt2x00dev, rt2x00_set_field8(&rfcsr, RFCSR1_RX2_PD, 0); rt2x00_set_field8(&rfcsr, RFCSR1_TX2_PD, 0); if (rt2x00_has_cap_bt_coexist(rt2x00dev)) { - if (rf->channel <= 14) { + if (rt2x00dev->curr_band == NL80211_BAND_2GHZ) { rt2x00_set_field8(&rfcsr, RFCSR1_RX0_PD, 1); rt2x00_set_field8(&rfcsr, RFCSR1_TX0_PD, 1); } @@ -2355,7 +2355,7 @@ static void rt2800_config_channel_rf3052(struct rt2x00_dev *rt2x00dev, rt2800_rfcsr_write(rt2x00dev, 31, drv_data->calibration_bw20); } - if (rf->channel <= 14) { + if (rt2x00dev->curr_band == NL80211_BAND_2GHZ) { rt2800_rfcsr_write(rt2x00dev, 7, 0xd8); rt2800_rfcsr_write(rt2x00dev, 9, 0xc3); rt2800_rfcsr_write(rt2x00dev, 10, 0xf1); @@ -2408,7 +2408,7 @@ static void rt2800_config_channel_rf3052(struct rt2x00_dev *rt2x00dev, reg = rt2800_register_read(rt2x00dev, GPIO_CTRL); rt2x00_set_field32(®, GPIO_CTRL_DIR7, 0); - if (rf->channel <= 14) + if (rt2x00dev->curr_band == NL80211_BAND_2GHZ) rt2x00_set_field32(®, GPIO_CTRL_VAL7, 1); else rt2x00_set_field32(®, GPIO_CTRL_VAL7, 0); @@ -2441,7 +2441,7 @@ static void rt2800_config_channel_rf3053(struct rt2x00_dev *rt2x00dev, rt2x00_set_field8(&bbp, BBP110_TX2_POWER, 0); rt2800_bbp_write(rt2x00dev, 110, bbp); - if (rf->channel <= 14) { + if (rt2x00dev->curr_band == NL80211_BAND_2GHZ) { /* Restore BBP 25 & 26 for 2.4 GHz */ rt2800_bbp_write(rt2x00dev, 25, drv_data->bbp25); rt2800_bbp_write(rt2x00dev, 26, drv_data->bbp26); @@ -2463,14 +2463,14 @@ static void rt2800_config_channel_rf3053(struct rt2x00_dev *rt2x00dev, rfcsr = rt2800_rfcsr_read(rt2x00dev, 11); rt2x00_set_field8(&rfcsr, RFCSR11_PLL_IDOH, 1); - if (rf->channel <= 14) + if (rt2x00dev->curr_band == NL80211_BAND_2GHZ) rt2x00_set_field8(&rfcsr, RFCSR11_PLL_MOD, 1); else rt2x00_set_field8(&rfcsr, RFCSR11_PLL_MOD, 2); rt2800_rfcsr_write(rt2x00dev, 11, rfcsr); rfcsr = rt2800_rfcsr_read(rt2x00dev, 53); - if (rf->channel <= 14) { + if (rt2x00dev->curr_band == NL80211_BAND_2GHZ) { rfcsr = 0; rt2x00_set_field8(&rfcsr, RFCSR53_TX_POWER, info->default_power1 & 0x1f); @@ -2485,7 +2485,7 @@ static void rt2800_config_channel_rf3053(struct rt2x00_dev *rt2x00dev, rt2800_rfcsr_write(rt2x00dev, 53, rfcsr); rfcsr = rt2800_rfcsr_read(rt2x00dev, 55); - if (rf->channel <= 14) { + if (rt2x00dev->curr_band == NL80211_BAND_2GHZ) { rfcsr = 0; rt2x00_set_field8(&rfcsr, RFCSR55_TX_POWER, info->default_power2 & 0x1f); @@ -2500,7 +2500,7 @@ static void rt2800_config_channel_rf3053(struct rt2x00_dev *rt2x00dev, rt2800_rfcsr_write(rt2x00dev, 55, rfcsr); rfcsr = rt2800_rfcsr_read(rt2x00dev, 54); - if (rf->channel <= 14) { + if (rt2x00dev->curr_band == NL80211_BAND_2GHZ) { rfcsr = 0; rt2x00_set_field8(&rfcsr, RFCSR54_TX_POWER, info->default_power3 & 0x1f); @@ -2569,7 +2569,7 @@ static void rt2800_config_channel_rf3053(struct rt2x00_dev *rt2x00dev, rfcsr = rt2800_rfcsr_read(rt2x00dev, 32); rt2x00_set_field8(&rfcsr, RFCSR32_TX_AGC_FC, txrx_agc_fc); - if (rf->channel <= 14) + if (rt2x00dev->curr_band == NL80211_BAND_2GHZ) rfcsr = 0xa0; else rfcsr = 0x80; @@ -2582,28 +2582,28 @@ static void rt2800_config_channel_rf3053(struct rt2x00_dev *rt2x00dev, /* Band selection */ rfcsr = rt2800_rfcsr_read(rt2x00dev, 36); - if (rf->channel <= 14) + if (rt2x00dev->curr_band == NL80211_BAND_2GHZ) rt2x00_set_field8(&rfcsr, RFCSR36_RF_BS, 1); else rt2x00_set_field8(&rfcsr, RFCSR36_RF_BS, 0); rt2800_rfcsr_write(rt2x00dev, 36, rfcsr); rfcsr = rt2800_rfcsr_read(rt2x00dev, 34); - if (rf->channel <= 14) + if (rt2x00dev->curr_band == NL80211_BAND_2GHZ) rfcsr = 0x3c; else rfcsr = 0x20; rt2800_rfcsr_write(rt2x00dev, 34, rfcsr); rfcsr = rt2800_rfcsr_read(rt2x00dev, 12); - if (rf->channel <= 14) + if (rt2x00dev->curr_band == NL80211_BAND_2GHZ) rfcsr = 0x1a; else rfcsr = 0x12; rt2800_rfcsr_write(rt2x00dev, 12, rfcsr); rfcsr = rt2800_rfcsr_read(rt2x00dev, 6); - if (rf->channel >= 1 && rf->channel <= 14) + if (rt2x00dev->curr_band == NL80211_BAND_2GHZ) rt2x00_set_field8(&rfcsr, RFCSR6_VCO_IC, 1); else if (rf->channel >= 36 && rf->channel <= 64) rt2x00_set_field8(&rfcsr, RFCSR6_VCO_IC, 2); @@ -2619,7 +2619,7 @@ static void rt2800_config_channel_rf3053(struct rt2x00_dev *rt2x00dev, rt2800_rfcsr_write(rt2x00dev, 46, 0x60); - if (rf->channel <= 14) { + if (rt2x00dev->curr_band == NL80211_BAND_2GHZ) { rt2800_rfcsr_write(rt2x00dev, 10, 0xd3); rt2800_rfcsr_write(rt2x00dev, 13, 0x12); } else { @@ -2632,7 +2632,7 @@ static void rt2800_config_channel_rf3053(struct rt2x00_dev *rt2x00dev, rt2800_rfcsr_write(rt2x00dev, 51, rfcsr); rfcsr = rt2800_rfcsr_read(rt2x00dev, 51); - if (rf->channel <= 14) { + if (rt2x00dev->curr_band == NL80211_BAND_2GHZ) { rt2x00_set_field8(&rfcsr, RFCSR51_BITS24, 5); rt2x00_set_field8(&rfcsr, RFCSR51_BITS57, 3); } else { @@ -2642,7 +2642,7 @@ static void rt2800_config_channel_rf3053(struct rt2x00_dev *rt2x00dev, rt2800_rfcsr_write(rt2x00dev, 51, rfcsr); rfcsr = rt2800_rfcsr_read(rt2x00dev, 49); - if (rf->channel <= 14) + if (rt2x00dev->curr_band == NL80211_BAND_2GHZ) rt2x00_set_field8(&rfcsr, RFCSR49_TX_LO1_IC, 3); else rt2x00_set_field8(&rfcsr, RFCSR49_TX_LO1_IC, 2); @@ -2657,13 +2657,13 @@ static void rt2800_config_channel_rf3053(struct rt2x00_dev *rt2x00dev, rt2800_rfcsr_write(rt2x00dev, 50, rfcsr); rfcsr = rt2800_rfcsr_read(rt2x00dev, 57); - if (rf->channel <= 14) + if (rt2x00dev->curr_band == NL80211_BAND_2GHZ) rt2x00_set_field8(&rfcsr, RFCSR57_DRV_CC, 0x1b); else rt2x00_set_field8(&rfcsr, RFCSR57_DRV_CC, 0x0f); rt2800_rfcsr_write(rt2x00dev, 57, rfcsr); - if (rf->channel <= 14) { + if (rt2x00dev->curr_band == NL80211_BAND_2GHZ) { rt2800_rfcsr_write(rt2x00dev, 44, 0x93); rt2800_rfcsr_write(rt2x00dev, 52, 0x45); } else { @@ -2673,7 +2673,7 @@ static void rt2800_config_channel_rf3053(struct rt2x00_dev *rt2x00dev, /* Initiate VCO calibration */ rfcsr = rt2800_rfcsr_read(rt2x00dev, 3); - if (rf->channel <= 14) { + if (rt2x00dev->curr_band == NL80211_BAND_2GHZ) { rt2x00_set_field8(&rfcsr, RFCSR3_VCOCAL_EN, 1); } else { rt2x00_set_field8(&rfcsr, RFCSR3_BIT1, 1); @@ -2685,7 +2685,7 @@ static void rt2800_config_channel_rf3053(struct rt2x00_dev *rt2x00dev, } rt2800_rfcsr_write(rt2x00dev, 3, rfcsr); - if (rf->channel >= 1 && rf->channel <= 14) { + if (rt2x00dev->curr_band == NL80211_BAND_2GHZ) { rfcsr = 0x23; if (txbf_enabled) rt2x00_set_field8(&rfcsr, RFCSR39_RX_DIV, 1); @@ -2741,7 +2741,7 @@ static void rt2800_config_channel_rf3290(struct rt2x00_dev *rt2x00dev, rt2800_freq_cal_mode1(rt2x00dev); - if (rf->channel <= 14) { + if (rt2x00dev->curr_band == NL80211_BAND_2GHZ) { if (rf->channel == 6) rt2800_bbp_write(rt2x00dev, 68, 0x0c); else @@ -2786,12 +2786,12 @@ static void rt2800_config_channel_rf3322(struct rt2x00_dev *rt2x00dev, rt2x00_set_field8(&rfcsr, RFCSR1_RX0_PD, 1); rt2x00_set_field8(&rfcsr, RFCSR1_TX0_PD, 1); - if ( rt2x00dev->default_ant.tx_chain_num == 2 ) + if (rt2x00dev->default_ant.tx_chain_num == 2) rt2x00_set_field8(&rfcsr, RFCSR1_TX1_PD, 1); else rt2x00_set_field8(&rfcsr, RFCSR1_TX1_PD, 0); - if ( rt2x00dev->default_ant.rx_chain_num == 2 ) + if (rt2x00dev->default_ant.rx_chain_num == 2) rt2x00_set_field8(&rfcsr, RFCSR1_RX1_PD, 1); else rt2x00_set_field8(&rfcsr, RFCSR1_RX1_PD, 0); @@ -2920,7 +2920,8 @@ static void rt2800_config_channel_rf55xx(struct rt2x00_dev *rt2x00dev, reg = rt2800_register_read(rt2x00dev, LDO_CFG0); rt2x00_set_field32(®, LDO_CFG0_LDO_CORE_VLEVEL, - (rf->channel > 14 || conf_is_ht40(conf)) ? 5 : 0); + (rt2x00dev->curr_band == NL80211_BAND_5GHZ || + conf_is_ht40(conf)) ? 5 : 0); rt2800_register_write(rt2x00dev, LDO_CFG0, reg); /* Order of values on rf_channel entry: N, K, mod, R */ @@ -2937,7 +2938,7 @@ static void rt2800_config_channel_rf55xx(struct rt2x00_dev *rt2x00dev, rt2x00_set_field8(&rfcsr, RFCSR11_MOD, (rf->rf3 - 8) & 0x3); rt2800_rfcsr_write(rt2x00dev, 11, rfcsr); - if (rf->channel <= 14) { + if (rt2x00dev->curr_band == NL80211_BAND_2GHZ) { rt2800_rfcsr_write(rt2x00dev, 10, 0x90); /* FIXME: RF11 owerwrite ? */ rt2800_rfcsr_write(rt2x00dev, 11, 0x4A); @@ -3160,24 +3161,34 @@ static void rt2800_config_channel_rf55xx(struct rt2x00_dev *rt2x00dev, rt2800_bbp_write(rt2x00dev, 63, 0x37 - rt2x00dev->lna_gain); rt2800_bbp_write(rt2x00dev, 64, 0x37 - rt2x00dev->lna_gain); - rt2800_bbp_write(rt2x00dev, 79, (rf->channel <= 14) ? 0x1C : 0x18); - rt2800_bbp_write(rt2x00dev, 80, (rf->channel <= 14) ? 0x0E : 0x08); - rt2800_bbp_write(rt2x00dev, 81, (rf->channel <= 14) ? 0x3A : 0x38); - rt2800_bbp_write(rt2x00dev, 82, (rf->channel <= 14) ? 0x62 : 0x92); + rt2800_bbp_write(rt2x00dev, 79, (rt2x00dev->curr_band == NL80211_BAND_2GHZ) + ? 0x1C : 0x18); + rt2800_bbp_write(rt2x00dev, 80, (rt2x00dev->curr_band == NL80211_BAND_2GHZ) + ? 0x0E : 0x08); + rt2800_bbp_write(rt2x00dev, 81, (rt2x00dev->curr_band == NL80211_BAND_2GHZ) + ? 0x3A : 0x38); + rt2800_bbp_write(rt2x00dev, 82, (rt2x00dev->curr_band == NL80211_BAND_2GHZ) + ? 0x62 : 0x92); /* GLRT band configuration */ rt2800_bbp_write(rt2x00dev, 195, 128); - rt2800_bbp_write(rt2x00dev, 196, (rf->channel <= 14) ? 0xE0 : 0xF0); + rt2800_bbp_write(rt2x00dev, 196, (rt2x00dev->curr_band == NL80211_BAND_2GHZ) + ? 0xE0 : 0xF0); rt2800_bbp_write(rt2x00dev, 195, 129); - rt2800_bbp_write(rt2x00dev, 196, (rf->channel <= 14) ? 0x1F : 0x1E); + rt2800_bbp_write(rt2x00dev, 196, (rt2x00dev->curr_band == NL80211_BAND_2GHZ) + ? 0x1F : 0x1E); rt2800_bbp_write(rt2x00dev, 195, 130); - rt2800_bbp_write(rt2x00dev, 196, (rf->channel <= 14) ? 0x38 : 0x28); + rt2800_bbp_write(rt2x00dev, 196, (rt2x00dev->curr_band == NL80211_BAND_2GHZ) + ? 0x38 : 0x28); rt2800_bbp_write(rt2x00dev, 195, 131); - rt2800_bbp_write(rt2x00dev, 196, (rf->channel <= 14) ? 0x32 : 0x20); + rt2800_bbp_write(rt2x00dev, 196, (rt2x00dev->curr_band == NL80211_BAND_2GHZ) + ? 0x32 : 0x20); rt2800_bbp_write(rt2x00dev, 195, 133); - rt2800_bbp_write(rt2x00dev, 196, (rf->channel <= 14) ? 0x28 : 0x7F); + rt2800_bbp_write(rt2x00dev, 196, (rt2x00dev->curr_band == NL80211_BAND_2GHZ) + ? 0x28 : 0x7F); rt2800_bbp_write(rt2x00dev, 195, 124); - rt2800_bbp_write(rt2x00dev, 196, (rf->channel <= 14) ? 0x19 : 0x7F); + rt2800_bbp_write(rt2x00dev, 196, (rt2x00dev->curr_band == NL80211_BAND_2GHZ) + ? 0x19 : 0x7F); } static void rt2800_config_channel_rf7620(struct rt2x00_dev *rt2x00dev, @@ -3438,7 +3449,7 @@ static void rt2800_iq_calibrate(struct rt2x00_dev *rt2x00dev, int channel) /* TX0 IQ Gain */ rt2800_bbp_write(rt2x00dev, 158, 0x2c); - if (channel <= 14) + if (rt2x00dev->curr_band == NL80211_BAND_2GHZ) cal = rt2x00_eeprom_byte(rt2x00dev, EEPROM_IQ_GAIN_CAL_TX0_2G); else if (channel >= 36 && channel <= 64) cal = rt2x00_eeprom_byte(rt2x00dev, @@ -3455,7 +3466,7 @@ static void rt2800_iq_calibrate(struct rt2x00_dev *rt2x00dev, int channel) /* TX0 IQ Phase */ rt2800_bbp_write(rt2x00dev, 158, 0x2d); - if (channel <= 14) + if (rt2x00dev->curr_band == NL80211_BAND_2GHZ) cal = rt2x00_eeprom_byte(rt2x00dev, EEPROM_IQ_PHASE_CAL_TX0_2G); else if (channel >= 36 && channel <= 64) cal = rt2x00_eeprom_byte(rt2x00dev, @@ -3472,7 +3483,7 @@ static void rt2800_iq_calibrate(struct rt2x00_dev *rt2x00dev, int channel) /* TX1 IQ Gain */ rt2800_bbp_write(rt2x00dev, 158, 0x4a); - if (channel <= 14) + if (rt2x00dev->curr_band == NL80211_BAND_2GHZ) cal = rt2x00_eeprom_byte(rt2x00dev, EEPROM_IQ_GAIN_CAL_TX1_2G); else if (channel >= 36 && channel <= 64) cal = rt2x00_eeprom_byte(rt2x00dev, @@ -3489,7 +3500,7 @@ static void rt2800_iq_calibrate(struct rt2x00_dev *rt2x00dev, int channel) /* TX1 IQ Phase */ rt2800_bbp_write(rt2x00dev, 158, 0x4b); - if (channel <= 14) + if (rt2x00dev->curr_band == NL80211_BAND_2GHZ) cal = rt2x00_eeprom_byte(rt2x00dev, EEPROM_IQ_PHASE_CAL_TX1_2G); else if (channel >= 36 && channel <= 64) cal = rt2x00_eeprom_byte(rt2x00dev, @@ -3525,7 +3536,7 @@ static char rt2800_txpower_to_dev(struct rt2x00_dev *rt2x00dev, if (rt2x00_rt(rt2x00dev, RT3593)) txpower = rt2x00_get_field8(txpower, EEPROM_TXPOWER_ALC); - if (channel <= 14) + if (rt2x00dev->curr_band == NL80211_BAND_2GHZ) return clamp_t(char, txpower, MIN_G_TXPOWER, MAX_G_TXPOWER); if (rt2x00_rt(rt2x00dev, RT3593)) @@ -3638,7 +3649,7 @@ static void rt2800_config_channel(struct rt2x00_dev *rt2x00dev, rt2800_bbp_write(rt2x00dev, 86, 0x38); rt2800_bbp_write(rt2x00dev, 83, 0x6a); } else if (rt2x00_rt(rt2x00dev, RT3593)) { - if (rf->channel > 14) { + if (rt2x00dev->curr_band == NL80211_BAND_5GHZ) { /* Disable CCK Packet detection on 5GHz */ rt2800_bbp_write(rt2x00dev, 70, 0x00); } else { @@ -3661,7 +3672,7 @@ static void rt2800_config_channel(struct rt2x00_dev *rt2x00dev, rt2800_bbp_write(rt2x00dev, 86, 0); } - if (rf->channel <= 14) { + if (rt2x00dev->curr_band == NL80211_BAND_2GHZ) { if (!rt2x00_rt(rt2x00dev, RT5390) && !rt2x00_rt(rt2x00dev, RT5392) && !rt2x00_rt(rt2x00dev, RT6352)) { @@ -3698,8 +3709,10 @@ static void rt2800_config_channel(struct rt2x00_dev *rt2x00dev, reg = rt2800_register_read(rt2x00dev, TX_BAND_CFG); rt2x00_set_field32(®, TX_BAND_CFG_HT40_MINUS, conf_is_ht40_minus(conf)); - rt2x00_set_field32(®, TX_BAND_CFG_A, rf->channel > 14); - rt2x00_set_field32(®, TX_BAND_CFG_BG, rf->channel <= 14); + rt2x00_set_field32(®, TX_BAND_CFG_A, rt2x00dev->curr_band == + NL80211_BAND_5GHZ); + rt2x00_set_field32(®, TX_BAND_CFG_BG, rt2x00dev->curr_band == + NL80211_BAND_2GHZ); rt2800_register_write(rt2x00dev, TX_BAND_CFG, reg); if (rt2x00_rt(rt2x00dev, RT3572)) @@ -3765,7 +3778,7 @@ static void rt2800_config_channel(struct rt2x00_dev *rt2x00dev, rt2800_rfcsr_write(rt2x00dev, 8, 0x80); /* AGC init */ - if (rf->channel <= 14) + if (rt2x00dev->curr_band == NL80211_BAND_2GHZ) reg = 0x1c + (2 * rt2x00dev->lna_gain); else reg = 0x22 + ((rt2x00dev->lna_gain * 5) / 3); @@ -3781,7 +3794,7 @@ static void rt2800_config_channel(struct rt2x00_dev *rt2x00dev, rt2x00_is_pcie(rt2x00dev)) { /* GPIO #8 controls all paths */ rt2x00_set_field32(®, GPIO_CTRL_DIR8, 0); - if (rf->channel <= 14) + if (rt2x00dev->curr_band == NL80211_BAND_2GHZ) rt2x00_set_field32(®, GPIO_CTRL_VAL8, 1); else rt2x00_set_field32(®, GPIO_CTRL_VAL8, 0); @@ -3806,7 +3819,7 @@ static void rt2800_config_channel(struct rt2x00_dev *rt2x00dev, rt2800_register_write(rt2x00dev, GPIO_CTRL, reg); /* AGC init */ - if (rf->channel <= 14) + if (rt2x00dev->curr_band == NL80211_BAND_2GHZ) reg = 0x1c + 2 * rt2x00dev->lna_gain; else reg = 0x22 + ((rt2x00dev->lna_gain * 5) / 3); @@ -3833,7 +3846,7 @@ static void rt2800_config_channel(struct rt2x00_dev *rt2x00dev, if (rt2x00_rt(rt2x00dev, RT6352)) reg = 0x04; else - reg = rf->channel <= 14 ? 0x1c : 0x24; + reg = rt2x00dev->curr_band == NL80211_BAND_2GHZ ? 0x1c : 0x24; reg += 2 * rt2x00dev->lna_gain; rt2800_bbp_write_with_rx_chain(rt2x00dev, 66, reg); @@ -4915,7 +4928,7 @@ void rt2800_vco_calibration(struct rt2x00_dev *rt2x00dev) usleep_range(min_sleep, min_sleep * 2); tx_pin = rt2800_register_read(rt2x00dev, TX_PIN_CFG); - if (rt2x00dev->rf_channel <= 14) { + if (rt2x00dev->curr_band == NL80211_BAND_2GHZ) { switch (rt2x00dev->default_ant.tx_chain_num) { case 3: rt2x00_set_field32(&tx_pin, TX_PIN_CFG_PA_PE_G2_EN, 1); @@ -9265,8 +9278,9 @@ static int rt2800_probe_hw_mode(struct rt2x00_dev *rt2x00dev) if (WARN_ON_ONCE(!spec->channels)) return -ENODEV; - spec->supported_bands = SUPPORT_BAND_2GHZ; - if (spec->num_channels > 14) + if (rt2x00dev->curr_band == NL80211_BAND_2GHZ) + spec->supported_bands = SUPPORT_BAND_2GHZ; + if (rt2x00dev->curr_band == NL80211_BAND_5GHZ) spec->supported_bands |= SUPPORT_BAND_5GHZ; /* @@ -9336,7 +9350,7 @@ static int rt2800_probe_hw_mode(struct rt2x00_dev *rt2x00dev) info[i].default_power3 = default_power3[i]; } - if (spec->num_channels > 14) { + if (rt2x00dev->curr_band == NL80211_BAND_5GHZ) { default_power1 = rt2800_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_A1); default_power2 = rt2800_eeprom_addr(rt2x00dev, From patchwork Mon Sep 17 16:32:52 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Tom Psyborg X-Patchwork-Id: 10603025 X-Patchwork-Delegate: kvalo@adurom.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 5222915A6 for ; Mon, 17 Sep 2018 16:33:08 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 42E7E291EB for ; Mon, 17 Sep 2018 16:33:08 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 373D729294; Mon, 17 Sep 2018 16:33:08 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FROM,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id C92E9291EB for ; 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Mon, 17 Sep 2018 09:33:03 -0700 (PDT) From: =?utf-8?q?Tomislav_Po=C5=BEega?= To: linux-wireless@vger.kernel.org Subject: [PATCH 2/5] rt2x00: rework channel config function Date: Mon, 17 Sep 2018 18:32:52 +0200 Message-Id: <1537201975-3032-2-git-send-email-pozega.tomislav@gmail.com> X-Mailer: git-send-email 1.7.0.4 In-Reply-To: <1537201975-3032-1-git-send-email-pozega.tomislav@gmail.com> References: <1537201975-3032-1-git-send-email-pozega.tomislav@gmail.com> MIME-Version: 1.0 Sender: linux-wireless-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-wireless@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Enable LNAs only for the current operating band. Change power amplifiers enabling style to the one in vco calibration routine and drop redundant cap_bt_coexist enable of PA0. Signed-off-by: Tomislav Požega --- drivers/net/wireless/ralink/rt2x00/rt2800lib.c | 75 ++++++++++++------------ 1 files changed, 37 insertions(+), 38 deletions(-) diff --git a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c index 33968ab..5546bd8 100644 --- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c +++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c @@ -3723,49 +3723,48 @@ static void rt2800_config_channel(struct rt2x00_dev *rt2x00dev, else tx_pin = 0; - switch (rt2x00dev->default_ant.tx_chain_num) { - case 3: - /* Turn on tertiary PAs */ - rt2x00_set_field32(&tx_pin, TX_PIN_CFG_PA_PE_A2_EN, - rf->channel > 14); - rt2x00_set_field32(&tx_pin, TX_PIN_CFG_PA_PE_G2_EN, - rf->channel <= 14); - /* fall-through */ - case 2: - /* Turn on secondary PAs */ - rt2x00_set_field32(&tx_pin, TX_PIN_CFG_PA_PE_A1_EN, - rf->channel > 14); - rt2x00_set_field32(&tx_pin, TX_PIN_CFG_PA_PE_G1_EN, - rf->channel <= 14); - /* fall-through */ - case 1: - /* Turn on primary PAs */ - rt2x00_set_field32(&tx_pin, TX_PIN_CFG_PA_PE_A0_EN, - rf->channel > 14); - if (rt2x00_has_cap_bt_coexist(rt2x00dev)) + if (rt2x00dev->curr_band == NL80211_BAND_5GHZ) { + switch (rt2x00dev->default_ant.tx_chain_num) { + case 3: + rt2x00_set_field32(&tx_pin, TX_PIN_CFG_PA_PE_A2_EN, 1); + case 2: + rt2x00_set_field32(&tx_pin, TX_PIN_CFG_PA_PE_A1_EN, 1); + case 1: + rt2x00_set_field32(&tx_pin, TX_PIN_CFG_PA_PE_A0_EN, 1); + break; + } + } else { + switch (rt2x00dev->default_ant.tx_chain_num) { + case 3: + rt2x00_set_field32(&tx_pin, TX_PIN_CFG_PA_PE_G2_EN, 1); + case 2: + rt2x00_set_field32(&tx_pin, TX_PIN_CFG_PA_PE_G1_EN, 1); + case 1: rt2x00_set_field32(&tx_pin, TX_PIN_CFG_PA_PE_G0_EN, 1); - else - rt2x00_set_field32(&tx_pin, TX_PIN_CFG_PA_PE_G0_EN, - rf->channel <= 14); break; + } } - switch (rt2x00dev->default_ant.rx_chain_num) { - case 3: - /* Turn on tertiary LNAs */ - rt2x00_set_field32(&tx_pin, TX_PIN_CFG_LNA_PE_A2_EN, 1); - rt2x00_set_field32(&tx_pin, TX_PIN_CFG_LNA_PE_G2_EN, 1); - /* fall-through */ - case 2: - /* Turn on secondary LNAs */ - rt2x00_set_field32(&tx_pin, TX_PIN_CFG_LNA_PE_A1_EN, 1); - rt2x00_set_field32(&tx_pin, TX_PIN_CFG_LNA_PE_G1_EN, 1); - /* fall-through */ - case 1: - /* Turn on primary LNAs */ - rt2x00_set_field32(&tx_pin, TX_PIN_CFG_LNA_PE_A0_EN, 1); - rt2x00_set_field32(&tx_pin, TX_PIN_CFG_LNA_PE_G0_EN, 1); + if (rt2x00dev->curr_band == NL80211_BAND_5GHZ) { + switch (rt2x00dev->default_ant.rx_chain_num) { + case 3: + rt2x00_set_field32(&tx_pin, TX_PIN_CFG_LNA_PE_A2_EN, 1); + case 2: + rt2x00_set_field32(&tx_pin, TX_PIN_CFG_LNA_PE_A1_EN, 1); + case 1: + rt2x00_set_field32(&tx_pin, TX_PIN_CFG_LNA_PE_A0_EN, 1); + break; + } + } else { + switch (rt2x00dev->default_ant.rx_chain_num) { + case 3: + rt2x00_set_field32(&tx_pin, TX_PIN_CFG_LNA_PE_G2_EN, 1); + case 2: + rt2x00_set_field32(&tx_pin, TX_PIN_CFG_LNA_PE_G1_EN, 1); + case 1: + rt2x00_set_field32(&tx_pin, TX_PIN_CFG_LNA_PE_G0_EN, 1); break; + } } rt2x00_set_field32(&tx_pin, TX_PIN_CFG_RFTR_EN, 1); From patchwork Mon Sep 17 16:32:53 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Tom Psyborg X-Patchwork-Id: 10603029 X-Patchwork-Delegate: kvalo@adurom.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 67252161F for ; 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Mon, 17 Sep 2018 09:33:04 -0700 (PDT) Received: from localhost.localdomain ([31.147.208.18]) by smtp.googlemail.com with ESMTPSA id c3-v6sm17807307wrm.56.2018.09.17.09.33.03 for (version=TLS1 cipher=AES128-SHA bits=128/128); Mon, 17 Sep 2018 09:33:04 -0700 (PDT) From: =?utf-8?q?Tomislav_Po=C5=BEega?= To: linux-wireless@vger.kernel.org Subject: [PATCH 3/5] rt2x00: remove unneeded check Date: Mon, 17 Sep 2018 18:32:53 +0200 Message-Id: <1537201975-3032-3-git-send-email-pozega.tomislav@gmail.com> X-Mailer: git-send-email 1.7.0.4 In-Reply-To: <1537201975-3032-1-git-send-email-pozega.tomislav@gmail.com> References: <1537201975-3032-1-git-send-email-pozega.tomislav@gmail.com> MIME-Version: 1.0 Sender: linux-wireless-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-wireless@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Remove band check from rf53xx channel config routine since all chips using it are single band. Signed-off-by: Tomislav Požega --- drivers/net/wireless/ralink/rt2x00/rt2800lib.c | 103 ++++++++++++------------ 1 files changed, 50 insertions(+), 53 deletions(-) diff --git a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c index 5546bd8..a47bbb6 100644 --- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c +++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c @@ -2809,6 +2809,7 @@ static void rt2800_config_channel_rf53xx(struct rt2x00_dev *rt2x00dev, struct rf_channel *rf, struct channel_info *info) { + int idx = rf->channel-1; u8 rfcsr; rt2800_rfcsr_write(rt2x00dev, 8, rf->rf1); @@ -2847,60 +2848,56 @@ static void rt2800_config_channel_rf53xx(struct rt2x00_dev *rt2x00dev, rt2800_freq_cal_mode1(rt2x00dev); - if (rf->channel <= 14) { - int idx = rf->channel-1; - - if (rt2x00_has_cap_bt_coexist(rt2x00dev)) { - if (rt2x00_rt_rev_gte(rt2x00dev, RT5390, REV_RT5390F)) { - /* r55/r59 value array of channel 1~14 */ - static const char r55_bt_rev[] = {0x83, 0x83, - 0x83, 0x73, 0x73, 0x63, 0x53, 0x53, - 0x53, 0x43, 0x43, 0x43, 0x43, 0x43}; - static const char r59_bt_rev[] = {0x0e, 0x0e, - 0x0e, 0x0e, 0x0e, 0x0b, 0x0a, 0x09, - 0x07, 0x07, 0x07, 0x07, 0x07, 0x07}; - - rt2800_rfcsr_write(rt2x00dev, 55, - r55_bt_rev[idx]); - rt2800_rfcsr_write(rt2x00dev, 59, - r59_bt_rev[idx]); - } else { - static const char r59_bt[] = {0x8b, 0x8b, 0x8b, - 0x8b, 0x8b, 0x8b, 0x8b, 0x8a, 0x89, - 0x88, 0x88, 0x86, 0x85, 0x84}; - - rt2800_rfcsr_write(rt2x00dev, 59, r59_bt[idx]); - } + if (rt2x00_has_cap_bt_coexist(rt2x00dev)) { + if (rt2x00_rt_rev_gte(rt2x00dev, RT5390, REV_RT5390F)) { + /* r55/r59 value array of channel 1~14 */ + static const char r55_bt_rev[] = {0x83, 0x83, + 0x83, 0x73, 0x73, 0x63, 0x53, 0x53, + 0x53, 0x43, 0x43, 0x43, 0x43, 0x43}; + static const char r59_bt_rev[] = {0x0e, 0x0e, + 0x0e, 0x0e, 0x0e, 0x0b, 0x0a, 0x09, + 0x07, 0x07, 0x07, 0x07, 0x07, 0x07}; + + rt2800_rfcsr_write(rt2x00dev, 55, + r55_bt_rev[idx]); + rt2800_rfcsr_write(rt2x00dev, 59, + r59_bt_rev[idx]); } else { - if (rt2x00_rt_rev_gte(rt2x00dev, RT5390, REV_RT5390F)) { - static const char r55_nonbt_rev[] = {0x23, 0x23, - 0x23, 0x23, 0x13, 0x13, 0x03, 0x03, - 0x03, 0x03, 0x03, 0x03, 0x03, 0x03}; - static const char r59_nonbt_rev[] = {0x07, 0x07, - 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, - 0x07, 0x07, 0x06, 0x05, 0x04, 0x04}; - - rt2800_rfcsr_write(rt2x00dev, 55, - r55_nonbt_rev[idx]); - rt2800_rfcsr_write(rt2x00dev, 59, - r59_nonbt_rev[idx]); - } else if (rt2x00_rt(rt2x00dev, RT5390) || - rt2x00_rt(rt2x00dev, RT5392) || - rt2x00_rt(rt2x00dev, RT6352)) { - static const char r59_non_bt[] = {0x8f, 0x8f, - 0x8f, 0x8f, 0x8f, 0x8f, 0x8f, 0x8d, - 0x8a, 0x88, 0x88, 0x87, 0x87, 0x86}; - - rt2800_rfcsr_write(rt2x00dev, 59, - r59_non_bt[idx]); - } else if (rt2x00_rt(rt2x00dev, RT5350)) { - static const char r59_non_bt[] = {0x0b, 0x0b, - 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0a, - 0x0a, 0x09, 0x08, 0x07, 0x07, 0x06}; - - rt2800_rfcsr_write(rt2x00dev, 59, - r59_non_bt[idx]); - } + static const char r59_bt[] = {0x8b, 0x8b, 0x8b, + 0x8b, 0x8b, 0x8b, 0x8b, 0x8a, 0x89, + 0x88, 0x88, 0x86, 0x85, 0x84}; + + rt2800_rfcsr_write(rt2x00dev, 59, r59_bt[idx]); + } + } else { + if (rt2x00_rt_rev_gte(rt2x00dev, RT5390, REV_RT5390F)) { + static const char r55_nonbt_rev[] = {0x23, 0x23, + 0x23, 0x23, 0x13, 0x13, 0x03, 0x03, + 0x03, 0x03, 0x03, 0x03, 0x03, 0x03}; + static const char r59_nonbt_rev[] = {0x07, 0x07, + 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, + 0x07, 0x07, 0x06, 0x05, 0x04, 0x04}; + + rt2800_rfcsr_write(rt2x00dev, 55, + r55_nonbt_rev[idx]); + rt2800_rfcsr_write(rt2x00dev, 59, + r59_nonbt_rev[idx]); + } else if (rt2x00_rt(rt2x00dev, RT5390) || + rt2x00_rt(rt2x00dev, RT5392) || + rt2x00_rt(rt2x00dev, RT6352)) { + static const char r59_non_bt[] = {0x8f, 0x8f, + 0x8f, 0x8f, 0x8f, 0x8f, 0x8f, 0x8d, + 0x8a, 0x88, 0x88, 0x87, 0x87, 0x86}; + + rt2800_rfcsr_write(rt2x00dev, 59, + r59_non_bt[idx]); + } else if (rt2x00_rt(rt2x00dev, RT5350)) { + static const char r59_non_bt[] = {0x0b, 0x0b, + 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0a, + 0x0a, 0x09, 0x08, 0x07, 0x07, 0x06}; + + rt2800_rfcsr_write(rt2x00dev, 59, + r59_non_bt[idx]); } } } From patchwork Mon Sep 17 16:32:54 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Tom Psyborg X-Patchwork-Id: 10603031 X-Patchwork-Delegate: kvalo@adurom.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7AF4915A6 for ; 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Mon, 17 Sep 2018 09:33:05 -0700 (PDT) Received: from localhost.localdomain ([31.147.208.18]) by smtp.googlemail.com with ESMTPSA id c3-v6sm17807307wrm.56.2018.09.17.09.33.04 for (version=TLS1 cipher=AES128-SHA bits=128/128); Mon, 17 Sep 2018 09:33:05 -0700 (PDT) From: =?utf-8?q?Tomislav_Po=C5=BEega?= To: linux-wireless@vger.kernel.org Subject: [PATCH 4/5] rt2x00: remove confusing AGC register Date: Mon, 17 Sep 2018 18:32:54 +0200 Message-Id: <1537201975-3032-4-git-send-email-pozega.tomislav@gmail.com> X-Mailer: git-send-email 1.7.0.4 In-Reply-To: <1537201975-3032-1-git-send-email-pozega.tomislav@gmail.com> References: <1537201975-3032-1-git-send-email-pozega.tomislav@gmail.com> MIME-Version: 1.0 Sender: linux-wireless-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-wireless@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Register 66 was causing issues on RT6352 if set to the same value as in MTK driver. With 1c reg value device was working fine in both HT20 and HT40 modes. Signed-off-by: Tomislav Požega --- drivers/net/wireless/ralink/rt2x00/rt2800lib.c | 5 +---- 1 files changed, 1 insertions(+), 4 deletions(-) diff --git a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c index a47bbb6..a5eb17a 100644 --- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c +++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c @@ -3839,10 +3839,7 @@ static void rt2800_config_channel(struct rt2x00_dev *rt2x00dev, rt2800_bbp_write(rt2x00dev, 196, reg); /* AGC init */ - if (rt2x00_rt(rt2x00dev, RT6352)) - reg = 0x04; - else - reg = rt2x00dev->curr_band == NL80211_BAND_2GHZ ? 0x1c : 0x24; + reg = rt2x00dev->curr_band == NL80211_BAND_2GHZ ? 0x1c : 0x24; reg += 2 * rt2x00dev->lna_gain; rt2800_bbp_write_with_rx_chain(rt2x00dev, 66, reg); From patchwork Mon Sep 17 16:32:55 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Tom Psyborg X-Patchwork-Id: 10603035 X-Patchwork-Delegate: kvalo@adurom.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 1136F17D5 for ; Mon, 17 Sep 2018 16:33:13 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0119429272 for ; Mon, 17 Sep 2018 16:33:13 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id E92F1292F4; Mon, 17 Sep 2018 16:33:12 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FROM,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3BC6329272 for ; Mon, 17 Sep 2018 16:33:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728723AbeIQWBQ (ORCPT ); Mon, 17 Sep 2018 18:01:16 -0400 Received: from mail-wm1-f66.google.com ([209.85.128.66]:54392 "EHLO mail-wm1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728065AbeIQWBO (ORCPT ); Mon, 17 Sep 2018 18:01:14 -0400 Received: by mail-wm1-f66.google.com with SMTP id c14-v6so10396355wmb.4 for ; Mon, 17 Sep 2018 09:33:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=QHBQgQ5hxzYiF3exVXsZRfgqprq8UuLcP/K0vIYCaWQ=; b=luD8EYVZ4a1yWCoJYLvSCQdFPkiIY50DQgrNR94Ei2df04VD46Qp+xwGt9FftNSoFV 0ws8K+hC2m3tUpUhmrsHkjaXFls8eZY1mprNyhDF4E8d2SZubi51Ut1p3jXme0lZdVzE EEcys5H40oPVgydOCxILyfW7HLynan4pv1ry2UAVZ8H/UFAvEqwkxKV+HMOOA1lQJLEK ZCF4eTgn7oC8n6jBKsY32jcIgdAXWkMKJa45CpLoa3Zh+/2nqtirRu4v+g02VAf7NQqO 6vQ0LvHv4q+PCMh/5mlZA3qBzH1r9N4CnZEwfgJHGT9di1bUGIUY03pgl5RkV52X0RoP gB3Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=QHBQgQ5hxzYiF3exVXsZRfgqprq8UuLcP/K0vIYCaWQ=; b=Kysiuqz2AaLS+vOtWZSDnACAO9M4o8Q/17FFwcwhCSln/rZvjr8eJJkxGiQsrusqLd mVhSR5htaMfnOCDmpSf6DVJ2bAeTyiyYgagLg4Z4za/xsmtX00EJuSfaF1lxvV84iDAP j8ageEs7KPrtrkpT93Oda9UF/TdZSxYQMjoxSacKyqbsXMtjw7c6/Z3O0h9X/x9XZNQO 6sYcJq8fOqTs251dziv6Lv2ktb27SNp8U0sZeaxjZ9LJfViMlZl/TB6g7arIa3XRIh/y TnuHC95NaKj62IWaw/etd3hCYp2TaDpAEKXrf2+ULGjdEvbsCAmxWxZMduy/ErJKhlLq VU1g== X-Gm-Message-State: APzg51BAZDnRFEbcn+woCOfQNPjqqXs6fWTuow/92rGkPa+gaxYr42d6 ZNAsEQwWDyu1aHOynhdSs7H0Jhk5 X-Google-Smtp-Source: ANB0VdaRY4XrzpX8I/1yNw2RNS1YuAI1bgbyaaLNS3xxnDijO30kGIDRwVaZ7wboD7Ssb1MZAkYsYQ== X-Received: by 2002:a1c:6854:: with SMTP id d81-v6mr11227241wmc.160.1537201986654; Mon, 17 Sep 2018 09:33:06 -0700 (PDT) Received: from localhost.localdomain ([31.147.208.18]) by smtp.googlemail.com with ESMTPSA id c3-v6sm17807307wrm.56.2018.09.17.09.33.05 for (version=TLS1 cipher=AES128-SHA bits=128/128); Mon, 17 Sep 2018 09:33:06 -0700 (PDT) From: =?utf-8?q?Tomislav_Po=C5=BEega?= To: linux-wireless@vger.kernel.org Subject: [PATCH 5/5] rt2x00: update TX_SW_CFG2 value Date: Mon, 17 Sep 2018 18:32:55 +0200 Message-Id: <1537201975-3032-5-git-send-email-pozega.tomislav@gmail.com> X-Mailer: git-send-email 1.7.0.4 In-Reply-To: <1537201975-3032-1-git-send-email-pozega.tomislav@gmail.com> References: <1537201975-3032-1-git-send-email-pozega.tomislav@gmail.com> MIME-Version: 1.0 Sender: linux-wireless-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-wireless@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Use default value of TX_SW_CFG2 register that is in charge of LNA timings. Works for somewhat higher RX throughput. Signed-off-by: Tomislav Požega --- drivers/net/wireless/ralink/rt2x00/rt2800lib.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c index a5eb17a..c5d0fb1 100644 --- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c +++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c @@ -5324,7 +5324,7 @@ static int rt2800_init_registers(struct rt2x00_dev *rt2x00dev) } else if (rt2x00_rt(rt2x00dev, RT6352)) { rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000401); rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x000C0000); - rt2800_register_write(rt2x00dev, TX_SW_CFG2, 0x00000000); + rt2800_register_write(rt2x00dev, TX_SW_CFG2, 0x000C0408); rt2800_register_write(rt2x00dev, MIMO_PS_CFG, 0x00000002); rt2800_register_write(rt2x00dev, TX_PIN_CFG, 0x00150F0F); rt2800_register_write(rt2x00dev, TX_ALC_VGA3, 0x06060606);